1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 # Select 32 or 64 bit !! 2 config MIPS
3 config 64BIT !! 3 bool
4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 default y
5 default "$(ARCH)" != "i386" !! 5 select ARCH_32BIT_OFF_T if !64BIT
6 help !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 Say yes to build a 64-bit kernel - f !! 7 select ARCH_CLOCKSOURCE_DATA
8 Say no to build a 32-bit kernel - fo !! 8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
9 !! 9 select ARCH_HAS_UBSAN_SANITIZE_ALL
10 config X86_32 <<
11 def_bool y <<
12 depends on !64BIT <<
13 # Options that are inherently 32-bit k <<
14 select ARCH_WANT_IPC_PARSE_VERSION <<
15 select CLKSRC_I8253 <<
16 select CLONE_BACKWARDS <<
17 select GENERIC_VDSO_32 <<
18 select HAVE_DEBUG_STACKOVERFLOW <<
19 select KMAP_LOCAL <<
20 select MODULES_USE_ELF_REL <<
21 select OLD_SIGACTION <<
22 select ARCH_SPLIT_ARG64 <<
23 <<
24 config X86_64 <<
25 def_bool y <<
26 depends on 64BIT <<
27 # Options that are inherently 64-bit k <<
28 select ARCH_HAS_GIGANTIC_PAGE <<
29 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
30 select ARCH_SUPPORTS_PER_VMA_LOCK <<
31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR <<
32 select HAVE_ARCH_SOFT_DIRTY <<
33 select MODULES_USE_ELF_RELA <<
34 select NEED_DMA_MAP_STATE <<
35 select SWIOTLB <<
36 select ARCH_HAS_ELFCORE_COMPAT <<
37 select ZONE_DMA32 <<
38 select EXECMEM if DYNAMIC_FTRACE <<
39 <<
40 config FORCE_DYNAMIC_FTRACE <<
41 def_bool y <<
42 depends on X86_32 <<
43 depends on FUNCTION_TRACER <<
44 select DYNAMIC_FTRACE <<
45 help <<
46 We keep the static function tracing <<
47 in order to test the non static func <<
48 generic code, as other architectures <<
49 only need to keep it around for x86_ <<
50 for x86_32. For x86_32, force DYNAMI <<
51 # <<
52 # Arch settings <<
53 # <<
54 # ( Note that options that are marked 'if X86_ <<
55 # ported to 32-bit as well. ) <<
56 # <<
57 config X86 <<
58 def_bool y <<
59 # <<
60 # Note: keep this list sorted alphabet <<
61 # <<
62 select ACPI_LEGACY_TABLES_LOOKUP <<
63 select ACPI_SYSTEM_POWER_STATES_SUPPOR <<
64 select ACPI_HOTPLUG_CPU <<
65 select ARCH_32BIT_OFF_T <<
66 select ARCH_CLOCKSOURCE_INIT <<
67 select ARCH_CONFIGURES_CPU_MITIGATIONS <<
68 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
69 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
70 select ARCH_ENABLE_MEMORY_HOTPLUG if X <<
71 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
73 select ARCH_ENABLE_THP_MIGRATION if X8 <<
74 select ARCH_HAS_ACPI_TABLE_UPGRADE <<
75 select ARCH_HAS_CACHE_LINE_SIZE <<
76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M <<
77 select ARCH_HAS_CPU_FINALIZE_INIT <<
78 select ARCH_HAS_CPU_PASID <<
79 select ARCH_HAS_CURRENT_STACK_POINTER <<
80 select ARCH_HAS_DEBUG_VIRTUAL <<
81 select ARCH_HAS_DEBUG_VM_PGTABLE <<
82 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
83 select ARCH_HAS_DMA_OPS <<
84 select ARCH_HAS_EARLY_DEBUG <<
85 select ARCH_HAS_ELF_RANDOMIZE <<
86 select ARCH_HAS_FAST_MULTIPLIER <<
87 select ARCH_HAS_FORTIFY_SOURCE 10 select ARCH_HAS_FORTIFY_SOURCE
88 select ARCH_HAS_GCOV_PROFILE_ALL !! 11 select ARCH_SUPPORTS_UPROBES
89 select ARCH_HAS_KCOV <<
90 select ARCH_HAS_KERNEL_FPU_SUPPORT <<
91 select ARCH_HAS_MEM_ENCRYPT <<
92 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS <<
94 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
95 select ARCH_HAS_PMEM_API <<
96 select ARCH_HAS_PTE_DEVMAP <<
97 select ARCH_HAS_PTE_SPECIAL <<
98 select ARCH_HAS_HW_PTE_YOUNG <<
99 select ARCH_HAS_NONLEAF_PMD_YOUNG <<
100 select ARCH_HAS_UACCESS_FLUSHCACHE <<
101 select ARCH_HAS_COPY_MC <<
102 select ARCH_HAS_SET_MEMORY <<
103 select ARCH_HAS_SET_DIRECT_MAP <<
104 select ARCH_HAS_STRICT_KERNEL_RWX <<
105 select ARCH_HAS_STRICT_MODULE_RWX <<
106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
107 select ARCH_HAS_SYSCALL_WRAPPER <<
108 select ARCH_HAS_UBSAN <<
109 select ARCH_HAS_DEBUG_WX <<
110 select ARCH_HAS_ZONE_DMA_SET if EXPERT <<
111 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
112 select ARCH_HAVE_EXTRA_ELF_NOTES <<
113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
114 select ARCH_MIGHT_HAVE_ACPI_PDC <<
115 select ARCH_MIGHT_HAVE_PC_PARPORT <<
116 select ARCH_MIGHT_HAVE_PC_SERIO <<
117 select ARCH_STACKWALK <<
118 select ARCH_SUPPORTS_ACPI <<
119 select ARCH_SUPPORTS_ATOMIC_RMW <<
120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
122 select ARCH_SUPPORTS_NUMA_BALANCING <<
123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ <<
124 select ARCH_SUPPORTS_CFI_CLANG <<
125 select ARCH_USES_CFI_TRAPS <<
126 select ARCH_SUPPORTS_LTO_CLANG <<
127 select ARCH_SUPPORTS_LTO_CLANG_THIN <<
128 select ARCH_SUPPORTS_RT <<
129 select ARCH_USE_BUILTIN_BSWAP 12 select ARCH_USE_BUILTIN_BSWAP
130 select ARCH_USE_CMPXCHG_LOCKREF !! 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
131 select ARCH_USE_MEMTEST <<
132 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
133 select ARCH_USE_QUEUED_SPINLOCKS 15 select ARCH_USE_QUEUED_SPINLOCKS
134 select ARCH_USE_SYM_ANNOTATIONS !! 16 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 17 select ARCH_WANT_IPC_PARSE_VERSION
136 select ARCH_WANT_DEFAULT_BPF_JIT !! 18 select BUILDTIME_EXTABLE_SORT
137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT !! 19 select CLONE_BACKWARDS
138 select ARCH_WANTS_NO_INSTR !! 20 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
139 select ARCH_WANT_GENERAL_HUGETLB !! 21 select CPU_PM if CPU_IDLE
140 select ARCH_WANT_HUGE_PMD_SHARE !! 22 select GENERIC_ATOMIC64 if !64BIT
141 select ARCH_WANT_LD_ORPHAN_WARN !! 23 select GENERIC_CLOCKEVENTS
142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
144 select ARCH_WANTS_THP_SWAP <<
145 select ARCH_HAS_PARANOID_L1D_FLUSH <<
146 select BUILDTIME_TABLE_SORT <<
147 select CLKEVT_I8253 <<
148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE <<
149 select CLOCKSOURCE_WATCHDOG <<
150 # Word-size accesses may read uninitia <<
151 # in strings and cause false KMSAN rep <<
152 select DCACHE_WORD_ACCESS <<
153 select DYNAMIC_SIGFRAME <<
154 select EDAC_ATOMIC_SCRUB <<
155 select EDAC_SUPPORT <<
156 select GENERIC_CLOCKEVENTS_BROADCAST <<
157 select GENERIC_CLOCKEVENTS_BROADCAST_I <<
158 select GENERIC_CLOCKEVENTS_MIN_ADJUST <<
159 select GENERIC_CMOS_UPDATE 24 select GENERIC_CMOS_UPDATE
160 select GENERIC_CPU_AUTOPROBE 25 select GENERIC_CPU_AUTOPROBE
161 select GENERIC_CPU_DEVICES !! 26 select GENERIC_GETTIMEOFDAY
162 select GENERIC_CPU_VULNERABILITIES <<
163 select GENERIC_EARLY_IOREMAP <<
164 select GENERIC_ENTRY <<
165 select GENERIC_IOMAP 27 select GENERIC_IOMAP
166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK <<
167 select GENERIC_IRQ_MATRIX_ALLOCATOR <<
168 select GENERIC_IRQ_MIGRATION <<
169 select GENERIC_IRQ_PROBE 28 select GENERIC_IRQ_PROBE
170 select GENERIC_IRQ_RESERVATION_MODE <<
171 select GENERIC_IRQ_SHOW 29 select GENERIC_IRQ_SHOW
172 select GENERIC_PENDING_IRQ !! 30 select GENERIC_ISA_DMA if EISA
173 select GENERIC_PTDUMP !! 31 select GENERIC_LIB_ASHLDI3
>> 32 select GENERIC_LIB_ASHRDI3
>> 33 select GENERIC_LIB_CMPDI2
>> 34 select GENERIC_LIB_LSHRDI3
>> 35 select GENERIC_LIB_UCMPDI2
>> 36 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
174 select GENERIC_SMP_IDLE_THREAD 37 select GENERIC_SMP_IDLE_THREAD
175 select GENERIC_TIME_VSYSCALL 38 select GENERIC_TIME_VSYSCALL
176 select GENERIC_GETTIMEOFDAY !! 39 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
177 select GENERIC_VDSO_TIME_NS !! 40 select HANDLE_DOMAIN_IRQ
178 select GENERIC_VDSO_OVERFLOW_PROTECT !! 41 select HAVE_ARCH_COMPILER_H
179 select GUP_GET_PXX_LOW_HIGH <<
180 select HARDIRQS_SW_RESEND <<
181 select HARDLOCKUP_CHECK_TIMESTAMP <<
182 select HAS_IOPORT <<
183 select HAVE_ACPI_APEI <<
184 select HAVE_ACPI_APEI_NMI <<
185 select HAVE_ALIGNED_STRUCT_PAGE <<
186 select HAVE_ARCH_AUDITSYSCALL <<
187 select HAVE_ARCH_HUGE_VMAP <<
188 select HAVE_ARCH_HUGE_VMALLOC <<
189 select HAVE_ARCH_JUMP_LABEL 42 select HAVE_ARCH_JUMP_LABEL
190 select HAVE_ARCH_JUMP_LABEL_RELATIVE <<
191 select HAVE_ARCH_KASAN <<
192 select HAVE_ARCH_KASAN_VMALLOC <<
193 select HAVE_ARCH_KFENCE <<
194 select HAVE_ARCH_KMSAN <<
195 select HAVE_ARCH_KGDB 43 select HAVE_ARCH_KGDB
196 select HAVE_ARCH_MMAP_RND_BITS !! 44 select HAVE_ARCH_MMAP_RND_BITS if MMU
197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 45 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
198 select HAVE_ARCH_COMPAT_MMAP_BASES <<
199 select HAVE_ARCH_PREL32_RELOCATIONS <<
200 select HAVE_ARCH_SECCOMP_FILTER 46 select HAVE_ARCH_SECCOMP_FILTER
201 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
202 select HAVE_ARCH_STACKLEAK <<
203 select HAVE_ARCH_TRACEHOOK 47 select HAVE_ARCH_TRACEHOOK
204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 48 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ <<
206 select HAVE_ARCH_USERFAULTFD_WP <<
207 select HAVE_ARCH_USERFAULTFD_MINOR <<
208 select HAVE_ARCH_VMAP_STACK <<
209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
210 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
211 select HAVE_ASM_MODVERSIONS 49 select HAVE_ASM_MODVERSIONS
212 select HAVE_CMPXCHG_DOUBLE !! 50 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
213 select HAVE_CMPXCHG_LOCAL !! 51 select HAVE_CONTEXT_TRACKING
214 select HAVE_CONTEXT_TRACKING_USER !! 52 select HAVE_COPY_THREAD_TLS
215 select HAVE_CONTEXT_TRACKING_USER_OFFS <<
216 select HAVE_C_RECORDMCOUNT 53 select HAVE_C_RECORDMCOUNT
217 select HAVE_OBJTOOL_MCOUNT <<
218 select HAVE_OBJTOOL_NOP_MCOUNT <<
219 select HAVE_BUILDTIME_MCOUNT_SORT <<
220 select HAVE_DEBUG_KMEMLEAK 54 select HAVE_DEBUG_KMEMLEAK
>> 55 select HAVE_DEBUG_STACKOVERFLOW
221 select HAVE_DMA_CONTIGUOUS 56 select HAVE_DMA_CONTIGUOUS
222 select HAVE_DYNAMIC_FTRACE 57 select HAVE_DYNAMIC_FTRACE
223 select HAVE_DYNAMIC_FTRACE_WITH_REGS <<
224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS <<
225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT <<
226 select HAVE_SAMPLE_FTRACE_DIRECT <<
227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
228 select HAVE_EBPF_JIT <<
229 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
230 select HAVE_EISA <<
231 select HAVE_EXIT_THREAD 58 select HAVE_EXIT_THREAD
232 select HAVE_GUP_FAST !! 59 select HAVE_FAST_GUP
233 select HAVE_FENTRY <<
234 select HAVE_FTRACE_MCOUNT_RECORD 60 select HAVE_FTRACE_MCOUNT_RECORD
235 select HAVE_FUNCTION_GRAPH_RETVAL !! 61 select HAVE_FUNCTION_GRAPH_TRACER
236 select HAVE_FUNCTION_GRAPH_TRACER <<
237 select HAVE_FUNCTION_TRACER 62 select HAVE_FUNCTION_TRACER
238 select HAVE_GCC_PLUGINS !! 63 select HAVE_IDE
239 select HAVE_HW_BREAKPOINT <<
240 select HAVE_IOREMAP_PROT 64 select HAVE_IOREMAP_PROT
241 select HAVE_IRQ_EXIT_ON_IRQ_STACK !! 65 select HAVE_IRQ_EXIT_ON_IRQ_STACK
242 select HAVE_IRQ_TIME_ACCOUNTING 66 select HAVE_IRQ_TIME_ACCOUNTING
243 select HAVE_JUMP_LABEL_HACK <<
244 select HAVE_KERNEL_BZIP2 <<
245 select HAVE_KERNEL_GZIP <<
246 select HAVE_KERNEL_LZ4 <<
247 select HAVE_KERNEL_LZMA <<
248 select HAVE_KERNEL_LZO <<
249 select HAVE_KERNEL_XZ <<
250 select HAVE_KERNEL_ZSTD <<
251 select HAVE_KPROBES 67 select HAVE_KPROBES
252 select HAVE_KPROBES_ON_FTRACE <<
253 select HAVE_FUNCTION_ERROR_INJECTION <<
254 select HAVE_KRETPROBES 68 select HAVE_KRETPROBES
255 select HAVE_RETHOOK !! 69 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
256 select HAVE_LIVEPATCH !! 70 select HAVE_MEMBLOCK_NODE_MAP
257 select HAVE_MIXED_BREAKPOINTS_REGS <<
258 select HAVE_MOD_ARCH_SPECIFIC 71 select HAVE_MOD_ARCH_SPECIFIC
259 select HAVE_MOVE_PMD <<
260 select HAVE_MOVE_PUD <<
261 select HAVE_NOINSTR_HACK <<
262 select HAVE_NMI 72 select HAVE_NMI
263 select HAVE_NOINSTR_VALIDATION !! 73 select HAVE_OPROFILE
264 select HAVE_OBJTOOL <<
265 select HAVE_OPTPROBES <<
266 select HAVE_PAGE_SIZE_4KB <<
267 select HAVE_PCSPKR_PLATFORM <<
268 select HAVE_PERF_EVENTS 74 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
271 select HAVE_PCI <<
272 select HAVE_PERF_REGS <<
273 select HAVE_PERF_USER_STACK_DUMP <<
274 select MMU_GATHER_RCU_TABLE_FREE <<
275 select MMU_GATHER_MERGE_VMAS <<
276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
277 select HAVE_REGS_AND_STACK_ACCESS_API 75 select HAVE_REGS_AND_STACK_ACCESS_API
278 select HAVE_RELIABLE_STACKTRACE <<
279 select HAVE_FUNCTION_ARG_ACCESS_API <<
280 select HAVE_SETUP_PER_CPU_AREA <<
281 select HAVE_SOFTIRQ_ON_OWN_STACK <<
282 select HAVE_STACKPROTECTOR <<
283 select HAVE_STACK_VALIDATION <<
284 select HAVE_STATIC_CALL <<
285 select HAVE_STATIC_CALL_INLINE <<
286 select HAVE_PREEMPT_DYNAMIC_CALL <<
287 select HAVE_RSEQ 76 select HAVE_RSEQ
288 select HAVE_RUST !! 77 select HAVE_SPARSE_SYSCALL_NR
>> 78 select HAVE_STACKPROTECTOR
289 select HAVE_SYSCALL_TRACEPOINTS 79 select HAVE_SYSCALL_TRACEPOINTS
290 select HAVE_UACCESS_VALIDATION !! 80 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
291 select HAVE_UNSTABLE_SCHED_CLOCK <<
292 select HAVE_USER_RETURN_NOTIFIER <<
293 select HAVE_GENERIC_VDSO 81 select HAVE_GENERIC_VDSO
294 select VDSO_GETRANDOM <<
295 select HOTPLUG_PARALLEL <<
296 select HOTPLUG_SMT <<
297 select HOTPLUG_SPLIT_STARTUP <<
298 select IRQ_FORCED_THREADING 82 select IRQ_FORCED_THREADING
299 select LOCK_MM_AND_FIND_VMA !! 83 select ISA if EISA
300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 84 select MODULES_USE_ELF_RELA if MODULES && 64BIT
301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 85 select MODULES_USE_ELF_REL if MODULES
302 select NEED_SG_DMA_LENGTH !! 86 select PERF_USE_VMALLOC
303 select NUMA_MEMBLKS <<
304 select PCI_DOMAINS <<
305 select PCI_LOCKLESS_CONFIG <<
306 select PERF_EVENTS <<
307 select RTC_LIB 87 select RTC_LIB
308 select RTC_MC146818_LIB <<
309 select SPARSE_IRQ <<
310 select SYSCTL_EXCEPTION_TRACE 88 select SYSCTL_EXCEPTION_TRACE
311 select THREAD_INFO_IN_TASK !! 89 select VIRT_TO_BUS
312 select TRACE_IRQFLAGS_SUPPORT !! 90 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
313 select TRACE_IRQFLAGS_NMI_SUPPORT !! 91 select ARCH_HAS_KCOV
314 select USER_STACKTRACE_SUPPORT !! 92 select HAVE_GCC_PLUGINS
315 select HAVE_ARCH_KCSAN <<
316 select PROC_PID_ARCH_STATUS <<
317 select HAVE_ARCH_NODE_DEV_GROUP <<
318 select FUNCTION_ALIGNMENT_16B <<
319 select FUNCTION_ALIGNMENT_4B <<
320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL <<
322 93
323 config INSTRUCTION_DECODER !! 94 menu "Machine selection"
324 def_bool y <<
325 depends on KPROBES || PERF_EVENTS || U <<
326 95
327 config OUTPUT_FORMAT !! 96 choice
328 string !! 97 prompt "System type"
329 default "elf32-i386" if X86_32 !! 98 default MIPS_GENERIC
330 default "elf64-x86-64" if X86_64 <<
331 99
332 config LOCKDEP_SUPPORT !! 100 config MIPS_GENERIC
333 def_bool y !! 101 bool "Generic board-agnostic MIPS kernel"
>> 102 select BOOT_RAW
>> 103 select BUILTIN_DTB
>> 104 select CEVT_R4K
>> 105 select CLKSRC_MIPS_GIC
>> 106 select COMMON_CLK
>> 107 select CPU_MIPSR2_IRQ_VI
>> 108 select CPU_MIPSR2_IRQ_EI
>> 109 select CSRC_R4K
>> 110 select DMA_PERDEV_COHERENT
>> 111 select HAVE_PCI
>> 112 select IRQ_MIPS_CPU
>> 113 select LIBFDT
>> 114 select MIPS_AUTO_PFN_OFFSET
>> 115 select MIPS_CPU_SCACHE
>> 116 select MIPS_GIC
>> 117 select MIPS_L1_CACHE_SHIFT_7
>> 118 select NO_EXCEPT_FILL
>> 119 select PCI_DRIVERS_GENERIC
>> 120 select PINCTRL
>> 121 select SMP_UP if SMP
>> 122 select SWAP_IO_SPACE
>> 123 select SYS_HAS_CPU_MIPS32_R1
>> 124 select SYS_HAS_CPU_MIPS32_R2
>> 125 select SYS_HAS_CPU_MIPS32_R6
>> 126 select SYS_HAS_CPU_MIPS64_R1
>> 127 select SYS_HAS_CPU_MIPS64_R2
>> 128 select SYS_HAS_CPU_MIPS64_R6
>> 129 select SYS_SUPPORTS_32BIT_KERNEL
>> 130 select SYS_SUPPORTS_64BIT_KERNEL
>> 131 select SYS_SUPPORTS_BIG_ENDIAN
>> 132 select SYS_SUPPORTS_HIGHMEM
>> 133 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 134 select SYS_SUPPORTS_MICROMIPS
>> 135 select SYS_SUPPORTS_MIPS_CPS
>> 136 select SYS_SUPPORTS_MIPS16
>> 137 select SYS_SUPPORTS_MULTITHREADING
>> 138 select SYS_SUPPORTS_RELOCATABLE
>> 139 select SYS_SUPPORTS_SMARTMIPS
>> 140 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 141 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 142 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 143 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 144 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 145 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 146 select USE_OF
>> 147 select UHI_BOOT
>> 148 help
>> 149 Select this to build a kernel which aims to support multiple boards,
>> 150 generally using a flattened device tree passed from the bootloader
>> 151 using the boot protocol defined in the UHI (Unified Hosting
>> 152 Interface) specification.
334 153
335 config STACKTRACE_SUPPORT !! 154 config MIPS_ALCHEMY
336 def_bool y !! 155 bool "Alchemy processor based machines"
>> 156 select PHYS_ADDR_T_64BIT
>> 157 select CEVT_R4K
>> 158 select CSRC_R4K
>> 159 select IRQ_MIPS_CPU
>> 160 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 161 select SYS_HAS_CPU_MIPS32_R1
>> 162 select SYS_SUPPORTS_32BIT_KERNEL
>> 163 select SYS_SUPPORTS_APM_EMULATION
>> 164 select GPIOLIB
>> 165 select SYS_SUPPORTS_ZBOOT
>> 166 select COMMON_CLK
337 167
338 config MMU !! 168 config AR7
339 def_bool y !! 169 bool "Texas Instruments AR7"
>> 170 select BOOT_ELF32
>> 171 select DMA_NONCOHERENT
>> 172 select CEVT_R4K
>> 173 select CSRC_R4K
>> 174 select IRQ_MIPS_CPU
>> 175 select NO_EXCEPT_FILL
>> 176 select SWAP_IO_SPACE
>> 177 select SYS_HAS_CPU_MIPS32_R1
>> 178 select SYS_HAS_EARLY_PRINTK
>> 179 select SYS_SUPPORTS_32BIT_KERNEL
>> 180 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 181 select SYS_SUPPORTS_MIPS16
>> 182 select SYS_SUPPORTS_ZBOOT_UART16550
>> 183 select GPIOLIB
>> 184 select VLYNQ
>> 185 select HAVE_CLK
>> 186 help
>> 187 Support for the Texas Instruments AR7 System-on-a-Chip
>> 188 family: TNETD7100, 7200 and 7300.
340 189
341 config ARCH_MMAP_RND_BITS_MIN !! 190 config ATH25
342 default 28 if 64BIT !! 191 bool "Atheros AR231x/AR531x SoC support"
343 default 8 !! 192 select CEVT_R4K
>> 193 select CSRC_R4K
>> 194 select DMA_NONCOHERENT
>> 195 select IRQ_MIPS_CPU
>> 196 select IRQ_DOMAIN
>> 197 select SYS_HAS_CPU_MIPS32_R1
>> 198 select SYS_SUPPORTS_BIG_ENDIAN
>> 199 select SYS_SUPPORTS_32BIT_KERNEL
>> 200 select SYS_HAS_EARLY_PRINTK
>> 201 help
>> 202 Support for Atheros AR231x and Atheros AR531x based boards
>> 203
>> 204 config ATH79
>> 205 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 206 select ARCH_HAS_RESET_CONTROLLER
>> 207 select BOOT_RAW
>> 208 select CEVT_R4K
>> 209 select CSRC_R4K
>> 210 select DMA_NONCOHERENT
>> 211 select GPIOLIB
>> 212 select PINCTRL
>> 213 select HAVE_CLK
>> 214 select COMMON_CLK
>> 215 select CLKDEV_LOOKUP
>> 216 select IRQ_MIPS_CPU
>> 217 select SYS_HAS_CPU_MIPS32_R2
>> 218 select SYS_HAS_EARLY_PRINTK
>> 219 select SYS_SUPPORTS_32BIT_KERNEL
>> 220 select SYS_SUPPORTS_BIG_ENDIAN
>> 221 select SYS_SUPPORTS_MIPS16
>> 222 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 223 select USE_OF
>> 224 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 225 help
>> 226 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 227
>> 228 config BMIPS_GENERIC
>> 229 bool "Broadcom Generic BMIPS kernel"
>> 230 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 231 select ARCH_HAS_PHYS_TO_DMA
>> 232 select BOOT_RAW
>> 233 select NO_EXCEPT_FILL
>> 234 select USE_OF
>> 235 select CEVT_R4K
>> 236 select CSRC_R4K
>> 237 select SYNC_R4K
>> 238 select COMMON_CLK
>> 239 select BCM6345_L1_IRQ
>> 240 select BCM7038_L1_IRQ
>> 241 select BCM7120_L2_IRQ
>> 242 select BRCMSTB_L2_IRQ
>> 243 select IRQ_MIPS_CPU
>> 244 select DMA_NONCOHERENT
>> 245 select SYS_SUPPORTS_32BIT_KERNEL
>> 246 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 247 select SYS_SUPPORTS_BIG_ENDIAN
>> 248 select SYS_SUPPORTS_HIGHMEM
>> 249 select SYS_HAS_CPU_BMIPS32_3300
>> 250 select SYS_HAS_CPU_BMIPS4350
>> 251 select SYS_HAS_CPU_BMIPS4380
>> 252 select SYS_HAS_CPU_BMIPS5000
>> 253 select SWAP_IO_SPACE
>> 254 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 255 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 256 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 257 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 258 select HARDIRQS_SW_RESEND
>> 259 help
>> 260 Build a generic DT-based kernel image that boots on select
>> 261 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 262 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 263 must be set appropriately for your board.
>> 264
>> 265 config BCM47XX
>> 266 bool "Broadcom BCM47XX based boards"
>> 267 select BOOT_RAW
>> 268 select CEVT_R4K
>> 269 select CSRC_R4K
>> 270 select DMA_NONCOHERENT
>> 271 select HAVE_PCI
>> 272 select IRQ_MIPS_CPU
>> 273 select SYS_HAS_CPU_MIPS32_R1
>> 274 select NO_EXCEPT_FILL
>> 275 select SYS_SUPPORTS_32BIT_KERNEL
>> 276 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 277 select SYS_SUPPORTS_MIPS16
>> 278 select SYS_SUPPORTS_ZBOOT
>> 279 select SYS_HAS_EARLY_PRINTK
>> 280 select USE_GENERIC_EARLY_PRINTK_8250
>> 281 select GPIOLIB
>> 282 select LEDS_GPIO_REGISTER
>> 283 select BCM47XX_NVRAM
>> 284 select BCM47XX_SPROM
>> 285 select BCM47XX_SSB if !BCM47XX_BCMA
>> 286 help
>> 287 Support for BCM47XX based boards
>> 288
>> 289 config BCM63XX
>> 290 bool "Broadcom BCM63XX based boards"
>> 291 select BOOT_RAW
>> 292 select CEVT_R4K
>> 293 select CSRC_R4K
>> 294 select SYNC_R4K
>> 295 select DMA_NONCOHERENT
>> 296 select IRQ_MIPS_CPU
>> 297 select SYS_SUPPORTS_32BIT_KERNEL
>> 298 select SYS_SUPPORTS_BIG_ENDIAN
>> 299 select SYS_HAS_EARLY_PRINTK
>> 300 select SWAP_IO_SPACE
>> 301 select GPIOLIB
>> 302 select HAVE_CLK
>> 303 select MIPS_L1_CACHE_SHIFT_4
>> 304 select CLKDEV_LOOKUP
>> 305 help
>> 306 Support for BCM63XX based boards
>> 307
>> 308 config MIPS_COBALT
>> 309 bool "Cobalt Server"
>> 310 select CEVT_R4K
>> 311 select CSRC_R4K
>> 312 select CEVT_GT641XX
>> 313 select DMA_NONCOHERENT
>> 314 select FORCE_PCI
>> 315 select I8253
>> 316 select I8259
>> 317 select IRQ_MIPS_CPU
>> 318 select IRQ_GT641XX
>> 319 select PCI_GT64XXX_PCI0
>> 320 select SYS_HAS_CPU_NEVADA
>> 321 select SYS_HAS_EARLY_PRINTK
>> 322 select SYS_SUPPORTS_32BIT_KERNEL
>> 323 select SYS_SUPPORTS_64BIT_KERNEL
>> 324 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 325 select USE_GENERIC_EARLY_PRINTK_8250
>> 326
>> 327 config MACH_DECSTATION
>> 328 bool "DECstations"
>> 329 select BOOT_ELF32
>> 330 select CEVT_DS1287
>> 331 select CEVT_R4K if CPU_R4X00
>> 332 select CSRC_IOASIC
>> 333 select CSRC_R4K if CPU_R4X00
>> 334 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 335 select CPU_R4000_WORKAROUNDS if 64BIT
>> 336 select CPU_R4400_WORKAROUNDS if 64BIT
>> 337 select DMA_NONCOHERENT
>> 338 select NO_IOPORT_MAP
>> 339 select IRQ_MIPS_CPU
>> 340 select SYS_HAS_CPU_R3000
>> 341 select SYS_HAS_CPU_R4X00
>> 342 select SYS_SUPPORTS_32BIT_KERNEL
>> 343 select SYS_SUPPORTS_64BIT_KERNEL
>> 344 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 345 select SYS_SUPPORTS_128HZ
>> 346 select SYS_SUPPORTS_256HZ
>> 347 select SYS_SUPPORTS_1024HZ
>> 348 select MIPS_L1_CACHE_SHIFT_4
>> 349 help
>> 350 This enables support for DEC's MIPS based workstations. For details
>> 351 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 352 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 353
>> 354 If you have one of the following DECstation Models you definitely
>> 355 want to choose R4xx0 for the CPU Type:
>> 356
>> 357 DECstation 5000/50
>> 358 DECstation 5000/150
>> 359 DECstation 5000/260
>> 360 DECsystem 5900/260
>> 361
>> 362 otherwise choose R3000.
>> 363
>> 364 config MACH_JAZZ
>> 365 bool "Jazz family of machines"
>> 366 select ARC_MEMORY
>> 367 select ARC_PROMLIB
>> 368 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 369 select ARCH_MIGHT_HAVE_PC_SERIO
>> 370 select FW_ARC
>> 371 select FW_ARC32
>> 372 select ARCH_MAY_HAVE_PC_FDC
>> 373 select CEVT_R4K
>> 374 select CSRC_R4K
>> 375 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 376 select GENERIC_ISA_DMA
>> 377 select HAVE_PCSPKR_PLATFORM
>> 378 select IRQ_MIPS_CPU
>> 379 select I8253
>> 380 select I8259
>> 381 select ISA
>> 382 select SYS_HAS_CPU_R4X00
>> 383 select SYS_SUPPORTS_32BIT_KERNEL
>> 384 select SYS_SUPPORTS_64BIT_KERNEL
>> 385 select SYS_SUPPORTS_100HZ
>> 386 help
>> 387 This a family of machines based on the MIPS R4030 chipset which was
>> 388 used by several vendors to build RISC/os and Windows NT workstations.
>> 389 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 390 Olivetti M700-10 workstations.
>> 391
>> 392 config MACH_INGENIC
>> 393 bool "Ingenic SoC based machines"
>> 394 select SYS_SUPPORTS_32BIT_KERNEL
>> 395 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 396 select SYS_SUPPORTS_ZBOOT_UART16550
>> 397 select CPU_SUPPORTS_HUGEPAGES
>> 398 select DMA_NONCOHERENT
>> 399 select IRQ_MIPS_CPU
>> 400 select PINCTRL
>> 401 select GPIOLIB
>> 402 select COMMON_CLK
>> 403 select GENERIC_IRQ_CHIP
>> 404 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 405 select USE_OF
>> 406 select LIBFDT
>> 407
>> 408 config LANTIQ
>> 409 bool "Lantiq based platforms"
>> 410 select DMA_NONCOHERENT
>> 411 select IRQ_MIPS_CPU
>> 412 select CEVT_R4K
>> 413 select CSRC_R4K
>> 414 select SYS_HAS_CPU_MIPS32_R1
>> 415 select SYS_HAS_CPU_MIPS32_R2
>> 416 select SYS_SUPPORTS_BIG_ENDIAN
>> 417 select SYS_SUPPORTS_32BIT_KERNEL
>> 418 select SYS_SUPPORTS_MIPS16
>> 419 select SYS_SUPPORTS_MULTITHREADING
>> 420 select SYS_SUPPORTS_VPE_LOADER
>> 421 select SYS_HAS_EARLY_PRINTK
>> 422 select GPIOLIB
>> 423 select SWAP_IO_SPACE
>> 424 select BOOT_RAW
>> 425 select CLKDEV_LOOKUP
>> 426 select USE_OF
>> 427 select PINCTRL
>> 428 select PINCTRL_LANTIQ
>> 429 select ARCH_HAS_RESET_CONTROLLER
>> 430 select RESET_CONTROLLER
>> 431
>> 432 config LASAT
>> 433 bool "LASAT Networks platforms"
>> 434 select CEVT_R4K
>> 435 select CRC32
>> 436 select CSRC_R4K
>> 437 select DMA_NONCOHERENT
>> 438 select SYS_HAS_EARLY_PRINTK
>> 439 select HAVE_PCI
>> 440 select IRQ_MIPS_CPU
>> 441 select PCI_GT64XXX_PCI0
>> 442 select MIPS_NILE4
>> 443 select R5000_CPU_SCACHE
>> 444 select SYS_HAS_CPU_R5000
>> 445 select SYS_SUPPORTS_32BIT_KERNEL
>> 446 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 447 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 448
>> 449 config MACH_LOONGSON32
>> 450 bool "Loongson 32-bit family of machines"
>> 451 select SYS_SUPPORTS_ZBOOT
>> 452 help
>> 453 This enables support for the Loongson-1 family of machines.
>> 454
>> 455 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 456 the Institute of Computing Technology (ICT), Chinese Academy of
>> 457 Sciences (CAS).
>> 458
>> 459 config MACH_LOONGSON2EF
>> 460 bool "Loongson-2E/F family of machines"
>> 461 select SYS_SUPPORTS_ZBOOT
>> 462 help
>> 463 This enables the support of early Loongson-2E/F family of machines.
>> 464
>> 465 config MACH_LOONGSON64
>> 466 bool "Loongson 64-bit family of machines"
>> 467 select ARCH_SPARSEMEM_ENABLE
>> 468 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 469 select ARCH_MIGHT_HAVE_PC_SERIO
>> 470 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 471 select BOOT_ELF32
>> 472 select BOARD_SCACHE
>> 473 select CSRC_R4K
>> 474 select CEVT_R4K
>> 475 select CPU_HAS_WB
>> 476 select FORCE_PCI
>> 477 select ISA
>> 478 select I8259
>> 479 select IRQ_MIPS_CPU
>> 480 select NR_CPUS_DEFAULT_4
>> 481 select USE_GENERIC_EARLY_PRINTK_8250
>> 482 select SYS_HAS_CPU_LOONGSON64
>> 483 select SYS_HAS_EARLY_PRINTK
>> 484 select SYS_SUPPORTS_SMP
>> 485 select SYS_SUPPORTS_HOTPLUG_CPU
>> 486 select SYS_SUPPORTS_NUMA
>> 487 select SYS_SUPPORTS_64BIT_KERNEL
>> 488 select SYS_SUPPORTS_HIGHMEM
>> 489 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 490 select SYS_SUPPORTS_ZBOOT
>> 491 select LOONGSON_MC146818
>> 492 select ZONE_DMA32
>> 493 select NUMA
>> 494 help
>> 495 This enables the support of Loongson-2/3 family of machines.
344 496
345 config ARCH_MMAP_RND_BITS_MAX !! 497 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
346 default 32 if 64BIT !! 498 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
347 default 16 !! 499 and Loongson-2F which will be removed), developed by the Institute
>> 500 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 501
>> 502 config MACH_PISTACHIO
>> 503 bool "IMG Pistachio SoC based boards"
>> 504 select BOOT_ELF32
>> 505 select BOOT_RAW
>> 506 select CEVT_R4K
>> 507 select CLKSRC_MIPS_GIC
>> 508 select COMMON_CLK
>> 509 select CSRC_R4K
>> 510 select DMA_NONCOHERENT
>> 511 select GPIOLIB
>> 512 select IRQ_MIPS_CPU
>> 513 select LIBFDT
>> 514 select MFD_SYSCON
>> 515 select MIPS_CPU_SCACHE
>> 516 select MIPS_GIC
>> 517 select PINCTRL
>> 518 select REGULATOR
>> 519 select SYS_HAS_CPU_MIPS32_R2
>> 520 select SYS_SUPPORTS_32BIT_KERNEL
>> 521 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 522 select SYS_SUPPORTS_MIPS_CPS
>> 523 select SYS_SUPPORTS_MULTITHREADING
>> 524 select SYS_SUPPORTS_RELOCATABLE
>> 525 select SYS_SUPPORTS_ZBOOT
>> 526 select SYS_HAS_EARLY_PRINTK
>> 527 select USE_GENERIC_EARLY_PRINTK_8250
>> 528 select USE_OF
>> 529 help
>> 530 This enables support for the IMG Pistachio SoC platform.
>> 531
>> 532 config MIPS_MALTA
>> 533 bool "MIPS Malta board"
>> 534 select ARCH_MAY_HAVE_PC_FDC
>> 535 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 536 select ARCH_MIGHT_HAVE_PC_SERIO
>> 537 select BOOT_ELF32
>> 538 select BOOT_RAW
>> 539 select BUILTIN_DTB
>> 540 select CEVT_R4K
>> 541 select CLKSRC_MIPS_GIC
>> 542 select COMMON_CLK
>> 543 select CSRC_R4K
>> 544 select DMA_MAYBE_COHERENT
>> 545 select GENERIC_ISA_DMA
>> 546 select HAVE_PCSPKR_PLATFORM
>> 547 select HAVE_PCI
>> 548 select I8253
>> 549 select I8259
>> 550 select IRQ_MIPS_CPU
>> 551 select LIBFDT
>> 552 select MIPS_BONITO64
>> 553 select MIPS_CPU_SCACHE
>> 554 select MIPS_GIC
>> 555 select MIPS_L1_CACHE_SHIFT_6
>> 556 select MIPS_MSC
>> 557 select PCI_GT64XXX_PCI0
>> 558 select SMP_UP if SMP
>> 559 select SWAP_IO_SPACE
>> 560 select SYS_HAS_CPU_MIPS32_R1
>> 561 select SYS_HAS_CPU_MIPS32_R2
>> 562 select SYS_HAS_CPU_MIPS32_R3_5
>> 563 select SYS_HAS_CPU_MIPS32_R5
>> 564 select SYS_HAS_CPU_MIPS32_R6
>> 565 select SYS_HAS_CPU_MIPS64_R1
>> 566 select SYS_HAS_CPU_MIPS64_R2
>> 567 select SYS_HAS_CPU_MIPS64_R6
>> 568 select SYS_HAS_CPU_NEVADA
>> 569 select SYS_HAS_CPU_RM7000
>> 570 select SYS_SUPPORTS_32BIT_KERNEL
>> 571 select SYS_SUPPORTS_64BIT_KERNEL
>> 572 select SYS_SUPPORTS_BIG_ENDIAN
>> 573 select SYS_SUPPORTS_HIGHMEM
>> 574 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 575 select SYS_SUPPORTS_MICROMIPS
>> 576 select SYS_SUPPORTS_MIPS16
>> 577 select SYS_SUPPORTS_MIPS_CMP
>> 578 select SYS_SUPPORTS_MIPS_CPS
>> 579 select SYS_SUPPORTS_MULTITHREADING
>> 580 select SYS_SUPPORTS_RELOCATABLE
>> 581 select SYS_SUPPORTS_SMARTMIPS
>> 582 select SYS_SUPPORTS_VPE_LOADER
>> 583 select SYS_SUPPORTS_ZBOOT
>> 584 select USE_OF
>> 585 select ZONE_DMA32 if 64BIT
>> 586 help
>> 587 This enables support for the MIPS Technologies Malta evaluation
>> 588 board.
>> 589
>> 590 config MACH_PIC32
>> 591 bool "Microchip PIC32 Family"
>> 592 help
>> 593 This enables support for the Microchip PIC32 family of platforms.
>> 594
>> 595 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 596 microcontrollers.
>> 597
>> 598 config NEC_MARKEINS
>> 599 bool "NEC EMMA2RH Mark-eins board"
>> 600 select SOC_EMMA2RH
>> 601 select HAVE_PCI
>> 602 help
>> 603 This enables support for the NEC Electronics Mark-eins boards.
348 604
349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 605 config MACH_VR41XX
350 default 8 !! 606 bool "NEC VR4100 series based machines"
>> 607 select CEVT_R4K
>> 608 select CSRC_R4K
>> 609 select SYS_HAS_CPU_VR41XX
>> 610 select SYS_SUPPORTS_MIPS16
>> 611 select GPIOLIB
351 612
352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 613 config NXP_STB220
353 default 16 !! 614 bool "NXP STB220 board"
>> 615 select SOC_PNX833X
>> 616 help
>> 617 Support for NXP Semiconductors STB220 Development Board.
>> 618
>> 619 config NXP_STB225
>> 620 bool "NXP 225 board"
>> 621 select SOC_PNX833X
>> 622 select SOC_PNX8335
>> 623 help
>> 624 Support for NXP Semiconductors STB225 Development Board.
>> 625
>> 626 config PMC_MSP
>> 627 bool "PMC-Sierra MSP chipsets"
>> 628 select CEVT_R4K
>> 629 select CSRC_R4K
>> 630 select DMA_NONCOHERENT
>> 631 select SWAP_IO_SPACE
>> 632 select NO_EXCEPT_FILL
>> 633 select BOOT_RAW
>> 634 select SYS_HAS_CPU_MIPS32_R1
>> 635 select SYS_HAS_CPU_MIPS32_R2
>> 636 select SYS_SUPPORTS_32BIT_KERNEL
>> 637 select SYS_SUPPORTS_BIG_ENDIAN
>> 638 select SYS_SUPPORTS_MIPS16
>> 639 select IRQ_MIPS_CPU
>> 640 select SERIAL_8250
>> 641 select SERIAL_8250_CONSOLE
>> 642 select USB_EHCI_BIG_ENDIAN_MMIO
>> 643 select USB_EHCI_BIG_ENDIAN_DESC
>> 644 help
>> 645 This adds support for the PMC-Sierra family of Multi-Service
>> 646 Processor System-On-A-Chips. These parts include a number
>> 647 of integrated peripherals, interfaces and DSPs in addition to
>> 648 a variety of MIPS cores.
>> 649
>> 650 config RALINK
>> 651 bool "Ralink based machines"
>> 652 select CEVT_R4K
>> 653 select CSRC_R4K
>> 654 select BOOT_RAW
>> 655 select DMA_NONCOHERENT
>> 656 select IRQ_MIPS_CPU
>> 657 select USE_OF
>> 658 select SYS_HAS_CPU_MIPS32_R1
>> 659 select SYS_HAS_CPU_MIPS32_R2
>> 660 select SYS_SUPPORTS_32BIT_KERNEL
>> 661 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 662 select SYS_SUPPORTS_MIPS16
>> 663 select SYS_HAS_EARLY_PRINTK
>> 664 select CLKDEV_LOOKUP
>> 665 select ARCH_HAS_RESET_CONTROLLER
>> 666 select RESET_CONTROLLER
>> 667
>> 668 config SGI_IP22
>> 669 bool "SGI IP22 (Indy/Indigo2)"
>> 670 select ARC_MEMORY
>> 671 select ARC_PROMLIB
>> 672 select FW_ARC
>> 673 select FW_ARC32
>> 674 select ARCH_MIGHT_HAVE_PC_SERIO
>> 675 select BOOT_ELF32
>> 676 select CEVT_R4K
>> 677 select CSRC_R4K
>> 678 select DEFAULT_SGI_PARTITION
>> 679 select DMA_NONCOHERENT
>> 680 select HAVE_EISA
>> 681 select I8253
>> 682 select I8259
>> 683 select IP22_CPU_SCACHE
>> 684 select IRQ_MIPS_CPU
>> 685 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 686 select SGI_HAS_I8042
>> 687 select SGI_HAS_INDYDOG
>> 688 select SGI_HAS_HAL2
>> 689 select SGI_HAS_SEEQ
>> 690 select SGI_HAS_WD93
>> 691 select SGI_HAS_ZILOG
>> 692 select SWAP_IO_SPACE
>> 693 select SYS_HAS_CPU_R4X00
>> 694 select SYS_HAS_CPU_R5000
>> 695 select SYS_HAS_EARLY_PRINTK
>> 696 select SYS_SUPPORTS_32BIT_KERNEL
>> 697 select SYS_SUPPORTS_64BIT_KERNEL
>> 698 select SYS_SUPPORTS_BIG_ENDIAN
>> 699 select MIPS_L1_CACHE_SHIFT_7
>> 700 help
>> 701 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 702 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 703 that runs on these, say Y here.
>> 704
>> 705 config SGI_IP27
>> 706 bool "SGI IP27 (Origin200/2000)"
>> 707 select ARCH_HAS_PHYS_TO_DMA
>> 708 select ARCH_SPARSEMEM_ENABLE
>> 709 select FW_ARC
>> 710 select FW_ARC64
>> 711 select ARC_CMDLINE_ONLY
>> 712 select BOOT_ELF64
>> 713 select DEFAULT_SGI_PARTITION
>> 714 select SYS_HAS_EARLY_PRINTK
>> 715 select HAVE_PCI
>> 716 select IRQ_MIPS_CPU
>> 717 select IRQ_DOMAIN_HIERARCHY
>> 718 select NR_CPUS_DEFAULT_64
>> 719 select PCI_DRIVERS_GENERIC
>> 720 select PCI_XTALK_BRIDGE
>> 721 select SYS_HAS_CPU_R10000
>> 722 select SYS_SUPPORTS_64BIT_KERNEL
>> 723 select SYS_SUPPORTS_BIG_ENDIAN
>> 724 select SYS_SUPPORTS_NUMA
>> 725 select SYS_SUPPORTS_SMP
>> 726 select MIPS_L1_CACHE_SHIFT_7
>> 727 help
>> 728 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 729 workstations. To compile a Linux kernel that runs on these, say Y
>> 730 here.
>> 731
>> 732 config SGI_IP28
>> 733 bool "SGI IP28 (Indigo2 R10k)"
>> 734 select ARC_MEMORY
>> 735 select ARC_PROMLIB
>> 736 select FW_ARC
>> 737 select FW_ARC64
>> 738 select ARCH_MIGHT_HAVE_PC_SERIO
>> 739 select BOOT_ELF64
>> 740 select CEVT_R4K
>> 741 select CSRC_R4K
>> 742 select DEFAULT_SGI_PARTITION
>> 743 select DMA_NONCOHERENT
>> 744 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 745 select IRQ_MIPS_CPU
>> 746 select HAVE_EISA
>> 747 select I8253
>> 748 select I8259
>> 749 select SGI_HAS_I8042
>> 750 select SGI_HAS_INDYDOG
>> 751 select SGI_HAS_HAL2
>> 752 select SGI_HAS_SEEQ
>> 753 select SGI_HAS_WD93
>> 754 select SGI_HAS_ZILOG
>> 755 select SWAP_IO_SPACE
>> 756 select SYS_HAS_CPU_R10000
>> 757 select SYS_HAS_EARLY_PRINTK
>> 758 select SYS_SUPPORTS_64BIT_KERNEL
>> 759 select SYS_SUPPORTS_BIG_ENDIAN
>> 760 select MIPS_L1_CACHE_SHIFT_7
>> 761 help
>> 762 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 763 kernel that runs on these, say Y here.
>> 764
>> 765 config SGI_IP30
>> 766 bool "SGI IP30 (Octane/Octane2)"
>> 767 select ARCH_HAS_PHYS_TO_DMA
>> 768 select FW_ARC
>> 769 select FW_ARC64
>> 770 select BOOT_ELF64
>> 771 select CEVT_R4K
>> 772 select CSRC_R4K
>> 773 select SYNC_R4K if SMP
>> 774 select ZONE_DMA32
>> 775 select HAVE_PCI
>> 776 select IRQ_MIPS_CPU
>> 777 select IRQ_DOMAIN_HIERARCHY
>> 778 select NR_CPUS_DEFAULT_2
>> 779 select PCI_DRIVERS_GENERIC
>> 780 select PCI_XTALK_BRIDGE
>> 781 select SYS_HAS_EARLY_PRINTK
>> 782 select SYS_HAS_CPU_R10000
>> 783 select SYS_SUPPORTS_64BIT_KERNEL
>> 784 select SYS_SUPPORTS_BIG_ENDIAN
>> 785 select SYS_SUPPORTS_SMP
>> 786 select MIPS_L1_CACHE_SHIFT_7
>> 787 select ARC_MEMORY
>> 788 help
>> 789 These are the SGI Octane and Octane2 graphics workstations. To
>> 790 compile a Linux kernel that runs on these, say Y here.
>> 791
>> 792 config SGI_IP32
>> 793 bool "SGI IP32 (O2)"
>> 794 select ARC_MEMORY
>> 795 select ARC_PROMLIB
>> 796 select ARCH_HAS_PHYS_TO_DMA
>> 797 select FW_ARC
>> 798 select FW_ARC32
>> 799 select BOOT_ELF32
>> 800 select CEVT_R4K
>> 801 select CSRC_R4K
>> 802 select DMA_NONCOHERENT
>> 803 select HAVE_PCI
>> 804 select IRQ_MIPS_CPU
>> 805 select R5000_CPU_SCACHE
>> 806 select RM7000_CPU_SCACHE
>> 807 select SYS_HAS_CPU_R5000
>> 808 select SYS_HAS_CPU_R10000 if BROKEN
>> 809 select SYS_HAS_CPU_RM7000
>> 810 select SYS_HAS_CPU_NEVADA
>> 811 select SYS_SUPPORTS_64BIT_KERNEL
>> 812 select SYS_SUPPORTS_BIG_ENDIAN
>> 813 help
>> 814 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 815
>> 816 config SIBYTE_CRHINE
>> 817 bool "Sibyte BCM91120C-CRhine"
>> 818 select BOOT_ELF32
>> 819 select SIBYTE_BCM1120
>> 820 select SWAP_IO_SPACE
>> 821 select SYS_HAS_CPU_SB1
>> 822 select SYS_SUPPORTS_BIG_ENDIAN
>> 823 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 824
>> 825 config SIBYTE_CARMEL
>> 826 bool "Sibyte BCM91120x-Carmel"
>> 827 select BOOT_ELF32
>> 828 select SIBYTE_BCM1120
>> 829 select SWAP_IO_SPACE
>> 830 select SYS_HAS_CPU_SB1
>> 831 select SYS_SUPPORTS_BIG_ENDIAN
>> 832 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 833
>> 834 config SIBYTE_CRHONE
>> 835 bool "Sibyte BCM91125C-CRhone"
>> 836 select BOOT_ELF32
>> 837 select SIBYTE_BCM1125
>> 838 select SWAP_IO_SPACE
>> 839 select SYS_HAS_CPU_SB1
>> 840 select SYS_SUPPORTS_BIG_ENDIAN
>> 841 select SYS_SUPPORTS_HIGHMEM
>> 842 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 843
>> 844 config SIBYTE_RHONE
>> 845 bool "Sibyte BCM91125E-Rhone"
>> 846 select BOOT_ELF32
>> 847 select SIBYTE_BCM1125H
>> 848 select SWAP_IO_SPACE
>> 849 select SYS_HAS_CPU_SB1
>> 850 select SYS_SUPPORTS_BIG_ENDIAN
>> 851 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 852
>> 853 config SIBYTE_SWARM
>> 854 bool "Sibyte BCM91250A-SWARM"
>> 855 select BOOT_ELF32
>> 856 select HAVE_PATA_PLATFORM
>> 857 select SIBYTE_SB1250
>> 858 select SWAP_IO_SPACE
>> 859 select SYS_HAS_CPU_SB1
>> 860 select SYS_SUPPORTS_BIG_ENDIAN
>> 861 select SYS_SUPPORTS_HIGHMEM
>> 862 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 863 select ZONE_DMA32 if 64BIT
>> 864 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 865
>> 866 config SIBYTE_LITTLESUR
>> 867 bool "Sibyte BCM91250C2-LittleSur"
>> 868 select BOOT_ELF32
>> 869 select HAVE_PATA_PLATFORM
>> 870 select SIBYTE_SB1250
>> 871 select SWAP_IO_SPACE
>> 872 select SYS_HAS_CPU_SB1
>> 873 select SYS_SUPPORTS_BIG_ENDIAN
>> 874 select SYS_SUPPORTS_HIGHMEM
>> 875 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 876 select ZONE_DMA32 if 64BIT
>> 877
>> 878 config SIBYTE_SENTOSA
>> 879 bool "Sibyte BCM91250E-Sentosa"
>> 880 select BOOT_ELF32
>> 881 select SIBYTE_SB1250
>> 882 select SWAP_IO_SPACE
>> 883 select SYS_HAS_CPU_SB1
>> 884 select SYS_SUPPORTS_BIG_ENDIAN
>> 885 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 886 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 887
>> 888 config SIBYTE_BIGSUR
>> 889 bool "Sibyte BCM91480B-BigSur"
>> 890 select BOOT_ELF32
>> 891 select NR_CPUS_DEFAULT_4
>> 892 select SIBYTE_BCM1x80
>> 893 select SWAP_IO_SPACE
>> 894 select SYS_HAS_CPU_SB1
>> 895 select SYS_SUPPORTS_BIG_ENDIAN
>> 896 select SYS_SUPPORTS_HIGHMEM
>> 897 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 898 select ZONE_DMA32 if 64BIT
>> 899 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 900
>> 901 config SNI_RM
>> 902 bool "SNI RM200/300/400"
>> 903 select ARC_MEMORY
>> 904 select ARC_PROMLIB
>> 905 select FW_ARC if CPU_LITTLE_ENDIAN
>> 906 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 907 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 908 select ARCH_MAY_HAVE_PC_FDC
>> 909 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 910 select ARCH_MIGHT_HAVE_PC_SERIO
>> 911 select BOOT_ELF32
>> 912 select CEVT_R4K
>> 913 select CSRC_R4K
>> 914 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 915 select DMA_NONCOHERENT
>> 916 select GENERIC_ISA_DMA
>> 917 select HAVE_EISA
>> 918 select HAVE_PCSPKR_PLATFORM
>> 919 select HAVE_PCI
>> 920 select IRQ_MIPS_CPU
>> 921 select I8253
>> 922 select I8259
>> 923 select ISA
>> 924 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 925 select SYS_HAS_CPU_R4X00
>> 926 select SYS_HAS_CPU_R5000
>> 927 select SYS_HAS_CPU_R10000
>> 928 select R5000_CPU_SCACHE
>> 929 select SYS_HAS_EARLY_PRINTK
>> 930 select SYS_SUPPORTS_32BIT_KERNEL
>> 931 select SYS_SUPPORTS_64BIT_KERNEL
>> 932 select SYS_SUPPORTS_BIG_ENDIAN
>> 933 select SYS_SUPPORTS_HIGHMEM
>> 934 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 935 help
>> 936 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 937 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 938 Technology and now in turn merged with Fujitsu. Say Y here to
>> 939 support this machine type.
>> 940
>> 941 config MACH_TX39XX
>> 942 bool "Toshiba TX39 series based machines"
>> 943
>> 944 config MACH_TX49XX
>> 945 bool "Toshiba TX49 series based machines"
>> 946
>> 947 config MIKROTIK_RB532
>> 948 bool "Mikrotik RB532 boards"
>> 949 select CEVT_R4K
>> 950 select CSRC_R4K
>> 951 select DMA_NONCOHERENT
>> 952 select HAVE_PCI
>> 953 select IRQ_MIPS_CPU
>> 954 select SYS_HAS_CPU_MIPS32_R1
>> 955 select SYS_SUPPORTS_32BIT_KERNEL
>> 956 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 957 select SWAP_IO_SPACE
>> 958 select BOOT_RAW
>> 959 select GPIOLIB
>> 960 select MIPS_L1_CACHE_SHIFT_4
>> 961 help
>> 962 Support the Mikrotik(tm) RouterBoard 532 series,
>> 963 based on the IDT RC32434 SoC.
354 964
355 config SBUS !! 965 config CAVIUM_OCTEON_SOC
356 bool !! 966 bool "Cavium Networks Octeon SoC based boards"
>> 967 select CEVT_R4K
>> 968 select ARCH_HAS_PHYS_TO_DMA
>> 969 select HAVE_RAPIDIO
>> 970 select PHYS_ADDR_T_64BIT
>> 971 select SYS_SUPPORTS_64BIT_KERNEL
>> 972 select SYS_SUPPORTS_BIG_ENDIAN
>> 973 select EDAC_SUPPORT
>> 974 select EDAC_ATOMIC_SCRUB
>> 975 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 976 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 977 select SYS_HAS_EARLY_PRINTK
>> 978 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 979 select HAVE_PCI
>> 980 select ZONE_DMA32
>> 981 select HOLES_IN_ZONE
>> 982 select GPIOLIB
>> 983 select LIBFDT
>> 984 select USE_OF
>> 985 select ARCH_SPARSEMEM_ENABLE
>> 986 select SYS_SUPPORTS_SMP
>> 987 select NR_CPUS_DEFAULT_64
>> 988 select MIPS_NR_CPU_NR_MAP_1024
>> 989 select BUILTIN_DTB
>> 990 select MTD_COMPLEX_MAPPINGS
>> 991 select SWIOTLB
>> 992 select SYS_SUPPORTS_RELOCATABLE
>> 993 help
>> 994 This option supports all of the Octeon reference boards from Cavium
>> 995 Networks. It builds a kernel that dynamically determines the Octeon
>> 996 CPU type and supports all known board reference implementations.
>> 997 Some of the supported boards are:
>> 998 EBT3000
>> 999 EBH3000
>> 1000 EBH3100
>> 1001 Thunder
>> 1002 Kodama
>> 1003 Hikari
>> 1004 Say Y here for most Octeon reference boards.
>> 1005
>> 1006 config NLM_XLR_BOARD
>> 1007 bool "Netlogic XLR/XLS based systems"
>> 1008 select BOOT_ELF32
>> 1009 select NLM_COMMON
>> 1010 select SYS_HAS_CPU_XLR
>> 1011 select SYS_SUPPORTS_SMP
>> 1012 select HAVE_PCI
>> 1013 select SWAP_IO_SPACE
>> 1014 select SYS_SUPPORTS_32BIT_KERNEL
>> 1015 select SYS_SUPPORTS_64BIT_KERNEL
>> 1016 select PHYS_ADDR_T_64BIT
>> 1017 select SYS_SUPPORTS_BIG_ENDIAN
>> 1018 select SYS_SUPPORTS_HIGHMEM
>> 1019 select NR_CPUS_DEFAULT_32
>> 1020 select CEVT_R4K
>> 1021 select CSRC_R4K
>> 1022 select IRQ_MIPS_CPU
>> 1023 select ZONE_DMA32 if 64BIT
>> 1024 select SYNC_R4K
>> 1025 select SYS_HAS_EARLY_PRINTK
>> 1026 select SYS_SUPPORTS_ZBOOT
>> 1027 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1028 help
>> 1029 Support for systems based on Netlogic XLR and XLS processors.
>> 1030 Say Y here if you have a XLR or XLS based board.
>> 1031
>> 1032 config NLM_XLP_BOARD
>> 1033 bool "Netlogic XLP based systems"
>> 1034 select BOOT_ELF32
>> 1035 select NLM_COMMON
>> 1036 select SYS_HAS_CPU_XLP
>> 1037 select SYS_SUPPORTS_SMP
>> 1038 select HAVE_PCI
>> 1039 select SYS_SUPPORTS_32BIT_KERNEL
>> 1040 select SYS_SUPPORTS_64BIT_KERNEL
>> 1041 select PHYS_ADDR_T_64BIT
>> 1042 select GPIOLIB
>> 1043 select SYS_SUPPORTS_BIG_ENDIAN
>> 1044 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1045 select SYS_SUPPORTS_HIGHMEM
>> 1046 select NR_CPUS_DEFAULT_32
>> 1047 select CEVT_R4K
>> 1048 select CSRC_R4K
>> 1049 select IRQ_MIPS_CPU
>> 1050 select ZONE_DMA32 if 64BIT
>> 1051 select SYNC_R4K
>> 1052 select SYS_HAS_EARLY_PRINTK
>> 1053 select USE_OF
>> 1054 select SYS_SUPPORTS_ZBOOT
>> 1055 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1056 help
>> 1057 This board is based on Netlogic XLP Processor.
>> 1058 Say Y here if you have a XLP based board.
>> 1059
>> 1060 config MIPS_PARAVIRT
>> 1061 bool "Para-Virtualized guest system"
>> 1062 select CEVT_R4K
>> 1063 select CSRC_R4K
>> 1064 select SYS_SUPPORTS_64BIT_KERNEL
>> 1065 select SYS_SUPPORTS_32BIT_KERNEL
>> 1066 select SYS_SUPPORTS_BIG_ENDIAN
>> 1067 select SYS_SUPPORTS_SMP
>> 1068 select NR_CPUS_DEFAULT_4
>> 1069 select SYS_HAS_EARLY_PRINTK
>> 1070 select SYS_HAS_CPU_MIPS32_R2
>> 1071 select SYS_HAS_CPU_MIPS64_R2
>> 1072 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1073 select HAVE_PCI
>> 1074 select SWAP_IO_SPACE
>> 1075 help
>> 1076 This option supports guest running under ????
357 1077
358 config GENERIC_ISA_DMA !! 1078 endchoice
359 def_bool y <<
360 depends on ISA_DMA_API <<
361 1079
362 config GENERIC_CSUM !! 1080 source "arch/mips/alchemy/Kconfig"
>> 1081 source "arch/mips/ath25/Kconfig"
>> 1082 source "arch/mips/ath79/Kconfig"
>> 1083 source "arch/mips/bcm47xx/Kconfig"
>> 1084 source "arch/mips/bcm63xx/Kconfig"
>> 1085 source "arch/mips/bmips/Kconfig"
>> 1086 source "arch/mips/generic/Kconfig"
>> 1087 source "arch/mips/jazz/Kconfig"
>> 1088 source "arch/mips/jz4740/Kconfig"
>> 1089 source "arch/mips/lantiq/Kconfig"
>> 1090 source "arch/mips/lasat/Kconfig"
>> 1091 source "arch/mips/pic32/Kconfig"
>> 1092 source "arch/mips/pistachio/Kconfig"
>> 1093 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1094 source "arch/mips/ralink/Kconfig"
>> 1095 source "arch/mips/sgi-ip27/Kconfig"
>> 1096 source "arch/mips/sibyte/Kconfig"
>> 1097 source "arch/mips/txx9/Kconfig"
>> 1098 source "arch/mips/vr41xx/Kconfig"
>> 1099 source "arch/mips/cavium-octeon/Kconfig"
>> 1100 source "arch/mips/loongson2ef/Kconfig"
>> 1101 source "arch/mips/loongson32/Kconfig"
>> 1102 source "arch/mips/loongson64/Kconfig"
>> 1103 source "arch/mips/netlogic/Kconfig"
>> 1104 source "arch/mips/paravirt/Kconfig"
>> 1105
>> 1106 endmenu
>> 1107
>> 1108 config GENERIC_HWEIGHT
363 bool 1109 bool
364 default y if KMSAN || KASAN !! 1110 default y
365 1111
366 config GENERIC_BUG !! 1112 config GENERIC_CALIBRATE_DELAY
367 def_bool y !! 1113 bool
368 depends on BUG !! 1114 default y
369 select GENERIC_BUG_RELATIVE_POINTERS i <<
370 1115
371 config GENERIC_BUG_RELATIVE_POINTERS !! 1116 config SCHED_OMIT_FRAME_POINTER
>> 1117 bool
>> 1118 default y
>> 1119
>> 1120 #
>> 1121 # Select some configuration options automatically based on user selections.
>> 1122 #
>> 1123 config FW_ARC
372 bool 1124 bool
373 1125
374 config ARCH_MAY_HAVE_PC_FDC 1126 config ARCH_MAY_HAVE_PC_FDC
375 def_bool y !! 1127 bool
376 depends on ISA_DMA_API <<
377 1128
378 config GENERIC_CALIBRATE_DELAY !! 1129 config BOOT_RAW
379 def_bool y !! 1130 bool
380 1131
381 config ARCH_HAS_CPU_RELAX !! 1132 config CEVT_BCM1480
382 def_bool y !! 1133 bool
383 1134
384 config ARCH_HIBERNATION_POSSIBLE !! 1135 config CEVT_DS1287
385 def_bool y !! 1136 bool
386 1137
387 config ARCH_SUSPEND_POSSIBLE !! 1138 config CEVT_GT641XX
388 def_bool y !! 1139 bool
389 1140
390 config AUDIT_ARCH !! 1141 config CEVT_R4K
391 def_bool y if X86_64 !! 1142 bool
392 1143
393 config KASAN_SHADOW_OFFSET !! 1144 config CEVT_SB1250
394 hex !! 1145 bool
395 depends on KASAN <<
396 default 0xdffffc0000000000 <<
397 1146
398 config HAVE_INTEL_TXT !! 1147 config CEVT_TXX9
399 def_bool y !! 1148 bool
400 depends on INTEL_IOMMU && ACPI <<
401 1149
402 config X86_64_SMP !! 1150 config CSRC_BCM1480
403 def_bool y !! 1151 bool
404 depends on X86_64 && SMP <<
405 1152
406 config ARCH_SUPPORTS_UPROBES !! 1153 config CSRC_IOASIC
407 def_bool y !! 1154 bool
408 1155
409 config FIX_EARLYCON_MEM !! 1156 config CSRC_R4K
410 def_bool y !! 1157 bool
411 1158
412 config DYNAMIC_PHYSICAL_MASK !! 1159 config CSRC_SB1250
413 bool 1160 bool
414 1161
415 config PGTABLE_LEVELS !! 1162 config MIPS_CLOCK_VSYSCALL
416 int !! 1163 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
417 default 5 if X86_5LEVEL <<
418 default 4 if X86_64 <<
419 default 3 if X86_PAE <<
420 default 2 <<
421 1164
422 config CC_HAS_SANE_STACKPROTECTOR !! 1165 config GPIO_TXX9
>> 1166 select GPIOLIB
423 bool 1167 bool
424 default $(success,$(srctree)/scripts/g <<
425 default $(success,$(srctree)/scripts/g <<
426 help <<
427 We have to make sure stack protector <<
428 the compiler produces broken code or <<
429 the segment on 32-bit kernels. <<
430 1168
431 menu "Processor type and features" !! 1169 config FW_CFE
432 !! 1170 bool
433 config SMP <<
434 bool "Symmetric multi-processing suppo <<
435 help <<
436 This enables support for systems wit <<
437 a system with only one CPU, say N. I <<
438 than one CPU, say Y. <<
439 1171
440 If you say N here, the kernel will r !! 1172 config ARCH_SUPPORTS_UPROBES
441 machines, but will use only one CPU !! 1173 bool
442 you say Y here, the kernel will run <<
443 uniprocessor machines. On a uniproce <<
444 will run faster if you say N here. <<
445 1174
446 Note that if you say Y here and choo !! 1175 config DMA_MAYBE_COHERENT
447 "Pentium" under "Processor family", !! 1176 select ARCH_HAS_DMA_COHERENCE_H
448 architectures. Similarly, multiproce !! 1177 select DMA_NONCOHERENT
449 architecture may not work on all Pen !! 1178 bool
450 1179
451 People using multiprocessor machines !! 1180 config DMA_PERDEV_COHERENT
452 Y to "Enhanced Real Time Clock Suppo !! 1181 bool
453 Management" code will be disabled if !! 1182 select ARCH_HAS_SETUP_DMA_OPS
>> 1183 select DMA_NONCOHERENT
454 1184
455 See also <file:Documentation/arch/x8 !! 1185 config DMA_NONCOHERENT
456 <file:Documentation/admin-guide/lock !! 1186 bool
457 <http://www.tldp.org/docs.html#howto !! 1187 #
>> 1188 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1189 # Attribute bits. It is believed that the uncached access through
>> 1190 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1191 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1192 # significant advantages.
>> 1193 #
>> 1194 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1195 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1196 select ARCH_HAS_UNCACHED_SEGMENT
>> 1197 select DMA_NONCOHERENT_MMAP
>> 1198 select DMA_NONCOHERENT_CACHE_SYNC
>> 1199 select NEED_DMA_MAP_STATE
458 1200
459 If you don't know what to do here, s !! 1201 config SYS_HAS_EARLY_PRINTK
>> 1202 bool
460 1203
461 config X86_X2APIC !! 1204 config SYS_SUPPORTS_HOTPLUG_CPU
462 bool "Support x2apic" !! 1205 bool
463 depends on X86_LOCAL_APIC && X86_64 && <<
464 help <<
465 This enables x2apic support on CPUs <<
466 <<
467 This allows 32-bit apic IDs (so it c <<
468 and accesses the local apic via MSRs <<
469 <<
470 Some Intel systems circa 2022 and la <<
471 and can not fall back to the legacy <<
472 enabled in the BIOS. They will boot <<
473 without enabling this option. <<
474 1206
475 If you don't know what to do here, s !! 1207 config MIPS_BONITO64
>> 1208 bool
476 1209
477 config X86_POSTED_MSI !! 1210 config MIPS_MSC
478 bool "Enable MSI and MSI-x delivery by !! 1211 bool
479 depends on X86_64 && IRQ_REMAP <<
480 help <<
481 This enables MSIs that are under int <<
482 posted interrupts to the host kernel <<
483 potentially be improved by coalescin <<
484 frequency bursts. <<
485 1212
486 If you don't know what to do here, s !! 1213 config MIPS_NILE4
>> 1214 bool
487 1215
488 config X86_MPPARSE !! 1216 config SYNC_R4K
489 bool "Enable MPS table" if ACPI !! 1217 bool
490 default y <<
491 depends on X86_LOCAL_APIC <<
492 help <<
493 For old smp systems that do not have <<
494 (esp with 64bit cpus) with acpi supp <<
495 1218
496 config X86_CPU_RESCTRL !! 1219 config MIPS_MACHINE
497 bool "x86 CPU resource control support !! 1220 def_bool n
498 depends on X86 && (CPU_SUP_INTEL || CP <<
499 select KERNFS <<
500 select PROC_CPU_RESCTRL if PRO <<
501 help <<
502 Enable x86 CPU resource control supp <<
503 1221
504 Provide support for the allocation a !! 1222 config NO_IOPORT_MAP
505 usage by the CPU. !! 1223 def_bool n
506 1224
507 Intel calls this Intel Resource Dire !! 1225 config GENERIC_CSUM
508 (Intel(R) RDT). More information abo !! 1226 bool
509 Intel x86 Architecture Software Deve !! 1227 default y if !CPU_HAS_LOAD_STORE_LR
510 1228
511 AMD calls this AMD Platform Quality !! 1229 config GENERIC_ISA_DMA
512 More information about AMD QoS can b !! 1230 bool
513 Platform Quality of Service Extensio !! 1231 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1232 select ISA_DMA_API
514 1233
515 Say N if unsure. !! 1234 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1235 bool
>> 1236 select GENERIC_ISA_DMA
516 1237
517 config X86_FRED !! 1238 config ISA_DMA_API
518 bool "Flexible Return and Event Delive !! 1239 bool
519 depends on X86_64 <<
520 help <<
521 When enabled, try to use Flexible Re <<
522 instead of the legacy SYSCALL/SYSENT <<
523 ring transitions and exception/inter <<
524 system supports it. <<
525 1240
526 config X86_BIGSMP !! 1241 config HOLES_IN_ZONE
527 bool "Support for big SMP systems with !! 1242 bool
528 depends on SMP && X86_32 <<
529 help <<
530 This option is needed for the system <<
531 1243
532 config X86_EXTENDED_PLATFORM !! 1244 config SYS_SUPPORTS_RELOCATABLE
533 bool "Support for extended (non-PC) x8 !! 1245 bool
534 default y <<
535 help <<
536 If you disable this option then the <<
537 standard PC platforms. (which covers <<
538 systems out there.) <<
539 <<
540 If you enable this option then you'l <<
541 for the following non-PC x86 platfor <<
542 CONFIG_64BIT. <<
543 <<
544 32-bit platforms (CONFIG_64BIT=n): <<
545 Goldfish (Android emulator) <<
546 AMD Elan <<
547 RDC R-321x SoC <<
548 SGI 320/540 (Visual Workstatio <<
549 STA2X11-based (e.g. Northville <<
550 Moorestown MID devices <<
551 <<
552 64-bit platforms (CONFIG_64BIT=y): <<
553 Numascale NumaChip <<
554 ScaleMP vSMP <<
555 SGI Ultraviolet <<
556 <<
557 If you have one of these systems, or <<
558 generic distribution kernel, say Y h <<
559 <<
560 # This is an alphabetically sorted list of 64 <<
561 # Please maintain the alphabetic order if and <<
562 config X86_NUMACHIP <<
563 bool "Numascale NumaChip" <<
564 depends on X86_64 <<
565 depends on X86_EXTENDED_PLATFORM <<
566 depends on NUMA <<
567 depends on SMP <<
568 depends on X86_X2APIC <<
569 depends on PCI_MMCONFIG <<
570 help <<
571 Adds support for Numascale NumaChip <<
572 enable more than ~168 cores. <<
573 If you don't have one of these, you <<
574 <<
575 config X86_VSMP <<
576 bool "ScaleMP vSMP" <<
577 select HYPERVISOR_GUEST <<
578 select PARAVIRT <<
579 depends on X86_64 && PCI <<
580 depends on X86_EXTENDED_PLATFORM <<
581 depends on SMP <<
582 help <<
583 Support for ScaleMP vSMP systems. S <<
584 supposed to run on these EM64T-based <<
585 if you have one of these machines. <<
586 <<
587 config X86_UV <<
588 bool "SGI Ultraviolet" <<
589 depends on X86_64 <<
590 depends on X86_EXTENDED_PLATFORM <<
591 depends on NUMA <<
592 depends on EFI <<
593 depends on KEXEC_CORE <<
594 depends on X86_X2APIC <<
595 depends on PCI <<
596 help <<
597 This option is needed in order to su <<
598 If you don't have one of these, you <<
599 <<
600 # Following is an alphabetically sorted list o <<
601 # Please maintain the alphabetic order if and <<
602 <<
603 config X86_GOLDFISH <<
604 bool "Goldfish (Virtual Platform)" <<
605 depends on X86_EXTENDED_PLATFORM <<
606 help <<
607 Enable support for the Goldfish virt <<
608 for Android development. Unless you <<
609 Goldfish emulator say N here. <<
610 <<
611 config X86_INTEL_CE <<
612 bool "CE4100 TV platform" <<
613 depends on PCI <<
614 depends on PCI_GODIRECT <<
615 depends on X86_IO_APIC <<
616 depends on X86_32 <<
617 depends on X86_EXTENDED_PLATFORM <<
618 select X86_REBOOTFIXUPS <<
619 select OF <<
620 select OF_EARLY_FLATTREE <<
621 help <<
622 Select for the Intel CE media proces <<
623 This option compiles in support for <<
624 boxes and media devices. <<
625 <<
626 config X86_INTEL_MID <<
627 bool "Intel MID platform support" <<
628 depends on X86_EXTENDED_PLATFORM <<
629 depends on X86_PLATFORM_DEVICES <<
630 depends on PCI <<
631 depends on X86_64 || (PCI_GOANY && X86 <<
632 depends on X86_IO_APIC <<
633 select I2C <<
634 select DW_APB_TIMER <<
635 select INTEL_SCU_PCI <<
636 help <<
637 Select to build a kernel capable of <<
638 Internet Device) platform systems wh <<
639 interfaces. If you are building for <<
640 <<
641 Intel MID platforms are based on an <<
642 consume less power than most of the <<
643 <<
644 config X86_INTEL_QUARK <<
645 bool "Intel Quark platform support" <<
646 depends on X86_32 <<
647 depends on X86_EXTENDED_PLATFORM <<
648 depends on X86_PLATFORM_DEVICES <<
649 depends on X86_TSC <<
650 depends on PCI <<
651 depends on PCI_GOANY <<
652 depends on X86_IO_APIC <<
653 select IOSF_MBI <<
654 select INTEL_IMR <<
655 select COMMON_CLK <<
656 help <<
657 Select to include support for Quark <<
658 Say Y here if you have a Quark based <<
659 compatible Intel Galileo. <<
660 <<
661 config X86_INTEL_LPSS <<
662 bool "Intel Low Power Subsystem Suppor <<
663 depends on X86 && ACPI && PCI <<
664 select COMMON_CLK <<
665 select PINCTRL <<
666 select IOSF_MBI <<
667 help <<
668 Select to build support for Intel Lo <<
669 found on Intel Lynxpoint PCH. Select <<
670 things like clock tree (common clock <<
671 which are needed by the LPSS periphe <<
672 <<
673 config X86_AMD_PLATFORM_DEVICE <<
674 bool "AMD ACPI2Platform devices suppor <<
675 depends on ACPI <<
676 select COMMON_CLK <<
677 select PINCTRL <<
678 help 1246 help
679 Select to interpret AMD specific ACP !! 1247 Selected if the platform supports relocating the kernel.
680 such as I2C, UART, GPIO found on AMD !! 1248 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
681 I2C and UART depend on COMMON_CLK to !! 1249 to allow access to command line and entropy sources.
682 implemented under PINCTRL subsystem. <<
683 <<
684 config IOSF_MBI <<
685 tristate "Intel SoC IOSF Sideband supp <<
686 depends on PCI <<
687 help <<
688 This option enables sideband registe <<
689 platforms. On these platforms the IO <<
690 MSR's for some register accesses, mo <<
691 and power. Drivers may query the ava <<
692 determine if they need the sideband <<
693 platforms. The sideband is available <<
694 This list is not meant to be exclusi <<
695 - BayTrail <<
696 - Braswell <<
697 - Quark <<
698 <<
699 You should say Y if you are running <<
700 <<
701 config IOSF_MBI_DEBUG <<
702 bool "Enable IOSF sideband access thro <<
703 depends on IOSF_MBI && DEBUG_FS <<
704 help <<
705 Select this option to expose the IOS <<
706 MDR, MCRX) through debugfs to write <<
707 different units on the SoC. This is <<
708 state information for debug and anal <<
709 mechanism, users of this option woul <<
710 device they want to access. <<
711 <<
712 If you don't require the option or a <<
713 <<
714 config X86_RDC321X <<
715 bool "RDC R-321x SoC" <<
716 depends on X86_32 <<
717 depends on X86_EXTENDED_PLATFORM <<
718 select M486 <<
719 select X86_REBOOTFIXUPS <<
720 help <<
721 This option is needed for RDC R-321x <<
722 as R-8610-(G). <<
723 If you don't have one of these chips <<
724 <<
725 config X86_32_NON_STANDARD <<
726 bool "Support non-standard 32-bit SMP <<
727 depends on X86_32 && SMP <<
728 depends on X86_EXTENDED_PLATFORM <<
729 help <<
730 This option compiles in the bigsmp a <<
731 subarchitectures. It is intended fo <<
732 kernel. If you select them all, kern <<
733 one and will fallback to default. <<
734 <<
735 # Alphabetically sorted list of Non standard 3 <<
736 1250
737 config X86_SUPPORTS_MEMORY_FAILURE !! 1251 config MIPS_CBPF_JIT
738 def_bool y 1252 def_bool y
739 # MCE code calls memory_failure(): !! 1253 depends on BPF_JIT && HAVE_CBPF_JIT
740 depends on X86_MCE <<
741 # On 32-bit this adds too big of NODES <<
742 # On 32-bit SPARSEMEM adds too big of <<
743 depends on X86_64 || !SPARSEMEM <<
744 select ARCH_SUPPORTS_MEMORY_FAILURE <<
745 <<
746 config STA2X11 <<
747 bool "STA2X11 Companion Chip Support" <<
748 depends on X86_32_NON_STANDARD && PCI <<
749 select SWIOTLB <<
750 select MFD_STA2X11 <<
751 select GPIOLIB <<
752 help <<
753 This adds support for boards based o <<
754 a.k.a. "ConneXt". The chip is used i <<
755 PC chipset, so all "standard" periph <<
756 option is selected the kernel will s <<
757 standard PC machines. <<
758 <<
759 config X86_32_IRIS <<
760 tristate "Eurobraille/Iris poweroff mo <<
761 depends on X86_32 <<
762 help <<
763 The Iris machines from EuroBraille d <<
764 to shut themselves down properly. A <<
765 needed to do so, which is what this <<
766 kernel shutdown. <<
767 1254
768 This is only for Iris machines from !! 1255 config MIPS_EBPF_JIT
>> 1256 def_bool y
>> 1257 depends on BPF_JIT && HAVE_EBPF_JIT
769 1258
770 If unused, say N. <<
771 1259
772 config SCHED_OMIT_FRAME_POINTER !! 1260 #
773 def_bool y !! 1261 # Endianness selection. Sufficiently obscure so many users don't know what to
774 prompt "Single-depth WCHAN output" !! 1262 # answer,so we try hard to limit the available choices. Also the use of a
775 depends on X86 !! 1263 # choice statement should be more obvious to the user.
>> 1264 #
>> 1265 choice
>> 1266 prompt "Endianness selection"
776 help 1267 help
777 Calculate simpler /proc/<PID>/wchan !! 1268 Some MIPS machines can be configured for either little or big endian
778 is disabled then wchan values will r !! 1269 byte order. These modes require different kernels and a different
779 caller function. This provides more !! 1270 Linux distribution. In general there is one preferred byteorder for a
780 at the expense of slightly more sche !! 1271 particular system but some systems are just as commonly used in the
>> 1272 one or the other endianness.
>> 1273
>> 1274 config CPU_BIG_ENDIAN
>> 1275 bool "Big endian"
>> 1276 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1277
>> 1278 config CPU_LITTLE_ENDIAN
>> 1279 bool "Little endian"
>> 1280 depends on SYS_SUPPORTS_LITTLE_ENDIAN
781 1281
782 If in doubt, say "Y". !! 1282 endchoice
783 1283
784 menuconfig HYPERVISOR_GUEST !! 1284 config EXPORT_UASM
785 bool "Linux guest support" !! 1285 bool
786 help <<
787 Say Y here to enable options for run <<
788 visors. This option enables basic hy <<
789 setup. <<
790 1286
791 If you say N, all options in this su !! 1287 config SYS_SUPPORTS_APM_EMULATION
792 disabled, and Linux guest support wo !! 1288 bool
793 1289
794 if HYPERVISOR_GUEST !! 1290 config SYS_SUPPORTS_BIG_ENDIAN
>> 1291 bool
795 1292
796 config PARAVIRT !! 1293 config SYS_SUPPORTS_LITTLE_ENDIAN
797 bool "Enable paravirtualization code" !! 1294 bool
798 depends on HAVE_STATIC_CALL <<
799 help <<
800 This changes the kernel so it can mo <<
801 under a hypervisor, potentially impr <<
802 over full virtualization. However, <<
803 the kernel is theoretically slower a <<
804 1295
805 config PARAVIRT_XXL !! 1296 config SYS_SUPPORTS_HUGETLBFS
806 bool 1297 bool
>> 1298 depends on CPU_SUPPORTS_HUGEPAGES
>> 1299 default y
807 1300
808 config PARAVIRT_DEBUG !! 1301 config MIPS_HUGE_TLB_SUPPORT
809 bool "paravirt-ops debugging" !! 1302 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
810 depends on PARAVIRT && DEBUG_KERNEL <<
811 help <<
812 Enable to debug paravirt_ops interna <<
813 a paravirt_op is missing when it is <<
814 1303
815 config PARAVIRT_SPINLOCKS !! 1304 config IRQ_CPU_RM7K
816 bool "Paravirtualization layer for spi !! 1305 bool
817 depends on PARAVIRT && SMP <<
818 help <<
819 Paravirtualized spinlocks allow a pv <<
820 spinlock implementation with somethi <<
821 (for example, block the virtual CPU <<
822 1306
823 It has a minimal impact on native ke !! 1307 config IRQ_MSP_SLP
824 benefit on paravirtualized KVM / Xen !! 1308 bool
825 1309
826 If you are unsure how to answer this !! 1310 config IRQ_MSP_CIC
>> 1311 bool
827 1312
828 config X86_HV_CALLBACK_VECTOR !! 1313 config IRQ_TXX9
829 def_bool n !! 1314 bool
830 1315
831 source "arch/x86/xen/Kconfig" !! 1316 config IRQ_GT641XX
>> 1317 bool
832 1318
833 config KVM_GUEST !! 1319 config PCI_GT64XXX_PCI0
834 bool "KVM Guest support (including kvm !! 1320 bool
835 depends on PARAVIRT <<
836 select PARAVIRT_CLOCK <<
837 select ARCH_CPUIDLE_HALTPOLL <<
838 select X86_HV_CALLBACK_VECTOR <<
839 default y <<
840 help <<
841 This option enables various optimiza <<
842 hypervisor. It includes a paravirtua <<
843 of relying on a PIT (or probably oth <<
844 underlying device model, the host pr <<
845 timing infrastructure such as time o <<
846 1321
847 config ARCH_CPUIDLE_HALTPOLL !! 1322 config PCI_XTALK_BRIDGE
848 def_bool n !! 1323 bool
849 prompt "Disable host haltpoll when loa <<
850 help <<
851 If virtualized under KVM, disable ho <<
852 1324
853 config PVH !! 1325 config NO_EXCEPT_FILL
854 bool "Support for running PVH guests" !! 1326 bool
855 help <<
856 This option enables the PVH entry po <<
857 as specified in the x86/HVM direct b <<
858 <<
859 config PARAVIRT_TIME_ACCOUNTING <<
860 bool "Paravirtual steal time accountin <<
861 depends on PARAVIRT <<
862 help <<
863 Select this option to enable fine gr <<
864 accounting. Time spent executing oth <<
865 the current vCPU is discounted from <<
866 that, there can be a small performan <<
867 <<
868 If in doubt, say N here. <<
869 <<
870 config PARAVIRT_CLOCK <<
871 bool <<
872 <<
873 config JAILHOUSE_GUEST <<
874 bool "Jailhouse non-root cell support" <<
875 depends on X86_64 && PCI <<
876 select X86_PM_TIMER <<
877 help <<
878 This option allows to run Linux as g <<
879 cell. You can leave this option disa <<
880 Jailhouse and run Linux afterwards i <<
881 <<
882 config ACRN_GUEST <<
883 bool "ACRN Guest support" <<
884 depends on X86_64 <<
885 select X86_HV_CALLBACK_VECTOR <<
886 help <<
887 This option allows to run Linux as g <<
888 a flexible, lightweight reference op <<
889 real-time and safety-criticality in <<
890 IOT with small footprint and real-ti <<
891 found in https://projectacrn.org/. <<
892 <<
893 config INTEL_TDX_GUEST <<
894 bool "Intel TDX (Trust Domain Extensio <<
895 depends on X86_64 && CPU_SUP_INTEL <<
896 depends on X86_X2APIC <<
897 depends on EFI_STUB <<
898 select ARCH_HAS_CC_PLATFORM <<
899 select X86_MEM_ENCRYPT <<
900 select X86_MCE <<
901 select UNACCEPTED_MEMORY <<
902 help <<
903 Support running as a guest under Int <<
904 the guest kernel can not boot or run <<
905 TDX includes memory encryption and i <<
906 which protect the confidentiality an <<
907 memory contents and CPU state. TDX g <<
908 some attacks from the VMM. <<
909 <<
910 endif # HYPERVISOR_GUEST <<
911 <<
912 source "arch/x86/Kconfig.cpu" <<
913 <<
914 config HPET_TIMER <<
915 def_bool X86_64 <<
916 prompt "HPET Timer Support" if X86_32 <<
917 help <<
918 Use the IA-PC HPET (High Precision E <<
919 time in preference to the PIT and RT <<
920 present. <<
921 HPET is the next generation timer re <<
922 The HPET provides a stable time base <<
923 systems, unlike the TSC, but it is m <<
924 as it is off-chip. The interface us <<
925 in the HPET spec, revision 1. <<
926 <<
927 You can safely choose Y here. Howev <<
928 activated if the platform and the BI <<
929 Otherwise the 8254 will be used for <<
930 1327
931 Choose N to continue using the legac !! 1328 config SOC_EMMA2RH
>> 1329 bool
>> 1330 select CEVT_R4K
>> 1331 select CSRC_R4K
>> 1332 select DMA_NONCOHERENT
>> 1333 select IRQ_MIPS_CPU
>> 1334 select SWAP_IO_SPACE
>> 1335 select SYS_HAS_CPU_R5500
>> 1336 select SYS_SUPPORTS_32BIT_KERNEL
>> 1337 select SYS_SUPPORTS_64BIT_KERNEL
>> 1338 select SYS_SUPPORTS_BIG_ENDIAN
932 1339
933 config HPET_EMULATE_RTC !! 1340 config SOC_PNX833X
934 def_bool y !! 1341 bool
935 depends on HPET_TIMER && (RTC_DRV_CMOS !! 1342 select CEVT_R4K
>> 1343 select CSRC_R4K
>> 1344 select IRQ_MIPS_CPU
>> 1345 select DMA_NONCOHERENT
>> 1346 select SYS_HAS_CPU_MIPS32_R2
>> 1347 select SYS_SUPPORTS_32BIT_KERNEL
>> 1348 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1349 select SYS_SUPPORTS_BIG_ENDIAN
>> 1350 select SYS_SUPPORTS_MIPS16
>> 1351 select CPU_MIPSR2_IRQ_VI
936 1352
937 # Mark as expert because too many people got i !! 1353 config SOC_PNX8335
938 # The code disables itself when not needed. !! 1354 bool
939 config DMI !! 1355 select SOC_PNX833X
940 default y <<
941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA <<
942 bool "Enable DMI scanning" if EXPERT <<
943 help <<
944 Enabled scanning of DMI to identify <<
945 here unless you have verified that y <<
946 affected by entries in the DMI black <<
947 BIOS code. <<
948 <<
949 config GART_IOMMU <<
950 bool "Old AMD GART IOMMU support" <<
951 select IOMMU_HELPER <<
952 select SWIOTLB <<
953 depends on X86_64 && PCI && AMD_NB <<
954 help <<
955 Provides a driver for older AMD Athl <<
956 GART based hardware IOMMUs. <<
957 1356
958 The GART supports full DMA access fo !! 1357 config MIPS_SPRAM
959 limitations, on systems with more th !! 1358 bool
960 for USB, sound, many IDE/SATA chipse <<
961 1359
962 Newer systems typically have a moder !! 1360 config SWAP_IO_SPACE
963 the CONFIG_AMD_IOMMU=y config option !! 1361 bool
964 1362
965 In normal configurations this driver !! 1363 config SGI_HAS_INDYDOG
966 there's more than 3 GB of memory and !! 1364 bool
967 32-bit limited device. <<
968 1365
969 If unsure, say Y. !! 1366 config SGI_HAS_HAL2
>> 1367 bool
970 1368
971 config BOOT_VESA_SUPPORT !! 1369 config SGI_HAS_SEEQ
972 bool 1370 bool
973 help <<
974 If true, at least one selected frame <<
975 of VESA video modes set at an early <<
976 1371
977 config MAXSMP !! 1372 config SGI_HAS_WD93
978 bool "Enable Maximum number of SMP Pro !! 1373 bool
979 depends on X86_64 && SMP && DEBUG_KERN <<
980 select CPUMASK_OFFSTACK <<
981 help <<
982 Enable maximum number of CPUS and NU <<
983 If unsure, say N. <<
984 1374
985 # !! 1375 config SGI_HAS_ZILOG
986 # The maximum number of CPUs supported: !! 1376 bool
987 # <<
988 # The main config value is NR_CPUS, which defa <<
989 # and which can be configured interactively in <<
990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] <<
991 # <<
992 # The ranges are different on 32-bit and 64-bi <<
993 # hardware capabilities and scalability featur <<
994 # <<
995 # ( If MAXSMP is enabled we just use the highe <<
996 # interactive configuration. ) <<
997 # <<
998 1377
999 config NR_CPUS_RANGE_BEGIN !! 1378 config SGI_HAS_I8042
1000 int !! 1379 bool
1001 default NR_CPUS_RANGE_END if MAXSMP <<
1002 default 1 if !SMP <<
1003 default 2 <<
1004 1380
1005 config NR_CPUS_RANGE_END !! 1381 config DEFAULT_SGI_PARTITION
1006 int !! 1382 bool
1007 depends on X86_32 <<
1008 default 64 if SMP && X86_BIGSMP <<
1009 default 8 if SMP && !X86_BIGSMP <<
1010 default 1 if !SMP <<
1011 1383
1012 config NR_CPUS_RANGE_END !! 1384 config FW_ARC32
1013 int !! 1385 bool
1014 depends on X86_64 <<
1015 default 8192 if SMP && CPUMASK_OFFST <<
1016 default 512 if SMP && !CPUMASK_OFFS <<
1017 default 1 if !SMP <<
1018 1386
1019 config NR_CPUS_DEFAULT !! 1387 config FW_SNIPROM
1020 int !! 1388 bool
1021 depends on X86_32 <<
1022 default 32 if X86_BIGSMP <<
1023 default 8 if SMP <<
1024 default 1 if !SMP <<
1025 1389
1026 config NR_CPUS_DEFAULT !! 1390 config BOOT_ELF32
1027 int !! 1391 bool
1028 depends on X86_64 <<
1029 default 8192 if MAXSMP <<
1030 default 64 if SMP <<
1031 default 1 if !SMP <<
1032 1392
1033 config NR_CPUS !! 1393 config MIPS_L1_CACHE_SHIFT_4
1034 int "Maximum number of CPUs" if SMP & !! 1394 bool
1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN <<
1036 default NR_CPUS_DEFAULT <<
1037 help <<
1038 This allows you to specify the maxi <<
1039 kernel will support. If CPUMASK_OF <<
1040 supported value is 8192, otherwise <<
1041 minimum value which makes sense is <<
1042 1395
1043 This is purely to save memory: each !! 1396 config MIPS_L1_CACHE_SHIFT_5
1044 to the kernel image. !! 1397 bool
1045 1398
1046 config SCHED_CLUSTER !! 1399 config MIPS_L1_CACHE_SHIFT_6
1047 bool "Cluster scheduler support" !! 1400 bool
1048 depends on SMP <<
1049 default y <<
1050 help <<
1051 Cluster scheduler support improves <<
1052 making when dealing with machines t <<
1053 Cluster usually means a couple of C <<
1054 by sharing mid-level caches, last-l <<
1055 busses. <<
1056 1401
1057 config SCHED_SMT !! 1402 config MIPS_L1_CACHE_SHIFT_7
1058 def_bool y if SMP !! 1403 bool
1059 1404
1060 config SCHED_MC !! 1405 config MIPS_L1_CACHE_SHIFT
1061 def_bool y !! 1406 int
1062 prompt "Multi-core scheduler support" !! 1407 default "7" if MIPS_L1_CACHE_SHIFT_7
1063 depends on SMP !! 1408 default "6" if MIPS_L1_CACHE_SHIFT_6
1064 help !! 1409 default "5" if MIPS_L1_CACHE_SHIFT_5
1065 Multi-core scheduler support improv !! 1410 default "4" if MIPS_L1_CACHE_SHIFT_4
1066 making when dealing with multi-core !! 1411 default "5"
1067 increased overhead in some places. <<
1068 1412
1069 config SCHED_MC_PRIO !! 1413 config HAVE_STD_PC_SERIAL_PORT
1070 bool "CPU core priorities scheduler s !! 1414 bool
1071 depends on SCHED_MC <<
1072 select X86_INTEL_PSTATE if CPU_SUP_IN <<
1073 select X86_AMD_PSTATE if CPU_SUP_AMD <<
1074 select CPU_FREQ <<
1075 default y <<
1076 help <<
1077 Intel Turbo Boost Max Technology 3. <<
1078 core ordering determined at manufac <<
1079 certain cores to reach higher turbo <<
1080 single threaded workloads) than oth <<
1081 1415
1082 Enabling this kernel feature teache !! 1416 config ARC_CMDLINE_ONLY
1083 the TBM3 (aka ITMT) priority order !! 1417 bool
1084 scheduler's CPU selection logic acc <<
1085 overall system performance can be a <<
1086 1418
1087 This feature will have no effect on !! 1419 config ARC_CONSOLE
>> 1420 bool "ARC console support"
>> 1421 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1088 1422
1089 If unsure say Y here. !! 1423 config ARC_MEMORY
>> 1424 bool
1090 1425
1091 config UP_LATE_INIT !! 1426 config ARC_PROMLIB
1092 def_bool y !! 1427 bool
1093 depends on !SMP && X86_LOCAL_APIC <<
1094 1428
1095 config X86_UP_APIC !! 1429 config FW_ARC64
1096 bool "Local APIC support on uniproces !! 1430 bool
1097 default PCI_MSI <<
1098 depends on X86_32 && !SMP && !X86_32_ <<
1099 help <<
1100 A local APIC (Advanced Programmable <<
1101 integrated interrupt controller in <<
1102 system which has a processor with a <<
1103 enable and use it. If you say Y her <<
1104 have a local APIC, then the kernel <<
1105 all. The local APIC supports CPU-ge <<
1106 performance counters), and the NMI <<
1107 lockups. <<
1108 <<
1109 config X86_UP_IOAPIC <<
1110 bool "IO-APIC support on uniprocessor <<
1111 depends on X86_UP_APIC <<
1112 help <<
1113 An IO-APIC (I/O Advanced Programmab <<
1114 SMP-capable replacement for PC-styl <<
1115 SMP systems and many recent uniproc <<
1116 <<
1117 If you have a single-CPU system wit <<
1118 to use it. If you say Y here even t <<
1119 an IO-APIC, then the kernel will st <<
1120 1431
1121 config X86_LOCAL_APIC !! 1432 config BOOT_ELF64
1122 def_bool y !! 1433 bool
1123 depends on X86_64 || SMP || X86_32_NO <<
1124 select IRQ_DOMAIN_HIERARCHY <<
1125 1434
1126 config ACPI_MADT_WAKEUP !! 1435 menu "CPU selection"
1127 def_bool y <<
1128 depends on X86_64 <<
1129 depends on ACPI <<
1130 depends on SMP <<
1131 depends on X86_LOCAL_APIC <<
1132 1436
1133 config X86_IO_APIC !! 1437 choice
1134 def_bool y !! 1438 prompt "CPU type"
1135 depends on X86_LOCAL_APIC || X86_UP_I !! 1439 default CPU_R4X00
1136 1440
1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1441 config CPU_LOONGSON64
1138 bool "Reroute for broken boot IRQs" !! 1442 bool "Loongson 64-bit CPU"
1139 depends on X86_IO_APIC !! 1443 depends on SYS_HAS_CPU_LOONGSON64
1140 help !! 1444 select ARCH_HAS_PHYS_TO_DMA
1141 This option enables a workaround th !! 1445 select CPU_SUPPORTS_64BIT_KERNEL
1142 spurious interrupts. This is recomm !! 1446 select CPU_SUPPORTS_HIGHMEM
1143 interrupt handling is used on syste !! 1447 select CPU_SUPPORTS_HUGEPAGES
1144 superfluous "boot interrupts" canno !! 1448 select CPU_SUPPORTS_MSA
1145 !! 1449 select CPU_HAS_LOAD_STORE_LR
1146 Some chipsets generate a legacy INT !! 1450 select WEAK_ORDERING
1147 entry in the chipset's IO-APIC is m !! 1451 select WEAK_REORDERING_BEYOND_LLSC
1148 kernel does during interrupt handli !! 1452 select MIPS_ASID_BITS_VARIABLE
1149 boot IRQ generation cannot be disab !! 1453 select MIPS_PGD_C0_CONTEXT
1150 the original IRQ line masked so tha !! 1454 select MIPS_L1_CACHE_SHIFT_6
1151 IRQ" is delivered to the CPUs. The !! 1455 select GPIOLIB
1152 kernel to set up the IRQ handler on !! 1456 select SWIOTLB
1153 way only one interrupt is delivered <<
1154 the spurious second interrupt may c <<
1155 down (vital) interrupt lines. <<
1156 <<
1157 Only affects "broken" chipsets. Int <<
1158 increased on these systems. <<
1159 <<
1160 config X86_MCE <<
1161 bool "Machine Check / overheating rep <<
1162 select GENERIC_ALLOCATOR <<
1163 default y <<
1164 help 1457 help
1165 Machine Check support allows the pr !! 1458 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1166 kernel if it detects a problem (e.g !! 1459 cores implements the MIPS64R2 instruction set with many extensions,
1167 The action the kernel takes depends !! 1460 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1168 ranging from warning messages to ha !! 1461 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1169 !! 1462 Loongson-2E/2F is not covered here and will be removed in future.
1170 config X86_MCELOG_LEGACY <<
1171 bool "Support for deprecated /dev/mce <<
1172 depends on X86_MCE <<
1173 help <<
1174 Enable support for /dev/mcelog whic <<
1175 userspace logging daemon. Consider <<
1176 rasdaemon solution. <<
1177 1463
1178 config X86_MCE_INTEL !! 1464 config LOONGSON3_ENHANCEMENT
1179 def_bool y !! 1465 bool "New Loongson-3 CPU Enhancements"
1180 prompt "Intel MCE features" !! 1466 default n
1181 depends on X86_MCE && X86_LOCAL_APIC !! 1467 select CPU_MIPSR2
>> 1468 select CPU_HAS_PREFETCH
>> 1469 depends on CPU_LOONGSON64
>> 1470 help
>> 1471 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1472 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1473 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1474 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1475 Fast TLB refill support, etc.
>> 1476
>> 1477 This option enable those enhancements which are not probed at run
>> 1478 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1479 please say 'N' here. If you want a high-performance kernel to run on
>> 1480 new Loongson-3 machines only, please say 'Y' here.
>> 1481
>> 1482 config CPU_LOONGSON3_WORKAROUNDS
>> 1483 bool "Old Loongson-3 LLSC Workarounds"
>> 1484 default y if SMP
>> 1485 depends on CPU_LOONGSON64
>> 1486 help
>> 1487 Loongson-3 processors have the llsc issues which require workarounds.
>> 1488 Without workarounds the system may hang unexpectedly.
>> 1489
>> 1490 Newer Loongson-3 will fix these issues and no workarounds are needed.
>> 1491 The workarounds have no significant side effect on them but may
>> 1492 decrease the performance of the system so this option should be
>> 1493 disabled unless the kernel is intended to be run on old systems.
>> 1494
>> 1495 If unsure, please say Y.
>> 1496
>> 1497 config CPU_LOONGSON2E
>> 1498 bool "Loongson 2E"
>> 1499 depends on SYS_HAS_CPU_LOONGSON2E
>> 1500 select CPU_LOONGSON2EF
>> 1501 help
>> 1502 The Loongson 2E processor implements the MIPS III instruction set
>> 1503 with many extensions.
>> 1504
>> 1505 It has an internal FPGA northbridge, which is compatible to
>> 1506 bonito64.
>> 1507
>> 1508 config CPU_LOONGSON2F
>> 1509 bool "Loongson 2F"
>> 1510 depends on SYS_HAS_CPU_LOONGSON2F
>> 1511 select CPU_LOONGSON2EF
>> 1512 select GPIOLIB
1182 help 1513 help
1183 Additional support for intel specif !! 1514 The Loongson 2F processor implements the MIPS III instruction set
1184 the thermal monitor. !! 1515 with many extensions.
1185 1516
1186 config X86_MCE_AMD !! 1517 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1187 def_bool y !! 1518 have a similar programming interface with FPGA northbridge used in
1188 prompt "AMD MCE features" !! 1519 Loongson2E.
1189 depends on X86_MCE && X86_LOCAL_APIC !! 1520
1190 help !! 1521 config CPU_LOONGSON1B
1191 Additional support for AMD specific !! 1522 bool "Loongson 1B"
1192 the DRAM Error Threshold. !! 1523 depends on SYS_HAS_CPU_LOONGSON1B
>> 1524 select CPU_LOONGSON32
>> 1525 select LEDS_GPIO_REGISTER
>> 1526 help
>> 1527 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1528 Release 1 instruction set and part of the MIPS32 Release 2
>> 1529 instruction set.
>> 1530
>> 1531 config CPU_LOONGSON1C
>> 1532 bool "Loongson 1C"
>> 1533 depends on SYS_HAS_CPU_LOONGSON1C
>> 1534 select CPU_LOONGSON32
>> 1535 select LEDS_GPIO_REGISTER
>> 1536 help
>> 1537 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1538 Release 1 instruction set and part of the MIPS32 Release 2
>> 1539 instruction set.
>> 1540
>> 1541 config CPU_MIPS32_R1
>> 1542 bool "MIPS32 Release 1"
>> 1543 depends on SYS_HAS_CPU_MIPS32_R1
>> 1544 select CPU_HAS_PREFETCH
>> 1545 select CPU_HAS_LOAD_STORE_LR
>> 1546 select CPU_SUPPORTS_32BIT_KERNEL
>> 1547 select CPU_SUPPORTS_HIGHMEM
>> 1548 help
>> 1549 Choose this option to build a kernel for release 1 or later of the
>> 1550 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1551 MIPS processor are based on a MIPS32 processor. If you know the
>> 1552 specific type of processor in your system, choose those that one
>> 1553 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1554 Release 2 of the MIPS32 architecture is available since several
>> 1555 years so chances are you even have a MIPS32 Release 2 processor
>> 1556 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1557 performance.
1193 1558
1194 config X86_ANCIENT_MCE !! 1559 config CPU_MIPS32_R2
1195 bool "Support for old Pentium 5 / Win !! 1560 bool "MIPS32 Release 2"
1196 depends on X86_32 && X86_MCE !! 1561 depends on SYS_HAS_CPU_MIPS32_R2
1197 help !! 1562 select CPU_HAS_PREFETCH
1198 Include support for machine check h !! 1563 select CPU_HAS_LOAD_STORE_LR
1199 systems. These typically need to be !! 1564 select CPU_SUPPORTS_32BIT_KERNEL
1200 line. !! 1565 select CPU_SUPPORTS_HIGHMEM
>> 1566 select CPU_SUPPORTS_MSA
>> 1567 select HAVE_KVM
>> 1568 help
>> 1569 Choose this option to build a kernel for release 2 or later of the
>> 1570 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1571 MIPS processor are based on a MIPS32 processor. If you know the
>> 1572 specific type of processor in your system, choose those that one
>> 1573 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1574
>> 1575 config CPU_MIPS32_R6
>> 1576 bool "MIPS32 Release 6"
>> 1577 depends on SYS_HAS_CPU_MIPS32_R6
>> 1578 select CPU_HAS_PREFETCH
>> 1579 select CPU_SUPPORTS_32BIT_KERNEL
>> 1580 select CPU_SUPPORTS_HIGHMEM
>> 1581 select CPU_SUPPORTS_MSA
>> 1582 select HAVE_KVM
>> 1583 select MIPS_O32_FP64_SUPPORT
>> 1584 help
>> 1585 Choose this option to build a kernel for release 6 or later of the
>> 1586 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1587 family, are based on a MIPS32r6 processor. If you own an older
>> 1588 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1589
>> 1590 config CPU_MIPS64_R1
>> 1591 bool "MIPS64 Release 1"
>> 1592 depends on SYS_HAS_CPU_MIPS64_R1
>> 1593 select CPU_HAS_PREFETCH
>> 1594 select CPU_HAS_LOAD_STORE_LR
>> 1595 select CPU_SUPPORTS_32BIT_KERNEL
>> 1596 select CPU_SUPPORTS_64BIT_KERNEL
>> 1597 select CPU_SUPPORTS_HIGHMEM
>> 1598 select CPU_SUPPORTS_HUGEPAGES
>> 1599 help
>> 1600 Choose this option to build a kernel for release 1 or later of the
>> 1601 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1602 MIPS processor are based on a MIPS64 processor. If you know the
>> 1603 specific type of processor in your system, choose those that one
>> 1604 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1605 Release 2 of the MIPS64 architecture is available since several
>> 1606 years so chances are you even have a MIPS64 Release 2 processor
>> 1607 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1608 performance.
1201 1609
1202 config X86_MCE_THRESHOLD !! 1610 config CPU_MIPS64_R2
1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1611 bool "MIPS64 Release 2"
1204 def_bool y !! 1612 depends on SYS_HAS_CPU_MIPS64_R2
>> 1613 select CPU_HAS_PREFETCH
>> 1614 select CPU_HAS_LOAD_STORE_LR
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HIGHMEM
>> 1618 select CPU_SUPPORTS_HUGEPAGES
>> 1619 select CPU_SUPPORTS_MSA
>> 1620 select HAVE_KVM
>> 1621 help
>> 1622 Choose this option to build a kernel for release 2 or later of the
>> 1623 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1624 MIPS processor are based on a MIPS64 processor. If you know the
>> 1625 specific type of processor in your system, choose those that one
>> 1626 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1627
>> 1628 config CPU_MIPS64_R6
>> 1629 bool "MIPS64 Release 6"
>> 1630 depends on SYS_HAS_CPU_MIPS64_R6
>> 1631 select CPU_HAS_PREFETCH
>> 1632 select CPU_SUPPORTS_32BIT_KERNEL
>> 1633 select CPU_SUPPORTS_64BIT_KERNEL
>> 1634 select CPU_SUPPORTS_HIGHMEM
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 select CPU_SUPPORTS_MSA
>> 1637 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1638 select HAVE_KVM
>> 1639 help
>> 1640 Choose this option to build a kernel for release 6 or later of the
>> 1641 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1642 family, are based on a MIPS64r6 processor. If you own an older
>> 1643 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1644
>> 1645 config CPU_R3000
>> 1646 bool "R3000"
>> 1647 depends on SYS_HAS_CPU_R3000
>> 1648 select CPU_HAS_WB
>> 1649 select CPU_HAS_LOAD_STORE_LR
>> 1650 select CPU_R3K_TLB
>> 1651 select CPU_SUPPORTS_32BIT_KERNEL
>> 1652 select CPU_SUPPORTS_HIGHMEM
>> 1653 help
>> 1654 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1655 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1656 *not* work on R4000 machines and vice versa. However, since most
>> 1657 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1658 might be a safe bet. If the resulting kernel does not work,
>> 1659 try to recompile with R3000.
>> 1660
>> 1661 config CPU_TX39XX
>> 1662 bool "R39XX"
>> 1663 depends on SYS_HAS_CPU_TX39XX
>> 1664 select CPU_SUPPORTS_32BIT_KERNEL
>> 1665 select CPU_HAS_LOAD_STORE_LR
>> 1666 select CPU_R3K_TLB
>> 1667
>> 1668 config CPU_VR41XX
>> 1669 bool "R41xx"
>> 1670 depends on SYS_HAS_CPU_VR41XX
>> 1671 select CPU_SUPPORTS_32BIT_KERNEL
>> 1672 select CPU_SUPPORTS_64BIT_KERNEL
>> 1673 select CPU_HAS_LOAD_STORE_LR
>> 1674 help
>> 1675 The options selects support for the NEC VR4100 series of processors.
>> 1676 Only choose this option if you have one of these processors as a
>> 1677 kernel built with this option will not run on any other type of
>> 1678 processor or vice versa.
>> 1679
>> 1680 config CPU_R4X00
>> 1681 bool "R4x00"
>> 1682 depends on SYS_HAS_CPU_R4X00
>> 1683 select CPU_SUPPORTS_32BIT_KERNEL
>> 1684 select CPU_SUPPORTS_64BIT_KERNEL
>> 1685 select CPU_SUPPORTS_HUGEPAGES
>> 1686 select CPU_HAS_LOAD_STORE_LR
>> 1687 help
>> 1688 MIPS Technologies R4000-series processors other than 4300, including
>> 1689 the R4000, R4400, R4600, and 4700.
>> 1690
>> 1691 config CPU_TX49XX
>> 1692 bool "R49XX"
>> 1693 depends on SYS_HAS_CPU_TX49XX
>> 1694 select CPU_HAS_PREFETCH
>> 1695 select CPU_HAS_LOAD_STORE_LR
>> 1696 select CPU_SUPPORTS_32BIT_KERNEL
>> 1697 select CPU_SUPPORTS_64BIT_KERNEL
>> 1698 select CPU_SUPPORTS_HUGEPAGES
>> 1699
>> 1700 config CPU_R5000
>> 1701 bool "R5000"
>> 1702 depends on SYS_HAS_CPU_R5000
>> 1703 select CPU_SUPPORTS_32BIT_KERNEL
>> 1704 select CPU_SUPPORTS_64BIT_KERNEL
>> 1705 select CPU_SUPPORTS_HUGEPAGES
>> 1706 select CPU_HAS_LOAD_STORE_LR
>> 1707 help
>> 1708 MIPS Technologies R5000-series processors other than the Nevada.
>> 1709
>> 1710 config CPU_R5500
>> 1711 bool "R5500"
>> 1712 depends on SYS_HAS_CPU_R5500
>> 1713 select CPU_SUPPORTS_32BIT_KERNEL
>> 1714 select CPU_SUPPORTS_64BIT_KERNEL
>> 1715 select CPU_SUPPORTS_HUGEPAGES
>> 1716 select CPU_HAS_LOAD_STORE_LR
>> 1717 help
>> 1718 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1719 instruction set.
>> 1720
>> 1721 config CPU_NEVADA
>> 1722 bool "RM52xx"
>> 1723 depends on SYS_HAS_CPU_NEVADA
>> 1724 select CPU_SUPPORTS_32BIT_KERNEL
>> 1725 select CPU_SUPPORTS_64BIT_KERNEL
>> 1726 select CPU_SUPPORTS_HUGEPAGES
>> 1727 select CPU_HAS_LOAD_STORE_LR
>> 1728 help
>> 1729 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1730
>> 1731 config CPU_R10000
>> 1732 bool "R10000"
>> 1733 depends on SYS_HAS_CPU_R10000
>> 1734 select CPU_HAS_PREFETCH
>> 1735 select CPU_HAS_LOAD_STORE_LR
>> 1736 select CPU_SUPPORTS_32BIT_KERNEL
>> 1737 select CPU_SUPPORTS_64BIT_KERNEL
>> 1738 select CPU_SUPPORTS_HIGHMEM
>> 1739 select CPU_SUPPORTS_HUGEPAGES
>> 1740 help
>> 1741 MIPS Technologies R10000-series processors.
>> 1742
>> 1743 config CPU_RM7000
>> 1744 bool "RM7000"
>> 1745 depends on SYS_HAS_CPU_RM7000
>> 1746 select CPU_HAS_PREFETCH
>> 1747 select CPU_HAS_LOAD_STORE_LR
>> 1748 select CPU_SUPPORTS_32BIT_KERNEL
>> 1749 select CPU_SUPPORTS_64BIT_KERNEL
>> 1750 select CPU_SUPPORTS_HIGHMEM
>> 1751 select CPU_SUPPORTS_HUGEPAGES
>> 1752
>> 1753 config CPU_SB1
>> 1754 bool "SB1"
>> 1755 depends on SYS_HAS_CPU_SB1
>> 1756 select CPU_HAS_LOAD_STORE_LR
>> 1757 select CPU_SUPPORTS_32BIT_KERNEL
>> 1758 select CPU_SUPPORTS_64BIT_KERNEL
>> 1759 select CPU_SUPPORTS_HIGHMEM
>> 1760 select CPU_SUPPORTS_HUGEPAGES
>> 1761 select WEAK_ORDERING
>> 1762
>> 1763 config CPU_CAVIUM_OCTEON
>> 1764 bool "Cavium Octeon processor"
>> 1765 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1766 select CPU_HAS_PREFETCH
>> 1767 select CPU_HAS_LOAD_STORE_LR
>> 1768 select CPU_SUPPORTS_64BIT_KERNEL
>> 1769 select WEAK_ORDERING
>> 1770 select CPU_SUPPORTS_HIGHMEM
>> 1771 select CPU_SUPPORTS_HUGEPAGES
>> 1772 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1773 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1774 select MIPS_L1_CACHE_SHIFT_7
>> 1775 select HAVE_KVM
>> 1776 help
>> 1777 The Cavium Octeon processor is a highly integrated chip containing
>> 1778 many ethernet hardware widgets for networking tasks. The processor
>> 1779 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1780 Full details can be found at http://www.caviumnetworks.com.
>> 1781
>> 1782 config CPU_BMIPS
>> 1783 bool "Broadcom BMIPS"
>> 1784 depends on SYS_HAS_CPU_BMIPS
>> 1785 select CPU_MIPS32
>> 1786 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1787 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1788 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1789 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1790 select CPU_SUPPORTS_32BIT_KERNEL
>> 1791 select DMA_NONCOHERENT
>> 1792 select IRQ_MIPS_CPU
>> 1793 select SWAP_IO_SPACE
>> 1794 select WEAK_ORDERING
>> 1795 select CPU_SUPPORTS_HIGHMEM
>> 1796 select CPU_HAS_PREFETCH
>> 1797 select CPU_HAS_LOAD_STORE_LR
>> 1798 select CPU_SUPPORTS_CPUFREQ
>> 1799 select MIPS_EXTERNAL_TIMER
>> 1800 help
>> 1801 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1802
>> 1803 config CPU_XLR
>> 1804 bool "Netlogic XLR SoC"
>> 1805 depends on SYS_HAS_CPU_XLR
>> 1806 select CPU_HAS_LOAD_STORE_LR
>> 1807 select CPU_SUPPORTS_32BIT_KERNEL
>> 1808 select CPU_SUPPORTS_64BIT_KERNEL
>> 1809 select CPU_SUPPORTS_HIGHMEM
>> 1810 select CPU_SUPPORTS_HUGEPAGES
>> 1811 select WEAK_ORDERING
>> 1812 select WEAK_REORDERING_BEYOND_LLSC
>> 1813 help
>> 1814 Netlogic Microsystems XLR/XLS processors.
>> 1815
>> 1816 config CPU_XLP
>> 1817 bool "Netlogic XLP SoC"
>> 1818 depends on SYS_HAS_CPU_XLP
>> 1819 select CPU_SUPPORTS_32BIT_KERNEL
>> 1820 select CPU_SUPPORTS_64BIT_KERNEL
>> 1821 select CPU_SUPPORTS_HIGHMEM
>> 1822 select WEAK_ORDERING
>> 1823 select WEAK_REORDERING_BEYOND_LLSC
>> 1824 select CPU_HAS_PREFETCH
>> 1825 select CPU_HAS_LOAD_STORE_LR
>> 1826 select CPU_MIPSR2
>> 1827 select CPU_SUPPORTS_HUGEPAGES
>> 1828 select MIPS_ASID_BITS_VARIABLE
>> 1829 help
>> 1830 Netlogic Microsystems XLP processors.
>> 1831 endchoice
1205 1832
1206 config X86_MCE_INJECT !! 1833 config CPU_MIPS32_3_5_FEATURES
1207 depends on X86_MCE && X86_LOCAL_APIC !! 1834 bool "MIPS32 Release 3.5 Features"
1208 tristate "Machine check injector supp !! 1835 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1836 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1837 help
>> 1838 Choose this option to build a kernel for release 2 or later of the
>> 1839 MIPS32 architecture including features from the 3.5 release such as
>> 1840 support for Enhanced Virtual Addressing (EVA).
>> 1841
>> 1842 config CPU_MIPS32_3_5_EVA
>> 1843 bool "Enhanced Virtual Addressing (EVA)"
>> 1844 depends on CPU_MIPS32_3_5_FEATURES
>> 1845 select EVA
>> 1846 default y
>> 1847 help
>> 1848 Choose this option if you want to enable the Enhanced Virtual
>> 1849 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1850 One of its primary benefits is an increase in the maximum size
>> 1851 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1852
>> 1853 config CPU_MIPS32_R5_FEATURES
>> 1854 bool "MIPS32 Release 5 Features"
>> 1855 depends on SYS_HAS_CPU_MIPS32_R5
>> 1856 depends on CPU_MIPS32_R2
>> 1857 help
>> 1858 Choose this option to build a kernel for release 2 or later of the
>> 1859 MIPS32 architecture including features from release 5 such as
>> 1860 support for Extended Physical Addressing (XPA).
>> 1861
>> 1862 config CPU_MIPS32_R5_XPA
>> 1863 bool "Extended Physical Addressing (XPA)"
>> 1864 depends on CPU_MIPS32_R5_FEATURES
>> 1865 depends on !EVA
>> 1866 depends on !PAGE_SIZE_4KB
>> 1867 depends on SYS_SUPPORTS_HIGHMEM
>> 1868 select XPA
>> 1869 select HIGHMEM
>> 1870 select PHYS_ADDR_T_64BIT
>> 1871 default n
1209 help 1872 help
1210 Provide support for injecting machi !! 1873 Choose this option if you want to enable the Extended Physical
1211 If you don't know what a machine ch !! 1874 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1212 QA it is safe to say n. !! 1875 benefit is to increase physical addressing equal to or greater
>> 1876 than 40 bits. Note that this has the side effect of turning on
>> 1877 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1878 If unsure, say 'N' here.
1213 1879
1214 source "arch/x86/events/Kconfig" !! 1880 if CPU_LOONGSON2F
>> 1881 config CPU_NOP_WORKAROUNDS
>> 1882 bool
1215 1883
1216 config X86_LEGACY_VM86 !! 1884 config CPU_JUMP_WORKAROUNDS
1217 bool "Legacy VM86 support" !! 1885 bool
1218 depends on X86_32 !! 1886
>> 1887 config CPU_LOONGSON2F_WORKAROUNDS
>> 1888 bool "Loongson 2F Workarounds"
>> 1889 default y
>> 1890 select CPU_NOP_WORKAROUNDS
>> 1891 select CPU_JUMP_WORKAROUNDS
1219 help 1892 help
1220 This option allows user programs to !! 1893 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1221 mode, which is an 80286-era approxi !! 1894 require workarounds. Without workarounds the system may hang
>> 1895 unexpectedly. For more information please refer to the gas
>> 1896 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1897
>> 1898 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1899 are needed. The workarounds have no significant side effect on them
>> 1900 but may decrease the performance of the system so this option should
>> 1901 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1902 systems.
1222 1903
1223 Some very old versions of X and/or !! 1904 If unsure, please say Y.
1224 for user mode setting. Similarly, !! 1905 endif # CPU_LOONGSON2F
1225 available to accelerate real mode D <<
1226 recent version of DOSEMU, X, or vbe <<
1227 functional even without kernel VM86 <<
1228 fall back to software emulation. Ne <<
1229 a 16-bit DOS program where 16-bit p <<
1230 mode might be faster than emulation <<
1231 enable this option. <<
1232 1906
1233 Note that any app that works on a 6 !! 1907 config SYS_SUPPORTS_ZBOOT
1234 need this option, as 64-bit kernels !! 1908 bool
1235 V8086 mode. This option is also unr !! 1909 select HAVE_KERNEL_GZIP
1236 mode and is not needed to run most !! 1910 select HAVE_KERNEL_BZIP2
>> 1911 select HAVE_KERNEL_LZ4
>> 1912 select HAVE_KERNEL_LZMA
>> 1913 select HAVE_KERNEL_LZO
>> 1914 select HAVE_KERNEL_XZ
1237 1915
1238 Enabling this option increases the !! 1916 config SYS_SUPPORTS_ZBOOT_UART16550
1239 and slows down exception handling a !! 1917 bool
>> 1918 select SYS_SUPPORTS_ZBOOT
1240 1919
1241 If unsure, say N here. !! 1920 config SYS_SUPPORTS_ZBOOT_UART_PROM
>> 1921 bool
>> 1922 select SYS_SUPPORTS_ZBOOT
1242 1923
1243 config VM86 !! 1924 config CPU_LOONGSON2EF
1244 bool 1925 bool
1245 default X86_LEGACY_VM86 !! 1926 select CPU_SUPPORTS_32BIT_KERNEL
>> 1927 select CPU_SUPPORTS_64BIT_KERNEL
>> 1928 select CPU_SUPPORTS_HIGHMEM
>> 1929 select CPU_SUPPORTS_HUGEPAGES
>> 1930 select ARCH_HAS_PHYS_TO_DMA
>> 1931 select CPU_HAS_LOAD_STORE_LR
1246 1932
1247 config X86_16BIT !! 1933 config CPU_LOONGSON32
1248 bool "Enable support for 16-bit segme !! 1934 bool
1249 default y !! 1935 select CPU_MIPS32
1250 depends on MODIFY_LDT_SYSCALL !! 1936 select CPU_MIPSR2
1251 help !! 1937 select CPU_HAS_PREFETCH
1252 This option is required by programs !! 1938 select CPU_HAS_LOAD_STORE_LR
1253 protected mode legacy code on x86 p !! 1939 select CPU_SUPPORTS_32BIT_KERNEL
1254 this option saves about 300 bytes o !! 1940 select CPU_SUPPORTS_HIGHMEM
1255 plus 16K runtime memory on x86-64, !! 1941 select CPU_SUPPORTS_CPUFREQ
1256 1942
1257 config X86_ESPFIX32 !! 1943 config CPU_BMIPS32_3300
1258 def_bool y !! 1944 select SMP_UP if SMP
1259 depends on X86_16BIT && X86_32 !! 1945 bool
1260 1946
1261 config X86_ESPFIX64 !! 1947 config CPU_BMIPS4350
1262 def_bool y !! 1948 bool
1263 depends on X86_16BIT && X86_64 !! 1949 select SYS_SUPPORTS_SMP
>> 1950 select SYS_SUPPORTS_HOTPLUG_CPU
1264 1951
1265 config X86_VSYSCALL_EMULATION !! 1952 config CPU_BMIPS4380
1266 bool "Enable vsyscall emulation" if E !! 1953 bool
1267 default y !! 1954 select MIPS_L1_CACHE_SHIFT_6
1268 depends on X86_64 !! 1955 select SYS_SUPPORTS_SMP
1269 help !! 1956 select SYS_SUPPORTS_HOTPLUG_CPU
1270 This enables emulation of the legac !! 1957 select CPU_HAS_RIXI
1271 it is roughly equivalent to booting <<
1272 that it will also disable the helpf <<
1273 tries to use a vsyscall. With this <<
1274 programs will just segfault, citing <<
1275 0xffffffffff600?00. <<
1276 1958
1277 This option is required by many pro !! 1959 config CPU_BMIPS5000
1278 care should be used even with newer !! 1960 bool
>> 1961 select MIPS_CPU_SCACHE
>> 1962 select MIPS_L1_CACHE_SHIFT_7
>> 1963 select SYS_SUPPORTS_SMP
>> 1964 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1965 select CPU_HAS_RIXI
1279 1966
1280 Disabling this option saves about 7 !! 1967 config SYS_HAS_CPU_LOONGSON64
1281 possibly 4K of additional runtime p !! 1968 bool
>> 1969 select CPU_SUPPORTS_CPUFREQ
>> 1970 select CPU_HAS_RIXI
1282 1971
1283 config X86_IOPL_IOPERM !! 1972 config SYS_HAS_CPU_LOONGSON2E
1284 bool "IOPERM and IOPL Emulation" !! 1973 bool
1285 default y <<
1286 help <<
1287 This enables the ioperm() and iopl( <<
1288 for legacy applications. <<
1289 1974
1290 Legacy IOPL support is an overbroad !! 1975 config SYS_HAS_CPU_LOONGSON2F
1291 space aside of accessing all 65536 !! 1976 bool
1292 interrupts. To gain this access the !! 1977 select CPU_SUPPORTS_CPUFREQ
1293 capabilities and permission from po !! 1978 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1294 modules. <<
1295 <<
1296 The emulation restricts the functio <<
1297 only allowing the full range I/O po <<
1298 ability to disable interrupts from <<
1299 granted if the hardware IOPL mechan <<
1300 <<
1301 config TOSHIBA <<
1302 tristate "Toshiba Laptop support" <<
1303 depends on X86_32 <<
1304 help <<
1305 This adds a driver to safely access <<
1306 the CPU on Toshiba portables with a <<
1307 not work on models with a Phoenix B <<
1308 is used to set the BIOS and power s <<
1309 <<
1310 For information on utilities to mak <<
1311 Toshiba Linux utilities web site at <<
1312 <http://www.buzzard.org.uk/toshiba/ <<
1313 <<
1314 Say Y if you intend to run this ker <<
1315 Say N otherwise. <<
1316 <<
1317 config X86_REBOOTFIXUPS <<
1318 bool "Enable X86 board specific fixup <<
1319 depends on X86_32 <<
1320 help <<
1321 This enables chipset and/or board s <<
1322 in order to get reboot to work corr <<
1323 some combinations of hardware and B <<
1324 this config is intended, is when re <<
1325 system. <<
1326 <<
1327 Currently, the only fixup is for th <<
1328 CS5530A and CS5536 chipsets and the <<
1329 <<
1330 Say Y if you want to enable the fix <<
1331 enable this option even if you don' <<
1332 Say N otherwise. <<
1333 1979
1334 config MICROCODE !! 1980 config SYS_HAS_CPU_LOONGSON1B
1335 def_bool y !! 1981 bool
1336 depends on CPU_SUP_AMD || CPU_SUP_INT <<
1337 1982
1338 config MICROCODE_INITRD32 !! 1983 config SYS_HAS_CPU_LOONGSON1C
1339 def_bool y !! 1984 bool
1340 depends on MICROCODE && X86_32 && BLK <<
1341 1985
1342 config MICROCODE_LATE_LOADING !! 1986 config SYS_HAS_CPU_MIPS32_R1
1343 bool "Late microcode loading (DANGERO !! 1987 bool
1344 default n <<
1345 depends on MICROCODE && SMP <<
1346 help <<
1347 Loading microcode late, when the sy <<
1348 is a tricky business and should be <<
1349 of synchronizing all cores and SMT <<
1350 not guarantee that cores might not <<
1351 use this at your own risk. Late loa <<
1352 microcode header indicates that it <<
1353 minimal revision check. This minima <<
1354 the kernel command line with "micro <<
1355 1988
1356 config MICROCODE_LATE_FORCE_MINREV !! 1989 config SYS_HAS_CPU_MIPS32_R2
1357 bool "Enforce late microcode loading !! 1990 bool
1358 default n <<
1359 depends on MICROCODE_LATE_LOADING <<
1360 help <<
1361 To prevent that users load microcod <<
1362 in use features, newer microcode pa <<
1363 in the microcode header, which tell <<
1364 revision must be active in the CPU <<
1365 late into the running system. If di <<
1366 be enforced but the kernel will be <<
1367 revision check fails. <<
1368 <<
1369 This minimal revision check can als <<
1370 "microcode.minrev" parameter on the <<
1371 <<
1372 If unsure say Y. <<
1373 <<
1374 config X86_MSR <<
1375 tristate "/dev/cpu/*/msr - Model-spec <<
1376 help <<
1377 This device gives privileged proces <<
1378 Model-Specific Registers (MSRs). I <<
1379 major 202 and minors 0 to 31 for /d <<
1380 MSR accesses are directed to a spec <<
1381 systems. <<
1382 1991
1383 config X86_CPUID !! 1992 config SYS_HAS_CPU_MIPS32_R3_5
1384 tristate "/dev/cpu/*/cpuid - CPU info !! 1993 bool
1385 help <<
1386 This device gives processes access <<
1387 be executed on a specific processor <<
1388 with major 203 and minors 0 to 31 f <<
1389 /dev/cpu/31/cpuid. <<
1390 1994
1391 choice !! 1995 config SYS_HAS_CPU_MIPS32_R5
1392 prompt "High Memory Support" !! 1996 bool
1393 default HIGHMEM4G !! 1997 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1394 depends on X86_32 <<
1395 <<
1396 config NOHIGHMEM <<
1397 bool "off" <<
1398 help <<
1399 Linux can use up to 64 Gigabytes of <<
1400 However, the address space of 32-bi <<
1401 Gigabytes large. That means that, i <<
1402 physical memory, not all of it can <<
1403 kernel. The physical memory that's <<
1404 "high memory". <<
1405 <<
1406 If you are compiling a kernel which <<
1407 more than 1 Gigabyte total physical <<
1408 choice and suitable for most users) <<
1409 split: 3GB are mapped so that each <<
1410 space and the remaining part of the <<
1411 by the kernel to permanently map as <<
1412 possible. <<
1413 <<
1414 If the machine has between 1 and 4 <<
1415 answer "4GB" here. <<
1416 <<
1417 If more than 4 Gigabytes is used th <<
1418 selection turns Intel PAE (Physical <<
1419 PAE implements 3-level paging on IA <<
1420 supported by Linux, PAE mode is imp <<
1421 processors (Pentium Pro and better) <<
1422 then the kernel will not boot on CP <<
1423 <<
1424 The actual amount of total physical <<
1425 auto detected or can be forced by u <<
1426 such as "mem=256M". (Try "man bootp <<
1427 your boot loader (lilo or loadlin) <<
1428 kernel at boot time.) <<
1429 <<
1430 If unsure, say "off". <<
1431 <<
1432 config HIGHMEM4G <<
1433 bool "4GB" <<
1434 help <<
1435 Select this if you have a 32-bit pr <<
1436 gigabytes of physical RAM. <<
1437 <<
1438 config HIGHMEM64G <<
1439 bool "64GB" <<
1440 depends on X86_HAVE_PAE <<
1441 select X86_PAE <<
1442 help <<
1443 Select this if you have a 32-bit pr <<
1444 gigabytes of physical RAM. <<
1445 1998
1446 endchoice !! 1999 config SYS_HAS_CPU_MIPS32_R6
>> 2000 bool
>> 2001 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1447 2002
1448 choice !! 2003 config SYS_HAS_CPU_MIPS64_R1
1449 prompt "Memory split" if EXPERT !! 2004 bool
1450 default VMSPLIT_3G <<
1451 depends on X86_32 <<
1452 help <<
1453 Select the desired split between ke <<
1454 <<
1455 If the address range available to t <<
1456 physical memory installed, the rema <<
1457 as "high memory". Accessing high me <<
1458 than low memory, as it needs to be <<
1459 Note that increasing the kernel add <<
1460 available to user programs, making <<
1461 tighter. Selecting anything other <<
1462 will also likely make your kernel i <<
1463 kernel modules. <<
1464 <<
1465 If you are not absolutely sure what <<
1466 option alone! <<
1467 <<
1468 config VMSPLIT_3G <<
1469 bool "3G/1G user/kernel split <<
1470 config VMSPLIT_3G_OPT <<
1471 depends on !X86_PAE <<
1472 bool "3G/1G user/kernel split <<
1473 config VMSPLIT_2G <<
1474 bool "2G/2G user/kernel split <<
1475 config VMSPLIT_2G_OPT <<
1476 depends on !X86_PAE <<
1477 bool "2G/2G user/kernel split <<
1478 config VMSPLIT_1G <<
1479 bool "1G/3G user/kernel split <<
1480 endchoice <<
1481 2005
1482 config PAGE_OFFSET !! 2006 config SYS_HAS_CPU_MIPS64_R2
1483 hex !! 2007 bool
1484 default 0xB0000000 if VMSPLIT_3G_OPT <<
1485 default 0x80000000 if VMSPLIT_2G <<
1486 default 0x78000000 if VMSPLIT_2G_OPT <<
1487 default 0x40000000 if VMSPLIT_1G <<
1488 default 0xC0000000 <<
1489 depends on X86_32 <<
1490 2008
1491 config HIGHMEM !! 2009 config SYS_HAS_CPU_MIPS64_R6
1492 def_bool y !! 2010 bool
1493 depends on X86_32 && (HIGHMEM64G || H !! 2011 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1494 2012
1495 config X86_PAE !! 2013 config SYS_HAS_CPU_R3000
1496 bool "PAE (Physical Address Extension !! 2014 bool
1497 depends on X86_32 && X86_HAVE_PAE <<
1498 select PHYS_ADDR_T_64BIT <<
1499 select SWIOTLB <<
1500 help <<
1501 PAE is required for NX support, and <<
1502 larger swapspace support for non-ov <<
1503 has the cost of more pagetable look <<
1504 consumes more pagetable space per p <<
1505 2015
1506 config X86_5LEVEL !! 2016 config SYS_HAS_CPU_TX39XX
1507 bool "Enable 5-level page tables supp !! 2017 bool
1508 default y <<
1509 select DYNAMIC_MEMORY_LAYOUT <<
1510 select SPARSEMEM_VMEMMAP <<
1511 depends on X86_64 <<
1512 help <<
1513 5-level paging enables access to la <<
1514 up to 128 PiB of virtual address sp <<
1515 physical address space. <<
1516 2018
1517 It will be supported by future Inte !! 2019 config SYS_HAS_CPU_VR41XX
>> 2020 bool
1518 2021
1519 A kernel with the option enabled ca !! 2022 config SYS_HAS_CPU_R4X00
1520 support 4- or 5-level paging. !! 2023 bool
1521 2024
1522 See Documentation/arch/x86/x86_64/5 !! 2025 config SYS_HAS_CPU_TX49XX
1523 information. !! 2026 bool
1524 2027
1525 Say N if unsure. !! 2028 config SYS_HAS_CPU_R5000
>> 2029 bool
1526 2030
1527 config X86_DIRECT_GBPAGES !! 2031 config SYS_HAS_CPU_R5500
1528 def_bool y !! 2032 bool
1529 depends on X86_64 <<
1530 help <<
1531 Certain kernel features effectively <<
1532 linear 1 GB mappings (even if the C <<
1533 supports them), so don't confuse th <<
1534 that we have them enabled. <<
1535 <<
1536 config X86_CPA_STATISTICS <<
1537 bool "Enable statistic for Change Pag <<
1538 depends on DEBUG_FS <<
1539 help <<
1540 Expose statistics about the Change <<
1541 helps to determine the effectivenes <<
1542 page mappings when mapping protecti <<
1543 <<
1544 config X86_MEM_ENCRYPT <<
1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED <<
1546 select DYNAMIC_PHYSICAL_MASK <<
1547 def_bool n <<
1548 2033
1549 config AMD_MEM_ENCRYPT !! 2034 config SYS_HAS_CPU_NEVADA
1550 bool "AMD Secure Memory Encryption (S !! 2035 bool
1551 depends on X86_64 && CPU_SUP_AMD <<
1552 depends on EFI_STUB <<
1553 select DMA_COHERENT_POOL <<
1554 select ARCH_USE_MEMREMAP_PROT <<
1555 select INSTRUCTION_DECODER <<
1556 select ARCH_HAS_CC_PLATFORM <<
1557 select X86_MEM_ENCRYPT <<
1558 select UNACCEPTED_MEMORY <<
1559 help <<
1560 Say yes to enable support for the e <<
1561 This requires an AMD processor that <<
1562 Encryption (SME). <<
1563 2036
1564 # Common NUMA Features !! 2037 config SYS_HAS_CPU_R10000
1565 config NUMA !! 2038 bool
1566 bool "NUMA Memory Allocation and Sche !! 2039 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1567 depends on SMP <<
1568 depends on X86_64 || (X86_32 && HIGHM <<
1569 default y if X86_BIGSMP <<
1570 select USE_PERCPU_NUMA_NODE_ID <<
1571 select OF_NUMA if OF <<
1572 help <<
1573 Enable NUMA (Non-Uniform Memory Acc <<
1574 2040
1575 The kernel will try to allocate mem !! 2041 config SYS_HAS_CPU_RM7000
1576 local memory controller of the CPU !! 2042 bool
1577 NUMA awareness to the kernel. <<
1578 2043
1579 For 64-bit this is recommended if t !! 2044 config SYS_HAS_CPU_SB1
1580 (or later), AMD Opteron, or EM64T N !! 2045 bool
1581 2046
1582 For 32-bit this is only needed if y !! 2047 config SYS_HAS_CPU_CAVIUM_OCTEON
1583 kernel on a 64-bit NUMA platform. !! 2048 bool
1584 2049
1585 Otherwise, you should say N. !! 2050 config SYS_HAS_CPU_BMIPS
>> 2051 bool
1586 2052
1587 config AMD_NUMA !! 2053 config SYS_HAS_CPU_BMIPS32_3300
1588 def_bool y !! 2054 bool
1589 prompt "Old style AMD Opteron NUMA de !! 2055 select SYS_HAS_CPU_BMIPS
1590 depends on X86_64 && NUMA && PCI <<
1591 help <<
1592 Enable AMD NUMA node topology detec <<
1593 you have a multi processor AMD syst <<
1594 read the NUMA configuration directl <<
1595 of Opteron. It is recommended to us <<
1596 which also takes priority if both a <<
1597 2056
1598 config X86_64_ACPI_NUMA !! 2057 config SYS_HAS_CPU_BMIPS4350
1599 def_bool y !! 2058 bool
1600 prompt "ACPI NUMA detection" !! 2059 select SYS_HAS_CPU_BMIPS
1601 depends on X86_64 && NUMA && ACPI && <<
1602 select ACPI_NUMA <<
1603 help <<
1604 Enable ACPI SRAT based node topolog <<
1605 2060
1606 config NODES_SHIFT !! 2061 config SYS_HAS_CPU_BMIPS4380
1607 int "Maximum NUMA Nodes (as a power o !! 2062 bool
1608 range 1 10 !! 2063 select SYS_HAS_CPU_BMIPS
1609 default "10" if MAXSMP <<
1610 default "6" if X86_64 <<
1611 default "3" <<
1612 depends on NUMA <<
1613 help <<
1614 Specify the maximum number of NUMA <<
1615 system. Increases memory reserved <<
1616 2064
1617 config ARCH_FLATMEM_ENABLE !! 2065 config SYS_HAS_CPU_BMIPS5000
1618 def_bool y !! 2066 bool
1619 depends on X86_32 && !NUMA !! 2067 select SYS_HAS_CPU_BMIPS
>> 2068 select ARCH_HAS_SYNC_DMA_FOR_CPU
1620 2069
1621 config ARCH_SPARSEMEM_ENABLE !! 2070 config SYS_HAS_CPU_XLR
1622 def_bool y !! 2071 bool
1623 depends on X86_64 || NUMA || X86_32 | <<
1624 select SPARSEMEM_STATIC if X86_32 <<
1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 <<
1626 2072
1627 config ARCH_SPARSEMEM_DEFAULT !! 2073 config SYS_HAS_CPU_XLP
1628 def_bool X86_64 || (NUMA && X86_32) !! 2074 bool
1629 2075
1630 config ARCH_SELECT_MEMORY_MODEL !! 2076 #
1631 def_bool y !! 2077 # CPU may reorder R->R, R->W, W->R, W->W
1632 depends on ARCH_SPARSEMEM_ENABLE && A !! 2078 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2079 #
>> 2080 config WEAK_ORDERING
>> 2081 bool
1633 2082
1634 config ARCH_MEMORY_PROBE !! 2083 #
1635 bool "Enable sysfs memory/probe inter !! 2084 # CPU may reorder reads and writes beyond LL/SC
1636 depends on MEMORY_HOTPLUG !! 2085 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1637 help !! 2086 #
1638 This option enables a sysfs memory/ !! 2087 config WEAK_REORDERING_BEYOND_LLSC
1639 See Documentation/admin-guide/mm/me !! 2088 bool
1640 If you are unsure how to answer thi !! 2089 endmenu
1641 2090
1642 config ARCH_PROC_KCORE_TEXT !! 2091 #
1643 def_bool y !! 2092 # These two indicate any level of the MIPS32 and MIPS64 architecture
1644 depends on X86_64 && PROC_KCORE !! 2093 #
>> 2094 config CPU_MIPS32
>> 2095 bool
>> 2096 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
1645 2097
1646 config ILLEGAL_POINTER_VALUE !! 2098 config CPU_MIPS64
1647 hex !! 2099 bool
1648 default 0 if X86_32 !! 2100 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
1649 default 0xdead000000000000 if X86_64 <<
1650 <<
1651 config X86_PMEM_LEGACY_DEVICE <<
1652 bool <<
1653 <<
1654 config X86_PMEM_LEGACY <<
1655 tristate "Support non-standard NVDIMM <<
1656 depends on PHYS_ADDR_T_64BIT <<
1657 depends on BLK_DEV <<
1658 select X86_PMEM_LEGACY_DEVICE <<
1659 select NUMA_KEEP_MEMINFO if NUMA <<
1660 select LIBNVDIMM <<
1661 help <<
1662 Treat memory marked using the non-s <<
1663 by the Intel Sandy Bridge-EP refere <<
1664 The kernel will offer these regions <<
1665 they can be used for persistent sto <<
1666 <<
1667 Say Y if unsure. <<
1668 <<
1669 config HIGHPTE <<
1670 bool "Allocate 3rd-level pagetables f <<
1671 depends on HIGHMEM <<
1672 help <<
1673 The VM uses one page table entry fo <<
1674 For systems with a lot of RAM, this <<
1675 low memory. Setting this option wi <<
1676 entries in high memory. <<
1677 <<
1678 config X86_CHECK_BIOS_CORRUPTION <<
1679 bool "Check for low memory corruption <<
1680 help <<
1681 Periodically check for memory corru <<
1682 is suspected to be caused by BIOS. <<
1683 configuration, it is disabled at ru <<
1684 setting "memory_corruption_check=1" <<
1685 line. By default it scans the low <<
1686 seconds; see the memory_corruption_ <<
1687 memory_corruption_check_period para <<
1688 Documentation/admin-guide/kernel-pa <<
1689 <<
1690 When enabled with the default param <<
1691 almost no overhead, as it reserves <<
1692 of memory and scans it infrequently <<
1693 and prevents it from affecting the <<
1694 <<
1695 It is, however, intended as a diagn <<
1696 BIOS-originated corruption always a <<
1697 you can use memmap= to prevent the <<
1698 memory. <<
1699 <<
1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK <<
1701 bool "Set the default setting of memo <<
1702 depends on X86_CHECK_BIOS_CORRUPTION <<
1703 default y <<
1704 help <<
1705 Set whether the default state of me <<
1706 on or off. <<
1707 2101
1708 config MATH_EMULATION !! 2102 #
>> 2103 # These indicate the revision of the architecture
>> 2104 #
>> 2105 config CPU_MIPSR1
1709 bool 2106 bool
1710 depends on MODIFY_LDT_SYSCALL !! 2107 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1711 prompt "Math emulation" if X86_32 && <<
1712 help <<
1713 Linux can emulate a math coprocesso <<
1714 operations) if you don't have one. <<
1715 a math coprocessor built in, 486SX <<
1716 a 487DX or 387, respectively. (The <<
1717 give you some hints here ["man dmes <<
1718 coprocessor or this emulation. <<
1719 <<
1720 If you don't have a math coprocesso <<
1721 say Y here even though you have a c <<
1722 be used nevertheless. (This behavio <<
1723 command line option "no387", which <<
1724 is broken. Try "man bootparam" or s <<
1725 loader (lilo or loadlin) about how <<
1726 boot time.) This means that it is a <<
1727 intend to use this kernel on differ <<
1728 2108
1729 More information about the internal !! 2109 config CPU_MIPSR2
1730 emulation can be found in <file:arc !! 2110 bool
>> 2111 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2112 select CPU_HAS_RIXI
>> 2113 select MIPS_SPRAM
1731 2114
1732 If you are not sure, say Y; apart f !! 2115 config CPU_MIPSR6
1733 kernel, it won't hurt. !! 2116 bool
>> 2117 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2118 select CPU_HAS_RIXI
>> 2119 select HAVE_ARCH_BITREVERSE
>> 2120 select MIPS_ASID_BITS_VARIABLE
>> 2121 select MIPS_CRC_SUPPORT
>> 2122 select MIPS_SPRAM
1734 2123
1735 config MTRR !! 2124 config TARGET_ISA_REV
1736 def_bool y !! 2125 int
1737 prompt "MTRR (Memory Type Range Regis !! 2126 default 1 if CPU_MIPSR1
>> 2127 default 2 if CPU_MIPSR2
>> 2128 default 6 if CPU_MIPSR6
>> 2129 default 0
1738 help 2130 help
1739 On Intel P6 family processors (Pent !! 2131 Reflects the ISA revision being targeted by the kernel build. This
1740 the Memory Type Range Registers (MT !! 2132 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1741 processor access to memory ranges. <<
1742 a video (VGA) card on a PCI or AGP <<
1743 allows bus write transfers to be co <<
1744 before bursting over the PCI/AGP bu <<
1745 of image write operations 2.5 times <<
1746 /proc/mtrr file which may be used t <<
1747 MTRRs. Typically the X server shoul <<
1748 <<
1749 This code has a reasonably generic <<
1750 control registers on other processo <<
1751 as well: <<
1752 <<
1753 The Cyrix 6x86, 6x86MX and M II pro <<
1754 Registers (ARRs) which provide a si <<
1755 these, the ARRs are used to emulate <<
1756 The AMD K6-2 (stepping 8 and above) <<
1757 MTRRs. The Centaur C6 (WinChip) has <<
1758 write-combining. All of these proce <<
1759 and it makes sense to say Y here if <<
1760 <<
1761 Saying Y here also fixes a problem <<
1762 set the MTRRs for the boot CPU and <<
1763 can lead to all sorts of problems, <<
1764 2133
1765 You can safely say Y even if your m !! 2134 config EVA
1766 just add about 9 KB to your kernel. !! 2135 bool
1767 2136
1768 See <file:Documentation/arch/x86/mt !! 2137 config XPA
>> 2138 bool
1769 2139
1770 config MTRR_SANITIZER !! 2140 config SYS_SUPPORTS_32BIT_KERNEL
1771 def_bool y !! 2141 bool
1772 prompt "MTRR cleanup support" !! 2142 config SYS_SUPPORTS_64BIT_KERNEL
1773 depends on MTRR !! 2143 bool
1774 help !! 2144 config CPU_SUPPORTS_32BIT_KERNEL
1775 Convert MTRR layout from continuous !! 2145 bool
1776 add writeback entries. !! 2146 config CPU_SUPPORTS_64BIT_KERNEL
>> 2147 bool
>> 2148 config CPU_SUPPORTS_CPUFREQ
>> 2149 bool
>> 2150 config CPU_SUPPORTS_ADDRWINCFG
>> 2151 bool
>> 2152 config CPU_SUPPORTS_HUGEPAGES
>> 2153 bool
>> 2154 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2155 config MIPS_PGD_C0_CONTEXT
>> 2156 bool
>> 2157 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
1777 2158
1778 Can be disabled with disable_mtrr_c !! 2159 #
1779 The largest mtrr entry size for a c !! 2160 # Set to y for ptrace access to watch registers.
1780 mtrr_chunk_size. !! 2161 #
>> 2162 config HARDWARE_WATCHPOINTS
>> 2163 bool
>> 2164 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1781 2165
1782 If unsure, say Y. !! 2166 menu "Kernel type"
1783 2167
1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2168 choice
1785 int "MTRR cleanup enable value (0-1)" !! 2169 prompt "Kernel code model"
1786 range 0 1 !! 2170 help
1787 default "0" !! 2171 You should only select this option if you have a workload that
1788 depends on MTRR_SANITIZER !! 2172 actually benefits from 64-bit processing or if your machine has
1789 help !! 2173 large memory. You will only be presented a single option in this
1790 Enable mtrr cleanup default value !! 2174 menu if your system does not support both 32-bit and 64-bit kernels.
1791 !! 2175
1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT !! 2176 config 32BIT
1793 int "MTRR cleanup spare reg num (0-7) !! 2177 bool "32-bit kernel"
1794 range 0 7 !! 2178 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1795 default "1" !! 2179 select TRAD_SIGNALS
1796 depends on MTRR_SANITIZER <<
1797 help 2180 help
1798 mtrr cleanup spare entries default, !! 2181 Select this option if you want to build a 32-bit kernel.
1799 mtrr_spare_reg_nr=N on the kernel c <<
1800 2182
1801 config X86_PAT !! 2183 config 64BIT
1802 def_bool y !! 2184 bool "64-bit kernel"
1803 prompt "x86 PAT support" if EXPERT !! 2185 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1804 depends on MTRR <<
1805 select ARCH_USES_PG_ARCH_2 <<
1806 help 2186 help
1807 Use PAT attributes to setup page le !! 2187 Select this option if you want to build a 64-bit kernel.
1808 2188
1809 PATs are the modern equivalents of !! 2189 endchoice
1810 flexible than MTRRs. <<
1811 2190
1812 Say N here if you see bootup proble !! 2191 config KVM_GUEST
1813 spontaneous reboots) or a non-worki !! 2192 bool "KVM Guest Kernel"
>> 2193 depends on BROKEN_ON_SMP
>> 2194 help
>> 2195 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2196 mode.
1814 2197
1815 If unsure, say Y. !! 2198 config KVM_GUEST_TIMER_FREQ
>> 2199 int "Count/Compare Timer Frequency (MHz)"
>> 2200 depends on KVM_GUEST
>> 2201 default 100
>> 2202 help
>> 2203 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2204 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2205 timer frequency is specified directly.
1816 2206
1817 config X86_UMIP !! 2207 config MIPS_VA_BITS_48
1818 def_bool y !! 2208 bool "48 bits virtual memory"
1819 prompt "User Mode Instruction Prevent !! 2209 depends on 64BIT
1820 help 2210 help
1821 User Mode Instruction Prevention (U !! 2211 Support a maximum at least 48 bits of application virtual
1822 some x86 processors. If enabled, a !! 2212 memory. Default is 40 bits or less, depending on the CPU.
1823 issued if the SGDT, SLDT, SIDT, SMS !! 2213 For page sizes 16k and above, this option results in a small
1824 executed in user mode. These instru !! 2214 memory overhead for page tables. For 4k page size, a fourth
1825 information about the hardware stat !! 2215 level of page tables is added which imposes both a memory
1826 !! 2216 overhead as well as slower TLB fault handling.
1827 The vast majority of applications d <<
1828 For the very few that do, software <<
1829 specific cases in protected and vir <<
1830 results are dummy. <<
1831 <<
1832 config CC_HAS_IBT <<
1833 # GCC >= 9 and binutils >= 2.29 <<
1834 # Retpoline check to work around http <<
1835 # Clang/LLVM >= 14 <<
1836 # https://github.com/llvm/llvm-projec <<
1837 # https://github.com/llvm/llvm-projec <<
1838 def_bool ((CC_IS_GCC && $(cc-option, <<
1839 (CC_IS_CLANG && CLANG_VERSI <<
1840 $(as-instr,endbr64) <<
1841 2217
1842 config X86_CET !! 2218 If unsure, say N.
1843 def_bool n <<
1844 help <<
1845 CET features configured (Shadow sta <<
1846 2219
1847 config X86_KERNEL_IBT !! 2220 choice
1848 prompt "Indirect Branch Tracking" !! 2221 prompt "Kernel page size"
1849 def_bool y !! 2222 default PAGE_SIZE_4KB
1850 depends on X86_64 && CC_HAS_IBT && HA <<
1851 # https://github.com/llvm/llvm-projec <<
1852 depends on !LD_IS_LLD || LLD_VERSION <<
1853 select OBJTOOL <<
1854 select X86_CET <<
1855 help <<
1856 Build the kernel with support for I <<
1857 hardware support course-grain forwa <<
1858 protection. It enforces that all in <<
1859 an ENDBR instruction, as such, the <<
1860 code with them to make this happen. <<
1861 <<
1862 In addition to building the kernel <<
1863 are not indirect call targets, avoi <<
1864 <<
1865 This requires LTO like objtool runs <<
1866 does significantly reduce the numbe <<
1867 kernel image. <<
1868 2223
1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2224 config PAGE_SIZE_4KB
1870 prompt "Memory Protection Keys" !! 2225 bool "4kB"
1871 def_bool y !! 2226 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
1872 # Note: only available in 64-bit mode !! 2227 help
1873 depends on X86_64 && (CPU_SUP_INTEL | !! 2228 This option select the standard 4kB Linux page size. On some
1874 select ARCH_USES_HIGH_VMA_FLAGS !! 2229 R3000-family processors this is the only available page size. Using
1875 select ARCH_HAS_PKEYS !! 2230 4kB page size will minimize memory consumption and is therefore
1876 help !! 2231 recommended for low memory systems.
1877 Memory Protection Keys provides a m !! 2232
1878 page-based protections, but without !! 2233 config PAGE_SIZE_8KB
1879 page tables when an application cha !! 2234 bool "8kB"
>> 2235 depends on CPU_CAVIUM_OCTEON
>> 2236 depends on !MIPS_VA_BITS_48
>> 2237 help
>> 2238 Using 8kB page size will result in higher performance kernel at
>> 2239 the price of higher memory consumption. This option is available
>> 2240 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2241 distribution to support this.
>> 2242
>> 2243 config PAGE_SIZE_16KB
>> 2244 bool "16kB"
>> 2245 depends on !CPU_R3000 && !CPU_TX39XX
>> 2246 help
>> 2247 Using 16kB page size will result in higher performance kernel at
>> 2248 the price of higher memory consumption. This option is available on
>> 2249 all non-R3000 family processors. Note that you will need a suitable
>> 2250 Linux distribution to support this.
>> 2251
>> 2252 config PAGE_SIZE_32KB
>> 2253 bool "32kB"
>> 2254 depends on CPU_CAVIUM_OCTEON
>> 2255 depends on !MIPS_VA_BITS_48
>> 2256 help
>> 2257 Using 32kB page size will result in higher performance kernel at
>> 2258 the price of higher memory consumption. This option is available
>> 2259 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2260 distribution to support this.
>> 2261
>> 2262 config PAGE_SIZE_64KB
>> 2263 bool "64kB"
>> 2264 depends on !CPU_R3000 && !CPU_TX39XX
>> 2265 help
>> 2266 Using 64kB page size will result in higher performance kernel at
>> 2267 the price of higher memory consumption. This option is available on
>> 2268 all non-R3000 family processor. Not that at the time of this
>> 2269 writing this option is still high experimental.
1880 2270
1881 For details, see Documentation/core !! 2271 endchoice
1882 2272
1883 If unsure, say y. !! 2273 config FORCE_MAX_ZONEORDER
>> 2274 int "Maximum zone order"
>> 2275 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2276 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2277 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2278 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2279 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2280 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2281 range 11 64
>> 2282 default "11"
>> 2283 help
>> 2284 The kernel memory allocator divides physically contiguous memory
>> 2285 blocks into "zones", where each zone is a power of two number of
>> 2286 pages. This option selects the largest power of two that the kernel
>> 2287 keeps in the memory allocator. If you need to allocate very large
>> 2288 blocks of physically contiguous memory, then you may need to
>> 2289 increase this value.
1884 2290
1885 config ARCH_PKEY_BITS !! 2291 This config option is actually maximum order plus one. For example,
1886 int !! 2292 a value of 11 means that the largest free memory block is 2^10 pages.
1887 default 4 <<
1888 2293
1889 choice !! 2294 The page size is not necessarily 4KB. Keep this in mind
1890 prompt "TSX enable mode" !! 2295 when choosing a value for this option.
1891 depends on CPU_SUP_INTEL <<
1892 default X86_INTEL_TSX_MODE_OFF <<
1893 help <<
1894 Intel's TSX (Transactional Synchron <<
1895 allows to optimize locking protocol <<
1896 can lead to a noticeable performanc <<
1897 2296
1898 On the other hand it has been shown !! 2297 config BOARD_SCACHE
1899 to form side channel attacks (e.g. !! 2298 bool
1900 will be more of those attacks disco <<
1901 2299
1902 Therefore TSX is not enabled by def !! 2300 config IP22_CPU_SCACHE
1903 might override this decision by tsx !! 2301 bool
1904 Even with TSX enabled, the kernel w !! 2302 select BOARD_SCACHE
1905 possible TAA mitigation setting dep !! 2303
1906 for the particular machine. !! 2304 #
>> 2305 # Support for a MIPS32 / MIPS64 style S-caches
>> 2306 #
>> 2307 config MIPS_CPU_SCACHE
>> 2308 bool
>> 2309 select BOARD_SCACHE
1907 2310
1908 This option allows to set the defau !! 2311 config R5000_CPU_SCACHE
1909 and =auto. See Documentation/admin- !! 2312 bool
1910 details. !! 2313 select BOARD_SCACHE
1911 2314
1912 Say off if not sure, auto if TSX is !! 2315 config RM7000_CPU_SCACHE
1913 platforms or on if TSX is in use an !! 2316 bool
1914 relevant. !! 2317 select BOARD_SCACHE
1915 2318
1916 config X86_INTEL_TSX_MODE_OFF !! 2319 config SIBYTE_DMA_PAGEOPS
1917 bool "off" !! 2320 bool "Use DMA to clear/copy pages"
>> 2321 depends on CPU_SB1
1918 help 2322 help
1919 TSX is disabled if possible - equal !! 2323 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2324 channel. These DMA channels are otherwise unused by the standard
>> 2325 SiByte Linux port. Seems to give a small performance benefit.
1920 2326
1921 config X86_INTEL_TSX_MODE_ON !! 2327 config CPU_HAS_PREFETCH
1922 bool "on" !! 2328 bool
1923 help <<
1924 TSX is always enabled on TSX capabl <<
1925 line parameter. <<
1926 2329
1927 config X86_INTEL_TSX_MODE_AUTO !! 2330 config CPU_GENERIC_DUMP_TLB
1928 bool "auto" !! 2331 bool
>> 2332 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2333
>> 2334 config MIPS_FP_SUPPORT
>> 2335 bool "Floating Point support" if EXPERT
>> 2336 default y
1929 help 2337 help
1930 TSX is enabled on TSX capable HW th !! 2338 Select y to include support for floating point in the kernel
1931 side channel attacks- equals the ts !! 2339 including initialization of FPU hardware, FP context save & restore
1932 endchoice !! 2340 and emulation of an FPU where necessary. Without this support any
>> 2341 userland program attempting to use floating point instructions will
>> 2342 receive a SIGILL.
1933 2343
1934 config X86_SGX !! 2344 If you know that your userland will not attempt to use floating point
1935 bool "Software Guard eXtensions (SGX) !! 2345 instructions then you can say n here to shrink the kernel a little.
1936 depends on X86_64 && CPU_SUP_INTEL && <<
1937 depends on CRYPTO=y <<
1938 depends on CRYPTO_SHA256=y <<
1939 select MMU_NOTIFIER <<
1940 select NUMA_KEEP_MEMINFO if NUMA <<
1941 select XARRAY_MULTI <<
1942 help <<
1943 Intel(R) Software Guard eXtensions <<
1944 that can be used by applications to <<
1945 and data, referred to as enclaves. <<
1946 only be accessed by code running wi <<
1947 outside the enclave, including othe <<
1948 hardware. <<
1949 2346
1950 If unsure, say N. !! 2347 If unsure, say y.
1951 2348
1952 config X86_USER_SHADOW_STACK !! 2349 config CPU_R2300_FPU
1953 bool "X86 userspace shadow stack" !! 2350 bool
1954 depends on AS_WRUSS !! 2351 depends on MIPS_FP_SUPPORT
1955 depends on X86_64 !! 2352 default y if CPU_R3000 || CPU_TX39XX
1956 select ARCH_USES_HIGH_VMA_FLAGS <<
1957 select X86_CET <<
1958 help <<
1959 Shadow stack protection is a hardwa <<
1960 return address corruption. This he <<
1961 Applications must be enabled to use <<
1962 get protection "for free". <<
1963 2353
1964 CPUs supporting shadow stacks were !! 2354 config CPU_R3K_TLB
>> 2355 bool
1965 2356
1966 See Documentation/arch/x86/shstk.rs !! 2357 config CPU_R4K_FPU
>> 2358 bool
>> 2359 depends on MIPS_FP_SUPPORT
>> 2360 default y if !CPU_R2300_FPU
1967 2361
1968 If unsure, say N. !! 2362 config CPU_R4K_CACHE_TLB
>> 2363 bool
>> 2364 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
1969 2365
1970 config INTEL_TDX_HOST !! 2366 config MIPS_MT_SMP
1971 bool "Intel Trust Domain Extensions ( !! 2367 bool "MIPS MT SMP support (1 TC on each available VPE)"
1972 depends on CPU_SUP_INTEL !! 2368 default y
1973 depends on X86_64 !! 2369 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
1974 depends on KVM_INTEL !! 2370 select CPU_MIPSR2_IRQ_VI
1975 depends on X86_X2APIC !! 2371 select CPU_MIPSR2_IRQ_EI
1976 select ARCH_KEEP_MEMBLOCK !! 2372 select SYNC_R4K
1977 depends on CONTIG_ALLOC !! 2373 select MIPS_MT
1978 depends on !KEXEC_CORE !! 2374 select SMP
1979 depends on X86_MCE !! 2375 select SMP_UP
1980 help !! 2376 select SYS_SUPPORTS_SMP
1981 Intel Trust Domain Extensions (TDX) !! 2377 select SYS_SUPPORTS_SCHED_SMT
1982 host and certain physical attacks. !! 2378 select MIPS_PERF_SHARED_TC_COUNTERS
1983 support in the host kernel to run c !! 2379 help
>> 2380 This is a kernel model which is known as SMVP. This is supported
>> 2381 on cores with the MT ASE and uses the available VPEs to implement
>> 2382 virtual processors which supports SMP. This is equivalent to the
>> 2383 Intel Hyperthreading feature. For further information go to
>> 2384 <http://www.imgtec.com/mips/mips-multithreading.asp>.
1984 2385
1985 If unsure, say N. !! 2386 config MIPS_MT
>> 2387 bool
1986 2388
1987 config EFI !! 2389 config SCHED_SMT
1988 bool "EFI runtime service support" !! 2390 bool "SMT (multithreading) scheduler support"
1989 depends on ACPI !! 2391 depends on SYS_SUPPORTS_SCHED_SMT
1990 select UCS2_STRING !! 2392 default n
1991 select EFI_RUNTIME_WRAPPERS !! 2393 help
1992 select ARCH_USE_MEMREMAP_PROT !! 2394 SMT scheduler support improves the CPU scheduler's decision making
1993 select EFI_RUNTIME_MAP if KEXEC_CORE !! 2395 when dealing with MIPS MT enabled cores at a cost of slightly
1994 help !! 2396 increased overhead in some places. If unsure say N here.
1995 This enables the kernel to use EFI !! 2397
1996 available (such as the EFI variable !! 2398 config SYS_SUPPORTS_SCHED_SMT
1997 !! 2399 bool
1998 This option is only useful on syste !! 2400
1999 In addition, you should use the lat !! 2401 config SYS_SUPPORTS_MULTITHREADING
2000 at <http://elilo.sourceforge.net> i !! 2402 bool
2001 of EFI runtime services. However, e !! 2403
2002 resultant kernel should continue to !! 2404 config MIPS_MT_FPAFF
2003 platforms. !! 2405 bool "Dynamic FPU affinity for FP-intensive threads"
2004 !! 2406 default y
2005 config EFI_STUB !! 2407 depends on MIPS_MT_SMP
2006 bool "EFI stub support" !! 2408
2007 depends on EFI !! 2409 config MIPSR2_TO_R6_EMULATOR
2008 select RELOCATABLE !! 2410 bool "MIPS R2-to-R6 emulator"
2009 help !! 2411 depends on CPU_MIPSR6
2010 This kernel feature allows a bzImag !! 2412 depends on MIPS_FP_SUPPORT
2011 by EFI firmware without the use of <<
2012 <<
2013 See Documentation/admin-guide/efi-s <<
2014 <<
2015 config EFI_HANDOVER_PROTOCOL <<
2016 bool "EFI handover protocol (DEPRECAT <<
2017 depends on EFI_STUB <<
2018 default y 2413 default y
2019 help 2414 help
2020 Select this in order to include sup !! 2415 Choose this option if you want to run non-R6 MIPS userland code.
2021 handover protocol, which defines al !! 2416 Even if you say 'Y' here, the emulator will still be disabled by
2022 EFI stub. This is a practice that !! 2417 default. You can enable it using the 'mipsr2emu' kernel option.
2023 specification, and requires a prior !! 2418 The only reason this is a build-time option is to save ~14K from the
2024 bootloader about Linux/x86 specific !! 2419 final kernel image.
2025 and initrd, and where in memory tho !! 2420
2026 !! 2421 config SYS_SUPPORTS_VPE_LOADER
2027 If in doubt, say Y. Even though the !! 2422 bool
2028 present in upstream GRUB or other b !! 2423 depends on SYS_SUPPORTS_MULTITHREADING
2029 GRUB with numerous downstream patch <<
2030 handover protocol as as result. <<
2031 <<
2032 config EFI_MIXED <<
2033 bool "EFI mixed-mode support" <<
2034 depends on EFI_STUB && X86_64 <<
2035 help 2424 help
2036 Enabling this feature allows a 64-b !! 2425 Indicates that the platform supports the VPE loader, and provides
2037 on a 32-bit firmware, provided that !! 2426 physical_memsize.
2038 mode. <<
2039 2427
2040 Note that it is not possible to boo !! 2428 config MIPS_VPE_LOADER
2041 kernel via the EFI boot stub - a bo !! 2429 bool "VPE loader support."
2042 the EFI handover protocol must be u !! 2430 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2431 select CPU_MIPSR2_IRQ_VI
>> 2432 select CPU_MIPSR2_IRQ_EI
>> 2433 select MIPS_MT
>> 2434 help
>> 2435 Includes a loader for loading an elf relocatable object
>> 2436 onto another VPE and running it.
2043 2437
2044 If unsure, say N. !! 2438 config MIPS_VPE_LOADER_CMP
>> 2439 bool
>> 2440 default "y"
>> 2441 depends on MIPS_VPE_LOADER && MIPS_CMP
2045 2442
2046 config EFI_RUNTIME_MAP !! 2443 config MIPS_VPE_LOADER_MT
2047 bool "Export EFI runtime maps to sysf !! 2444 bool
2048 depends on EFI !! 2445 default "y"
>> 2446 depends on MIPS_VPE_LOADER && !MIPS_CMP
>> 2447
>> 2448 config MIPS_VPE_LOADER_TOM
>> 2449 bool "Load VPE program into memory hidden from linux"
>> 2450 depends on MIPS_VPE_LOADER
>> 2451 default y
2049 help 2452 help
2050 Export EFI runtime memory regions t !! 2453 The loader can use memory that is present but has been hidden from
2051 That memory map is required by the !! 2454 Linux using the kernel command line option "mem=xxMB". It's up to
2052 mappings after kexec, but can also !! 2455 you to ensure the amount you put in the option and the space your
>> 2456 program requires is less or equal to the amount physically present.
2053 2457
2054 See also Documentation/ABI/testing/ !! 2458 config MIPS_VPE_APSP_API
>> 2459 bool "Enable support for AP/SP API (RTLX)"
>> 2460 depends on MIPS_VPE_LOADER
2055 2461
2056 source "kernel/Kconfig.hz" !! 2462 config MIPS_VPE_APSP_API_CMP
>> 2463 bool
>> 2464 default "y"
>> 2465 depends on MIPS_VPE_APSP_API && MIPS_CMP
2057 2466
2058 config ARCH_SUPPORTS_KEXEC !! 2467 config MIPS_VPE_APSP_API_MT
2059 def_bool y !! 2468 bool
>> 2469 default "y"
>> 2470 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2060 2471
2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2472 config MIPS_CMP
2062 def_bool X86_64 !! 2473 bool "MIPS CMP framework support (DEPRECATED)"
>> 2474 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2475 select SMP
>> 2476 select SYNC_R4K
>> 2477 select SYS_SUPPORTS_SMP
>> 2478 select WEAK_ORDERING
>> 2479 default n
>> 2480 help
>> 2481 Select this if you are using a bootloader which implements the "CMP
>> 2482 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2483 its ability to start secondary CPUs.
>> 2484
>> 2485 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2486 instead of this.
>> 2487
>> 2488 config MIPS_CPS
>> 2489 bool "MIPS Coherent Processing System support"
>> 2490 depends on SYS_SUPPORTS_MIPS_CPS
>> 2491 select MIPS_CM
>> 2492 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2493 select SMP
>> 2494 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2495 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2496 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2497 select SYS_SUPPORTS_SMP
>> 2498 select WEAK_ORDERING
>> 2499 help
>> 2500 Select this if you wish to run an SMP kernel across multiple cores
>> 2501 within a MIPS Coherent Processing System. When this option is
>> 2502 enabled the kernel will probe for other cores and boot them with
>> 2503 no external assistance. It is safe to enable this when hardware
>> 2504 support is unavailable.
2063 2505
2064 config ARCH_SELECTS_KEXEC_FILE !! 2506 config MIPS_CPS_PM
2065 def_bool y !! 2507 depends on MIPS_CPS
2066 depends on KEXEC_FILE !! 2508 bool
2067 select HAVE_IMA_KEXEC if IMA <<
2068 2509
2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2510 config MIPS_CM
2070 def_bool y !! 2511 bool
>> 2512 select MIPS_CPC
2071 2513
2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2514 config MIPS_CPC
2073 def_bool y !! 2515 bool
2074 2516
2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2517 config SB1_PASS_2_WORKAROUNDS
2076 def_bool y !! 2518 bool
>> 2519 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2520 default y
2077 2521
2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2522 config SB1_PASS_2_1_WORKAROUNDS
2079 def_bool y !! 2523 bool
>> 2524 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2525 default y
2080 2526
2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2527 choice
2082 def_bool y !! 2528 prompt "SmartMIPS or microMIPS ASE support"
2083 2529
2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2530 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2531 bool "None"
>> 2532 help
>> 2533 Select this if you want neither microMIPS nor SmartMIPS support
2086 2534
2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2535 config CPU_HAS_SMARTMIPS
2088 def_bool y !! 2536 depends on SYS_SUPPORTS_SMARTMIPS
>> 2537 bool "SmartMIPS"
>> 2538 help
>> 2539 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2540 increased security at both hardware and software level for
>> 2541 smartcards. Enabling this option will allow proper use of the
>> 2542 SmartMIPS instructions by Linux applications. However a kernel with
>> 2543 this option will not work on a MIPS core without SmartMIPS core. If
>> 2544 you don't know you probably don't have SmartMIPS and should say N
>> 2545 here.
>> 2546
>> 2547 config CPU_MICROMIPS
>> 2548 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2549 bool "microMIPS"
>> 2550 help
>> 2551 When this option is enabled the kernel will be built using the
>> 2552 microMIPS ISA
2089 2553
2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2554 endchoice
2091 def_bool CRASH_RESERVE <<
2092 2555
2093 config PHYSICAL_START !! 2556 config CPU_HAS_MSA
2094 hex "Physical address where the kerne !! 2557 bool "Support for the MIPS SIMD Architecture"
2095 default "0x1000000" !! 2558 depends on CPU_SUPPORTS_MSA
2096 help !! 2559 depends on MIPS_FP_SUPPORT
2097 This gives the physical address whe !! 2560 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2561 help
>> 2562 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2563 and a set of SIMD instructions to operate on them. When this option
>> 2564 is enabled the kernel will support allocating & switching MSA
>> 2565 vector register contexts. If you know that your kernel will only be
>> 2566 running on CPUs which do not support MSA or that your userland will
>> 2567 not be making use of it then you may wish to say N here to reduce
>> 2568 the size & complexity of your kernel.
2098 2569
2099 If the kernel is not relocatable (C !! 2570 If unsure, say Y.
2100 will decompress itself to above phy <<
2101 Otherwise, bzImage will run from th <<
2102 by the boot loader. The only except <<
2103 above physical address, in which ca <<
2104 <<
2105 In normal kdump cases one does not <<
2106 as now bzImage can be compiled as a <<
2107 (CONFIG_RELOCATABLE=y) and be used <<
2108 address. This option is mainly usef <<
2109 to use a bzImage for capturing the <<
2110 vmlinux instead. vmlinux is not rel <<
2111 to be specifically compiled to run <<
2112 (normally a reserved region) and th <<
2113 <<
2114 So if you are using bzImage for cap <<
2115 leave the value here unchanged to 0 <<
2116 CONFIG_RELOCATABLE=y. Otherwise if <<
2117 for capturing the crash dump change <<
2118 the reserved region. In other word <<
2119 the "X" value as specified in the " <<
2120 command line boot parameter passed <<
2121 kernel. Please take a look at Docum <<
2122 for more details about crash dumps. <<
2123 <<
2124 Usage of bzImage for capturing the <<
2125 one does not have to build two kern <<
2126 as production kernel and capture ke <<
2127 gone away after relocatable bzImage <<
2128 is present because there are users <<
2129 vmlinux for dump capture. This opti <<
2130 line. <<
2131 2571
2132 Don't change this unless you know w !! 2572 config CPU_HAS_WB
>> 2573 bool
2133 2574
2134 config RELOCATABLE !! 2575 config XKS01
2135 bool "Build a relocatable kernel" !! 2576 bool
2136 default y !! 2577
>> 2578 config CPU_HAS_RIXI
>> 2579 bool
>> 2580
>> 2581 config CPU_HAS_LOAD_STORE_LR
>> 2582 bool
2137 help 2583 help
2138 This builds a kernel image that ret !! 2584 CPU has support for unaligned load and store instructions:
2139 so it can be loaded someplace besid !! 2585 LWL, LWR, SWL, SWR (Load/store word left/right).
2140 The relocations tend to make the ke !! 2586 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
2141 but are discarded at runtime. <<
2142 2587
2143 One use is for the kexec on panic c !! 2588 #
2144 must live at a different physical a !! 2589 # Vectored interrupt mode is an R2 feature
2145 kernel. !! 2590 #
2146 !! 2591 config CPU_MIPSR2_IRQ_VI
2147 Note: If CONFIG_RELOCATABLE=y, then !! 2592 bool
2148 it has been loaded at and the compi <<
2149 (CONFIG_PHYSICAL_START) is used as <<
2150 2593
2151 config RANDOMIZE_BASE !! 2594 #
2152 bool "Randomize the address of the ke !! 2595 # Extended interrupt mode is an R2 feature
2153 depends on RELOCATABLE !! 2596 #
>> 2597 config CPU_MIPSR2_IRQ_EI
>> 2598 bool
>> 2599
>> 2600 config CPU_HAS_SYNC
>> 2601 bool
>> 2602 depends on !CPU_R3000
2154 default y 2603 default y
2155 help <<
2156 In support of Kernel Address Space <<
2157 this randomizes the physical addres <<
2158 is decompressed and the virtual add <<
2159 image is mapped, as a security feat <<
2160 attempts relying on knowledge of th <<
2161 code internals. <<
2162 <<
2163 On 64-bit, the kernel physical and <<
2164 randomized separately. The physical <<
2165 between 16MB and the top of physica <<
2166 virtual address will be randomized <<
2167 of entropy). Note that this also re <<
2168 available to kernel modules from 1. <<
2169 <<
2170 On 32-bit, the kernel physical and <<
2171 randomized together. They will be r <<
2172 512MB (8 bits of entropy). <<
2173 <<
2174 Entropy is generated using the RDRA <<
2175 supported. If RDTSC is supported, i <<
2176 the entropy pool as well. If neithe <<
2177 supported, then entropy is read fro <<
2178 usable entropy is limited by the ke <<
2179 2GB addressing, and that PHYSICAL_A <<
2180 minimum of 2MB. As a result, only 1 <<
2181 theoretically possible, but the imp <<
2182 limited due to memory layouts. <<
2183 2604
2184 If unsure, say Y. !! 2605 #
>> 2606 # CPU non-features
>> 2607 #
>> 2608 config CPU_DADDI_WORKAROUNDS
>> 2609 bool
2185 2610
2186 # Relocation on x86 needs some additional bui !! 2611 config CPU_R4000_WORKAROUNDS
2187 config X86_NEED_RELOCS !! 2612 bool
2188 def_bool y !! 2613 select CPU_R4400_WORKAROUNDS
2189 depends on RANDOMIZE_BASE || (X86_32 <<
2190 2614
2191 config PHYSICAL_ALIGN !! 2615 config CPU_R4400_WORKAROUNDS
2192 hex "Alignment value to which kernel !! 2616 bool
2193 default "0x200000" <<
2194 range 0x2000 0x1000000 if X86_32 <<
2195 range 0x200000 0x1000000 if X86_64 <<
2196 help <<
2197 This value puts the alignment restr <<
2198 where kernel is loaded and run from <<
2199 address which meets above alignment <<
2200 2617
2201 If bootloader loads the kernel at a !! 2618 config CPU_R4X00_BUGS64
2202 CONFIG_RELOCATABLE is set, kernel w !! 2619 bool
2203 address aligned to above value and !! 2620 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2204 2621
2205 If bootloader loads the kernel at a !! 2622 config MIPS_ASID_SHIFT
2206 CONFIG_RELOCATABLE is not set, kern !! 2623 int
2207 load address and decompress itself !! 2624 default 6 if CPU_R3000 || CPU_TX39XX
2208 compiled for and run from there. Th !! 2625 default 0
2209 compiled already meets above alignm <<
2210 end result is that kernel runs from <<
2211 above alignment restrictions. <<
2212 2626
2213 On 32-bit this value must be a mult !! 2627 config MIPS_ASID_BITS
2214 this value must be a multiple of 0x !! 2628 int
>> 2629 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2630 default 6 if CPU_R3000 || CPU_TX39XX
>> 2631 default 8
2215 2632
2216 Don't change this unless you know w !! 2633 config MIPS_ASID_BITS_VARIABLE
>> 2634 bool
2217 2635
2218 config DYNAMIC_MEMORY_LAYOUT !! 2636 config MIPS_CRC_SUPPORT
2219 bool 2637 bool
2220 help <<
2221 This option makes base addresses of <<
2222 __PAGE_OFFSET movable during boot. <<
2223 2638
2224 config RANDOMIZE_MEMORY !! 2639 #
2225 bool "Randomize the kernel memory sec !! 2640 # - Highmem only makes sense for the 32-bit kernel.
2226 depends on X86_64 !! 2641 # - The current highmem code will only work properly on physically indexed
2227 depends on RANDOMIZE_BASE !! 2642 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2228 select DYNAMIC_MEMORY_LAYOUT !! 2643 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2229 default RANDOMIZE_BASE !! 2644 # moment we protect the user and offer the highmem option only on machines
2230 help !! 2645 # where it's known to be safe. This will not offer highmem on a few systems
2231 Randomizes the base virtual address !! 2646 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2232 (physical memory mapping, vmalloc & !! 2647 # indexed CPUs but we're playing safe.
2233 makes exploits relying on predictab !! 2648 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2234 !! 2649 # know they might have memory configurations that could make use of highmem
2235 The order of allocations remains un !! 2650 # support.
2236 the same way as RANDOMIZE_BASE. Cur !! 2651 #
2237 configuration have in average 30,00 !! 2652 config HIGHMEM
2238 addresses for each memory section. !! 2653 bool "High Memory Support"
>> 2654 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2239 2655
2240 If unsure, say Y. !! 2656 config CPU_SUPPORTS_HIGHMEM
>> 2657 bool
2241 2658
2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2659 config SYS_SUPPORTS_HIGHMEM
2243 hex "Physical memory mapping padding" !! 2660 bool
2244 depends on RANDOMIZE_MEMORY <<
2245 default "0xa" if MEMORY_HOTPLUG <<
2246 default "0x0" <<
2247 range 0x1 0x40 if MEMORY_HOTPLUG <<
2248 range 0x0 0x40 <<
2249 help <<
2250 Define the padding in terabytes add <<
2251 memory size during kernel memory ra <<
2252 for memory hotplug support but redu <<
2253 address randomization. <<
2254 2661
2255 If unsure, leave at the default val !! 2662 config SYS_SUPPORTS_SMARTMIPS
>> 2663 bool
2256 2664
2257 config ADDRESS_MASKING !! 2665 config SYS_SUPPORTS_MICROMIPS
2258 bool "Linear Address Masking support" !! 2666 bool
2259 depends on X86_64 <<
2260 depends on COMPILE_TEST || !CPU_MITIG <<
2261 help <<
2262 Linear Address Masking (LAM) modifi <<
2263 to 64-bit linear addresses, allowin <<
2264 untranslated address bits for metad <<
2265 2667
2266 The capability can be used for effi !! 2668 config SYS_SUPPORTS_MIPS16
2267 implementation and for optimization !! 2669 bool
>> 2670 help
>> 2671 This option must be set if a kernel might be executed on a MIPS16-
>> 2672 enabled CPU even if MIPS16 is not actually being used. In other
>> 2673 words, it makes the kernel MIPS16-tolerant.
2268 2674
2269 config HOTPLUG_CPU !! 2675 config CPU_SUPPORTS_MSA
>> 2676 bool
>> 2677
>> 2678 config ARCH_FLATMEM_ENABLE
2270 def_bool y 2679 def_bool y
2271 depends on SMP !! 2680 depends on !NUMA && !CPU_LOONGSON2EF
2272 2681
2273 config COMPAT_VDSO !! 2682 config ARCH_SPARSEMEM_ENABLE
2274 def_bool n !! 2683 bool
2275 prompt "Disable the 32-bit vDSO (need !! 2684 select SPARSEMEM_STATIC if !SGI_IP27
2276 depends on COMPAT_32 !! 2685
>> 2686 config NUMA
>> 2687 bool "NUMA Support"
>> 2688 depends on SYS_SUPPORTS_NUMA
2277 help 2689 help
2278 Certain buggy versions of glibc wil !! 2690 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2279 presented with a 32-bit vDSO that i !! 2691 Access). This option improves performance on systems with more
2280 indicated in its segment table. !! 2692 than two nodes; on two node systems it is generally better to
2281 !! 2693 leave it disabled; on single node systems disable this option
2282 The bug was introduced by f866314b8 !! 2694 disabled.
2283 and fixed by 3b3ddb4f7db98ec9e912cc <<
2284 49ad572a70b8aeb91e57483a11dd1b77e31 <<
2285 the only released version with the <<
2286 contains a buggy "glibc 2.3.2". <<
2287 <<
2288 The symptom of the bug is that ever <<
2289 dl_main: Assertion `(void *) ph->p_ <<
2290 <<
2291 Saying Y here changes the default v <<
2292 option from 1 to 0, which turns off <<
2293 This works around the glibc bug but <<
2294 2695
2295 If unsure, say N: if you are compil !! 2696 config SYS_SUPPORTS_NUMA
2296 are unlikely to be using a buggy ve !! 2697 bool
2297 2698
2298 choice !! 2699 config RELOCATABLE
2299 prompt "vsyscall table for legacy app !! 2700 bool "Relocatable kernel"
2300 depends on X86_64 !! 2701 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
2301 default LEGACY_VSYSCALL_XONLY !! 2702 help
2302 help !! 2703 This builds a kernel image that retains relocation information
2303 Legacy user code that does not know !! 2704 so it can be loaded someplace besides the default 1MB.
2304 to be able to issue three syscalls !! 2705 The relocations make the kernel binary about 15% larger,
2305 kernel space. Since this location i !! 2706 but are discarded at runtime
2306 it can be used to assist security v <<
2307 <<
2308 This setting can be changed at boot <<
2309 line parameter vsyscall=[emulate|xo <<
2310 is deprecated and can only be enabl <<
2311 line. <<
2312 <<
2313 On a system with recent enough glib <<
2314 static binaries, you can say None w <<
2315 to improve security. <<
2316 2707
2317 If unsure, select "Emulate executio !! 2708 config RELOCATION_TABLE_SIZE
>> 2709 hex "Relocation table size"
>> 2710 depends on RELOCATABLE
>> 2711 range 0x0 0x01000000
>> 2712 default "0x00100000"
>> 2713 ---help---
>> 2714 A table of relocation data will be appended to the kernel binary
>> 2715 and parsed at boot to fix up the relocated kernel.
2318 2716
2319 config LEGACY_VSYSCALL_XONLY !! 2717 This option allows the amount of space reserved for the table to be
2320 bool "Emulate execution only" !! 2718 adjusted, although the default of 1Mb should be ok in most cases.
2321 help <<
2322 The kernel traps and emulat <<
2323 address mapping and does no <<
2324 configuration is recommende <<
2325 legacy vsyscall area but su <<
2326 instrumentation of legacy c <<
2327 certain uses of the vsyscal <<
2328 buffer. <<
2329 2719
2330 config LEGACY_VSYSCALL_NONE !! 2720 The build will fail and a valid size suggested if this is too small.
2331 bool "None" <<
2332 help <<
2333 There will be no vsyscall m <<
2334 eliminate any risk of ASLR <<
2335 fixed address mapping. Atte <<
2336 will be reported to dmesg, <<
2337 malicious userspace program <<
2338 2721
2339 endchoice !! 2722 If unsure, leave at the default value.
2340 2723
2341 config CMDLINE_BOOL !! 2724 config RANDOMIZE_BASE
2342 bool "Built-in kernel command line" !! 2725 bool "Randomize the address of the kernel image"
2343 help !! 2726 depends on RELOCATABLE
2344 Allow for specifying boot arguments !! 2727 ---help---
2345 build time. On some systems (e.g. !! 2728 Randomizes the physical and virtual address at which the
2346 necessary or convenient to provide !! 2729 kernel image is loaded, as a security feature that
2347 kernel boot arguments with the kern !! 2730 deters exploit attempts relying on knowledge of the location
2348 to not rely on the boot loader to p !! 2731 of kernel internals.
2349 !! 2732
2350 To compile command line arguments i !! 2733 Entropy is generated using any coprocessor 0 registers available.
2351 set this option to 'Y', then fill i !! 2734
2352 boot arguments in CONFIG_CMDLINE. !! 2735 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2353 !! 2736
2354 Systems with fully functional boot !! 2737 If unsure, say N.
2355 should leave this option set to 'N' <<
2356 <<
2357 config CMDLINE <<
2358 string "Built-in kernel command strin <<
2359 depends on CMDLINE_BOOL <<
2360 default "" <<
2361 help <<
2362 Enter arguments here that should be <<
2363 image and used at boot time. If th <<
2364 command line at boot time, it is ap <<
2365 form the full kernel command line, <<
2366 <<
2367 However, you can use the CONFIG_CMD <<
2368 change this behavior. <<
2369 <<
2370 In most cases, the command line (wh <<
2371 by the boot loader) should specify <<
2372 file system. <<
2373 <<
2374 config CMDLINE_OVERRIDE <<
2375 bool "Built-in command line overrides <<
2376 depends on CMDLINE_BOOL && CMDLINE != <<
2377 help <<
2378 Set this option to 'Y' to have the <<
2379 command line, and use ONLY the buil <<
2380 2738
2381 This is used to work around broken !! 2739 config RANDOMIZE_BASE_MAX_OFFSET
2382 be set to 'N' under normal conditio !! 2740 hex "Maximum kASLR offset" if EXPERT
>> 2741 depends on RANDOMIZE_BASE
>> 2742 range 0x0 0x40000000 if EVA || 64BIT
>> 2743 range 0x0 0x08000000
>> 2744 default "0x01000000"
>> 2745 ---help---
>> 2746 When kASLR is active, this provides the maximum offset that will
>> 2747 be applied to the kernel image. It should be set according to the
>> 2748 amount of physical RAM available in the target system minus
>> 2749 PHYSICAL_START and must be a power of 2.
>> 2750
>> 2751 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2752 EVA or 64-bit. The default is 16Mb.
2383 2753
2384 config MODIFY_LDT_SYSCALL !! 2754 config NODES_SHIFT
2385 bool "Enable the LDT (local descripto !! 2755 int
>> 2756 default "6"
>> 2757 depends on NEED_MULTIPLE_NODES
>> 2758
>> 2759 config HW_PERF_EVENTS
>> 2760 bool "Enable hardware performance counter support for perf events"
>> 2761 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2386 default y 2762 default y
2387 help 2763 help
2388 Linux can allow user programs to in !! 2764 Enable hardware performance counter support for perf events. If
2389 Local Descriptor Table (LDT) using !! 2765 disabled, perf events will use software events only.
2390 call. This is required to run 16-b !! 2766
2391 DOSEMU or some Wine programs. It i !! 2767 config SMP
2392 threading libraries. !! 2768 bool "Multi-Processing support"
2393 !! 2769 depends on SYS_SUPPORTS_SMP
2394 Enabling this feature adds a small <<
2395 context switches and increases the <<
2396 surface. Disabling it removes the <<
2397 <<
2398 Saying 'N' here may make sense for <<
2399 <<
2400 config STRICT_SIGALTSTACK_SIZE <<
2401 bool "Enforce strict size checking fo <<
2402 depends on DYNAMIC_SIGFRAME <<
2403 help <<
2404 For historical reasons MINSIGSTKSZ <<
2405 already too small with AVX512 suppo <<
2406 enforce strict checking of the siga <<
2407 real size of the FPU frame. This op <<
2408 by default. It can also be controll <<
2409 line option 'strict_sas_size' indep <<
2410 switch. Enabling it might break exi <<
2411 allocate a too small sigaltstack bu <<
2412 never get a signal delivered. <<
2413 <<
2414 Say 'N' unless you want to really e <<
2415 <<
2416 config CFI_AUTO_DEFAULT <<
2417 bool "Attempt to use FineIBT by defau <<
2418 depends on FINEIBT <<
2419 default y <<
2420 help 2770 help
2421 Attempt to use FineIBT by default a !! 2771 This enables support for systems with more than one CPU. If you have
2422 this is the same as booting with "c !! 2772 a system with only one CPU, say N. If you have a system with more
2423 this is the same as booting with "c !! 2773 than one CPU, say Y.
2424 2774
2425 source "kernel/livepatch/Kconfig" !! 2775 If you say N here, the kernel will run on uni- and multiprocessor
>> 2776 machines, but will use only one CPU of a multiprocessor machine. If
>> 2777 you say Y here, the kernel will run on many, but not all,
>> 2778 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2779 will run faster if you say N here.
2426 2780
2427 endmenu !! 2781 People using multiprocessor machines who say Y here should also say
>> 2782 Y to "Enhanced Real Time Clock Support", below.
2428 2783
2429 config CC_HAS_NAMED_AS !! 2784 See also the SMP-HOWTO available at
2430 def_bool $(success,echo 'int __seg_fs !! 2785 <http://www.tldp.org/docs.html#howto>.
2431 depends on CC_IS_GCC <<
2432 2786
2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS !! 2787 If you don't know what to do here, say N.
2434 def_bool CC_IS_GCC && GCC_VERSION >= <<
2435 2788
2436 config USE_X86_SEG_SUPPORT !! 2789 config HOTPLUG_CPU
2437 def_bool y !! 2790 bool "Support for hot-pluggable CPUs"
2438 depends on CC_HAS_NAMED_AS !! 2791 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2439 # !! 2792 help
2440 # -fsanitize=kernel-address (KASAN) a !! 2793 Say Y here to allow turning CPUs off and on. CPUs can be
2441 # (KCSAN) are incompatible with named !! 2794 controlled through /sys/devices/system/cpu.
2442 # GCC < 13.3 - see GCC PR sanitizer/1 !! 2795 (Note: power management support will enable this option
2443 # !! 2796 automatically on SMP systems. )
2444 depends on !(KASAN || KCSAN) || CC_HA !! 2797 Say N if you want to disable CPU hotplug.
2445 2798
2446 config CC_HAS_SLS !! 2799 config SMP_UP
2447 def_bool $(cc-option,-mharden-sls=all !! 2800 bool
2448 2801
2449 config CC_HAS_RETURN_THUNK !! 2802 config SYS_SUPPORTS_MIPS_CMP
2450 def_bool $(cc-option,-mfunction-retur !! 2803 bool
2451 2804
2452 config CC_HAS_ENTRY_PADDING !! 2805 config SYS_SUPPORTS_MIPS_CPS
2453 def_bool $(cc-option,-fpatchable-func !! 2806 bool
2454 2807
2455 config FUNCTION_PADDING_CFI !! 2808 config SYS_SUPPORTS_SMP
2456 int !! 2809 bool
2457 default 59 if FUNCTION_ALIGNMENT_64B <<
2458 default 27 if FUNCTION_ALIGNMENT_32B <<
2459 default 11 if FUNCTION_ALIGNMENT_16B <<
2460 default 3 if FUNCTION_ALIGNMENT_8B <<
2461 default 0 <<
2462 <<
2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG <<
2464 # except Kconfig can't do arithmetic :/ <<
2465 config FUNCTION_PADDING_BYTES <<
2466 int <<
2467 default FUNCTION_PADDING_CFI if CFI_C <<
2468 default FUNCTION_ALIGNMENT <<
2469 2810
2470 config CALL_PADDING !! 2811 config NR_CPUS_DEFAULT_4
2471 def_bool n !! 2812 bool
2472 depends on CC_HAS_ENTRY_PADDING && OB <<
2473 select FUNCTION_ALIGNMENT_16B <<
2474 2813
2475 config FINEIBT !! 2814 config NR_CPUS_DEFAULT_8
2476 def_bool y !! 2815 bool
2477 depends on X86_KERNEL_IBT && CFI_CLAN <<
2478 select CALL_PADDING <<
2479 2816
2480 config HAVE_CALL_THUNKS !! 2817 config NR_CPUS_DEFAULT_16
2481 def_bool y !! 2818 bool
2482 depends on CC_HAS_ENTRY_PADDING && MI <<
2483 2819
2484 config CALL_THUNKS !! 2820 config NR_CPUS_DEFAULT_32
2485 def_bool n !! 2821 bool
2486 select CALL_PADDING <<
2487 2822
2488 config PREFIX_SYMBOLS !! 2823 config NR_CPUS_DEFAULT_64
2489 def_bool y !! 2824 bool
2490 depends on CALL_PADDING && !CFI_CLANG <<
2491 2825
2492 menuconfig CPU_MITIGATIONS !! 2826 config NR_CPUS
2493 bool "Mitigations for CPU vulnerabili !! 2827 int "Maximum number of CPUs (2-256)"
2494 default y !! 2828 range 2 256
>> 2829 depends on SMP
>> 2830 default "4" if NR_CPUS_DEFAULT_4
>> 2831 default "8" if NR_CPUS_DEFAULT_8
>> 2832 default "16" if NR_CPUS_DEFAULT_16
>> 2833 default "32" if NR_CPUS_DEFAULT_32
>> 2834 default "64" if NR_CPUS_DEFAULT_64
2495 help 2835 help
2496 Say Y here to enable options which !! 2836 This allows you to specify the maximum number of CPUs which this
2497 vulnerabilities (usually related to !! 2837 kernel will support. The maximum supported value is 32 for 32-bit
2498 Mitigations can be disabled or rest !! 2838 kernel and 64 for 64-bit kernels; the minimum value which makes
2499 via the "mitigations" kernel parame !! 2839 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2840 and 2 for all others.
>> 2841
>> 2842 This is purely to save memory - each supported CPU adds
>> 2843 approximately eight kilobytes to the kernel image. For best
>> 2844 performance should round up your number of processors to the next
>> 2845 power of two.
2500 2846
2501 If you say N, all mitigations will !! 2847 config MIPS_PERF_SHARED_TC_COUNTERS
2502 overridden at runtime. !! 2848 bool
2503 2849
2504 Say 'Y', unless you really know wha !! 2850 config MIPS_NR_CPU_NR_MAP_1024
>> 2851 bool
>> 2852
>> 2853 config MIPS_NR_CPU_NR_MAP
>> 2854 int
>> 2855 depends on SMP
>> 2856 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2857 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2505 2858
2506 if CPU_MITIGATIONS !! 2859 #
>> 2860 # Timer Interrupt Frequency Configuration
>> 2861 #
2507 2862
2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2863 choice
2509 bool "Remove the kernel mapping in us !! 2864 prompt "Timer frequency"
2510 default y !! 2865 default HZ_250
2511 depends on (X86_64 || X86_PAE) <<
2512 help 2866 help
2513 This feature reduces the number of !! 2867 Allows the configuration of the timer frequency.
2514 ensuring that the majority of kerne <<
2515 into userspace. <<
2516 2868
2517 See Documentation/arch/x86/pti.rst !! 2869 config HZ_24
>> 2870 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2518 2871
2519 config MITIGATION_RETPOLINE !! 2872 config HZ_48
2520 bool "Avoid speculative indirect bran !! 2873 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2521 select OBJTOOL if HAVE_OBJTOOL <<
2522 default y <<
2523 help <<
2524 Compile kernel with the retpoline c <<
2525 kernel-to-user data leaks by avoidi <<
2526 branches. Requires a compiler with <<
2527 support for full protection. The ke <<
2528 <<
2529 config MITIGATION_RETHUNK <<
2530 bool "Enable return-thunks" <<
2531 depends on MITIGATION_RETPOLINE && CC <<
2532 select OBJTOOL if HAVE_OBJTOOL <<
2533 default y if X86_64 <<
2534 help <<
2535 Compile the kernel with the return- <<
2536 against kernel-to-user data leaks b <<
2537 Requires a compiler with -mfunction <<
2538 support for full protection. The ke <<
2539 <<
2540 config MITIGATION_UNRET_ENTRY <<
2541 bool "Enable UNRET on kernel entry" <<
2542 depends on CPU_SUP_AMD && MITIGATION_ <<
2543 default y <<
2544 help <<
2545 Compile the kernel with support for <<
2546 2874
2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2875 config HZ_100
2548 bool "Mitigate RSB underflow with cal !! 2876 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2549 depends on CPU_SUP_INTEL && HAVE_CALL <<
2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB <<
2551 select CALL_THUNKS <<
2552 default y <<
2553 help <<
2554 Compile the kernel with call depth <<
2555 SKL Return-Speculation-Buffer (RSB) <<
2556 mitigation is off by default and ne <<
2557 kernel command line via the retblee <<
2558 non-affected systems the overhead o <<
2559 the call depth tracking is using ru <<
2560 in a compiler generated padding are <<
2561 increases text size by ~5%. For non <<
2562 is unused. On affected SKL systems <<
2563 performance gain over the IBRS miti <<
2564 <<
2565 config CALL_THUNKS_DEBUG <<
2566 bool "Enable call thunks and call dep <<
2567 depends on MITIGATION_CALL_DEPTH_TRAC <<
2568 select FUNCTION_ALIGNMENT_32B <<
2569 default n <<
2570 help <<
2571 Enable call/ret counters for imbala <<
2572 a noisy dmesg about callthunks gene <<
2573 trouble shooting. The debug prints <<
2574 kernel command line with 'debug-cal <<
2575 Only enable this when you are debug <<
2576 creates a noticeable runtime overhe <<
2577 <<
2578 config MITIGATION_IBPB_ENTRY <<
2579 bool "Enable IBPB on kernel entry" <<
2580 depends on CPU_SUP_AMD && X86_64 <<
2581 default y <<
2582 help <<
2583 Compile the kernel with support for <<
2584 2877
2585 config MITIGATION_IBRS_ENTRY !! 2878 config HZ_128
2586 bool "Enable IBRS on kernel entry" !! 2879 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2587 depends on CPU_SUP_INTEL && X86_64 <<
2588 default y <<
2589 help <<
2590 Compile the kernel with support for <<
2591 This mitigates both spectre_v2 and <<
2592 performance. <<
2593 2880
2594 config MITIGATION_SRSO !! 2881 config HZ_250
2595 bool "Mitigate speculative RAS overfl !! 2882 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2596 depends on CPU_SUP_AMD && X86_64 && M <<
2597 default y <<
2598 help <<
2599 Enable the SRSO mitigation needed o <<
2600 2883
2601 config MITIGATION_SLS !! 2884 config HZ_256
2602 bool "Mitigate Straight-Line-Speculat !! 2885 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2603 depends on CC_HAS_SLS && X86_64 <<
2604 select OBJTOOL if HAVE_OBJTOOL <<
2605 default n <<
2606 help <<
2607 Compile the kernel with straight-li <<
2608 against straight line speculation. <<
2609 larger. <<
2610 <<
2611 config MITIGATION_GDS <<
2612 bool "Mitigate Gather Data Sampling" <<
2613 depends on CPU_SUP_INTEL <<
2614 default y <<
2615 help <<
2616 Enable mitigation for Gather Data S <<
2617 vulnerability which allows unprivil <<
2618 which was previously stored in vect <<
2619 instructions to infer the stale vec <<
2620 <<
2621 config MITIGATION_RFDS <<
2622 bool "RFDS Mitigation" <<
2623 depends on CPU_SUP_INTEL <<
2624 default y <<
2625 help <<
2626 Enable mitigation for Register File <<
2627 RFDS is a hardware vulnerability wh <<
2628 allows unprivileged speculative acc <<
2629 stored in floating point, vector an <<
2630 See also <file:Documentation/admin- <<
2631 <<
2632 config MITIGATION_SPECTRE_BHI <<
2633 bool "Mitigate Spectre-BHB (Branch Hi <<
2634 depends on CPU_SUP_INTEL <<
2635 default y <<
2636 help <<
2637 Enable BHI mitigations. BHI attacks <<
2638 where the branch history buffer is <<
2639 indirect branches. <<
2640 See <file:Documentation/admin-guide <<
2641 <<
2642 config MITIGATION_MDS <<
2643 bool "Mitigate Microarchitectural Dat <<
2644 depends on CPU_SUP_INTEL <<
2645 default y <<
2646 help <<
2647 Enable mitigation for Microarchitec <<
2648 a hardware vulnerability which allo <<
2649 to data which is available in vario <<
2650 See also <file:Documentation/admin- <<
2651 <<
2652 config MITIGATION_TAA <<
2653 bool "Mitigate TSX Asynchronous Abort <<
2654 depends on CPU_SUP_INTEL <<
2655 default y <<
2656 help <<
2657 Enable mitigation for TSX Asynchron <<
2658 vulnerability that allows unprivile <<
2659 which is available in various CPU i <<
2660 asynchronous aborts within an Intel <<
2661 See also <file:Documentation/admin- <<
2662 <<
2663 config MITIGATION_MMIO_STALE_DATA <<
2664 bool "Mitigate MMIO Stale Data hardwa <<
2665 depends on CPU_SUP_INTEL <<
2666 default y <<
2667 help <<
2668 Enable mitigation for MMIO Stale Da <<
2669 Stale Data Vulnerabilities are a cl <<
2670 vulnerabilities that can expose dat <<
2671 attacker to have access to MMIO. <<
2672 See also <<
2673 <file:Documentation/admin-guide/hw- <<
2674 <<
2675 config MITIGATION_L1TF <<
2676 bool "Mitigate L1 Terminal Fault (L1T <<
2677 depends on CPU_SUP_INTEL <<
2678 default y <<
2679 help <<
2680 Mitigate L1 Terminal Fault (L1TF) h <<
2681 hardware vulnerability which allows <<
2682 available in the Level 1 Data Cache <<
2683 See <file:Documentation/admin-guide <<
2684 <<
2685 config MITIGATION_RETBLEED <<
2686 bool "Mitigate RETBleed hardware bug" <<
2687 depends on (CPU_SUP_INTEL && MITIGATI <<
2688 default y <<
2689 help <<
2690 Enable mitigation for RETBleed (Arb <<
2691 with Return Instructions) vulnerabi <<
2692 execution attack which takes advant <<
2693 in many modern microprocessors, sim <<
2694 unprivileged attacker can use these <<
2695 memory security restrictions to gai <<
2696 that would otherwise be inaccessibl <<
2697 2886
2698 config MITIGATION_SPECTRE_V1 !! 2887 config HZ_1000
2699 bool "Mitigate SPECTRE V1 hardware bu !! 2888 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2700 default y <<
2701 help <<
2702 Enable mitigation for Spectre V1 (B <<
2703 class of side channel attacks that <<
2704 execution that bypasses conditional <<
2705 memory access bounds check. <<
2706 See also <file:Documentation/admin- <<
2707 2889
2708 config MITIGATION_SPECTRE_V2 !! 2890 config HZ_1024
2709 bool "Mitigate SPECTRE V2 hardware bu !! 2891 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2710 default y <<
2711 help <<
2712 Enable mitigation for Spectre V2 (B <<
2713 V2 is a class of side channel attac <<
2714 indirect branch predictors inside t <<
2715 attacks, the attacker can steer spe <<
2716 victim to gadget code by poisoning <<
2717 used for predicting indirect branch <<
2718 See also <file:Documentation/admin- <<
2719 <<
2720 config MITIGATION_SRBDS <<
2721 bool "Mitigate Special Register Buffe <<
2722 depends on CPU_SUP_INTEL <<
2723 default y <<
2724 help <<
2725 Enable mitigation for Special Regis <<
2726 SRBDS is a hardware vulnerability t <<
2727 Sampling (MDS) techniques to infer <<
2728 register accesses. An unprivileged <<
2729 from RDRAND and RDSEED executed on <<
2730 using MDS techniques. <<
2731 See also <<
2732 <file:Documentation/admin-guide/hw- <<
2733 2892
2734 config MITIGATION_SSB !! 2893 endchoice
2735 bool "Mitigate Speculative Store Bypa <<
2736 default y <<
2737 help <<
2738 Enable mitigation for Speculative S <<
2739 hardware security vulnerability and <<
2740 of speculative execution in a simil <<
2741 security vulnerabilities. <<
2742 2894
2743 endif !! 2895 config SYS_SUPPORTS_24HZ
>> 2896 bool
2744 2897
2745 config ARCH_HAS_ADD_PAGES !! 2898 config SYS_SUPPORTS_48HZ
2746 def_bool y !! 2899 bool
2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
2748 2900
2749 menu "Power management and ACPI options" !! 2901 config SYS_SUPPORTS_100HZ
>> 2902 bool
2750 2903
2751 config ARCH_HIBERNATION_HEADER !! 2904 config SYS_SUPPORTS_128HZ
2752 def_bool y !! 2905 bool
2753 depends on HIBERNATION <<
2754 2906
2755 source "kernel/power/Kconfig" !! 2907 config SYS_SUPPORTS_250HZ
>> 2908 bool
2756 2909
2757 source "drivers/acpi/Kconfig" !! 2910 config SYS_SUPPORTS_256HZ
>> 2911 bool
2758 2912
2759 config X86_APM_BOOT !! 2913 config SYS_SUPPORTS_1000HZ
2760 def_bool y !! 2914 bool
2761 depends on APM <<
2762 2915
2763 menuconfig APM !! 2916 config SYS_SUPPORTS_1024HZ
2764 tristate "APM (Advanced Power Managem !! 2917 bool
2765 depends on X86_32 && PM_SLEEP <<
2766 help <<
2767 APM is a BIOS specification for sav <<
2768 techniques. This is mostly useful f <<
2769 APM compliant BIOSes. If you say Y <<
2770 reset after a RESUME operation, the <<
2771 battery status information, and use <<
2772 notification of APM "events" (e.g. <<
2773 <<
2774 If you select "Y" here, you can dis <<
2775 BIOS by passing the "apm=off" optio <<
2776 <<
2777 Note that the APM support is almost <<
2778 machines with more than one CPU. <<
2779 <<
2780 In order to use APM, you will need <<
2781 and more information, read <file:Do <<
2782 and the Battery Powered Linux mini- <<
2783 <http://www.tldp.org/docs.html#howt <<
2784 2918
2785 This driver does not spin down disk !! 2919 config SYS_SUPPORTS_ARBIT_HZ
2786 manpage ("man 8 hdparm") for that), !! 2920 bool
2787 VESA-compliant "green" monitors. !! 2921 default y if !SYS_SUPPORTS_24HZ && \
2788 !! 2922 !SYS_SUPPORTS_48HZ && \
2789 This driver does not support the TI !! 2923 !SYS_SUPPORTS_100HZ && \
2790 486/DX4/75 because they don't have !! 2924 !SYS_SUPPORTS_128HZ && \
2791 desktop machines also don't have co !! 2925 !SYS_SUPPORTS_250HZ && \
2792 may cause those machines to panic d !! 2926 !SYS_SUPPORTS_256HZ && \
2793 !! 2927 !SYS_SUPPORTS_1000HZ && \
2794 Generally, if you don't have a batt !! 2928 !SYS_SUPPORTS_1024HZ
2795 much point in using this driver and <<
2796 random kernel OOPSes or reboots tha <<
2797 anything, try disabling/enabling th <<
2798 APM in your BIOS). <<
2799 <<
2800 Some other things you should try wh <<
2801 "weird" problems: <<
2802 <<
2803 1) make sure that you have enough s <<
2804 enabled. <<
2805 2) pass the "idle=poll" option to t <<
2806 3) switch on floating point emulati <<
2807 the "no387" option to the kernel <<
2808 4) pass the "floppy=nodma" option t <<
2809 5) pass the "mem=4M" option to the <<
2810 all but the first 4 MB of RAM) <<
2811 6) make sure that the CPU is not ov <<
2812 7) read the sig11 FAQ at <http://ww <<
2813 8) disable the cache from your BIOS <<
2814 9) install a fan for the video card <<
2815 10) install a better fan for the CP <<
2816 11) exchange RAM chips <<
2817 12) exchange the motherboard. <<
2818 <<
2819 To compile this driver as a module, <<
2820 module will be called apm. <<
2821 <<
2822 if APM <<
2823 <<
2824 config APM_IGNORE_USER_SUSPEND <<
2825 bool "Ignore USER SUSPEND" <<
2826 help <<
2827 This option will ignore USER SUSPEN <<
2828 compliant APM BIOS, you want to say <<
2829 series notebooks, it is necessary t <<
2830 <<
2831 config APM_DO_ENABLE <<
2832 bool "Enable PM at boot time" <<
2833 help <<
2834 Enable APM features at boot time. F <<
2835 specification: "When disabled, the <<
2836 power manage devices, enter the Sta <<
2837 State, or take power saving steps i <<
2838 This driver will make CPU Idle call <<
2839 feature is turned off -- see "Do CP <<
2840 should always save battery power, b <<
2841 will be dependent on your BIOS impl <<
2842 this option off if your computer ha <<
2843 support, or if it beeps continuousl <<
2844 this off if you have a NEC UltraLit <<
2845 T400CDT. This is off by default sin <<
2846 this feature. <<
2847 <<
2848 config APM_CPU_IDLE <<
2849 depends on CPU_IDLE <<
2850 bool "Make CPU Idle calls when idle" <<
2851 help <<
2852 Enable calls to APM CPU Idle/CPU Bu <<
2853 On some machines, this can activate <<
2854 a slowed CPU clock rate, when the m <<
2855 are made after the idle loop has ru <<
2856 333 mS). On some machines, this wil <<
2857 whenever the CPU becomes idle. (On <<
2858 this option does nothing.) <<
2859 <<
2860 config APM_DISPLAY_BLANK <<
2861 bool "Enable console blanking using A <<
2862 help <<
2863 Enable console blanking using the A <<
2864 turn off the LCD backlight when the <<
2865 virtual console blanks the screen. <<
2866 the virtual console screen blanker, <<
2867 when using the X Window system. Thi <<
2868 do with your VESA-compliant power-s <<
2869 option doesn't work for all laptops <<
2870 backlight at all, or it might print <<
2871 especially if you are using gpm. <<
2872 <<
2873 config APM_ALLOW_INTS <<
2874 bool "Allow interrupts during APM BIO <<
2875 help <<
2876 Normally we disable external interr <<
2877 the APM BIOS as a measure to lessen <<
2878 BIOS implementation. The BIOS shou <<
2879 needs to. Unfortunately, some BIOS <<
2880 many of the newer IBM Thinkpads. I <<
2881 suspend, try setting this to Y. Ot <<
2882 2929
2883 endif # APM !! 2930 config HZ
>> 2931 int
>> 2932 default 24 if HZ_24
>> 2933 default 48 if HZ_48
>> 2934 default 100 if HZ_100
>> 2935 default 128 if HZ_128
>> 2936 default 250 if HZ_250
>> 2937 default 256 if HZ_256
>> 2938 default 1000 if HZ_1000
>> 2939 default 1024 if HZ_1024
>> 2940
>> 2941 config SCHED_HRTICK
>> 2942 def_bool HIGH_RES_TIMERS
>> 2943
>> 2944 config KEXEC
>> 2945 bool "Kexec system call"
>> 2946 select KEXEC_CORE
>> 2947 help
>> 2948 kexec is a system call that implements the ability to shutdown your
>> 2949 current kernel, and to start another kernel. It is like a reboot
>> 2950 but it is independent of the system firmware. And like a reboot
>> 2951 you can start any kernel with it, not just Linux.
>> 2952
>> 2953 The name comes from the similarity to the exec system call.
>> 2954
>> 2955 It is an ongoing process to be certain the hardware in a machine
>> 2956 is properly shutdown, so do not be surprised if this code does not
>> 2957 initially work for you. As of this writing the exact hardware
>> 2958 interface is strongly in flux, so no good recommendation can be
>> 2959 made.
>> 2960
>> 2961 config CRASH_DUMP
>> 2962 bool "Kernel crash dumps"
>> 2963 help
>> 2964 Generate crash dump after being started by kexec.
>> 2965 This should be normally only set in special crash dump kernels
>> 2966 which are loaded in the main kernel with kexec-tools into
>> 2967 a specially reserved region and then later executed after
>> 2968 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2969 to a memory address not used by the main kernel or firmware using
>> 2970 PHYSICAL_START.
2884 2971
2885 source "drivers/cpufreq/Kconfig" !! 2972 config PHYSICAL_START
>> 2973 hex "Physical address where the kernel is loaded"
>> 2974 default "0xffffffff84000000"
>> 2975 depends on CRASH_DUMP
>> 2976 help
>> 2977 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2978 If you plan to use kernel for capturing the crash dump change
>> 2979 this value to start of the reserved region (the "X" value as
>> 2980 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2981 passed to the panic-ed kernel).
>> 2982
>> 2983 config SECCOMP
>> 2984 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2985 depends on PROC_FS
>> 2986 default y
>> 2987 help
>> 2988 This kernel feature is useful for number crunching applications
>> 2989 that may need to compute untrusted bytecode during their
>> 2990 execution. By using pipes or other transports made available to
>> 2991 the process as file descriptors supporting the read/write
>> 2992 syscalls, it's possible to isolate those applications in
>> 2993 their own address space using seccomp. Once seccomp is
>> 2994 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2995 and the task is only allowed to execute a few safe syscalls
>> 2996 defined by each seccomp mode.
>> 2997
>> 2998 If unsure, say Y. Only embedded should say N here.
>> 2999
>> 3000 config MIPS_O32_FP64_SUPPORT
>> 3001 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 3002 depends on 32BIT || MIPS32_O32
>> 3003 help
>> 3004 When this is enabled, the kernel will support use of 64-bit floating
>> 3005 point registers with binaries using the O32 ABI along with the
>> 3006 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 3007 32-bit MIPS systems this support is at the cost of increasing the
>> 3008 size and complexity of the compiled FPU emulator. Thus if you are
>> 3009 running a MIPS32 system and know that none of your userland binaries
>> 3010 will require 64-bit floating point, you may wish to reduce the size
>> 3011 of your kernel & potentially improve FP emulation performance by
>> 3012 saying N here.
>> 3013
>> 3014 Although binutils currently supports use of this flag the details
>> 3015 concerning its effect upon the O32 ABI in userland are still being
>> 3016 worked on. In order to avoid userland becoming dependant upon current
>> 3017 behaviour before the details have been finalised, this option should
>> 3018 be considered experimental and only enabled by those working upon
>> 3019 said details.
2886 3020
2887 source "drivers/cpuidle/Kconfig" !! 3021 If unsure, say N.
2888 3022
2889 source "drivers/idle/Kconfig" !! 3023 config USE_OF
>> 3024 bool
>> 3025 select OF
>> 3026 select OF_EARLY_FLATTREE
>> 3027 select IRQ_DOMAIN
2890 3028
2891 endmenu !! 3029 config UHI_BOOT
>> 3030 bool
2892 3031
2893 menu "Bus options (PCI etc.)" !! 3032 config BUILTIN_DTB
>> 3033 bool
2894 3034
2895 choice 3035 choice
2896 prompt "PCI access mode" !! 3036 prompt "Kernel appended dtb support" if USE_OF
2897 depends on X86_32 && PCI !! 3037 default MIPS_NO_APPENDED_DTB
2898 default PCI_GOANY !! 3038
2899 help !! 3039 config MIPS_NO_APPENDED_DTB
2900 On PCI systems, the BIOS can be use !! 3040 bool "None"
2901 determine their configuration. Howe !! 3041 help
2902 have BIOS bugs and may crash if thi !! 3042 Do not enable appended dtb support.
2903 PCI-based systems don't have any BI <<
2904 detect the PCI hardware directly wi <<
2905 <<
2906 With this option, you can specify h <<
2907 PCI devices. If you choose "BIOS", <<
2908 if you choose "Direct", the BIOS wo <<
2909 choose "MMConfig", then PCI Express <<
2910 If you choose "Any", the kernel wil <<
2911 direct access method and falls back <<
2912 work. If unsure, go with the defaul <<
2913 <<
2914 config PCI_GOBIOS <<
2915 bool "BIOS" <<
2916 <<
2917 config PCI_GOMMCONFIG <<
2918 bool "MMConfig" <<
2919 <<
2920 config PCI_GODIRECT <<
2921 bool "Direct" <<
2922 <<
2923 config PCI_GOOLPC <<
2924 bool "OLPC XO-1" <<
2925 depends on OLPC <<
2926 3043
2927 config PCI_GOANY !! 3044 config MIPS_ELF_APPENDED_DTB
2928 bool "Any" !! 3045 bool "vmlinux"
>> 3046 help
>> 3047 With this option, the boot code will look for a device tree binary
>> 3048 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3049 it is empty and the DTB can be appended using binutils command
>> 3050 objcopy:
>> 3051
>> 3052 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3053
>> 3054 This is meant as a backward compatiblity convenience for those
>> 3055 systems with a bootloader that can't be upgraded to accommodate
>> 3056 the documented boot protocol using a device tree.
2929 3057
>> 3058 config MIPS_RAW_APPENDED_DTB
>> 3059 bool "vmlinux.bin or vmlinuz.bin"
>> 3060 help
>> 3061 With this option, the boot code will look for a device tree binary
>> 3062 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3063 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3064
>> 3065 This is meant as a backward compatibility convenience for those
>> 3066 systems with a bootloader that can't be upgraded to accommodate
>> 3067 the documented boot protocol using a device tree.
>> 3068
>> 3069 Beware that there is very little in terms of protection against
>> 3070 this option being confused by leftover garbage in memory that might
>> 3071 look like a DTB header after a reboot if no actual DTB is appended
>> 3072 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3073 if you don't intend to always append a DTB.
2930 endchoice 3074 endchoice
2931 3075
2932 config PCI_BIOS !! 3076 choice
2933 def_bool y !! 3077 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2934 depends on X86_32 && PCI && (PCI_GOBI !! 3078 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3079 !MIPS_MALTA && \
>> 3080 !CAVIUM_OCTEON_SOC
>> 3081 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3082
>> 3083 config MIPS_CMDLINE_FROM_DTB
>> 3084 depends on USE_OF
>> 3085 bool "Dtb kernel arguments if available"
>> 3086
>> 3087 config MIPS_CMDLINE_DTB_EXTEND
>> 3088 depends on USE_OF
>> 3089 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3090
>> 3091 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3092 bool "Bootloader kernel arguments if available"
>> 3093
>> 3094 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3095 depends on CMDLINE_BOOL
>> 3096 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3097 endchoice
2935 3098
2936 # x86-64 doesn't support PCI BIOS access from !! 3099 endmenu
2937 config PCI_DIRECT <<
2938 def_bool y <<
2939 depends on PCI && (X86_64 || (PCI_GOD <<
2940 3100
2941 config PCI_MMCONFIG !! 3101 config LOCKDEP_SUPPORT
2942 bool "Support mmconfig PCI config spa !! 3102 bool
2943 default y 3103 default y
2944 depends on PCI && (ACPI || JAILHOUSE_ <<
2945 depends on X86_64 || (PCI_GOANY || PC <<
2946 3104
2947 config PCI_OLPC !! 3105 config STACKTRACE_SUPPORT
2948 def_bool y !! 3106 bool
2949 depends on PCI && OLPC && (PCI_GOOLPC !! 3107 default y
2950 3108
2951 config PCI_XEN !! 3109 config PGTABLE_LEVELS
2952 def_bool y !! 3110 int
2953 depends on PCI && XEN !! 3111 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3112 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3113 default 2
2954 3114
2955 config MMCONF_FAM10H !! 3115 config MIPS_AUTO_PFN_OFFSET
2956 def_bool y !! 3116 bool
2957 depends on X86_64 && PCI_MMCONFIG && <<
2958 3117
2959 config PCI_CNB20LE_QUIRK !! 3118 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2960 bool "Read CNB20LE Host Bridge Window <<
2961 depends on PCI <<
2962 help <<
2963 Read the PCI windows out of the CNB <<
2964 PCI hotplug to work on systems with <<
2965 not have ACPI. <<
2966 3119
2967 There's no public spec for this chi !! 3120 config PCI_DRIVERS_GENERIC
2968 is known to be incomplete. !! 3121 select PCI_DOMAINS_GENERIC if PCI
>> 3122 bool
2969 3123
2970 You should say N unless you know yo !! 3124 config PCI_DRIVERS_LEGACY
>> 3125 def_bool !PCI_DRIVERS_GENERIC
>> 3126 select NO_GENERIC_PCI_IOPORT_MAP
>> 3127 select PCI_DOMAINS if PCI
2971 3128
2972 config ISA_BUS !! 3129 #
2973 bool "ISA bus support on modern syste !! 3130 # ISA support is now enabled via select. Too many systems still have the one
2974 help !! 3131 # or other ISA chip on the board that users don't know about so don't expect
2975 Expose ISA bus device drivers and o !! 3132 # users to choose the right thing ...
2976 configuration. Enable this option i !! 3133 #
2977 bus. ISA is an older system, displa !! 3134 config ISA
2978 architectures -- if your target mac !! 3135 bool
2979 not have an ISA bus. <<
2980 3136
2981 If unsure, say N. !! 3137 config TC
>> 3138 bool "TURBOchannel support"
>> 3139 depends on MACH_DECSTATION
>> 3140 help
>> 3141 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3142 processors. TURBOchannel programming specifications are available
>> 3143 at:
>> 3144 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3145 and:
>> 3146 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3147 Linux driver support status is documented at:
>> 3148 <http://www.linux-mips.org/wiki/DECstation>
2982 3149
2983 # x86_64 have no ISA slots, but can have ISA- !! 3150 config MMU
2984 config ISA_DMA_API !! 3151 bool
2985 bool "ISA-style DMA support" if (X86_ <<
2986 default y 3152 default y
2987 help <<
2988 Enables ISA-style DMA support for d <<
2989 If unsure, say Y. <<
2990 <<
2991 if X86_32 <<
2992 3153
2993 config ISA !! 3154 config ARCH_MMAP_RND_BITS_MIN
2994 bool "ISA support" !! 3155 default 12 if 64BIT
2995 help !! 3156 default 8
2996 Find out whether you have ISA slots <<
2997 name of a bus system, i.e. the way <<
2998 inside your box. Other bus systems <<
2999 (MCA) or VESA. ISA is an older sys <<
3000 newer boards don't support it. If <<
3001 <<
3002 config SCx200 <<
3003 tristate "NatSemi SCx200 support" <<
3004 help <<
3005 This provides basic support for Nat <<
3006 (now AMD's) Geode processors. The <<
3007 PCI-IDs of several on-chip devices, <<
3008 for other scx200_* drivers. <<
3009 <<
3010 If compiled as a module, the driver <<
3011 <<
3012 config SCx200HR_TIMER <<
3013 tristate "NatSemi SCx200 27MHz High-R <<
3014 depends on SCx200 <<
3015 default y <<
3016 help <<
3017 This driver provides a clocksource <<
3018 27MHz high-resolution timer. Its a <<
3019 NSC Geode SC-1100's buggy TSC, whic <<
3020 processor goes idle (as is done by <<
3021 other workaround is idle=poll boot <<
3022 <<
3023 config OLPC <<
3024 bool "One Laptop Per Child support" <<
3025 depends on !X86_PAE <<
3026 select GPIOLIB <<
3027 select OF <<
3028 select OF_PROMTREE <<
3029 select IRQ_DOMAIN <<
3030 select OLPC_EC <<
3031 help <<
3032 Add support for detecting the uniqu <<
3033 XO hardware. <<
3034 3157
3035 config OLPC_XO1_PM !! 3158 config ARCH_MMAP_RND_BITS_MAX
3036 bool "OLPC XO-1 Power Management" !! 3159 default 18 if 64BIT
3037 depends on OLPC && MFD_CS5535=y && PM !! 3160 default 15
3038 help <<
3039 Add support for poweroff and suspen <<
3040 3161
3041 config OLPC_XO1_RTC !! 3162 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3042 bool "OLPC XO-1 Real Time Clock" !! 3163 default 8
3043 depends on OLPC_XO1_PM && RTC_DRV_CMO <<
3044 help <<
3045 Add support for the XO-1 real time <<
3046 programmable wakeup source. <<
3047 3164
3048 config OLPC_XO1_SCI !! 3165 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3049 bool "OLPC XO-1 SCI extras" !! 3166 default 15
3050 depends on OLPC && OLPC_XO1_PM && GPI <<
3051 depends on INPUT=y <<
3052 select POWER_SUPPLY <<
3053 help <<
3054 Add support for SCI-based features <<
3055 - EC-driven system wakeups <<
3056 - Power button <<
3057 - Ebook switch <<
3058 - Lid switch <<
3059 - AC adapter status updates <<
3060 - Battery status updates <<
3061 3167
3062 config OLPC_XO15_SCI !! 3168 config I8253
3063 bool "OLPC XO-1.5 SCI extras" !! 3169 bool
3064 depends on OLPC && ACPI !! 3170 select CLKSRC_I8253
3065 select POWER_SUPPLY !! 3171 select CLKEVT_I8253
3066 help !! 3172 select MIPS_EXTERNAL_TIMER
3067 Add support for SCI-based features <<
3068 - EC-driven system wakeups <<
3069 - AC adapter status updates <<
3070 - Battery status updates <<
3071 3173
3072 config GEODE_COMMON !! 3174 config ZONE_DMA
3073 bool 3175 bool
3074 3176
3075 config ALIX !! 3177 config ZONE_DMA32
3076 bool "PCEngines ALIX System Support ( !! 3178 bool
3077 select GPIOLIB <<
3078 select GEODE_COMMON <<
3079 help <<
3080 This option enables system support <<
3081 At present this just sets up LEDs f <<
3082 ALIX2/3/6 boards. However, other s <<
3083 get added here. <<
3084 3179
3085 Note: You must still enable the dri !! 3180 endmenu
3086 (GPIO_CS5535 & LEDS_GPIO) to actual <<
3087 3181
3088 Note: You have to set alix.force=1 !! 3182 config TRAD_SIGNALS
>> 3183 bool
3089 3184
3090 config NET5501 !! 3185 config MIPS32_COMPAT
3091 bool "Soekris Engineering net5501 Sys !! 3186 bool
3092 select GPIOLIB <<
3093 select GEODE_COMMON <<
3094 help <<
3095 This option enables system support <<
3096 3187
3097 config GEOS !! 3188 config COMPAT
3098 bool "Traverse Technologies GEOS Syst !! 3189 bool
3099 select GPIOLIB <<
3100 select GEODE_COMMON <<
3101 depends on DMI <<
3102 help <<
3103 This option enables system support <<
3104 3190
3105 config TS5500 !! 3191 config SYSVIPC_COMPAT
3106 bool "Technologic Systems TS-5500 pla !! 3192 bool
3107 depends on MELAN <<
3108 select CHECK_SIGNATURE <<
3109 select NEW_LEDS <<
3110 select LEDS_CLASS <<
3111 help <<
3112 This option enables system support <<
3113 3193
3114 endif # X86_32 !! 3194 config MIPS32_O32
>> 3195 bool "Kernel support for o32 binaries"
>> 3196 depends on 64BIT
>> 3197 select ARCH_WANT_OLD_COMPAT_IPC
>> 3198 select COMPAT
>> 3199 select MIPS32_COMPAT
>> 3200 select SYSVIPC_COMPAT if SYSVIPC
>> 3201 help
>> 3202 Select this option if you want to run o32 binaries. These are pure
>> 3203 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3204 existing binaries are in this format.
3115 3205
3116 config AMD_NB !! 3206 If unsure, say Y.
3117 def_bool y <<
3118 depends on CPU_SUP_AMD && PCI <<
3119 3207
3120 endmenu !! 3208 config MIPS32_N32
>> 3209 bool "Kernel support for n32 binaries"
>> 3210 depends on 64BIT
>> 3211 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3212 select COMPAT
>> 3213 select MIPS32_COMPAT
>> 3214 select SYSVIPC_COMPAT if SYSVIPC
>> 3215 help
>> 3216 Select this option if you want to run n32 binaries. These are
>> 3217 64-bit binaries using 32-bit quantities for addressing and certain
>> 3218 data that would normally be 64-bit. They are used in special
>> 3219 cases.
3121 3220
3122 menu "Binary Emulations" !! 3221 If unsure, say N.
3123 3222
3124 config IA32_EMULATION !! 3223 config BINFMT_ELF32
3125 bool "IA32 Emulation" !! 3224 bool
3126 depends on X86_64 !! 3225 default y if MIPS32_O32 || MIPS32_N32
3127 select ARCH_WANT_OLD_COMPAT_IPC !! 3226 select ELFCORE
3128 select BINFMT_ELF <<
3129 select COMPAT_OLD_SIGACTION <<
3130 help <<
3131 Include code to run legacy 32-bit p <<
3132 64-bit kernel. You should likely tu <<
3133 100% sure that you don't have any 3 <<
3134 3227
3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3228 menu "Power management options"
3136 bool "IA32 emulation disabled by defa <<
3137 default n <<
3138 depends on IA32_EMULATION <<
3139 help <<
3140 Make IA32 emulation disabled by def <<
3141 processes and access to 32-bit sysc <<
3142 default value. <<
3143 <<
3144 config X86_X32_ABI <<
3145 bool "x32 ABI for 64-bit mode" <<
3146 depends on X86_64 <<
3147 # llvm-objcopy does not convert x86_6 <<
3148 # compressed debug sections to x86_x3 <<
3149 # https://github.com/ClangBuiltLinux/ <<
3150 # https://github.com/ClangBuiltLinux/ <<
3151 depends on $(success,$(OBJCOPY) --ver <<
3152 help <<
3153 Include code to run binaries for th <<
3154 for 64-bit processors. An x32 proc <<
3155 full 64-bit register file and wide <<
3156 pointers at 32 bits for smaller mem <<
3157 3229
3158 config COMPAT_32 !! 3230 config ARCH_HIBERNATION_POSSIBLE
3159 def_bool y 3231 def_bool y
3160 depends on IA32_EMULATION || X86_32 !! 3232 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3161 select HAVE_UID16 <<
3162 select OLD_SIGSUSPEND3 <<
3163 3233
3164 config COMPAT !! 3234 config ARCH_SUSPEND_POSSIBLE
3165 def_bool y 3235 def_bool y
3166 depends on IA32_EMULATION || X86_X32_ !! 3236 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3167 3237
3168 config COMPAT_FOR_U64_ALIGNMENT !! 3238 source "kernel/power/Kconfig"
3169 def_bool y <<
3170 depends on COMPAT <<
3171 3239
3172 endmenu 3240 endmenu
3173 3241
3174 config HAVE_ATOMIC_IOMAP !! 3242 config MIPS_EXTERNAL_TIMER
3175 def_bool y !! 3243 bool
3176 depends on X86_32 !! 3244
>> 3245 menu "CPU Power Management"
>> 3246
>> 3247 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3248 source "drivers/cpufreq/Kconfig"
>> 3249 endif
>> 3250
>> 3251 source "drivers/cpuidle/Kconfig"
>> 3252
>> 3253 endmenu
3177 3254
3178 source "arch/x86/kvm/Kconfig" !! 3255 source "drivers/firmware/Kconfig"
3179 3256
3180 source "arch/x86/Kconfig.assembler" !! 3257 source "arch/mips/kvm/Kconfig"
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