1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 # Select 32 or 64 bit !! 2 config MIPS
3 config 64BIT !! 3 bool
4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 default y
5 default "$(ARCH)" != "i386" !! 5 select ARCH_32BIT_OFF_T if !64BIT
6 help !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 Say yes to build a 64-bit kernel - f <<
8 Say no to build a 32-bit kernel - fo <<
9 <<
10 config X86_32 <<
11 def_bool y <<
12 depends on !64BIT <<
13 # Options that are inherently 32-bit k <<
14 select ARCH_WANT_IPC_PARSE_VERSION <<
15 select CLKSRC_I8253 <<
16 select CLONE_BACKWARDS <<
17 select GENERIC_VDSO_32 <<
18 select HAVE_DEBUG_STACKOVERFLOW <<
19 select KMAP_LOCAL <<
20 select MODULES_USE_ELF_REL <<
21 select OLD_SIGACTION <<
22 select ARCH_SPLIT_ARG64 <<
23 <<
24 config X86_64 <<
25 def_bool y <<
26 depends on 64BIT <<
27 # Options that are inherently 64-bit k <<
28 select ARCH_HAS_GIGANTIC_PAGE <<
29 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
30 select ARCH_SUPPORTS_PER_VMA_LOCK <<
31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR <<
32 select HAVE_ARCH_SOFT_DIRTY <<
33 select MODULES_USE_ELF_RELA <<
34 select NEED_DMA_MAP_STATE <<
35 select SWIOTLB <<
36 select ARCH_HAS_ELFCORE_COMPAT <<
37 select ZONE_DMA32 <<
38 select EXECMEM if DYNAMIC_FTRACE <<
39 <<
40 config FORCE_DYNAMIC_FTRACE <<
41 def_bool y <<
42 depends on X86_32 <<
43 depends on FUNCTION_TRACER <<
44 select DYNAMIC_FTRACE <<
45 help <<
46 We keep the static function tracing <<
47 in order to test the non static func <<
48 generic code, as other architectures <<
49 only need to keep it around for x86_ <<
50 for x86_32. For x86_32, force DYNAMI <<
51 # <<
52 # Arch settings <<
53 # <<
54 # ( Note that options that are marked 'if X86_ <<
55 # ported to 32-bit as well. ) <<
56 # <<
57 config X86 <<
58 def_bool y <<
59 # <<
60 # Note: keep this list sorted alphabet <<
61 # <<
62 select ACPI_LEGACY_TABLES_LOOKUP <<
63 select ACPI_SYSTEM_POWER_STATES_SUPPOR <<
64 select ACPI_HOTPLUG_CPU <<
65 select ARCH_32BIT_OFF_T <<
66 select ARCH_CLOCKSOURCE_INIT <<
67 select ARCH_CONFIGURES_CPU_MITIGATIONS <<
68 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
69 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
70 select ARCH_ENABLE_MEMORY_HOTPLUG if X <<
71 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
73 select ARCH_ENABLE_THP_MIGRATION if X8 <<
74 select ARCH_HAS_ACPI_TABLE_UPGRADE <<
75 select ARCH_HAS_CACHE_LINE_SIZE <<
76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M <<
77 select ARCH_HAS_CPU_FINALIZE_INIT <<
78 select ARCH_HAS_CPU_PASID <<
79 select ARCH_HAS_CURRENT_STACK_POINTER <<
80 select ARCH_HAS_DEBUG_VIRTUAL <<
81 select ARCH_HAS_DEBUG_VM_PGTABLE <<
82 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
83 select ARCH_HAS_DMA_OPS <<
84 select ARCH_HAS_EARLY_DEBUG <<
85 select ARCH_HAS_ELF_RANDOMIZE <<
86 select ARCH_HAS_FAST_MULTIPLIER <<
87 select ARCH_HAS_FORTIFY_SOURCE 7 select ARCH_HAS_FORTIFY_SOURCE
88 select ARCH_HAS_GCOV_PROFILE_ALL !! 8 select ARCH_HAS_KCOV
89 select ARCH_HAS_KCOV !! 9 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
90 select ARCH_HAS_KERNEL_FPU_SUPPORT !! 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
91 select ARCH_HAS_MEM_ENCRYPT !! 11 select ARCH_HAS_UBSAN_SANITIZE_ALL
92 select ARCH_HAS_MEMBARRIER_SYNC_CORE !! 12 select ARCH_SUPPORTS_UPROBES
93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS <<
94 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
95 select ARCH_HAS_PMEM_API <<
96 select ARCH_HAS_PTE_DEVMAP <<
97 select ARCH_HAS_PTE_SPECIAL <<
98 select ARCH_HAS_HW_PTE_YOUNG <<
99 select ARCH_HAS_NONLEAF_PMD_YOUNG <<
100 select ARCH_HAS_UACCESS_FLUSHCACHE <<
101 select ARCH_HAS_COPY_MC <<
102 select ARCH_HAS_SET_MEMORY <<
103 select ARCH_HAS_SET_DIRECT_MAP <<
104 select ARCH_HAS_STRICT_KERNEL_RWX <<
105 select ARCH_HAS_STRICT_MODULE_RWX <<
106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
107 select ARCH_HAS_SYSCALL_WRAPPER <<
108 select ARCH_HAS_UBSAN <<
109 select ARCH_HAS_DEBUG_WX <<
110 select ARCH_HAS_ZONE_DMA_SET if EXPERT <<
111 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
112 select ARCH_HAVE_EXTRA_ELF_NOTES <<
113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
114 select ARCH_MIGHT_HAVE_ACPI_PDC <<
115 select ARCH_MIGHT_HAVE_PC_PARPORT <<
116 select ARCH_MIGHT_HAVE_PC_SERIO <<
117 select ARCH_STACKWALK <<
118 select ARCH_SUPPORTS_ACPI <<
119 select ARCH_SUPPORTS_ATOMIC_RMW <<
120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
122 select ARCH_SUPPORTS_NUMA_BALANCING <<
123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ <<
124 select ARCH_SUPPORTS_CFI_CLANG <<
125 select ARCH_USES_CFI_TRAPS <<
126 select ARCH_SUPPORTS_LTO_CLANG <<
127 select ARCH_SUPPORTS_LTO_CLANG_THIN <<
128 select ARCH_SUPPORTS_RT <<
129 select ARCH_USE_BUILTIN_BSWAP 13 select ARCH_USE_BUILTIN_BSWAP
130 select ARCH_USE_CMPXCHG_LOCKREF !! 14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
131 select ARCH_USE_MEMTEST <<
132 select ARCH_USE_QUEUED_RWLOCKS 15 select ARCH_USE_QUEUED_RWLOCKS
133 select ARCH_USE_QUEUED_SPINLOCKS 16 select ARCH_USE_QUEUED_SPINLOCKS
134 select ARCH_USE_SYM_ANNOTATIONS !! 17 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 18 select ARCH_WANT_IPC_PARSE_VERSION
136 select ARCH_WANT_DEFAULT_BPF_JIT <<
137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT <<
138 select ARCH_WANTS_NO_INSTR <<
139 select ARCH_WANT_GENERAL_HUGETLB <<
140 select ARCH_WANT_HUGE_PMD_SHARE <<
141 select ARCH_WANT_LD_ORPHAN_WARN <<
142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
144 select ARCH_WANTS_THP_SWAP <<
145 select ARCH_HAS_PARANOID_L1D_FLUSH <<
146 select BUILDTIME_TABLE_SORT 19 select BUILDTIME_TABLE_SORT
147 select CLKEVT_I8253 !! 20 select CLONE_BACKWARDS
148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE !! 21 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
149 select CLOCKSOURCE_WATCHDOG !! 22 select CPU_PM if CPU_IDLE
150 # Word-size accesses may read uninitia !! 23 select GENERIC_ATOMIC64 if !64BIT
151 # in strings and cause false KMSAN rep !! 24 select GENERIC_CLOCKEVENTS
152 select DCACHE_WORD_ACCESS <<
153 select DYNAMIC_SIGFRAME <<
154 select EDAC_ATOMIC_SCRUB <<
155 select EDAC_SUPPORT <<
156 select GENERIC_CLOCKEVENTS_BROADCAST <<
157 select GENERIC_CLOCKEVENTS_BROADCAST_I <<
158 select GENERIC_CLOCKEVENTS_MIN_ADJUST <<
159 select GENERIC_CMOS_UPDATE 25 select GENERIC_CMOS_UPDATE
160 select GENERIC_CPU_AUTOPROBE 26 select GENERIC_CPU_AUTOPROBE
161 select GENERIC_CPU_DEVICES !! 27 select GENERIC_GETTIMEOFDAY
162 select GENERIC_CPU_VULNERABILITIES <<
163 select GENERIC_EARLY_IOREMAP <<
164 select GENERIC_ENTRY <<
165 select GENERIC_IOMAP 28 select GENERIC_IOMAP
166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK <<
167 select GENERIC_IRQ_MATRIX_ALLOCATOR <<
168 select GENERIC_IRQ_MIGRATION <<
169 select GENERIC_IRQ_PROBE 29 select GENERIC_IRQ_PROBE
170 select GENERIC_IRQ_RESERVATION_MODE <<
171 select GENERIC_IRQ_SHOW 30 select GENERIC_IRQ_SHOW
172 select GENERIC_PENDING_IRQ !! 31 select GENERIC_ISA_DMA if EISA
173 select GENERIC_PTDUMP !! 32 select GENERIC_LIB_ASHLDI3
>> 33 select GENERIC_LIB_ASHRDI3
>> 34 select GENERIC_LIB_CMPDI2
>> 35 select GENERIC_LIB_LSHRDI3
>> 36 select GENERIC_LIB_UCMPDI2
>> 37 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
174 select GENERIC_SMP_IDLE_THREAD 38 select GENERIC_SMP_IDLE_THREAD
175 select GENERIC_TIME_VSYSCALL 39 select GENERIC_TIME_VSYSCALL
176 select GENERIC_GETTIMEOFDAY !! 40 select GUP_GET_PTE_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
177 select GENERIC_VDSO_TIME_NS !! 41 select HANDLE_DOMAIN_IRQ
178 select GENERIC_VDSO_OVERFLOW_PROTECT !! 42 select HAVE_ARCH_COMPILER_H
179 select GUP_GET_PXX_LOW_HIGH <<
180 select HARDIRQS_SW_RESEND <<
181 select HARDLOCKUP_CHECK_TIMESTAMP <<
182 select HAS_IOPORT <<
183 select HAVE_ACPI_APEI <<
184 select HAVE_ACPI_APEI_NMI <<
185 select HAVE_ALIGNED_STRUCT_PAGE <<
186 select HAVE_ARCH_AUDITSYSCALL <<
187 select HAVE_ARCH_HUGE_VMAP <<
188 select HAVE_ARCH_HUGE_VMALLOC <<
189 select HAVE_ARCH_JUMP_LABEL 43 select HAVE_ARCH_JUMP_LABEL
190 select HAVE_ARCH_JUMP_LABEL_RELATIVE <<
191 select HAVE_ARCH_KASAN <<
192 select HAVE_ARCH_KASAN_VMALLOC <<
193 select HAVE_ARCH_KFENCE <<
194 select HAVE_ARCH_KMSAN <<
195 select HAVE_ARCH_KGDB 44 select HAVE_ARCH_KGDB
196 select HAVE_ARCH_MMAP_RND_BITS !! 45 select HAVE_ARCH_MMAP_RND_BITS if MMU
197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS !! 46 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
198 select HAVE_ARCH_COMPAT_MMAP_BASES <<
199 select HAVE_ARCH_PREL32_RELOCATIONS <<
200 select HAVE_ARCH_SECCOMP_FILTER 47 select HAVE_ARCH_SECCOMP_FILTER
201 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
202 select HAVE_ARCH_STACKLEAK <<
203 select HAVE_ARCH_TRACEHOOK 48 select HAVE_ARCH_TRACEHOOK
204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 49 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ <<
206 select HAVE_ARCH_USERFAULTFD_WP <<
207 select HAVE_ARCH_USERFAULTFD_MINOR <<
208 select HAVE_ARCH_VMAP_STACK <<
209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
210 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
211 select HAVE_ASM_MODVERSIONS 50 select HAVE_ASM_MODVERSIONS
212 select HAVE_CMPXCHG_DOUBLE !! 51 select HAVE_CBPF_JIT if !64BIT && !CPU_MICROMIPS
213 select HAVE_CMPXCHG_LOCAL !! 52 select HAVE_CONTEXT_TRACKING
214 select HAVE_CONTEXT_TRACKING_USER !! 53 select HAVE_TIF_NOHZ
215 select HAVE_CONTEXT_TRACKING_USER_OFFS <<
216 select HAVE_C_RECORDMCOUNT 54 select HAVE_C_RECORDMCOUNT
217 select HAVE_OBJTOOL_MCOUNT <<
218 select HAVE_OBJTOOL_NOP_MCOUNT <<
219 select HAVE_BUILDTIME_MCOUNT_SORT <<
220 select HAVE_DEBUG_KMEMLEAK 55 select HAVE_DEBUG_KMEMLEAK
>> 56 select HAVE_DEBUG_STACKOVERFLOW
221 select HAVE_DMA_CONTIGUOUS 57 select HAVE_DMA_CONTIGUOUS
222 select HAVE_DYNAMIC_FTRACE 58 select HAVE_DYNAMIC_FTRACE
223 select HAVE_DYNAMIC_FTRACE_WITH_REGS !! 59 select HAVE_EBPF_JIT if 64BIT && !CPU_MICROMIPS && TARGET_ISA_REV >= 2
224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS <<
225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT <<
226 select HAVE_SAMPLE_FTRACE_DIRECT <<
227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
228 select HAVE_EBPF_JIT <<
229 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
230 select HAVE_EISA <<
231 select HAVE_EXIT_THREAD 60 select HAVE_EXIT_THREAD
232 select HAVE_GUP_FAST !! 61 select HAVE_FAST_GUP
233 select HAVE_FENTRY <<
234 select HAVE_FTRACE_MCOUNT_RECORD 62 select HAVE_FTRACE_MCOUNT_RECORD
235 select HAVE_FUNCTION_GRAPH_RETVAL !! 63 select HAVE_FUNCTION_GRAPH_TRACER
236 select HAVE_FUNCTION_GRAPH_TRACER <<
237 select HAVE_FUNCTION_TRACER 64 select HAVE_FUNCTION_TRACER
238 select HAVE_GCC_PLUGINS 65 select HAVE_GCC_PLUGINS
239 select HAVE_HW_BREAKPOINT !! 66 select HAVE_GENERIC_VDSO
>> 67 select HAVE_IDE
240 select HAVE_IOREMAP_PROT 68 select HAVE_IOREMAP_PROT
241 select HAVE_IRQ_EXIT_ON_IRQ_STACK !! 69 select HAVE_IRQ_EXIT_ON_IRQ_STACK
242 select HAVE_IRQ_TIME_ACCOUNTING 70 select HAVE_IRQ_TIME_ACCOUNTING
243 select HAVE_JUMP_LABEL_HACK <<
244 select HAVE_KERNEL_BZIP2 <<
245 select HAVE_KERNEL_GZIP <<
246 select HAVE_KERNEL_LZ4 <<
247 select HAVE_KERNEL_LZMA <<
248 select HAVE_KERNEL_LZO <<
249 select HAVE_KERNEL_XZ <<
250 select HAVE_KERNEL_ZSTD <<
251 select HAVE_KPROBES 71 select HAVE_KPROBES
252 select HAVE_KPROBES_ON_FTRACE <<
253 select HAVE_FUNCTION_ERROR_INJECTION <<
254 select HAVE_KRETPROBES 72 select HAVE_KRETPROBES
255 select HAVE_RETHOOK !! 73 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
256 select HAVE_LIVEPATCH <<
257 select HAVE_MIXED_BREAKPOINTS_REGS <<
258 select HAVE_MOD_ARCH_SPECIFIC 74 select HAVE_MOD_ARCH_SPECIFIC
259 select HAVE_MOVE_PMD <<
260 select HAVE_MOVE_PUD <<
261 select HAVE_NOINSTR_HACK <<
262 select HAVE_NMI 75 select HAVE_NMI
263 select HAVE_NOINSTR_VALIDATION !! 76 select HAVE_OPROFILE
264 select HAVE_OBJTOOL <<
265 select HAVE_OPTPROBES <<
266 select HAVE_PAGE_SIZE_4KB <<
267 select HAVE_PCSPKR_PLATFORM <<
268 select HAVE_PERF_EVENTS 77 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
271 select HAVE_PCI <<
272 select HAVE_PERF_REGS <<
273 select HAVE_PERF_USER_STACK_DUMP <<
274 select MMU_GATHER_RCU_TABLE_FREE <<
275 select MMU_GATHER_MERGE_VMAS <<
276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
277 select HAVE_REGS_AND_STACK_ACCESS_API 78 select HAVE_REGS_AND_STACK_ACCESS_API
278 select HAVE_RELIABLE_STACKTRACE <<
279 select HAVE_FUNCTION_ARG_ACCESS_API <<
280 select HAVE_SETUP_PER_CPU_AREA <<
281 select HAVE_SOFTIRQ_ON_OWN_STACK <<
282 select HAVE_STACKPROTECTOR <<
283 select HAVE_STACK_VALIDATION <<
284 select HAVE_STATIC_CALL <<
285 select HAVE_STATIC_CALL_INLINE <<
286 select HAVE_PREEMPT_DYNAMIC_CALL <<
287 select HAVE_RSEQ 79 select HAVE_RSEQ
288 select HAVE_RUST !! 80 select HAVE_SPARSE_SYSCALL_NR
>> 81 select HAVE_STACKPROTECTOR
289 select HAVE_SYSCALL_TRACEPOINTS 82 select HAVE_SYSCALL_TRACEPOINTS
290 select HAVE_UACCESS_VALIDATION !! 83 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
291 select HAVE_UNSTABLE_SCHED_CLOCK <<
292 select HAVE_USER_RETURN_NOTIFIER <<
293 select HAVE_GENERIC_VDSO <<
294 select VDSO_GETRANDOM <<
295 select HOTPLUG_PARALLEL <<
296 select HOTPLUG_SMT <<
297 select HOTPLUG_SPLIT_STARTUP <<
298 select IRQ_FORCED_THREADING 84 select IRQ_FORCED_THREADING
299 select LOCK_MM_AND_FIND_VMA !! 85 select ISA if EISA
300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 86 select MODULES_USE_ELF_REL if MODULES
301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 87 select MODULES_USE_ELF_RELA if MODULES && 64BIT
302 select NEED_SG_DMA_LENGTH !! 88 select PERF_USE_VMALLOC
303 select NUMA_MEMBLKS <<
304 select PCI_DOMAINS <<
305 select PCI_LOCKLESS_CONFIG <<
306 select PERF_EVENTS <<
307 select RTC_LIB 89 select RTC_LIB
308 select RTC_MC146818_LIB <<
309 select SPARSE_IRQ <<
310 select SYSCTL_EXCEPTION_TRACE 90 select SYSCTL_EXCEPTION_TRACE
311 select THREAD_INFO_IN_TASK !! 91 select VIRT_TO_BUS
312 select TRACE_IRQFLAGS_SUPPORT <<
313 select TRACE_IRQFLAGS_NMI_SUPPORT <<
314 select USER_STACKTRACE_SUPPORT <<
315 select HAVE_ARCH_KCSAN <<
316 select PROC_PID_ARCH_STATUS <<
317 select HAVE_ARCH_NODE_DEV_GROUP <<
318 select FUNCTION_ALIGNMENT_16B <<
319 select FUNCTION_ALIGNMENT_4B <<
320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL <<
322 92
323 config INSTRUCTION_DECODER !! 93 config MIPS_FIXUP_BIGPHYS_ADDR
324 def_bool y !! 94 bool
325 depends on KPROBES || PERF_EVENTS || U <<
326 <<
327 config OUTPUT_FORMAT <<
328 string <<
329 default "elf32-i386" if X86_32 <<
330 default "elf64-x86-64" if X86_64 <<
331 95
332 config LOCKDEP_SUPPORT !! 96 menu "Machine selection"
333 def_bool y <<
334 97
335 config STACKTRACE_SUPPORT !! 98 choice
336 def_bool y !! 99 prompt "System type"
>> 100 default MIPS_GENERIC
337 101
338 config MMU !! 102 config MIPS_GENERIC
339 def_bool y !! 103 bool "Generic board-agnostic MIPS kernel"
>> 104 select BOOT_RAW
>> 105 select BUILTIN_DTB
>> 106 select CEVT_R4K
>> 107 select CLKSRC_MIPS_GIC
>> 108 select COMMON_CLK
>> 109 select CPU_MIPSR2_IRQ_EI
>> 110 select CPU_MIPSR2_IRQ_VI
>> 111 select CSRC_R4K
>> 112 select DMA_PERDEV_COHERENT
>> 113 select HAVE_PCI
>> 114 select IRQ_MIPS_CPU
>> 115 select MIPS_AUTO_PFN_OFFSET
>> 116 select MIPS_CPU_SCACHE
>> 117 select MIPS_GIC
>> 118 select MIPS_L1_CACHE_SHIFT_7
>> 119 select NO_EXCEPT_FILL
>> 120 select PCI_DRIVERS_GENERIC
>> 121 select SMP_UP if SMP
>> 122 select SWAP_IO_SPACE
>> 123 select SYS_HAS_CPU_MIPS32_R1
>> 124 select SYS_HAS_CPU_MIPS32_R2
>> 125 select SYS_HAS_CPU_MIPS32_R6
>> 126 select SYS_HAS_CPU_MIPS64_R1
>> 127 select SYS_HAS_CPU_MIPS64_R2
>> 128 select SYS_HAS_CPU_MIPS64_R6
>> 129 select SYS_SUPPORTS_32BIT_KERNEL
>> 130 select SYS_SUPPORTS_64BIT_KERNEL
>> 131 select SYS_SUPPORTS_BIG_ENDIAN
>> 132 select SYS_SUPPORTS_HIGHMEM
>> 133 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 134 select SYS_SUPPORTS_MICROMIPS
>> 135 select SYS_SUPPORTS_MIPS16
>> 136 select SYS_SUPPORTS_MIPS_CPS
>> 137 select SYS_SUPPORTS_MULTITHREADING
>> 138 select SYS_SUPPORTS_RELOCATABLE
>> 139 select SYS_SUPPORTS_SMARTMIPS
>> 140 select UHI_BOOT
>> 141 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 142 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 143 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 144 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 145 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 146 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 147 select USE_OF
>> 148 help
>> 149 Select this to build a kernel which aims to support multiple boards,
>> 150 generally using a flattened device tree passed from the bootloader
>> 151 using the boot protocol defined in the UHI (Unified Hosting
>> 152 Interface) specification.
340 153
341 config ARCH_MMAP_RND_BITS_MIN !! 154 config MIPS_ALCHEMY
342 default 28 if 64BIT !! 155 bool "Alchemy processor based machines"
343 default 8 !! 156 select PHYS_ADDR_T_64BIT
>> 157 select CEVT_R4K
>> 158 select CSRC_R4K
>> 159 select IRQ_MIPS_CPU
>> 160 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 161 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 162 select SYS_HAS_CPU_MIPS32_R1
>> 163 select SYS_SUPPORTS_32BIT_KERNEL
>> 164 select SYS_SUPPORTS_APM_EMULATION
>> 165 select GPIOLIB
>> 166 select SYS_SUPPORTS_ZBOOT
>> 167 select COMMON_CLK
344 168
345 config ARCH_MMAP_RND_BITS_MAX !! 169 config AR7
346 default 32 if 64BIT !! 170 bool "Texas Instruments AR7"
347 default 16 !! 171 select BOOT_ELF32
>> 172 select DMA_NONCOHERENT
>> 173 select CEVT_R4K
>> 174 select CSRC_R4K
>> 175 select IRQ_MIPS_CPU
>> 176 select NO_EXCEPT_FILL
>> 177 select SWAP_IO_SPACE
>> 178 select SYS_HAS_CPU_MIPS32_R1
>> 179 select SYS_HAS_EARLY_PRINTK
>> 180 select SYS_SUPPORTS_32BIT_KERNEL
>> 181 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 182 select SYS_SUPPORTS_MIPS16
>> 183 select SYS_SUPPORTS_ZBOOT_UART16550
>> 184 select GPIOLIB
>> 185 select VLYNQ
>> 186 select HAVE_LEGACY_CLK
>> 187 help
>> 188 Support for the Texas Instruments AR7 System-on-a-Chip
>> 189 family: TNETD7100, 7200 and 7300.
348 190
349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 191 config ATH25
350 default 8 !! 192 bool "Atheros AR231x/AR531x SoC support"
>> 193 select CEVT_R4K
>> 194 select CSRC_R4K
>> 195 select DMA_NONCOHERENT
>> 196 select IRQ_MIPS_CPU
>> 197 select IRQ_DOMAIN
>> 198 select SYS_HAS_CPU_MIPS32_R1
>> 199 select SYS_SUPPORTS_BIG_ENDIAN
>> 200 select SYS_SUPPORTS_32BIT_KERNEL
>> 201 select SYS_HAS_EARLY_PRINTK
>> 202 help
>> 203 Support for Atheros AR231x and Atheros AR531x based boards
>> 204
>> 205 config ATH79
>> 206 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 207 select ARCH_HAS_RESET_CONTROLLER
>> 208 select BOOT_RAW
>> 209 select CEVT_R4K
>> 210 select CSRC_R4K
>> 211 select DMA_NONCOHERENT
>> 212 select GPIOLIB
>> 213 select PINCTRL
>> 214 select COMMON_CLK
>> 215 select IRQ_MIPS_CPU
>> 216 select SYS_HAS_CPU_MIPS32_R2
>> 217 select SYS_HAS_EARLY_PRINTK
>> 218 select SYS_SUPPORTS_32BIT_KERNEL
>> 219 select SYS_SUPPORTS_BIG_ENDIAN
>> 220 select SYS_SUPPORTS_MIPS16
>> 221 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 222 select USE_OF
>> 223 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 224 help
>> 225 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 226
>> 227 config BMIPS_GENERIC
>> 228 bool "Broadcom Generic BMIPS kernel"
>> 229 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 230 select ARCH_HAS_PHYS_TO_DMA
>> 231 select BOOT_RAW
>> 232 select NO_EXCEPT_FILL
>> 233 select USE_OF
>> 234 select CEVT_R4K
>> 235 select CSRC_R4K
>> 236 select SYNC_R4K
>> 237 select COMMON_CLK
>> 238 select BCM6345_L1_IRQ
>> 239 select BCM7038_L1_IRQ
>> 240 select BCM7120_L2_IRQ
>> 241 select BRCMSTB_L2_IRQ
>> 242 select IRQ_MIPS_CPU
>> 243 select DMA_NONCOHERENT
>> 244 select SYS_SUPPORTS_32BIT_KERNEL
>> 245 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 246 select SYS_SUPPORTS_BIG_ENDIAN
>> 247 select SYS_SUPPORTS_HIGHMEM
>> 248 select SYS_HAS_CPU_BMIPS32_3300
>> 249 select SYS_HAS_CPU_BMIPS4350
>> 250 select SYS_HAS_CPU_BMIPS4380
>> 251 select SYS_HAS_CPU_BMIPS5000
>> 252 select SWAP_IO_SPACE
>> 253 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 254 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 255 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 256 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 257 select HARDIRQS_SW_RESEND
>> 258 help
>> 259 Build a generic DT-based kernel image that boots on select
>> 260 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 261 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 262 must be set appropriately for your board.
>> 263
>> 264 config BCM47XX
>> 265 bool "Broadcom BCM47XX based boards"
>> 266 select BOOT_RAW
>> 267 select CEVT_R4K
>> 268 select CSRC_R4K
>> 269 select DMA_NONCOHERENT
>> 270 select HAVE_PCI
>> 271 select IRQ_MIPS_CPU
>> 272 select SYS_HAS_CPU_MIPS32_R1
>> 273 select NO_EXCEPT_FILL
>> 274 select SYS_SUPPORTS_32BIT_KERNEL
>> 275 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 276 select SYS_SUPPORTS_MIPS16
>> 277 select SYS_SUPPORTS_ZBOOT
>> 278 select SYS_HAS_EARLY_PRINTK
>> 279 select USE_GENERIC_EARLY_PRINTK_8250
>> 280 select GPIOLIB
>> 281 select LEDS_GPIO_REGISTER
>> 282 select BCM47XX_NVRAM
>> 283 select BCM47XX_SPROM
>> 284 select BCM47XX_SSB if !BCM47XX_BCMA
>> 285 help
>> 286 Support for BCM47XX based boards
>> 287
>> 288 config BCM63XX
>> 289 bool "Broadcom BCM63XX based boards"
>> 290 select BOOT_RAW
>> 291 select CEVT_R4K
>> 292 select CSRC_R4K
>> 293 select SYNC_R4K
>> 294 select DMA_NONCOHERENT
>> 295 select IRQ_MIPS_CPU
>> 296 select SYS_SUPPORTS_32BIT_KERNEL
>> 297 select SYS_SUPPORTS_BIG_ENDIAN
>> 298 select SYS_HAS_EARLY_PRINTK
>> 299 select SWAP_IO_SPACE
>> 300 select GPIOLIB
>> 301 select MIPS_L1_CACHE_SHIFT_4
>> 302 select CLKDEV_LOOKUP
>> 303 select HAVE_LEGACY_CLK
>> 304 help
>> 305 Support for BCM63XX based boards
>> 306
>> 307 config MIPS_COBALT
>> 308 bool "Cobalt Server"
>> 309 select CEVT_R4K
>> 310 select CSRC_R4K
>> 311 select CEVT_GT641XX
>> 312 select DMA_NONCOHERENT
>> 313 select FORCE_PCI
>> 314 select I8253
>> 315 select I8259
>> 316 select IRQ_MIPS_CPU
>> 317 select IRQ_GT641XX
>> 318 select PCI_GT64XXX_PCI0
>> 319 select SYS_HAS_CPU_NEVADA
>> 320 select SYS_HAS_EARLY_PRINTK
>> 321 select SYS_SUPPORTS_32BIT_KERNEL
>> 322 select SYS_SUPPORTS_64BIT_KERNEL
>> 323 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 324 select USE_GENERIC_EARLY_PRINTK_8250
>> 325
>> 326 config MACH_DECSTATION
>> 327 bool "DECstations"
>> 328 select BOOT_ELF32
>> 329 select CEVT_DS1287
>> 330 select CEVT_R4K if CPU_R4X00
>> 331 select CSRC_IOASIC
>> 332 select CSRC_R4K if CPU_R4X00
>> 333 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 334 select CPU_R4000_WORKAROUNDS if 64BIT
>> 335 select CPU_R4400_WORKAROUNDS if 64BIT
>> 336 select DMA_NONCOHERENT
>> 337 select NO_IOPORT_MAP
>> 338 select IRQ_MIPS_CPU
>> 339 select SYS_HAS_CPU_R3000
>> 340 select SYS_HAS_CPU_R4X00
>> 341 select SYS_SUPPORTS_32BIT_KERNEL
>> 342 select SYS_SUPPORTS_64BIT_KERNEL
>> 343 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 344 select SYS_SUPPORTS_128HZ
>> 345 select SYS_SUPPORTS_256HZ
>> 346 select SYS_SUPPORTS_1024HZ
>> 347 select MIPS_L1_CACHE_SHIFT_4
>> 348 help
>> 349 This enables support for DEC's MIPS based workstations. For details
>> 350 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 351 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 352
>> 353 If you have one of the following DECstation Models you definitely
>> 354 want to choose R4xx0 for the CPU Type:
>> 355
>> 356 DECstation 5000/50
>> 357 DECstation 5000/150
>> 358 DECstation 5000/260
>> 359 DECsystem 5900/260
>> 360
>> 361 otherwise choose R3000.
>> 362
>> 363 config MACH_JAZZ
>> 364 bool "Jazz family of machines"
>> 365 select ARC_MEMORY
>> 366 select ARC_PROMLIB
>> 367 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 368 select ARCH_MIGHT_HAVE_PC_SERIO
>> 369 select DMA_OPS
>> 370 select FW_ARC
>> 371 select FW_ARC32
>> 372 select ARCH_MAY_HAVE_PC_FDC
>> 373 select CEVT_R4K
>> 374 select CSRC_R4K
>> 375 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 376 select GENERIC_ISA_DMA
>> 377 select HAVE_PCSPKR_PLATFORM
>> 378 select IRQ_MIPS_CPU
>> 379 select I8253
>> 380 select I8259
>> 381 select ISA
>> 382 select SYS_HAS_CPU_R4X00
>> 383 select SYS_SUPPORTS_32BIT_KERNEL
>> 384 select SYS_SUPPORTS_64BIT_KERNEL
>> 385 select SYS_SUPPORTS_100HZ
>> 386 help
>> 387 This a family of machines based on the MIPS R4030 chipset which was
>> 388 used by several vendors to build RISC/os and Windows NT workstations.
>> 389 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 390 Olivetti M700-10 workstations.
>> 391
>> 392 config MACH_INGENIC
>> 393 bool "Ingenic SoC based machines"
>> 394 select SYS_SUPPORTS_32BIT_KERNEL
>> 395 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 396 select SYS_SUPPORTS_ZBOOT_UART16550
>> 397 select CPU_SUPPORTS_HUGEPAGES
>> 398 select DMA_NONCOHERENT
>> 399 select IRQ_MIPS_CPU
>> 400 select PINCTRL
>> 401 select GPIOLIB
>> 402 select COMMON_CLK
>> 403 select GENERIC_IRQ_CHIP
>> 404 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 405 select USE_OF
>> 406
>> 407 config LANTIQ
>> 408 bool "Lantiq based platforms"
>> 409 select DMA_NONCOHERENT
>> 410 select IRQ_MIPS_CPU
>> 411 select CEVT_R4K
>> 412 select CSRC_R4K
>> 413 select SYS_HAS_CPU_MIPS32_R1
>> 414 select SYS_HAS_CPU_MIPS32_R2
>> 415 select SYS_SUPPORTS_BIG_ENDIAN
>> 416 select SYS_SUPPORTS_32BIT_KERNEL
>> 417 select SYS_SUPPORTS_MIPS16
>> 418 select SYS_SUPPORTS_MULTITHREADING
>> 419 select SYS_SUPPORTS_VPE_LOADER
>> 420 select SYS_HAS_EARLY_PRINTK
>> 421 select GPIOLIB
>> 422 select SWAP_IO_SPACE
>> 423 select BOOT_RAW
>> 424 select CLKDEV_LOOKUP
>> 425 select HAVE_LEGACY_CLK
>> 426 select USE_OF
>> 427 select PINCTRL
>> 428 select PINCTRL_LANTIQ
>> 429 select ARCH_HAS_RESET_CONTROLLER
>> 430 select RESET_CONTROLLER
351 431
352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 432 config MACH_LOONGSON32
353 default 16 !! 433 bool "Loongson 32-bit family of machines"
>> 434 select SYS_SUPPORTS_ZBOOT
>> 435 help
>> 436 This enables support for the Loongson-1 family of machines.
354 437
355 config SBUS !! 438 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
356 bool !! 439 the Institute of Computing Technology (ICT), Chinese Academy of
>> 440 Sciences (CAS).
357 441
358 config GENERIC_ISA_DMA !! 442 config MACH_LOONGSON2EF
359 def_bool y !! 443 bool "Loongson-2E/F family of machines"
360 depends on ISA_DMA_API !! 444 select SYS_SUPPORTS_ZBOOT
>> 445 help
>> 446 This enables the support of early Loongson-2E/F family of machines.
361 447
362 config GENERIC_CSUM !! 448 config MACH_LOONGSON64
363 bool !! 449 bool "Loongson 64-bit family of machines"
364 default y if KMSAN || KASAN !! 450 select ARCH_SPARSEMEM_ENABLE
>> 451 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 452 select ARCH_MIGHT_HAVE_PC_SERIO
>> 453 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 454 select BOOT_ELF32
>> 455 select BOARD_SCACHE
>> 456 select CSRC_R4K
>> 457 select CEVT_R4K
>> 458 select CPU_HAS_WB
>> 459 select FORCE_PCI
>> 460 select ISA
>> 461 select I8259
>> 462 select IRQ_MIPS_CPU
>> 463 select NO_EXCEPT_FILL
>> 464 select NR_CPUS_DEFAULT_64
>> 465 select USE_GENERIC_EARLY_PRINTK_8250
>> 466 select PCI_DRIVERS_GENERIC
>> 467 select SYS_HAS_CPU_LOONGSON64
>> 468 select SYS_HAS_EARLY_PRINTK
>> 469 select SYS_SUPPORTS_SMP
>> 470 select SYS_SUPPORTS_HOTPLUG_CPU
>> 471 select SYS_SUPPORTS_NUMA
>> 472 select SYS_SUPPORTS_64BIT_KERNEL
>> 473 select SYS_SUPPORTS_HIGHMEM
>> 474 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 475 select SYS_SUPPORTS_ZBOOT
>> 476 select ZONE_DMA32
>> 477 select NUMA
>> 478 select COMMON_CLK
>> 479 select USE_OF
>> 480 select BUILTIN_DTB
>> 481 select PCI_HOST_GENERIC
>> 482 help
>> 483 This enables the support of Loongson-2/3 family of machines.
>> 484
>> 485 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 486 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 487 and Loongson-2F which will be removed), developed by the Institute
>> 488 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 489
>> 490 config MACH_PISTACHIO
>> 491 bool "IMG Pistachio SoC based boards"
>> 492 select BOOT_ELF32
>> 493 select BOOT_RAW
>> 494 select CEVT_R4K
>> 495 select CLKSRC_MIPS_GIC
>> 496 select COMMON_CLK
>> 497 select CSRC_R4K
>> 498 select DMA_NONCOHERENT
>> 499 select GPIOLIB
>> 500 select IRQ_MIPS_CPU
>> 501 select MFD_SYSCON
>> 502 select MIPS_CPU_SCACHE
>> 503 select MIPS_GIC
>> 504 select PINCTRL
>> 505 select REGULATOR
>> 506 select SYS_HAS_CPU_MIPS32_R2
>> 507 select SYS_SUPPORTS_32BIT_KERNEL
>> 508 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 509 select SYS_SUPPORTS_MIPS_CPS
>> 510 select SYS_SUPPORTS_MULTITHREADING
>> 511 select SYS_SUPPORTS_RELOCATABLE
>> 512 select SYS_SUPPORTS_ZBOOT
>> 513 select SYS_HAS_EARLY_PRINTK
>> 514 select USE_GENERIC_EARLY_PRINTK_8250
>> 515 select USE_OF
>> 516 help
>> 517 This enables support for the IMG Pistachio SoC platform.
>> 518
>> 519 config MIPS_MALTA
>> 520 bool "MIPS Malta board"
>> 521 select ARCH_MAY_HAVE_PC_FDC
>> 522 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 523 select ARCH_MIGHT_HAVE_PC_SERIO
>> 524 select BOOT_ELF32
>> 525 select BOOT_RAW
>> 526 select BUILTIN_DTB
>> 527 select CEVT_R4K
>> 528 select CLKSRC_MIPS_GIC
>> 529 select COMMON_CLK
>> 530 select CSRC_R4K
>> 531 select DMA_MAYBE_COHERENT
>> 532 select GENERIC_ISA_DMA
>> 533 select HAVE_PCSPKR_PLATFORM
>> 534 select HAVE_PCI
>> 535 select I8253
>> 536 select I8259
>> 537 select IRQ_MIPS_CPU
>> 538 select MIPS_BONITO64
>> 539 select MIPS_CPU_SCACHE
>> 540 select MIPS_GIC
>> 541 select MIPS_L1_CACHE_SHIFT_6
>> 542 select MIPS_MSC
>> 543 select PCI_GT64XXX_PCI0
>> 544 select SMP_UP if SMP
>> 545 select SWAP_IO_SPACE
>> 546 select SYS_HAS_CPU_MIPS32_R1
>> 547 select SYS_HAS_CPU_MIPS32_R2
>> 548 select SYS_HAS_CPU_MIPS32_R3_5
>> 549 select SYS_HAS_CPU_MIPS32_R5
>> 550 select SYS_HAS_CPU_MIPS32_R6
>> 551 select SYS_HAS_CPU_MIPS64_R1
>> 552 select SYS_HAS_CPU_MIPS64_R2
>> 553 select SYS_HAS_CPU_MIPS64_R6
>> 554 select SYS_HAS_CPU_NEVADA
>> 555 select SYS_HAS_CPU_RM7000
>> 556 select SYS_SUPPORTS_32BIT_KERNEL
>> 557 select SYS_SUPPORTS_64BIT_KERNEL
>> 558 select SYS_SUPPORTS_BIG_ENDIAN
>> 559 select SYS_SUPPORTS_HIGHMEM
>> 560 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 561 select SYS_SUPPORTS_MICROMIPS
>> 562 select SYS_SUPPORTS_MIPS16
>> 563 select SYS_SUPPORTS_MIPS_CMP
>> 564 select SYS_SUPPORTS_MIPS_CPS
>> 565 select SYS_SUPPORTS_MULTITHREADING
>> 566 select SYS_SUPPORTS_RELOCATABLE
>> 567 select SYS_SUPPORTS_SMARTMIPS
>> 568 select SYS_SUPPORTS_VPE_LOADER
>> 569 select SYS_SUPPORTS_ZBOOT
>> 570 select USE_OF
>> 571 select ZONE_DMA32 if 64BIT
>> 572 help
>> 573 This enables support for the MIPS Technologies Malta evaluation
>> 574 board.
>> 575
>> 576 config MACH_PIC32
>> 577 bool "Microchip PIC32 Family"
>> 578 help
>> 579 This enables support for the Microchip PIC32 family of platforms.
>> 580
>> 581 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 582 microcontrollers.
>> 583
>> 584 config MACH_VR41XX
>> 585 bool "NEC VR4100 series based machines"
>> 586 select CEVT_R4K
>> 587 select CSRC_R4K
>> 588 select SYS_HAS_CPU_VR41XX
>> 589 select SYS_SUPPORTS_MIPS16
>> 590 select GPIOLIB
365 591
366 config GENERIC_BUG !! 592 config NXP_STB220
367 def_bool y !! 593 bool "NXP STB220 board"
368 depends on BUG !! 594 select SOC_PNX833X
369 select GENERIC_BUG_RELATIVE_POINTERS i !! 595 help
>> 596 Support for NXP Semiconductors STB220 Development Board.
>> 597
>> 598 config NXP_STB225
>> 599 bool "NXP 225 board"
>> 600 select SOC_PNX833X
>> 601 select SOC_PNX8335
>> 602 help
>> 603 Support for NXP Semiconductors STB225 Development Board.
>> 604
>> 605 config RALINK
>> 606 bool "Ralink based machines"
>> 607 select CEVT_R4K
>> 608 select CSRC_R4K
>> 609 select BOOT_RAW
>> 610 select DMA_NONCOHERENT
>> 611 select IRQ_MIPS_CPU
>> 612 select USE_OF
>> 613 select SYS_HAS_CPU_MIPS32_R1
>> 614 select SYS_HAS_CPU_MIPS32_R2
>> 615 select SYS_SUPPORTS_32BIT_KERNEL
>> 616 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 617 select SYS_SUPPORTS_MIPS16
>> 618 select SYS_HAS_EARLY_PRINTK
>> 619 select CLKDEV_LOOKUP
>> 620 select ARCH_HAS_RESET_CONTROLLER
>> 621 select RESET_CONTROLLER
>> 622
>> 623 config SGI_IP22
>> 624 bool "SGI IP22 (Indy/Indigo2)"
>> 625 select ARC_MEMORY
>> 626 select ARC_PROMLIB
>> 627 select FW_ARC
>> 628 select FW_ARC32
>> 629 select ARCH_MIGHT_HAVE_PC_SERIO
>> 630 select BOOT_ELF32
>> 631 select CEVT_R4K
>> 632 select CSRC_R4K
>> 633 select DEFAULT_SGI_PARTITION
>> 634 select DMA_NONCOHERENT
>> 635 select HAVE_EISA
>> 636 select I8253
>> 637 select I8259
>> 638 select IP22_CPU_SCACHE
>> 639 select IRQ_MIPS_CPU
>> 640 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 641 select SGI_HAS_I8042
>> 642 select SGI_HAS_INDYDOG
>> 643 select SGI_HAS_HAL2
>> 644 select SGI_HAS_SEEQ
>> 645 select SGI_HAS_WD93
>> 646 select SGI_HAS_ZILOG
>> 647 select SWAP_IO_SPACE
>> 648 select SYS_HAS_CPU_R4X00
>> 649 select SYS_HAS_CPU_R5000
>> 650 select SYS_HAS_EARLY_PRINTK
>> 651 select SYS_SUPPORTS_32BIT_KERNEL
>> 652 select SYS_SUPPORTS_64BIT_KERNEL
>> 653 select SYS_SUPPORTS_BIG_ENDIAN
>> 654 select MIPS_L1_CACHE_SHIFT_7
>> 655 help
>> 656 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 657 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 658 that runs on these, say Y here.
>> 659
>> 660 config SGI_IP27
>> 661 bool "SGI IP27 (Origin200/2000)"
>> 662 select ARCH_HAS_PHYS_TO_DMA
>> 663 select ARCH_SPARSEMEM_ENABLE
>> 664 select FW_ARC
>> 665 select FW_ARC64
>> 666 select ARC_CMDLINE_ONLY
>> 667 select BOOT_ELF64
>> 668 select DEFAULT_SGI_PARTITION
>> 669 select SYS_HAS_EARLY_PRINTK
>> 670 select HAVE_PCI
>> 671 select IRQ_MIPS_CPU
>> 672 select IRQ_DOMAIN_HIERARCHY
>> 673 select NR_CPUS_DEFAULT_64
>> 674 select PCI_DRIVERS_GENERIC
>> 675 select PCI_XTALK_BRIDGE
>> 676 select SYS_HAS_CPU_R10000
>> 677 select SYS_SUPPORTS_64BIT_KERNEL
>> 678 select SYS_SUPPORTS_BIG_ENDIAN
>> 679 select SYS_SUPPORTS_NUMA
>> 680 select SYS_SUPPORTS_SMP
>> 681 select MIPS_L1_CACHE_SHIFT_7
>> 682 select NUMA
>> 683 help
>> 684 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 685 workstations. To compile a Linux kernel that runs on these, say Y
>> 686 here.
>> 687
>> 688 config SGI_IP28
>> 689 bool "SGI IP28 (Indigo2 R10k)"
>> 690 select ARC_MEMORY
>> 691 select ARC_PROMLIB
>> 692 select FW_ARC
>> 693 select FW_ARC64
>> 694 select ARCH_MIGHT_HAVE_PC_SERIO
>> 695 select BOOT_ELF64
>> 696 select CEVT_R4K
>> 697 select CSRC_R4K
>> 698 select DEFAULT_SGI_PARTITION
>> 699 select DMA_NONCOHERENT
>> 700 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 701 select IRQ_MIPS_CPU
>> 702 select HAVE_EISA
>> 703 select I8253
>> 704 select I8259
>> 705 select SGI_HAS_I8042
>> 706 select SGI_HAS_INDYDOG
>> 707 select SGI_HAS_HAL2
>> 708 select SGI_HAS_SEEQ
>> 709 select SGI_HAS_WD93
>> 710 select SGI_HAS_ZILOG
>> 711 select SWAP_IO_SPACE
>> 712 select SYS_HAS_CPU_R10000
>> 713 select SYS_HAS_EARLY_PRINTK
>> 714 select SYS_SUPPORTS_64BIT_KERNEL
>> 715 select SYS_SUPPORTS_BIG_ENDIAN
>> 716 select MIPS_L1_CACHE_SHIFT_7
>> 717 help
>> 718 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 719 kernel that runs on these, say Y here.
>> 720
>> 721 config SGI_IP30
>> 722 bool "SGI IP30 (Octane/Octane2)"
>> 723 select ARCH_HAS_PHYS_TO_DMA
>> 724 select FW_ARC
>> 725 select FW_ARC64
>> 726 select BOOT_ELF64
>> 727 select CEVT_R4K
>> 728 select CSRC_R4K
>> 729 select SYNC_R4K if SMP
>> 730 select ZONE_DMA32
>> 731 select HAVE_PCI
>> 732 select IRQ_MIPS_CPU
>> 733 select IRQ_DOMAIN_HIERARCHY
>> 734 select NR_CPUS_DEFAULT_2
>> 735 select PCI_DRIVERS_GENERIC
>> 736 select PCI_XTALK_BRIDGE
>> 737 select SYS_HAS_EARLY_PRINTK
>> 738 select SYS_HAS_CPU_R10000
>> 739 select SYS_SUPPORTS_64BIT_KERNEL
>> 740 select SYS_SUPPORTS_BIG_ENDIAN
>> 741 select SYS_SUPPORTS_SMP
>> 742 select MIPS_L1_CACHE_SHIFT_7
>> 743 select ARC_MEMORY
>> 744 help
>> 745 These are the SGI Octane and Octane2 graphics workstations. To
>> 746 compile a Linux kernel that runs on these, say Y here.
>> 747
>> 748 config SGI_IP32
>> 749 bool "SGI IP32 (O2)"
>> 750 select ARC_MEMORY
>> 751 select ARC_PROMLIB
>> 752 select ARCH_HAS_PHYS_TO_DMA
>> 753 select FW_ARC
>> 754 select FW_ARC32
>> 755 select BOOT_ELF32
>> 756 select CEVT_R4K
>> 757 select CSRC_R4K
>> 758 select DMA_NONCOHERENT
>> 759 select HAVE_PCI
>> 760 select IRQ_MIPS_CPU
>> 761 select R5000_CPU_SCACHE
>> 762 select RM7000_CPU_SCACHE
>> 763 select SYS_HAS_CPU_R5000
>> 764 select SYS_HAS_CPU_R10000 if BROKEN
>> 765 select SYS_HAS_CPU_RM7000
>> 766 select SYS_HAS_CPU_NEVADA
>> 767 select SYS_SUPPORTS_64BIT_KERNEL
>> 768 select SYS_SUPPORTS_BIG_ENDIAN
>> 769 help
>> 770 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 771
>> 772 config SIBYTE_CRHINE
>> 773 bool "Sibyte BCM91120C-CRhine"
>> 774 select BOOT_ELF32
>> 775 select SIBYTE_BCM1120
>> 776 select SWAP_IO_SPACE
>> 777 select SYS_HAS_CPU_SB1
>> 778 select SYS_SUPPORTS_BIG_ENDIAN
>> 779 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 780
>> 781 config SIBYTE_CARMEL
>> 782 bool "Sibyte BCM91120x-Carmel"
>> 783 select BOOT_ELF32
>> 784 select SIBYTE_BCM1120
>> 785 select SWAP_IO_SPACE
>> 786 select SYS_HAS_CPU_SB1
>> 787 select SYS_SUPPORTS_BIG_ENDIAN
>> 788 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 789
>> 790 config SIBYTE_CRHONE
>> 791 bool "Sibyte BCM91125C-CRhone"
>> 792 select BOOT_ELF32
>> 793 select SIBYTE_BCM1125
>> 794 select SWAP_IO_SPACE
>> 795 select SYS_HAS_CPU_SB1
>> 796 select SYS_SUPPORTS_BIG_ENDIAN
>> 797 select SYS_SUPPORTS_HIGHMEM
>> 798 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 799
>> 800 config SIBYTE_RHONE
>> 801 bool "Sibyte BCM91125E-Rhone"
>> 802 select BOOT_ELF32
>> 803 select SIBYTE_BCM1125H
>> 804 select SWAP_IO_SPACE
>> 805 select SYS_HAS_CPU_SB1
>> 806 select SYS_SUPPORTS_BIG_ENDIAN
>> 807 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 808
>> 809 config SIBYTE_SWARM
>> 810 bool "Sibyte BCM91250A-SWARM"
>> 811 select BOOT_ELF32
>> 812 select HAVE_PATA_PLATFORM
>> 813 select SIBYTE_SB1250
>> 814 select SWAP_IO_SPACE
>> 815 select SYS_HAS_CPU_SB1
>> 816 select SYS_SUPPORTS_BIG_ENDIAN
>> 817 select SYS_SUPPORTS_HIGHMEM
>> 818 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 819 select ZONE_DMA32 if 64BIT
>> 820 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 821
>> 822 config SIBYTE_LITTLESUR
>> 823 bool "Sibyte BCM91250C2-LittleSur"
>> 824 select BOOT_ELF32
>> 825 select HAVE_PATA_PLATFORM
>> 826 select SIBYTE_SB1250
>> 827 select SWAP_IO_SPACE
>> 828 select SYS_HAS_CPU_SB1
>> 829 select SYS_SUPPORTS_BIG_ENDIAN
>> 830 select SYS_SUPPORTS_HIGHMEM
>> 831 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 832 select ZONE_DMA32 if 64BIT
>> 833
>> 834 config SIBYTE_SENTOSA
>> 835 bool "Sibyte BCM91250E-Sentosa"
>> 836 select BOOT_ELF32
>> 837 select SIBYTE_SB1250
>> 838 select SWAP_IO_SPACE
>> 839 select SYS_HAS_CPU_SB1
>> 840 select SYS_SUPPORTS_BIG_ENDIAN
>> 841 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 842 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 843
>> 844 config SIBYTE_BIGSUR
>> 845 bool "Sibyte BCM91480B-BigSur"
>> 846 select BOOT_ELF32
>> 847 select NR_CPUS_DEFAULT_4
>> 848 select SIBYTE_BCM1x80
>> 849 select SWAP_IO_SPACE
>> 850 select SYS_HAS_CPU_SB1
>> 851 select SYS_SUPPORTS_BIG_ENDIAN
>> 852 select SYS_SUPPORTS_HIGHMEM
>> 853 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 854 select ZONE_DMA32 if 64BIT
>> 855 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 856
>> 857 config SNI_RM
>> 858 bool "SNI RM200/300/400"
>> 859 select ARC_MEMORY
>> 860 select ARC_PROMLIB
>> 861 select FW_ARC if CPU_LITTLE_ENDIAN
>> 862 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 863 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 864 select ARCH_MAY_HAVE_PC_FDC
>> 865 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 866 select ARCH_MIGHT_HAVE_PC_SERIO
>> 867 select BOOT_ELF32
>> 868 select CEVT_R4K
>> 869 select CSRC_R4K
>> 870 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 871 select DMA_NONCOHERENT
>> 872 select GENERIC_ISA_DMA
>> 873 select HAVE_EISA
>> 874 select HAVE_PCSPKR_PLATFORM
>> 875 select HAVE_PCI
>> 876 select IRQ_MIPS_CPU
>> 877 select I8253
>> 878 select I8259
>> 879 select ISA
>> 880 select MIPS_L1_CACHE_SHIFT_6
>> 881 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 882 select SYS_HAS_CPU_R4X00
>> 883 select SYS_HAS_CPU_R5000
>> 884 select SYS_HAS_CPU_R10000
>> 885 select R5000_CPU_SCACHE
>> 886 select SYS_HAS_EARLY_PRINTK
>> 887 select SYS_SUPPORTS_32BIT_KERNEL
>> 888 select SYS_SUPPORTS_64BIT_KERNEL
>> 889 select SYS_SUPPORTS_BIG_ENDIAN
>> 890 select SYS_SUPPORTS_HIGHMEM
>> 891 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 892 help
>> 893 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 894 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 895 Technology and now in turn merged with Fujitsu. Say Y here to
>> 896 support this machine type.
>> 897
>> 898 config MACH_TX39XX
>> 899 bool "Toshiba TX39 series based machines"
>> 900
>> 901 config MACH_TX49XX
>> 902 bool "Toshiba TX49 series based machines"
>> 903
>> 904 config MIKROTIK_RB532
>> 905 bool "Mikrotik RB532 boards"
>> 906 select CEVT_R4K
>> 907 select CSRC_R4K
>> 908 select DMA_NONCOHERENT
>> 909 select HAVE_PCI
>> 910 select IRQ_MIPS_CPU
>> 911 select SYS_HAS_CPU_MIPS32_R1
>> 912 select SYS_SUPPORTS_32BIT_KERNEL
>> 913 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 914 select SWAP_IO_SPACE
>> 915 select BOOT_RAW
>> 916 select GPIOLIB
>> 917 select MIPS_L1_CACHE_SHIFT_4
>> 918 help
>> 919 Support the Mikrotik(tm) RouterBoard 532 series,
>> 920 based on the IDT RC32434 SoC.
370 921
371 config GENERIC_BUG_RELATIVE_POINTERS !! 922 config CAVIUM_OCTEON_SOC
372 bool !! 923 bool "Cavium Networks Octeon SoC based boards"
>> 924 select CEVT_R4K
>> 925 select ARCH_HAS_PHYS_TO_DMA
>> 926 select HAVE_RAPIDIO
>> 927 select PHYS_ADDR_T_64BIT
>> 928 select SYS_SUPPORTS_64BIT_KERNEL
>> 929 select SYS_SUPPORTS_BIG_ENDIAN
>> 930 select EDAC_SUPPORT
>> 931 select EDAC_ATOMIC_SCRUB
>> 932 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 933 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 934 select SYS_HAS_EARLY_PRINTK
>> 935 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 936 select HAVE_PCI
>> 937 select HAVE_PLAT_DELAY
>> 938 select HAVE_PLAT_FW_INIT_CMDLINE
>> 939 select HAVE_PLAT_MEMCPY
>> 940 select ZONE_DMA32
>> 941 select HOLES_IN_ZONE
>> 942 select GPIOLIB
>> 943 select USE_OF
>> 944 select ARCH_SPARSEMEM_ENABLE
>> 945 select SYS_SUPPORTS_SMP
>> 946 select NR_CPUS_DEFAULT_64
>> 947 select MIPS_NR_CPU_NR_MAP_1024
>> 948 select BUILTIN_DTB
>> 949 select MTD_COMPLEX_MAPPINGS
>> 950 select SWIOTLB
>> 951 select SYS_SUPPORTS_RELOCATABLE
>> 952 help
>> 953 This option supports all of the Octeon reference boards from Cavium
>> 954 Networks. It builds a kernel that dynamically determines the Octeon
>> 955 CPU type and supports all known board reference implementations.
>> 956 Some of the supported boards are:
>> 957 EBT3000
>> 958 EBH3000
>> 959 EBH3100
>> 960 Thunder
>> 961 Kodama
>> 962 Hikari
>> 963 Say Y here for most Octeon reference boards.
>> 964
>> 965 config NLM_XLR_BOARD
>> 966 bool "Netlogic XLR/XLS based systems"
>> 967 select BOOT_ELF32
>> 968 select NLM_COMMON
>> 969 select SYS_HAS_CPU_XLR
>> 970 select SYS_SUPPORTS_SMP
>> 971 select HAVE_PCI
>> 972 select SWAP_IO_SPACE
>> 973 select SYS_SUPPORTS_32BIT_KERNEL
>> 974 select SYS_SUPPORTS_64BIT_KERNEL
>> 975 select PHYS_ADDR_T_64BIT
>> 976 select SYS_SUPPORTS_BIG_ENDIAN
>> 977 select SYS_SUPPORTS_HIGHMEM
>> 978 select NR_CPUS_DEFAULT_32
>> 979 select CEVT_R4K
>> 980 select CSRC_R4K
>> 981 select IRQ_MIPS_CPU
>> 982 select ZONE_DMA32 if 64BIT
>> 983 select SYNC_R4K
>> 984 select SYS_HAS_EARLY_PRINTK
>> 985 select SYS_SUPPORTS_ZBOOT
>> 986 select SYS_SUPPORTS_ZBOOT_UART16550
>> 987 help
>> 988 Support for systems based on Netlogic XLR and XLS processors.
>> 989 Say Y here if you have a XLR or XLS based board.
>> 990
>> 991 config NLM_XLP_BOARD
>> 992 bool "Netlogic XLP based systems"
>> 993 select BOOT_ELF32
>> 994 select NLM_COMMON
>> 995 select SYS_HAS_CPU_XLP
>> 996 select SYS_SUPPORTS_SMP
>> 997 select HAVE_PCI
>> 998 select SYS_SUPPORTS_32BIT_KERNEL
>> 999 select SYS_SUPPORTS_64BIT_KERNEL
>> 1000 select PHYS_ADDR_T_64BIT
>> 1001 select GPIOLIB
>> 1002 select SYS_SUPPORTS_BIG_ENDIAN
>> 1003 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1004 select SYS_SUPPORTS_HIGHMEM
>> 1005 select NR_CPUS_DEFAULT_32
>> 1006 select CEVT_R4K
>> 1007 select CSRC_R4K
>> 1008 select IRQ_MIPS_CPU
>> 1009 select ZONE_DMA32 if 64BIT
>> 1010 select SYNC_R4K
>> 1011 select SYS_HAS_EARLY_PRINTK
>> 1012 select USE_OF
>> 1013 select SYS_SUPPORTS_ZBOOT
>> 1014 select SYS_SUPPORTS_ZBOOT_UART16550
>> 1015 help
>> 1016 This board is based on Netlogic XLP Processor.
>> 1017 Say Y here if you have a XLP based board.
373 1018
374 config ARCH_MAY_HAVE_PC_FDC !! 1019 endchoice
375 def_bool y <<
376 depends on ISA_DMA_API <<
377 1020
378 config GENERIC_CALIBRATE_DELAY !! 1021 source "arch/mips/alchemy/Kconfig"
379 def_bool y !! 1022 source "arch/mips/ath25/Kconfig"
>> 1023 source "arch/mips/ath79/Kconfig"
>> 1024 source "arch/mips/bcm47xx/Kconfig"
>> 1025 source "arch/mips/bcm63xx/Kconfig"
>> 1026 source "arch/mips/bmips/Kconfig"
>> 1027 source "arch/mips/generic/Kconfig"
>> 1028 source "arch/mips/jazz/Kconfig"
>> 1029 source "arch/mips/jz4740/Kconfig"
>> 1030 source "arch/mips/lantiq/Kconfig"
>> 1031 source "arch/mips/pic32/Kconfig"
>> 1032 source "arch/mips/pistachio/Kconfig"
>> 1033 source "arch/mips/ralink/Kconfig"
>> 1034 source "arch/mips/sgi-ip27/Kconfig"
>> 1035 source "arch/mips/sibyte/Kconfig"
>> 1036 source "arch/mips/txx9/Kconfig"
>> 1037 source "arch/mips/vr41xx/Kconfig"
>> 1038 source "arch/mips/cavium-octeon/Kconfig"
>> 1039 source "arch/mips/loongson2ef/Kconfig"
>> 1040 source "arch/mips/loongson32/Kconfig"
>> 1041 source "arch/mips/loongson64/Kconfig"
>> 1042 source "arch/mips/netlogic/Kconfig"
380 1043
381 config ARCH_HAS_CPU_RELAX !! 1044 endmenu
382 def_bool y <<
383 1045
384 config ARCH_HIBERNATION_POSSIBLE !! 1046 config GENERIC_HWEIGHT
385 def_bool y !! 1047 bool
>> 1048 default y
386 1049
387 config ARCH_SUSPEND_POSSIBLE !! 1050 config GENERIC_CALIBRATE_DELAY
388 def_bool y !! 1051 bool
>> 1052 default y
389 1053
390 config AUDIT_ARCH !! 1054 config SCHED_OMIT_FRAME_POINTER
391 def_bool y if X86_64 !! 1055 bool
>> 1056 default y
392 1057
393 config KASAN_SHADOW_OFFSET !! 1058 #
394 hex !! 1059 # Select some configuration options automatically based on user selections.
395 depends on KASAN !! 1060 #
396 default 0xdffffc0000000000 !! 1061 config FW_ARC
>> 1062 bool
397 1063
398 config HAVE_INTEL_TXT !! 1064 config ARCH_MAY_HAVE_PC_FDC
399 def_bool y !! 1065 bool
400 depends on INTEL_IOMMU && ACPI <<
401 1066
402 config X86_64_SMP !! 1067 config BOOT_RAW
403 def_bool y !! 1068 bool
404 depends on X86_64 && SMP <<
405 1069
406 config ARCH_SUPPORTS_UPROBES !! 1070 config CEVT_BCM1480
407 def_bool y !! 1071 bool
408 1072
409 config FIX_EARLYCON_MEM !! 1073 config CEVT_DS1287
410 def_bool y !! 1074 bool
411 1075
412 config DYNAMIC_PHYSICAL_MASK !! 1076 config CEVT_GT641XX
413 bool 1077 bool
414 1078
415 config PGTABLE_LEVELS !! 1079 config CEVT_R4K
416 int !! 1080 bool
417 default 5 if X86_5LEVEL <<
418 default 4 if X86_64 <<
419 default 3 if X86_PAE <<
420 default 2 <<
421 1081
422 config CC_HAS_SANE_STACKPROTECTOR !! 1082 config CEVT_SB1250
423 bool 1083 bool
424 default $(success,$(srctree)/scripts/g <<
425 default $(success,$(srctree)/scripts/g <<
426 help <<
427 We have to make sure stack protector <<
428 the compiler produces broken code or <<
429 the segment on 32-bit kernels. <<
430 1084
431 menu "Processor type and features" !! 1085 config CEVT_TXX9
>> 1086 bool
432 1087
433 config SMP !! 1088 config CSRC_BCM1480
434 bool "Symmetric multi-processing suppo !! 1089 bool
435 help <<
436 This enables support for systems wit <<
437 a system with only one CPU, say N. I <<
438 than one CPU, say Y. <<
439 1090
440 If you say N here, the kernel will r !! 1091 config CSRC_IOASIC
441 machines, but will use only one CPU !! 1092 bool
442 you say Y here, the kernel will run <<
443 uniprocessor machines. On a uniproce <<
444 will run faster if you say N here. <<
445 1093
446 Note that if you say Y here and choo !! 1094 config CSRC_R4K
447 "Pentium" under "Processor family", !! 1095 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
448 architectures. Similarly, multiproce !! 1096 bool
449 architecture may not work on all Pen <<
450 1097
451 People using multiprocessor machines !! 1098 config CSRC_SB1250
452 Y to "Enhanced Real Time Clock Suppo !! 1099 bool
453 Management" code will be disabled if <<
454 1100
455 See also <file:Documentation/arch/x8 !! 1101 config MIPS_CLOCK_VSYSCALL
456 <file:Documentation/admin-guide/lock !! 1102 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
457 <http://www.tldp.org/docs.html#howto <<
458 1103
459 If you don't know what to do here, s !! 1104 config GPIO_TXX9
>> 1105 select GPIOLIB
>> 1106 bool
460 1107
461 config X86_X2APIC !! 1108 config FW_CFE
462 bool "Support x2apic" !! 1109 bool
463 depends on X86_LOCAL_APIC && X86_64 && <<
464 help <<
465 This enables x2apic support on CPUs <<
466 <<
467 This allows 32-bit apic IDs (so it c <<
468 and accesses the local apic via MSRs <<
469 <<
470 Some Intel systems circa 2022 and la <<
471 and can not fall back to the legacy <<
472 enabled in the BIOS. They will boot <<
473 without enabling this option. <<
474 1110
475 If you don't know what to do here, s !! 1111 config ARCH_SUPPORTS_UPROBES
>> 1112 bool
476 1113
477 config X86_POSTED_MSI !! 1114 config DMA_MAYBE_COHERENT
478 bool "Enable MSI and MSI-x delivery by !! 1115 select ARCH_HAS_DMA_COHERENCE_H
479 depends on X86_64 && IRQ_REMAP !! 1116 select DMA_NONCOHERENT
480 help !! 1117 bool
481 This enables MSIs that are under int <<
482 posted interrupts to the host kernel <<
483 potentially be improved by coalescin <<
484 frequency bursts. <<
485 1118
486 If you don't know what to do here, s !! 1119 config DMA_PERDEV_COHERENT
>> 1120 bool
>> 1121 select ARCH_HAS_SETUP_DMA_OPS
>> 1122 select DMA_NONCOHERENT
487 1123
488 config X86_MPPARSE !! 1124 config DMA_NONCOHERENT
489 bool "Enable MPS table" if ACPI !! 1125 bool
490 default y !! 1126 #
491 depends on X86_LOCAL_APIC !! 1127 # MIPS allows mixing "slightly different" Cacheability and Coherency
492 help !! 1128 # Attribute bits. It is believed that the uncached access through
493 For old smp systems that do not have !! 1129 # KSEG1 and the implementation specific "uncached accelerated" used
494 (esp with 64bit cpus) with acpi supp !! 1130 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1131 # significant advantages.
>> 1132 #
>> 1133 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1134 select ARCH_HAS_DMA_PREP_COHERENT
>> 1135 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1136 select ARCH_HAS_DMA_SET_UNCACHED
>> 1137 select DMA_NONCOHERENT_MMAP
>> 1138 select DMA_NONCOHERENT_CACHE_SYNC
>> 1139 select NEED_DMA_MAP_STATE
495 1140
496 config X86_CPU_RESCTRL !! 1141 config SYS_HAS_EARLY_PRINTK
497 bool "x86 CPU resource control support !! 1142 bool
498 depends on X86 && (CPU_SUP_INTEL || CP <<
499 select KERNFS <<
500 select PROC_CPU_RESCTRL if PRO <<
501 help <<
502 Enable x86 CPU resource control supp <<
503 1143
504 Provide support for the allocation a !! 1144 config SYS_SUPPORTS_HOTPLUG_CPU
505 usage by the CPU. !! 1145 bool
506 1146
507 Intel calls this Intel Resource Dire !! 1147 config MIPS_BONITO64
508 (Intel(R) RDT). More information abo !! 1148 bool
509 Intel x86 Architecture Software Deve <<
510 1149
511 AMD calls this AMD Platform Quality !! 1150 config MIPS_MSC
512 More information about AMD QoS can b !! 1151 bool
513 Platform Quality of Service Extensio <<
514 1152
515 Say N if unsure. !! 1153 config SYNC_R4K
>> 1154 bool
516 1155
517 config X86_FRED !! 1156 config NO_IOPORT_MAP
518 bool "Flexible Return and Event Delive !! 1157 def_bool n
519 depends on X86_64 <<
520 help <<
521 When enabled, try to use Flexible Re <<
522 instead of the legacy SYSCALL/SYSENT <<
523 ring transitions and exception/inter <<
524 system supports it. <<
525 1158
526 config X86_BIGSMP !! 1159 config GENERIC_CSUM
527 bool "Support for big SMP systems with !! 1160 def_bool CPU_NO_LOAD_STORE_LR
528 depends on SMP && X86_32 <<
529 help <<
530 This option is needed for the system <<
531 1161
532 config X86_EXTENDED_PLATFORM !! 1162 config GENERIC_ISA_DMA
533 bool "Support for extended (non-PC) x8 !! 1163 bool
534 default y !! 1164 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
535 help !! 1165 select ISA_DMA_API
536 If you disable this option then the <<
537 standard PC platforms. (which covers <<
538 systems out there.) <<
539 1166
540 If you enable this option then you'l !! 1167 config GENERIC_ISA_DMA_SUPPORT_BROKEN
541 for the following non-PC x86 platfor !! 1168 bool
542 CONFIG_64BIT. !! 1169 select GENERIC_ISA_DMA
543 1170
544 32-bit platforms (CONFIG_64BIT=n): !! 1171 config HAVE_PLAT_DELAY
545 Goldfish (Android emulator) !! 1172 bool
546 AMD Elan <<
547 RDC R-321x SoC <<
548 SGI 320/540 (Visual Workstatio <<
549 STA2X11-based (e.g. Northville <<
550 Moorestown MID devices <<
551 1173
552 64-bit platforms (CONFIG_64BIT=y): !! 1174 config HAVE_PLAT_FW_INIT_CMDLINE
553 Numascale NumaChip !! 1175 bool
554 ScaleMP vSMP <<
555 SGI Ultraviolet <<
556 1176
557 If you have one of these systems, or !! 1177 config HAVE_PLAT_MEMCPY
558 generic distribution kernel, say Y h !! 1178 bool
559 1179
560 # This is an alphabetically sorted list of 64 !! 1180 config ISA_DMA_API
561 # Please maintain the alphabetic order if and !! 1181 bool
562 config X86_NUMACHIP <<
563 bool "Numascale NumaChip" <<
564 depends on X86_64 <<
565 depends on X86_EXTENDED_PLATFORM <<
566 depends on NUMA <<
567 depends on SMP <<
568 depends on X86_X2APIC <<
569 depends on PCI_MMCONFIG <<
570 help <<
571 Adds support for Numascale NumaChip <<
572 enable more than ~168 cores. <<
573 If you don't have one of these, you <<
574 <<
575 config X86_VSMP <<
576 bool "ScaleMP vSMP" <<
577 select HYPERVISOR_GUEST <<
578 select PARAVIRT <<
579 depends on X86_64 && PCI <<
580 depends on X86_EXTENDED_PLATFORM <<
581 depends on SMP <<
582 help <<
583 Support for ScaleMP vSMP systems. S <<
584 supposed to run on these EM64T-based <<
585 if you have one of these machines. <<
586 <<
587 config X86_UV <<
588 bool "SGI Ultraviolet" <<
589 depends on X86_64 <<
590 depends on X86_EXTENDED_PLATFORM <<
591 depends on NUMA <<
592 depends on EFI <<
593 depends on KEXEC_CORE <<
594 depends on X86_X2APIC <<
595 depends on PCI <<
596 help <<
597 This option is needed in order to su <<
598 If you don't have one of these, you <<
599 <<
600 # Following is an alphabetically sorted list o <<
601 # Please maintain the alphabetic order if and <<
602 <<
603 config X86_GOLDFISH <<
604 bool "Goldfish (Virtual Platform)" <<
605 depends on X86_EXTENDED_PLATFORM <<
606 help <<
607 Enable support for the Goldfish virt <<
608 for Android development. Unless you <<
609 Goldfish emulator say N here. <<
610 <<
611 config X86_INTEL_CE <<
612 bool "CE4100 TV platform" <<
613 depends on PCI <<
614 depends on PCI_GODIRECT <<
615 depends on X86_IO_APIC <<
616 depends on X86_32 <<
617 depends on X86_EXTENDED_PLATFORM <<
618 select X86_REBOOTFIXUPS <<
619 select OF <<
620 select OF_EARLY_FLATTREE <<
621 help <<
622 Select for the Intel CE media proces <<
623 This option compiles in support for <<
624 boxes and media devices. <<
625 <<
626 config X86_INTEL_MID <<
627 bool "Intel MID platform support" <<
628 depends on X86_EXTENDED_PLATFORM <<
629 depends on X86_PLATFORM_DEVICES <<
630 depends on PCI <<
631 depends on X86_64 || (PCI_GOANY && X86 <<
632 depends on X86_IO_APIC <<
633 select I2C <<
634 select DW_APB_TIMER <<
635 select INTEL_SCU_PCI <<
636 help <<
637 Select to build a kernel capable of <<
638 Internet Device) platform systems wh <<
639 interfaces. If you are building for <<
640 <<
641 Intel MID platforms are based on an <<
642 consume less power than most of the <<
643 <<
644 config X86_INTEL_QUARK <<
645 bool "Intel Quark platform support" <<
646 depends on X86_32 <<
647 depends on X86_EXTENDED_PLATFORM <<
648 depends on X86_PLATFORM_DEVICES <<
649 depends on X86_TSC <<
650 depends on PCI <<
651 depends on PCI_GOANY <<
652 depends on X86_IO_APIC <<
653 select IOSF_MBI <<
654 select INTEL_IMR <<
655 select COMMON_CLK <<
656 help <<
657 Select to include support for Quark <<
658 Say Y here if you have a Quark based <<
659 compatible Intel Galileo. <<
660 <<
661 config X86_INTEL_LPSS <<
662 bool "Intel Low Power Subsystem Suppor <<
663 depends on X86 && ACPI && PCI <<
664 select COMMON_CLK <<
665 select PINCTRL <<
666 select IOSF_MBI <<
667 help <<
668 Select to build support for Intel Lo <<
669 found on Intel Lynxpoint PCH. Select <<
670 things like clock tree (common clock <<
671 which are needed by the LPSS periphe <<
672 <<
673 config X86_AMD_PLATFORM_DEVICE <<
674 bool "AMD ACPI2Platform devices suppor <<
675 depends on ACPI <<
676 select COMMON_CLK <<
677 select PINCTRL <<
678 help <<
679 Select to interpret AMD specific ACP <<
680 such as I2C, UART, GPIO found on AMD <<
681 I2C and UART depend on COMMON_CLK to <<
682 implemented under PINCTRL subsystem. <<
683 <<
684 config IOSF_MBI <<
685 tristate "Intel SoC IOSF Sideband supp <<
686 depends on PCI <<
687 help <<
688 This option enables sideband registe <<
689 platforms. On these platforms the IO <<
690 MSR's for some register accesses, mo <<
691 and power. Drivers may query the ava <<
692 determine if they need the sideband <<
693 platforms. The sideband is available <<
694 This list is not meant to be exclusi <<
695 - BayTrail <<
696 - Braswell <<
697 - Quark <<
698 <<
699 You should say Y if you are running <<
700 <<
701 config IOSF_MBI_DEBUG <<
702 bool "Enable IOSF sideband access thro <<
703 depends on IOSF_MBI && DEBUG_FS <<
704 help <<
705 Select this option to expose the IOS <<
706 MDR, MCRX) through debugfs to write <<
707 different units on the SoC. This is <<
708 state information for debug and anal <<
709 mechanism, users of this option woul <<
710 device they want to access. <<
711 <<
712 If you don't require the option or a <<
713 <<
714 config X86_RDC321X <<
715 bool "RDC R-321x SoC" <<
716 depends on X86_32 <<
717 depends on X86_EXTENDED_PLATFORM <<
718 select M486 <<
719 select X86_REBOOTFIXUPS <<
720 help <<
721 This option is needed for RDC R-321x <<
722 as R-8610-(G). <<
723 If you don't have one of these chips <<
724 <<
725 config X86_32_NON_STANDARD <<
726 bool "Support non-standard 32-bit SMP <<
727 depends on X86_32 && SMP <<
728 depends on X86_EXTENDED_PLATFORM <<
729 help <<
730 This option compiles in the bigsmp a <<
731 subarchitectures. It is intended fo <<
732 kernel. If you select them all, kern <<
733 one and will fallback to default. <<
734 1182
735 # Alphabetically sorted list of Non standard 3 !! 1183 config HOLES_IN_ZONE
>> 1184 bool
736 1185
737 config X86_SUPPORTS_MEMORY_FAILURE !! 1186 config SYS_SUPPORTS_RELOCATABLE
738 def_bool y !! 1187 bool
739 # MCE code calls memory_failure(): <<
740 depends on X86_MCE <<
741 # On 32-bit this adds too big of NODES <<
742 # On 32-bit SPARSEMEM adds too big of <<
743 depends on X86_64 || !SPARSEMEM <<
744 select ARCH_SUPPORTS_MEMORY_FAILURE <<
745 <<
746 config STA2X11 <<
747 bool "STA2X11 Companion Chip Support" <<
748 depends on X86_32_NON_STANDARD && PCI <<
749 select SWIOTLB <<
750 select MFD_STA2X11 <<
751 select GPIOLIB <<
752 help 1188 help
753 This adds support for boards based o !! 1189 Selected if the platform supports relocating the kernel.
754 a.k.a. "ConneXt". The chip is used i !! 1190 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
755 PC chipset, so all "standard" periph !! 1191 to allow access to command line and entropy sources.
756 option is selected the kernel will s <<
757 standard PC machines. <<
758 <<
759 config X86_32_IRIS <<
760 tristate "Eurobraille/Iris poweroff mo <<
761 depends on X86_32 <<
762 help <<
763 The Iris machines from EuroBraille d <<
764 to shut themselves down properly. A <<
765 needed to do so, which is what this <<
766 kernel shutdown. <<
767 1192
768 This is only for Iris machines from !! 1193 config MIPS_CBPF_JIT
769 !! 1194 def_bool y
770 If unused, say N. !! 1195 depends on BPF_JIT && HAVE_CBPF_JIT
771 1196
772 config SCHED_OMIT_FRAME_POINTER !! 1197 config MIPS_EBPF_JIT
773 def_bool y 1198 def_bool y
774 prompt "Single-depth WCHAN output" !! 1199 depends on BPF_JIT && HAVE_EBPF_JIT
775 depends on X86 <<
776 help <<
777 Calculate simpler /proc/<PID>/wchan <<
778 is disabled then wchan values will r <<
779 caller function. This provides more <<
780 at the expense of slightly more sche <<
781 1200
782 If in doubt, say "Y". <<
783 1201
784 menuconfig HYPERVISOR_GUEST !! 1202 #
785 bool "Linux guest support" !! 1203 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1204 # answer,so we try hard to limit the available choices. Also the use of a
>> 1205 # choice statement should be more obvious to the user.
>> 1206 #
>> 1207 choice
>> 1208 prompt "Endianness selection"
786 help 1209 help
787 Say Y here to enable options for run !! 1210 Some MIPS machines can be configured for either little or big endian
788 visors. This option enables basic hy !! 1211 byte order. These modes require different kernels and a different
789 setup. !! 1212 Linux distribution. In general there is one preferred byteorder for a
>> 1213 particular system but some systems are just as commonly used in the
>> 1214 one or the other endianness.
>> 1215
>> 1216 config CPU_BIG_ENDIAN
>> 1217 bool "Big endian"
>> 1218 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1219
>> 1220 config CPU_LITTLE_ENDIAN
>> 1221 bool "Little endian"
>> 1222 depends on SYS_SUPPORTS_LITTLE_ENDIAN
790 1223
791 If you say N, all options in this su !! 1224 endchoice
792 disabled, and Linux guest support wo <<
793 <<
794 if HYPERVISOR_GUEST <<
795 <<
796 config PARAVIRT <<
797 bool "Enable paravirtualization code" <<
798 depends on HAVE_STATIC_CALL <<
799 help <<
800 This changes the kernel so it can mo <<
801 under a hypervisor, potentially impr <<
802 over full virtualization. However, <<
803 the kernel is theoretically slower a <<
804 1225
805 config PARAVIRT_XXL !! 1226 config EXPORT_UASM
806 bool 1227 bool
807 1228
808 config PARAVIRT_DEBUG !! 1229 config SYS_SUPPORTS_APM_EMULATION
809 bool "paravirt-ops debugging" !! 1230 bool
810 depends on PARAVIRT && DEBUG_KERNEL <<
811 help <<
812 Enable to debug paravirt_ops interna <<
813 a paravirt_op is missing when it is <<
814 1231
815 config PARAVIRT_SPINLOCKS !! 1232 config SYS_SUPPORTS_BIG_ENDIAN
816 bool "Paravirtualization layer for spi !! 1233 bool
817 depends on PARAVIRT && SMP <<
818 help <<
819 Paravirtualized spinlocks allow a pv <<
820 spinlock implementation with somethi <<
821 (for example, block the virtual CPU <<
822 1234
823 It has a minimal impact on native ke !! 1235 config SYS_SUPPORTS_LITTLE_ENDIAN
824 benefit on paravirtualized KVM / Xen !! 1236 bool
825 1237
826 If you are unsure how to answer this !! 1238 config SYS_SUPPORTS_HUGETLBFS
>> 1239 bool
>> 1240 depends on CPU_SUPPORTS_HUGEPAGES
>> 1241 default y
827 1242
828 config X86_HV_CALLBACK_VECTOR !! 1243 config MIPS_HUGE_TLB_SUPPORT
829 def_bool n !! 1244 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
830 1245
831 source "arch/x86/xen/Kconfig" !! 1246 config IRQ_CPU_RM7K
>> 1247 bool
832 1248
833 config KVM_GUEST !! 1249 config IRQ_MSP_SLP
834 bool "KVM Guest support (including kvm !! 1250 bool
835 depends on PARAVIRT <<
836 select PARAVIRT_CLOCK <<
837 select ARCH_CPUIDLE_HALTPOLL <<
838 select X86_HV_CALLBACK_VECTOR <<
839 default y <<
840 help <<
841 This option enables various optimiza <<
842 hypervisor. It includes a paravirtua <<
843 of relying on a PIT (or probably oth <<
844 underlying device model, the host pr <<
845 timing infrastructure such as time o <<
846 1251
847 config ARCH_CPUIDLE_HALTPOLL !! 1252 config IRQ_MSP_CIC
848 def_bool n !! 1253 bool
849 prompt "Disable host haltpoll when loa <<
850 help <<
851 If virtualized under KVM, disable ho <<
852 1254
853 config PVH !! 1255 config IRQ_TXX9
854 bool "Support for running PVH guests" !! 1256 bool
855 help <<
856 This option enables the PVH entry po <<
857 as specified in the x86/HVM direct b <<
858 <<
859 config PARAVIRT_TIME_ACCOUNTING <<
860 bool "Paravirtual steal time accountin <<
861 depends on PARAVIRT <<
862 help <<
863 Select this option to enable fine gr <<
864 accounting. Time spent executing oth <<
865 the current vCPU is discounted from <<
866 that, there can be a small performan <<
867 <<
868 If in doubt, say N here. <<
869 <<
870 config PARAVIRT_CLOCK <<
871 bool <<
872 <<
873 config JAILHOUSE_GUEST <<
874 bool "Jailhouse non-root cell support" <<
875 depends on X86_64 && PCI <<
876 select X86_PM_TIMER <<
877 help <<
878 This option allows to run Linux as g <<
879 cell. You can leave this option disa <<
880 Jailhouse and run Linux afterwards i <<
881 <<
882 config ACRN_GUEST <<
883 bool "ACRN Guest support" <<
884 depends on X86_64 <<
885 select X86_HV_CALLBACK_VECTOR <<
886 help <<
887 This option allows to run Linux as g <<
888 a flexible, lightweight reference op <<
889 real-time and safety-criticality in <<
890 IOT with small footprint and real-ti <<
891 found in https://projectacrn.org/. <<
892 <<
893 config INTEL_TDX_GUEST <<
894 bool "Intel TDX (Trust Domain Extensio <<
895 depends on X86_64 && CPU_SUP_INTEL <<
896 depends on X86_X2APIC <<
897 depends on EFI_STUB <<
898 select ARCH_HAS_CC_PLATFORM <<
899 select X86_MEM_ENCRYPT <<
900 select X86_MCE <<
901 select UNACCEPTED_MEMORY <<
902 help <<
903 Support running as a guest under Int <<
904 the guest kernel can not boot or run <<
905 TDX includes memory encryption and i <<
906 which protect the confidentiality an <<
907 memory contents and CPU state. TDX g <<
908 some attacks from the VMM. <<
909 <<
910 endif # HYPERVISOR_GUEST <<
911 <<
912 source "arch/x86/Kconfig.cpu" <<
913 <<
914 config HPET_TIMER <<
915 def_bool X86_64 <<
916 prompt "HPET Timer Support" if X86_32 <<
917 help <<
918 Use the IA-PC HPET (High Precision E <<
919 time in preference to the PIT and RT <<
920 present. <<
921 HPET is the next generation timer re <<
922 The HPET provides a stable time base <<
923 systems, unlike the TSC, but it is m <<
924 as it is off-chip. The interface us <<
925 in the HPET spec, revision 1. <<
926 <<
927 You can safely choose Y here. Howev <<
928 activated if the platform and the BI <<
929 Otherwise the 8254 will be used for <<
930 1257
931 Choose N to continue using the legac !! 1258 config IRQ_GT641XX
>> 1259 bool
932 1260
933 config HPET_EMULATE_RTC !! 1261 config PCI_GT64XXX_PCI0
934 def_bool y !! 1262 bool
935 depends on HPET_TIMER && (RTC_DRV_CMOS <<
936 1263
937 # Mark as expert because too many people got i !! 1264 config PCI_XTALK_BRIDGE
938 # The code disables itself when not needed. !! 1265 bool
939 config DMI <<
940 default y <<
941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA <<
942 bool "Enable DMI scanning" if EXPERT <<
943 help <<
944 Enabled scanning of DMI to identify <<
945 here unless you have verified that y <<
946 affected by entries in the DMI black <<
947 BIOS code. <<
948 1266
949 config GART_IOMMU !! 1267 config NO_EXCEPT_FILL
950 bool "Old AMD GART IOMMU support" !! 1268 bool
951 select IOMMU_HELPER <<
952 select SWIOTLB <<
953 depends on X86_64 && PCI && AMD_NB <<
954 help <<
955 Provides a driver for older AMD Athl <<
956 GART based hardware IOMMUs. <<
957 1269
958 The GART supports full DMA access fo !! 1270 config SOC_PNX833X
959 limitations, on systems with more th !! 1271 bool
960 for USB, sound, many IDE/SATA chipse !! 1272 select CEVT_R4K
>> 1273 select CSRC_R4K
>> 1274 select IRQ_MIPS_CPU
>> 1275 select DMA_NONCOHERENT
>> 1276 select SYS_HAS_CPU_MIPS32_R2
>> 1277 select SYS_SUPPORTS_32BIT_KERNEL
>> 1278 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1279 select SYS_SUPPORTS_BIG_ENDIAN
>> 1280 select SYS_SUPPORTS_MIPS16
>> 1281 select CPU_MIPSR2_IRQ_VI
961 1282
962 Newer systems typically have a moder !! 1283 config SOC_PNX8335
963 the CONFIG_AMD_IOMMU=y config option !! 1284 bool
>> 1285 select SOC_PNX833X
964 1286
965 In normal configurations this driver !! 1287 config MIPS_SPRAM
966 there's more than 3 GB of memory and !! 1288 bool
967 32-bit limited device. <<
968 1289
969 If unsure, say Y. !! 1290 config SWAP_IO_SPACE
>> 1291 bool
970 1292
971 config BOOT_VESA_SUPPORT !! 1293 config SGI_HAS_INDYDOG
972 bool 1294 bool
973 help <<
974 If true, at least one selected frame <<
975 of VESA video modes set at an early <<
976 1295
977 config MAXSMP !! 1296 config SGI_HAS_HAL2
978 bool "Enable Maximum number of SMP Pro !! 1297 bool
979 depends on X86_64 && SMP && DEBUG_KERN <<
980 select CPUMASK_OFFSTACK <<
981 help <<
982 Enable maximum number of CPUS and NU <<
983 If unsure, say N. <<
984 1298
985 # !! 1299 config SGI_HAS_SEEQ
986 # The maximum number of CPUs supported: !! 1300 bool
987 # <<
988 # The main config value is NR_CPUS, which defa <<
989 # and which can be configured interactively in <<
990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] <<
991 # <<
992 # The ranges are different on 32-bit and 64-bi <<
993 # hardware capabilities and scalability featur <<
994 # <<
995 # ( If MAXSMP is enabled we just use the highe <<
996 # interactive configuration. ) <<
997 # <<
998 1301
999 config NR_CPUS_RANGE_BEGIN !! 1302 config SGI_HAS_WD93
1000 int !! 1303 bool
1001 default NR_CPUS_RANGE_END if MAXSMP <<
1002 default 1 if !SMP <<
1003 default 2 <<
1004 1304
1005 config NR_CPUS_RANGE_END !! 1305 config SGI_HAS_ZILOG
1006 int !! 1306 bool
1007 depends on X86_32 <<
1008 default 64 if SMP && X86_BIGSMP <<
1009 default 8 if SMP && !X86_BIGSMP <<
1010 default 1 if !SMP <<
1011 1307
1012 config NR_CPUS_RANGE_END !! 1308 config SGI_HAS_I8042
1013 int !! 1309 bool
1014 depends on X86_64 <<
1015 default 8192 if SMP && CPUMASK_OFFST <<
1016 default 512 if SMP && !CPUMASK_OFFS <<
1017 default 1 if !SMP <<
1018 1310
1019 config NR_CPUS_DEFAULT !! 1311 config DEFAULT_SGI_PARTITION
1020 int !! 1312 bool
1021 depends on X86_32 <<
1022 default 32 if X86_BIGSMP <<
1023 default 8 if SMP <<
1024 default 1 if !SMP <<
1025 1313
1026 config NR_CPUS_DEFAULT !! 1314 config FW_ARC32
1027 int !! 1315 bool
1028 depends on X86_64 <<
1029 default 8192 if MAXSMP <<
1030 default 64 if SMP <<
1031 default 1 if !SMP <<
1032 1316
1033 config NR_CPUS !! 1317 config FW_SNIPROM
1034 int "Maximum number of CPUs" if SMP & !! 1318 bool
1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN <<
1036 default NR_CPUS_DEFAULT <<
1037 help <<
1038 This allows you to specify the maxi <<
1039 kernel will support. If CPUMASK_OF <<
1040 supported value is 8192, otherwise <<
1041 minimum value which makes sense is <<
1042 1319
1043 This is purely to save memory: each !! 1320 config BOOT_ELF32
1044 to the kernel image. !! 1321 bool
1045 1322
1046 config SCHED_CLUSTER !! 1323 config MIPS_L1_CACHE_SHIFT_4
1047 bool "Cluster scheduler support" !! 1324 bool
1048 depends on SMP <<
1049 default y <<
1050 help <<
1051 Cluster scheduler support improves <<
1052 making when dealing with machines t <<
1053 Cluster usually means a couple of C <<
1054 by sharing mid-level caches, last-l <<
1055 busses. <<
1056 1325
1057 config SCHED_SMT !! 1326 config MIPS_L1_CACHE_SHIFT_5
1058 def_bool y if SMP !! 1327 bool
1059 1328
1060 config SCHED_MC !! 1329 config MIPS_L1_CACHE_SHIFT_6
1061 def_bool y !! 1330 bool
1062 prompt "Multi-core scheduler support" <<
1063 depends on SMP <<
1064 help <<
1065 Multi-core scheduler support improv <<
1066 making when dealing with multi-core <<
1067 increased overhead in some places. <<
1068 1331
1069 config SCHED_MC_PRIO !! 1332 config MIPS_L1_CACHE_SHIFT_7
1070 bool "CPU core priorities scheduler s !! 1333 bool
1071 depends on SCHED_MC <<
1072 select X86_INTEL_PSTATE if CPU_SUP_IN <<
1073 select X86_AMD_PSTATE if CPU_SUP_AMD <<
1074 select CPU_FREQ <<
1075 default y <<
1076 help <<
1077 Intel Turbo Boost Max Technology 3. <<
1078 core ordering determined at manufac <<
1079 certain cores to reach higher turbo <<
1080 single threaded workloads) than oth <<
1081 1334
1082 Enabling this kernel feature teache !! 1335 config MIPS_L1_CACHE_SHIFT
1083 the TBM3 (aka ITMT) priority order !! 1336 int
1084 scheduler's CPU selection logic acc !! 1337 default "7" if MIPS_L1_CACHE_SHIFT_7
1085 overall system performance can be a !! 1338 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1339 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1340 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1341 default "5"
1086 1342
1087 This feature will have no effect on !! 1343 config ARC_CMDLINE_ONLY
>> 1344 bool
1088 1345
1089 If unsure say Y here. !! 1346 config ARC_CONSOLE
>> 1347 bool "ARC console support"
>> 1348 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1090 1349
1091 config UP_LATE_INIT !! 1350 config ARC_MEMORY
1092 def_bool y !! 1351 bool
1093 depends on !SMP && X86_LOCAL_APIC <<
1094 1352
1095 config X86_UP_APIC !! 1353 config ARC_PROMLIB
1096 bool "Local APIC support on uniproces !! 1354 bool
1097 default PCI_MSI <<
1098 depends on X86_32 && !SMP && !X86_32_ <<
1099 help <<
1100 A local APIC (Advanced Programmable <<
1101 integrated interrupt controller in <<
1102 system which has a processor with a <<
1103 enable and use it. If you say Y her <<
1104 have a local APIC, then the kernel <<
1105 all. The local APIC supports CPU-ge <<
1106 performance counters), and the NMI <<
1107 lockups. <<
1108 <<
1109 config X86_UP_IOAPIC <<
1110 bool "IO-APIC support on uniprocessor <<
1111 depends on X86_UP_APIC <<
1112 help <<
1113 An IO-APIC (I/O Advanced Programmab <<
1114 SMP-capable replacement for PC-styl <<
1115 SMP systems and many recent uniproc <<
1116 <<
1117 If you have a single-CPU system wit <<
1118 to use it. If you say Y here even t <<
1119 an IO-APIC, then the kernel will st <<
1120 1355
1121 config X86_LOCAL_APIC !! 1356 config FW_ARC64
1122 def_bool y !! 1357 bool
1123 depends on X86_64 || SMP || X86_32_NO <<
1124 select IRQ_DOMAIN_HIERARCHY <<
1125 1358
1126 config ACPI_MADT_WAKEUP !! 1359 config BOOT_ELF64
1127 def_bool y !! 1360 bool
1128 depends on X86_64 <<
1129 depends on ACPI <<
1130 depends on SMP <<
1131 depends on X86_LOCAL_APIC <<
1132 1361
1133 config X86_IO_APIC !! 1362 menu "CPU selection"
1134 def_bool y <<
1135 depends on X86_LOCAL_APIC || X86_UP_I <<
1136 1363
1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1364 choice
1138 bool "Reroute for broken boot IRQs" !! 1365 prompt "CPU type"
1139 depends on X86_IO_APIC !! 1366 default CPU_R4X00
1140 help <<
1141 This option enables a workaround th <<
1142 spurious interrupts. This is recomm <<
1143 interrupt handling is used on syste <<
1144 superfluous "boot interrupts" canno <<
1145 <<
1146 Some chipsets generate a legacy INT <<
1147 entry in the chipset's IO-APIC is m <<
1148 kernel does during interrupt handli <<
1149 boot IRQ generation cannot be disab <<
1150 the original IRQ line masked so tha <<
1151 IRQ" is delivered to the CPUs. The <<
1152 kernel to set up the IRQ handler on <<
1153 way only one interrupt is delivered <<
1154 the spurious second interrupt may c <<
1155 down (vital) interrupt lines. <<
1156 <<
1157 Only affects "broken" chipsets. Int <<
1158 increased on these systems. <<
1159 <<
1160 config X86_MCE <<
1161 bool "Machine Check / overheating rep <<
1162 select GENERIC_ALLOCATOR <<
1163 default y <<
1164 help <<
1165 Machine Check support allows the pr <<
1166 kernel if it detects a problem (e.g <<
1167 The action the kernel takes depends <<
1168 ranging from warning messages to ha <<
1169 <<
1170 config X86_MCELOG_LEGACY <<
1171 bool "Support for deprecated /dev/mce <<
1172 depends on X86_MCE <<
1173 help <<
1174 Enable support for /dev/mcelog whic <<
1175 userspace logging daemon. Consider <<
1176 rasdaemon solution. <<
1177 1367
1178 config X86_MCE_INTEL !! 1368 config CPU_LOONGSON64
1179 def_bool y !! 1369 bool "Loongson 64-bit CPU"
1180 prompt "Intel MCE features" !! 1370 depends on SYS_HAS_CPU_LOONGSON64
1181 depends on X86_MCE && X86_LOCAL_APIC !! 1371 select ARCH_HAS_PHYS_TO_DMA
>> 1372 select CPU_MIPSR2
>> 1373 select CPU_HAS_PREFETCH
>> 1374 select CPU_SUPPORTS_64BIT_KERNEL
>> 1375 select CPU_SUPPORTS_HIGHMEM
>> 1376 select CPU_SUPPORTS_HUGEPAGES
>> 1377 select CPU_SUPPORTS_MSA
>> 1378 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1379 select CPU_MIPSR2_IRQ_VI
>> 1380 select WEAK_ORDERING
>> 1381 select WEAK_REORDERING_BEYOND_LLSC
>> 1382 select MIPS_ASID_BITS_VARIABLE
>> 1383 select MIPS_PGD_C0_CONTEXT
>> 1384 select MIPS_L1_CACHE_SHIFT_6
>> 1385 select GPIOLIB
>> 1386 select SWIOTLB
>> 1387 select HAVE_KVM
1182 help 1388 help
1183 Additional support for intel specif !! 1389 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1184 the thermal monitor. !! 1390 cores implements the MIPS64R2 instruction set with many extensions,
>> 1391 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
>> 1392 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
>> 1393 Loongson-2E/2F is not covered here and will be removed in future.
1185 1394
1186 config X86_MCE_AMD !! 1395 config LOONGSON3_ENHANCEMENT
1187 def_bool y !! 1396 bool "New Loongson-3 CPU Enhancements"
1188 prompt "AMD MCE features" !! 1397 default n
1189 depends on X86_MCE && X86_LOCAL_APIC !! 1398 depends on CPU_LOONGSON64
1190 help 1399 help
1191 Additional support for AMD specific !! 1400 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1192 the DRAM Error Threshold. !! 1401 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1402 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1403 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1404 Fast TLB refill support, etc.
1193 1405
1194 config X86_ANCIENT_MCE !! 1406 This option enable those enhancements which are not probed at run
1195 bool "Support for old Pentium 5 / Win !! 1407 time. If you want a generic kernel to run on all Loongson 3 machines,
1196 depends on X86_32 && X86_MCE !! 1408 please say 'N' here. If you want a high-performance kernel to run on
1197 help !! 1409 new Loongson-3 machines only, please say 'Y' here.
1198 Include support for machine check h <<
1199 systems. These typically need to be <<
1200 line. <<
1201 1410
1202 config X86_MCE_THRESHOLD !! 1411 config CPU_LOONGSON3_WORKAROUNDS
1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1412 bool "Old Loongson-3 LLSC Workarounds"
1204 def_bool y !! 1413 default y if SMP
1205 !! 1414 depends on CPU_LOONGSON64
1206 config X86_MCE_INJECT <<
1207 depends on X86_MCE && X86_LOCAL_APIC <<
1208 tristate "Machine check injector supp <<
1209 help 1415 help
1210 Provide support for injecting machi !! 1416 Loongson-3 processors have the llsc issues which require workarounds.
1211 If you don't know what a machine ch !! 1417 Without workarounds the system may hang unexpectedly.
1212 QA it is safe to say n. <<
1213 <<
1214 source "arch/x86/events/Kconfig" <<
1215 1418
1216 config X86_LEGACY_VM86 !! 1419 Newer Loongson-3 will fix these issues and no workarounds are needed.
1217 bool "Legacy VM86 support" !! 1420 The workarounds have no significant side effect on them but may
1218 depends on X86_32 !! 1421 decrease the performance of the system so this option should be
1219 help !! 1422 disabled unless the kernel is intended to be run on old systems.
1220 This option allows user programs to <<
1221 mode, which is an 80286-era approxi <<
1222 1423
1223 Some very old versions of X and/or !! 1424 If unsure, please say Y.
1224 for user mode setting. Similarly, <<
1225 available to accelerate real mode D <<
1226 recent version of DOSEMU, X, or vbe <<
1227 functional even without kernel VM86 <<
1228 fall back to software emulation. Ne <<
1229 a 16-bit DOS program where 16-bit p <<
1230 mode might be faster than emulation <<
1231 enable this option. <<
1232 1425
1233 Note that any app that works on a 6 !! 1426 config CPU_LOONGSON3_CPUCFG_EMULATION
1234 need this option, as 64-bit kernels !! 1427 bool "Emulate the CPUCFG instruction on older Loongson cores"
1235 V8086 mode. This option is also unr !! 1428 default y
1236 mode and is not needed to run most !! 1429 depends on CPU_LOONGSON64
>> 1430 help
>> 1431 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1432 userland to query CPU capabilities, much like CPUID on x86. This
>> 1433 option provides emulation of the instruction on older Loongson
>> 1434 cores, back to Loongson-3A1000.
1237 1435
1238 Enabling this option increases the !! 1436 If unsure, please say Y.
1239 and slows down exception handling a <<
1240 1437
1241 If unsure, say N here. !! 1438 config CPU_LOONGSON2E
>> 1439 bool "Loongson 2E"
>> 1440 depends on SYS_HAS_CPU_LOONGSON2E
>> 1441 select CPU_LOONGSON2EF
>> 1442 help
>> 1443 The Loongson 2E processor implements the MIPS III instruction set
>> 1444 with many extensions.
1242 1445
1243 config VM86 !! 1446 It has an internal FPGA northbridge, which is compatible to
1244 bool !! 1447 bonito64.
1245 default X86_LEGACY_VM86 <<
1246 1448
1247 config X86_16BIT !! 1449 config CPU_LOONGSON2F
1248 bool "Enable support for 16-bit segme !! 1450 bool "Loongson 2F"
1249 default y !! 1451 depends on SYS_HAS_CPU_LOONGSON2F
1250 depends on MODIFY_LDT_SYSCALL !! 1452 select CPU_LOONGSON2EF
>> 1453 select GPIOLIB
1251 help 1454 help
1252 This option is required by programs !! 1455 The Loongson 2F processor implements the MIPS III instruction set
1253 protected mode legacy code on x86 p !! 1456 with many extensions.
1254 this option saves about 300 bytes o <<
1255 plus 16K runtime memory on x86-64, <<
1256 1457
1257 config X86_ESPFIX32 !! 1458 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1258 def_bool y !! 1459 have a similar programming interface with FPGA northbridge used in
1259 depends on X86_16BIT && X86_32 !! 1460 Loongson2E.
>> 1461
>> 1462 config CPU_LOONGSON1B
>> 1463 bool "Loongson 1B"
>> 1464 depends on SYS_HAS_CPU_LOONGSON1B
>> 1465 select CPU_LOONGSON32
>> 1466 select LEDS_GPIO_REGISTER
>> 1467 help
>> 1468 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1469 Release 1 instruction set and part of the MIPS32 Release 2
>> 1470 instruction set.
>> 1471
>> 1472 config CPU_LOONGSON1C
>> 1473 bool "Loongson 1C"
>> 1474 depends on SYS_HAS_CPU_LOONGSON1C
>> 1475 select CPU_LOONGSON32
>> 1476 select LEDS_GPIO_REGISTER
>> 1477 help
>> 1478 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1479 Release 1 instruction set and part of the MIPS32 Release 2
>> 1480 instruction set.
>> 1481
>> 1482 config CPU_MIPS32_R1
>> 1483 bool "MIPS32 Release 1"
>> 1484 depends on SYS_HAS_CPU_MIPS32_R1
>> 1485 select CPU_HAS_PREFETCH
>> 1486 select CPU_SUPPORTS_32BIT_KERNEL
>> 1487 select CPU_SUPPORTS_HIGHMEM
>> 1488 help
>> 1489 Choose this option to build a kernel for release 1 or later of the
>> 1490 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1491 MIPS processor are based on a MIPS32 processor. If you know the
>> 1492 specific type of processor in your system, choose those that one
>> 1493 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1494 Release 2 of the MIPS32 architecture is available since several
>> 1495 years so chances are you even have a MIPS32 Release 2 processor
>> 1496 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1497 performance.
1260 1498
1261 config X86_ESPFIX64 !! 1499 config CPU_MIPS32_R2
1262 def_bool y !! 1500 bool "MIPS32 Release 2"
1263 depends on X86_16BIT && X86_64 !! 1501 depends on SYS_HAS_CPU_MIPS32_R2
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_HIGHMEM
>> 1505 select CPU_SUPPORTS_MSA
>> 1506 select HAVE_KVM
>> 1507 help
>> 1508 Choose this option to build a kernel for release 2 or later of the
>> 1509 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1510 MIPS processor are based on a MIPS32 processor. If you know the
>> 1511 specific type of processor in your system, choose those that one
>> 1512 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1513
>> 1514 config CPU_MIPS32_R5
>> 1515 bool "MIPS32 Release 5"
>> 1516 depends on SYS_HAS_CPU_MIPS32_R5
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_SUPPORTS_32BIT_KERNEL
>> 1519 select CPU_SUPPORTS_HIGHMEM
>> 1520 select CPU_SUPPORTS_MSA
>> 1521 select HAVE_KVM
>> 1522 select MIPS_O32_FP64_SUPPORT
>> 1523 help
>> 1524 Choose this option to build a kernel for release 5 or later of the
>> 1525 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1526 family, are based on a MIPS32r5 processor. If you own an older
>> 1527 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1528
>> 1529 config CPU_MIPS32_R6
>> 1530 bool "MIPS32 Release 6"
>> 1531 depends on SYS_HAS_CPU_MIPS32_R6
>> 1532 select CPU_HAS_PREFETCH
>> 1533 select CPU_NO_LOAD_STORE_LR
>> 1534 select CPU_SUPPORTS_32BIT_KERNEL
>> 1535 select CPU_SUPPORTS_HIGHMEM
>> 1536 select CPU_SUPPORTS_MSA
>> 1537 select HAVE_KVM
>> 1538 select MIPS_O32_FP64_SUPPORT
>> 1539 help
>> 1540 Choose this option to build a kernel for release 6 or later of the
>> 1541 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1542 family, are based on a MIPS32r6 processor. If you own an older
>> 1543 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1544
>> 1545 config CPU_MIPS64_R1
>> 1546 bool "MIPS64 Release 1"
>> 1547 depends on SYS_HAS_CPU_MIPS64_R1
>> 1548 select CPU_HAS_PREFETCH
>> 1549 select CPU_SUPPORTS_32BIT_KERNEL
>> 1550 select CPU_SUPPORTS_64BIT_KERNEL
>> 1551 select CPU_SUPPORTS_HIGHMEM
>> 1552 select CPU_SUPPORTS_HUGEPAGES
>> 1553 help
>> 1554 Choose this option to build a kernel for release 1 or later of the
>> 1555 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1556 MIPS processor are based on a MIPS64 processor. If you know the
>> 1557 specific type of processor in your system, choose those that one
>> 1558 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1559 Release 2 of the MIPS64 architecture is available since several
>> 1560 years so chances are you even have a MIPS64 Release 2 processor
>> 1561 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1562 performance.
1264 1563
1265 config X86_VSYSCALL_EMULATION !! 1564 config CPU_MIPS64_R2
1266 bool "Enable vsyscall emulation" if E !! 1565 bool "MIPS64 Release 2"
1267 default y !! 1566 depends on SYS_HAS_CPU_MIPS64_R2
1268 depends on X86_64 !! 1567 select CPU_HAS_PREFETCH
>> 1568 select CPU_SUPPORTS_32BIT_KERNEL
>> 1569 select CPU_SUPPORTS_64BIT_KERNEL
>> 1570 select CPU_SUPPORTS_HIGHMEM
>> 1571 select CPU_SUPPORTS_HUGEPAGES
>> 1572 select CPU_SUPPORTS_MSA
>> 1573 select HAVE_KVM
>> 1574 help
>> 1575 Choose this option to build a kernel for release 2 or later of the
>> 1576 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1577 MIPS processor are based on a MIPS64 processor. If you know the
>> 1578 specific type of processor in your system, choose those that one
>> 1579 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1580
>> 1581 config CPU_MIPS64_R5
>> 1582 bool "MIPS64 Release 5"
>> 1583 depends on SYS_HAS_CPU_MIPS64_R5
>> 1584 select CPU_HAS_PREFETCH
>> 1585 select CPU_SUPPORTS_32BIT_KERNEL
>> 1586 select CPU_SUPPORTS_64BIT_KERNEL
>> 1587 select CPU_SUPPORTS_HIGHMEM
>> 1588 select CPU_SUPPORTS_HUGEPAGES
>> 1589 select CPU_SUPPORTS_MSA
>> 1590 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1591 select HAVE_KVM
>> 1592 help
>> 1593 Choose this option to build a kernel for release 5 or later of the
>> 1594 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1595 release partly implementing release 6 features. Though there is no
>> 1596 any hardware known to be based on this release.
>> 1597
>> 1598 config CPU_MIPS64_R6
>> 1599 bool "MIPS64 Release 6"
>> 1600 depends on SYS_HAS_CPU_MIPS64_R6
>> 1601 select CPU_HAS_PREFETCH
>> 1602 select CPU_NO_LOAD_STORE_LR
>> 1603 select CPU_SUPPORTS_32BIT_KERNEL
>> 1604 select CPU_SUPPORTS_64BIT_KERNEL
>> 1605 select CPU_SUPPORTS_HIGHMEM
>> 1606 select CPU_SUPPORTS_HUGEPAGES
>> 1607 select CPU_SUPPORTS_MSA
>> 1608 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1609 select HAVE_KVM
>> 1610 help
>> 1611 Choose this option to build a kernel for release 6 or later of the
>> 1612 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1613 family, are based on a MIPS64r6 processor. If you own an older
>> 1614 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1615
>> 1616 config CPU_P5600
>> 1617 bool "MIPS Warrior P5600"
>> 1618 depends on SYS_HAS_CPU_P5600
>> 1619 select CPU_HAS_PREFETCH
>> 1620 select CPU_SUPPORTS_32BIT_KERNEL
>> 1621 select CPU_SUPPORTS_HIGHMEM
>> 1622 select CPU_SUPPORTS_MSA
>> 1623 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1624 select CPU_SUPPORTS_CPUFREQ
>> 1625 select CPU_MIPSR2_IRQ_VI
>> 1626 select CPU_MIPSR2_IRQ_EI
>> 1627 select HAVE_KVM
>> 1628 select MIPS_O32_FP64_SUPPORT
>> 1629 help
>> 1630 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1631 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1632 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1633 level features like up to six P5600 calculation cores, CM2 with L2
>> 1634 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1635 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1636 eJTAG and PDtrace.
>> 1637
>> 1638 config CPU_R3000
>> 1639 bool "R3000"
>> 1640 depends on SYS_HAS_CPU_R3000
>> 1641 select CPU_HAS_WB
>> 1642 select CPU_R3K_TLB
>> 1643 select CPU_SUPPORTS_32BIT_KERNEL
>> 1644 select CPU_SUPPORTS_HIGHMEM
>> 1645 help
>> 1646 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1647 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1648 *not* work on R4000 machines and vice versa. However, since most
>> 1649 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1650 might be a safe bet. If the resulting kernel does not work,
>> 1651 try to recompile with R3000.
>> 1652
>> 1653 config CPU_TX39XX
>> 1654 bool "R39XX"
>> 1655 depends on SYS_HAS_CPU_TX39XX
>> 1656 select CPU_SUPPORTS_32BIT_KERNEL
>> 1657 select CPU_R3K_TLB
>> 1658
>> 1659 config CPU_VR41XX
>> 1660 bool "R41xx"
>> 1661 depends on SYS_HAS_CPU_VR41XX
>> 1662 select CPU_SUPPORTS_32BIT_KERNEL
>> 1663 select CPU_SUPPORTS_64BIT_KERNEL
>> 1664 help
>> 1665 The options selects support for the NEC VR4100 series of processors.
>> 1666 Only choose this option if you have one of these processors as a
>> 1667 kernel built with this option will not run on any other type of
>> 1668 processor or vice versa.
>> 1669
>> 1670 config CPU_R4X00
>> 1671 bool "R4x00"
>> 1672 depends on SYS_HAS_CPU_R4X00
>> 1673 select CPU_SUPPORTS_32BIT_KERNEL
>> 1674 select CPU_SUPPORTS_64BIT_KERNEL
>> 1675 select CPU_SUPPORTS_HUGEPAGES
>> 1676 help
>> 1677 MIPS Technologies R4000-series processors other than 4300, including
>> 1678 the R4000, R4400, R4600, and 4700.
>> 1679
>> 1680 config CPU_TX49XX
>> 1681 bool "R49XX"
>> 1682 depends on SYS_HAS_CPU_TX49XX
>> 1683 select CPU_HAS_PREFETCH
>> 1684 select CPU_SUPPORTS_32BIT_KERNEL
>> 1685 select CPU_SUPPORTS_64BIT_KERNEL
>> 1686 select CPU_SUPPORTS_HUGEPAGES
>> 1687
>> 1688 config CPU_R5000
>> 1689 bool "R5000"
>> 1690 depends on SYS_HAS_CPU_R5000
>> 1691 select CPU_SUPPORTS_32BIT_KERNEL
>> 1692 select CPU_SUPPORTS_64BIT_KERNEL
>> 1693 select CPU_SUPPORTS_HUGEPAGES
>> 1694 help
>> 1695 MIPS Technologies R5000-series processors other than the Nevada.
>> 1696
>> 1697 config CPU_R5500
>> 1698 bool "R5500"
>> 1699 depends on SYS_HAS_CPU_R5500
>> 1700 select CPU_SUPPORTS_32BIT_KERNEL
>> 1701 select CPU_SUPPORTS_64BIT_KERNEL
>> 1702 select CPU_SUPPORTS_HUGEPAGES
>> 1703 help
>> 1704 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1705 instruction set.
>> 1706
>> 1707 config CPU_NEVADA
>> 1708 bool "RM52xx"
>> 1709 depends on SYS_HAS_CPU_NEVADA
>> 1710 select CPU_SUPPORTS_32BIT_KERNEL
>> 1711 select CPU_SUPPORTS_64BIT_KERNEL
>> 1712 select CPU_SUPPORTS_HUGEPAGES
>> 1713 help
>> 1714 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1715
>> 1716 config CPU_R10000
>> 1717 bool "R10000"
>> 1718 depends on SYS_HAS_CPU_R10000
>> 1719 select CPU_HAS_PREFETCH
>> 1720 select CPU_SUPPORTS_32BIT_KERNEL
>> 1721 select CPU_SUPPORTS_64BIT_KERNEL
>> 1722 select CPU_SUPPORTS_HIGHMEM
>> 1723 select CPU_SUPPORTS_HUGEPAGES
>> 1724 help
>> 1725 MIPS Technologies R10000-series processors.
>> 1726
>> 1727 config CPU_RM7000
>> 1728 bool "RM7000"
>> 1729 depends on SYS_HAS_CPU_RM7000
>> 1730 select CPU_HAS_PREFETCH
>> 1731 select CPU_SUPPORTS_32BIT_KERNEL
>> 1732 select CPU_SUPPORTS_64BIT_KERNEL
>> 1733 select CPU_SUPPORTS_HIGHMEM
>> 1734 select CPU_SUPPORTS_HUGEPAGES
>> 1735
>> 1736 config CPU_SB1
>> 1737 bool "SB1"
>> 1738 depends on SYS_HAS_CPU_SB1
>> 1739 select CPU_SUPPORTS_32BIT_KERNEL
>> 1740 select CPU_SUPPORTS_64BIT_KERNEL
>> 1741 select CPU_SUPPORTS_HIGHMEM
>> 1742 select CPU_SUPPORTS_HUGEPAGES
>> 1743 select WEAK_ORDERING
>> 1744
>> 1745 config CPU_CAVIUM_OCTEON
>> 1746 bool "Cavium Octeon processor"
>> 1747 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1748 select CPU_HAS_PREFETCH
>> 1749 select CPU_SUPPORTS_64BIT_KERNEL
>> 1750 select WEAK_ORDERING
>> 1751 select CPU_SUPPORTS_HIGHMEM
>> 1752 select CPU_SUPPORTS_HUGEPAGES
>> 1753 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1754 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1755 select MIPS_L1_CACHE_SHIFT_7
>> 1756 select HAVE_KVM
>> 1757 help
>> 1758 The Cavium Octeon processor is a highly integrated chip containing
>> 1759 many ethernet hardware widgets for networking tasks. The processor
>> 1760 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1761 Full details can be found at http://www.caviumnetworks.com.
>> 1762
>> 1763 config CPU_BMIPS
>> 1764 bool "Broadcom BMIPS"
>> 1765 depends on SYS_HAS_CPU_BMIPS
>> 1766 select CPU_MIPS32
>> 1767 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1768 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1769 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1770 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1771 select CPU_SUPPORTS_32BIT_KERNEL
>> 1772 select DMA_NONCOHERENT
>> 1773 select IRQ_MIPS_CPU
>> 1774 select SWAP_IO_SPACE
>> 1775 select WEAK_ORDERING
>> 1776 select CPU_SUPPORTS_HIGHMEM
>> 1777 select CPU_HAS_PREFETCH
>> 1778 select CPU_SUPPORTS_CPUFREQ
>> 1779 select MIPS_EXTERNAL_TIMER
>> 1780 help
>> 1781 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1782
>> 1783 config CPU_XLR
>> 1784 bool "Netlogic XLR SoC"
>> 1785 depends on SYS_HAS_CPU_XLR
>> 1786 select CPU_SUPPORTS_32BIT_KERNEL
>> 1787 select CPU_SUPPORTS_64BIT_KERNEL
>> 1788 select CPU_SUPPORTS_HIGHMEM
>> 1789 select CPU_SUPPORTS_HUGEPAGES
>> 1790 select WEAK_ORDERING
>> 1791 select WEAK_REORDERING_BEYOND_LLSC
>> 1792 help
>> 1793 Netlogic Microsystems XLR/XLS processors.
>> 1794
>> 1795 config CPU_XLP
>> 1796 bool "Netlogic XLP SoC"
>> 1797 depends on SYS_HAS_CPU_XLP
>> 1798 select CPU_SUPPORTS_32BIT_KERNEL
>> 1799 select CPU_SUPPORTS_64BIT_KERNEL
>> 1800 select CPU_SUPPORTS_HIGHMEM
>> 1801 select WEAK_ORDERING
>> 1802 select WEAK_REORDERING_BEYOND_LLSC
>> 1803 select CPU_HAS_PREFETCH
>> 1804 select CPU_MIPSR2
>> 1805 select CPU_SUPPORTS_HUGEPAGES
>> 1806 select MIPS_ASID_BITS_VARIABLE
1269 help 1807 help
1270 This enables emulation of the legac !! 1808 Netlogic Microsystems XLP processors.
1271 it is roughly equivalent to booting !! 1809 endchoice
1272 that it will also disable the helpf <<
1273 tries to use a vsyscall. With this <<
1274 programs will just segfault, citing <<
1275 0xffffffffff600?00. <<
1276 <<
1277 This option is required by many pro <<
1278 care should be used even with newer <<
1279 <<
1280 Disabling this option saves about 7 <<
1281 possibly 4K of additional runtime p <<
1282 1810
1283 config X86_IOPL_IOPERM !! 1811 config CPU_MIPS32_3_5_FEATURES
1284 bool "IOPERM and IOPL Emulation" !! 1812 bool "MIPS32 Release 3.5 Features"
1285 default y !! 1813 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1814 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1815 CPU_P5600
>> 1816 help
>> 1817 Choose this option to build a kernel for release 2 or later of the
>> 1818 MIPS32 architecture including features from the 3.5 release such as
>> 1819 support for Enhanced Virtual Addressing (EVA).
>> 1820
>> 1821 config CPU_MIPS32_3_5_EVA
>> 1822 bool "Enhanced Virtual Addressing (EVA)"
>> 1823 depends on CPU_MIPS32_3_5_FEATURES
>> 1824 select EVA
>> 1825 default y
>> 1826 help
>> 1827 Choose this option if you want to enable the Enhanced Virtual
>> 1828 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1829 One of its primary benefits is an increase in the maximum size
>> 1830 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1831
>> 1832 config CPU_MIPS32_R5_FEATURES
>> 1833 bool "MIPS32 Release 5 Features"
>> 1834 depends on SYS_HAS_CPU_MIPS32_R5
>> 1835 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1836 help
>> 1837 Choose this option to build a kernel for release 2 or later of the
>> 1838 MIPS32 architecture including features from release 5 such as
>> 1839 support for Extended Physical Addressing (XPA).
>> 1840
>> 1841 config CPU_MIPS32_R5_XPA
>> 1842 bool "Extended Physical Addressing (XPA)"
>> 1843 depends on CPU_MIPS32_R5_FEATURES
>> 1844 depends on !EVA
>> 1845 depends on !PAGE_SIZE_4KB
>> 1846 depends on SYS_SUPPORTS_HIGHMEM
>> 1847 select XPA
>> 1848 select HIGHMEM
>> 1849 select PHYS_ADDR_T_64BIT
>> 1850 default n
1286 help 1851 help
1287 This enables the ioperm() and iopl( !! 1852 Choose this option if you want to enable the Extended Physical
1288 for legacy applications. !! 1853 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1854 benefit is to increase physical addressing equal to or greater
>> 1855 than 40 bits. Note that this has the side effect of turning on
>> 1856 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1857 If unsure, say 'N' here.
1289 1858
1290 Legacy IOPL support is an overbroad !! 1859 if CPU_LOONGSON2F
1291 space aside of accessing all 65536 !! 1860 config CPU_NOP_WORKAROUNDS
1292 interrupts. To gain this access the !! 1861 bool
1293 capabilities and permission from po <<
1294 modules. <<
1295 1862
1296 The emulation restricts the functio !! 1863 config CPU_JUMP_WORKAROUNDS
1297 only allowing the full range I/O po !! 1864 bool
1298 ability to disable interrupts from <<
1299 granted if the hardware IOPL mechan <<
1300 1865
1301 config TOSHIBA !! 1866 config CPU_LOONGSON2F_WORKAROUNDS
1302 tristate "Toshiba Laptop support" !! 1867 bool "Loongson 2F Workarounds"
1303 depends on X86_32 !! 1868 default y
>> 1869 select CPU_NOP_WORKAROUNDS
>> 1870 select CPU_JUMP_WORKAROUNDS
1304 help 1871 help
1305 This adds a driver to safely access !! 1872 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1306 the CPU on Toshiba portables with a !! 1873 require workarounds. Without workarounds the system may hang
1307 not work on models with a Phoenix B !! 1874 unexpectedly. For more information please refer to the gas
1308 is used to set the BIOS and power s !! 1875 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1309 !! 1876
1310 For information on utilities to mak !! 1877 Loongson 2F03 and later have fixed these issues and no workarounds
1311 Toshiba Linux utilities web site at !! 1878 are needed. The workarounds have no significant side effect on them
1312 <http://www.buzzard.org.uk/toshiba/ !! 1879 but may decrease the performance of the system so this option should
>> 1880 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1881 systems.
1313 1882
1314 Say Y if you intend to run this ker !! 1883 If unsure, please say Y.
1315 Say N otherwise. !! 1884 endif # CPU_LOONGSON2F
1316 1885
1317 config X86_REBOOTFIXUPS !! 1886 config SYS_SUPPORTS_ZBOOT
1318 bool "Enable X86 board specific fixup !! 1887 bool
1319 depends on X86_32 !! 1888 select HAVE_KERNEL_GZIP
1320 help !! 1889 select HAVE_KERNEL_BZIP2
1321 This enables chipset and/or board s !! 1890 select HAVE_KERNEL_LZ4
1322 in order to get reboot to work corr !! 1891 select HAVE_KERNEL_LZMA
1323 some combinations of hardware and B !! 1892 select HAVE_KERNEL_LZO
1324 this config is intended, is when re !! 1893 select HAVE_KERNEL_XZ
1325 system. <<
1326 1894
1327 Currently, the only fixup is for th !! 1895 config SYS_SUPPORTS_ZBOOT_UART16550
1328 CS5530A and CS5536 chipsets and the !! 1896 bool
>> 1897 select SYS_SUPPORTS_ZBOOT
1329 1898
1330 Say Y if you want to enable the fix !! 1899 config SYS_SUPPORTS_ZBOOT_UART_PROM
1331 enable this option even if you don' !! 1900 bool
1332 Say N otherwise. !! 1901 select SYS_SUPPORTS_ZBOOT
1333 1902
1334 config MICROCODE !! 1903 config CPU_LOONGSON2EF
1335 def_bool y !! 1904 bool
1336 depends on CPU_SUP_AMD || CPU_SUP_INT !! 1905 select CPU_SUPPORTS_32BIT_KERNEL
>> 1906 select CPU_SUPPORTS_64BIT_KERNEL
>> 1907 select CPU_SUPPORTS_HIGHMEM
>> 1908 select CPU_SUPPORTS_HUGEPAGES
>> 1909 select ARCH_HAS_PHYS_TO_DMA
1337 1910
1338 config MICROCODE_INITRD32 !! 1911 config CPU_LOONGSON32
1339 def_bool y !! 1912 bool
1340 depends on MICROCODE && X86_32 && BLK !! 1913 select CPU_MIPS32
>> 1914 select CPU_MIPSR2
>> 1915 select CPU_HAS_PREFETCH
>> 1916 select CPU_SUPPORTS_32BIT_KERNEL
>> 1917 select CPU_SUPPORTS_HIGHMEM
>> 1918 select CPU_SUPPORTS_CPUFREQ
1341 1919
1342 config MICROCODE_LATE_LOADING !! 1920 config CPU_BMIPS32_3300
1343 bool "Late microcode loading (DANGERO !! 1921 select SMP_UP if SMP
1344 default n !! 1922 bool
1345 depends on MICROCODE && SMP <<
1346 help <<
1347 Loading microcode late, when the sy <<
1348 is a tricky business and should be <<
1349 of synchronizing all cores and SMT <<
1350 not guarantee that cores might not <<
1351 use this at your own risk. Late loa <<
1352 microcode header indicates that it <<
1353 minimal revision check. This minima <<
1354 the kernel command line with "micro <<
1355 1923
1356 config MICROCODE_LATE_FORCE_MINREV !! 1924 config CPU_BMIPS4350
1357 bool "Enforce late microcode loading !! 1925 bool
1358 default n !! 1926 select SYS_SUPPORTS_SMP
1359 depends on MICROCODE_LATE_LOADING !! 1927 select SYS_SUPPORTS_HOTPLUG_CPU
1360 help <<
1361 To prevent that users load microcod <<
1362 in use features, newer microcode pa <<
1363 in the microcode header, which tell <<
1364 revision must be active in the CPU <<
1365 late into the running system. If di <<
1366 be enforced but the kernel will be <<
1367 revision check fails. <<
1368 <<
1369 This minimal revision check can als <<
1370 "microcode.minrev" parameter on the <<
1371 <<
1372 If unsure say Y. <<
1373 <<
1374 config X86_MSR <<
1375 tristate "/dev/cpu/*/msr - Model-spec <<
1376 help <<
1377 This device gives privileged proces <<
1378 Model-Specific Registers (MSRs). I <<
1379 major 202 and minors 0 to 31 for /d <<
1380 MSR accesses are directed to a spec <<
1381 systems. <<
1382 1928
1383 config X86_CPUID !! 1929 config CPU_BMIPS4380
1384 tristate "/dev/cpu/*/cpuid - CPU info !! 1930 bool
1385 help !! 1931 select MIPS_L1_CACHE_SHIFT_6
1386 This device gives processes access !! 1932 select SYS_SUPPORTS_SMP
1387 be executed on a specific processor !! 1933 select SYS_SUPPORTS_HOTPLUG_CPU
1388 with major 203 and minors 0 to 31 f !! 1934 select CPU_HAS_RIXI
1389 /dev/cpu/31/cpuid. <<
1390 1935
1391 choice !! 1936 config CPU_BMIPS5000
1392 prompt "High Memory Support" !! 1937 bool
1393 default HIGHMEM4G !! 1938 select MIPS_CPU_SCACHE
1394 depends on X86_32 !! 1939 select MIPS_L1_CACHE_SHIFT_7
1395 !! 1940 select SYS_SUPPORTS_SMP
1396 config NOHIGHMEM !! 1941 select SYS_SUPPORTS_HOTPLUG_CPU
1397 bool "off" !! 1942 select CPU_HAS_RIXI
1398 help <<
1399 Linux can use up to 64 Gigabytes of <<
1400 However, the address space of 32-bi <<
1401 Gigabytes large. That means that, i <<
1402 physical memory, not all of it can <<
1403 kernel. The physical memory that's <<
1404 "high memory". <<
1405 <<
1406 If you are compiling a kernel which <<
1407 more than 1 Gigabyte total physical <<
1408 choice and suitable for most users) <<
1409 split: 3GB are mapped so that each <<
1410 space and the remaining part of the <<
1411 by the kernel to permanently map as <<
1412 possible. <<
1413 <<
1414 If the machine has between 1 and 4 <<
1415 answer "4GB" here. <<
1416 <<
1417 If more than 4 Gigabytes is used th <<
1418 selection turns Intel PAE (Physical <<
1419 PAE implements 3-level paging on IA <<
1420 supported by Linux, PAE mode is imp <<
1421 processors (Pentium Pro and better) <<
1422 then the kernel will not boot on CP <<
1423 <<
1424 The actual amount of total physical <<
1425 auto detected or can be forced by u <<
1426 such as "mem=256M". (Try "man bootp <<
1427 your boot loader (lilo or loadlin) <<
1428 kernel at boot time.) <<
1429 <<
1430 If unsure, say "off". <<
1431 <<
1432 config HIGHMEM4G <<
1433 bool "4GB" <<
1434 help <<
1435 Select this if you have a 32-bit pr <<
1436 gigabytes of physical RAM. <<
1437 <<
1438 config HIGHMEM64G <<
1439 bool "64GB" <<
1440 depends on X86_HAVE_PAE <<
1441 select X86_PAE <<
1442 help <<
1443 Select this if you have a 32-bit pr <<
1444 gigabytes of physical RAM. <<
1445 1943
1446 endchoice !! 1944 config SYS_HAS_CPU_LOONGSON64
>> 1945 bool
>> 1946 select CPU_SUPPORTS_CPUFREQ
>> 1947 select CPU_HAS_RIXI
1447 1948
1448 choice !! 1949 config SYS_HAS_CPU_LOONGSON2E
1449 prompt "Memory split" if EXPERT !! 1950 bool
1450 default VMSPLIT_3G <<
1451 depends on X86_32 <<
1452 help <<
1453 Select the desired split between ke <<
1454 <<
1455 If the address range available to t <<
1456 physical memory installed, the rema <<
1457 as "high memory". Accessing high me <<
1458 than low memory, as it needs to be <<
1459 Note that increasing the kernel add <<
1460 available to user programs, making <<
1461 tighter. Selecting anything other <<
1462 will also likely make your kernel i <<
1463 kernel modules. <<
1464 <<
1465 If you are not absolutely sure what <<
1466 option alone! <<
1467 <<
1468 config VMSPLIT_3G <<
1469 bool "3G/1G user/kernel split <<
1470 config VMSPLIT_3G_OPT <<
1471 depends on !X86_PAE <<
1472 bool "3G/1G user/kernel split <<
1473 config VMSPLIT_2G <<
1474 bool "2G/2G user/kernel split <<
1475 config VMSPLIT_2G_OPT <<
1476 depends on !X86_PAE <<
1477 bool "2G/2G user/kernel split <<
1478 config VMSPLIT_1G <<
1479 bool "1G/3G user/kernel split <<
1480 endchoice <<
1481 1951
1482 config PAGE_OFFSET !! 1952 config SYS_HAS_CPU_LOONGSON2F
1483 hex !! 1953 bool
1484 default 0xB0000000 if VMSPLIT_3G_OPT !! 1954 select CPU_SUPPORTS_CPUFREQ
1485 default 0x80000000 if VMSPLIT_2G !! 1955 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1486 default 0x78000000 if VMSPLIT_2G_OPT <<
1487 default 0x40000000 if VMSPLIT_1G <<
1488 default 0xC0000000 <<
1489 depends on X86_32 <<
1490 1956
1491 config HIGHMEM !! 1957 config SYS_HAS_CPU_LOONGSON1B
1492 def_bool y !! 1958 bool
1493 depends on X86_32 && (HIGHMEM64G || H <<
1494 1959
1495 config X86_PAE !! 1960 config SYS_HAS_CPU_LOONGSON1C
1496 bool "PAE (Physical Address Extension !! 1961 bool
1497 depends on X86_32 && X86_HAVE_PAE <<
1498 select PHYS_ADDR_T_64BIT <<
1499 select SWIOTLB <<
1500 help <<
1501 PAE is required for NX support, and <<
1502 larger swapspace support for non-ov <<
1503 has the cost of more pagetable look <<
1504 consumes more pagetable space per p <<
1505 1962
1506 config X86_5LEVEL !! 1963 config SYS_HAS_CPU_MIPS32_R1
1507 bool "Enable 5-level page tables supp !! 1964 bool
1508 default y <<
1509 select DYNAMIC_MEMORY_LAYOUT <<
1510 select SPARSEMEM_VMEMMAP <<
1511 depends on X86_64 <<
1512 help <<
1513 5-level paging enables access to la <<
1514 up to 128 PiB of virtual address sp <<
1515 physical address space. <<
1516 1965
1517 It will be supported by future Inte !! 1966 config SYS_HAS_CPU_MIPS32_R2
>> 1967 bool
1518 1968
1519 A kernel with the option enabled ca !! 1969 config SYS_HAS_CPU_MIPS32_R3_5
1520 support 4- or 5-level paging. !! 1970 bool
1521 1971
1522 See Documentation/arch/x86/x86_64/5 !! 1972 config SYS_HAS_CPU_MIPS32_R5
1523 information. !! 1973 bool
>> 1974 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1524 1975
1525 Say N if unsure. !! 1976 config SYS_HAS_CPU_MIPS32_R6
>> 1977 bool
>> 1978 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1526 1979
1527 config X86_DIRECT_GBPAGES !! 1980 config SYS_HAS_CPU_MIPS64_R1
1528 def_bool y !! 1981 bool
1529 depends on X86_64 <<
1530 help <<
1531 Certain kernel features effectively <<
1532 linear 1 GB mappings (even if the C <<
1533 supports them), so don't confuse th <<
1534 that we have them enabled. <<
1535 <<
1536 config X86_CPA_STATISTICS <<
1537 bool "Enable statistic for Change Pag <<
1538 depends on DEBUG_FS <<
1539 help <<
1540 Expose statistics about the Change <<
1541 helps to determine the effectivenes <<
1542 page mappings when mapping protecti <<
1543 <<
1544 config X86_MEM_ENCRYPT <<
1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED <<
1546 select DYNAMIC_PHYSICAL_MASK <<
1547 def_bool n <<
1548 1982
1549 config AMD_MEM_ENCRYPT !! 1983 config SYS_HAS_CPU_MIPS64_R2
1550 bool "AMD Secure Memory Encryption (S !! 1984 bool
1551 depends on X86_64 && CPU_SUP_AMD <<
1552 depends on EFI_STUB <<
1553 select DMA_COHERENT_POOL <<
1554 select ARCH_USE_MEMREMAP_PROT <<
1555 select INSTRUCTION_DECODER <<
1556 select ARCH_HAS_CC_PLATFORM <<
1557 select X86_MEM_ENCRYPT <<
1558 select UNACCEPTED_MEMORY <<
1559 help <<
1560 Say yes to enable support for the e <<
1561 This requires an AMD processor that <<
1562 Encryption (SME). <<
1563 1985
1564 # Common NUMA Features !! 1986 config SYS_HAS_CPU_MIPS64_R6
1565 config NUMA !! 1987 bool
1566 bool "NUMA Memory Allocation and Sche !! 1988 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1567 depends on SMP <<
1568 depends on X86_64 || (X86_32 && HIGHM <<
1569 default y if X86_BIGSMP <<
1570 select USE_PERCPU_NUMA_NODE_ID <<
1571 select OF_NUMA if OF <<
1572 help <<
1573 Enable NUMA (Non-Uniform Memory Acc <<
1574 1989
1575 The kernel will try to allocate mem !! 1990 config SYS_HAS_CPU_P5600
1576 local memory controller of the CPU !! 1991 bool
1577 NUMA awareness to the kernel. !! 1992 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1578 1993
1579 For 64-bit this is recommended if t !! 1994 config SYS_HAS_CPU_R3000
1580 (or later), AMD Opteron, or EM64T N !! 1995 bool
1581 1996
1582 For 32-bit this is only needed if y !! 1997 config SYS_HAS_CPU_TX39XX
1583 kernel on a 64-bit NUMA platform. !! 1998 bool
1584 1999
1585 Otherwise, you should say N. !! 2000 config SYS_HAS_CPU_VR41XX
>> 2001 bool
1586 2002
1587 config AMD_NUMA !! 2003 config SYS_HAS_CPU_R4X00
1588 def_bool y !! 2004 bool
1589 prompt "Old style AMD Opteron NUMA de <<
1590 depends on X86_64 && NUMA && PCI <<
1591 help <<
1592 Enable AMD NUMA node topology detec <<
1593 you have a multi processor AMD syst <<
1594 read the NUMA configuration directl <<
1595 of Opteron. It is recommended to us <<
1596 which also takes priority if both a <<
1597 2005
1598 config X86_64_ACPI_NUMA !! 2006 config SYS_HAS_CPU_TX49XX
1599 def_bool y !! 2007 bool
1600 prompt "ACPI NUMA detection" <<
1601 depends on X86_64 && NUMA && ACPI && <<
1602 select ACPI_NUMA <<
1603 help <<
1604 Enable ACPI SRAT based node topolog <<
1605 2008
1606 config NODES_SHIFT !! 2009 config SYS_HAS_CPU_R5000
1607 int "Maximum NUMA Nodes (as a power o !! 2010 bool
1608 range 1 10 <<
1609 default "10" if MAXSMP <<
1610 default "6" if X86_64 <<
1611 default "3" <<
1612 depends on NUMA <<
1613 help <<
1614 Specify the maximum number of NUMA <<
1615 system. Increases memory reserved <<
1616 2011
1617 config ARCH_FLATMEM_ENABLE !! 2012 config SYS_HAS_CPU_R5500
1618 def_bool y !! 2013 bool
1619 depends on X86_32 && !NUMA <<
1620 2014
1621 config ARCH_SPARSEMEM_ENABLE !! 2015 config SYS_HAS_CPU_NEVADA
1622 def_bool y !! 2016 bool
1623 depends on X86_64 || NUMA || X86_32 | <<
1624 select SPARSEMEM_STATIC if X86_32 <<
1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 <<
1626 2017
1627 config ARCH_SPARSEMEM_DEFAULT !! 2018 config SYS_HAS_CPU_R10000
1628 def_bool X86_64 || (NUMA && X86_32) !! 2019 bool
>> 2020 select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
1629 2021
1630 config ARCH_SELECT_MEMORY_MODEL !! 2022 config SYS_HAS_CPU_RM7000
1631 def_bool y !! 2023 bool
1632 depends on ARCH_SPARSEMEM_ENABLE && A <<
1633 2024
1634 config ARCH_MEMORY_PROBE !! 2025 config SYS_HAS_CPU_SB1
1635 bool "Enable sysfs memory/probe inter !! 2026 bool
1636 depends on MEMORY_HOTPLUG <<
1637 help <<
1638 This option enables a sysfs memory/ <<
1639 See Documentation/admin-guide/mm/me <<
1640 If you are unsure how to answer thi <<
1641 2027
1642 config ARCH_PROC_KCORE_TEXT !! 2028 config SYS_HAS_CPU_CAVIUM_OCTEON
1643 def_bool y !! 2029 bool
1644 depends on X86_64 && PROC_KCORE <<
1645 2030
1646 config ILLEGAL_POINTER_VALUE !! 2031 config SYS_HAS_CPU_BMIPS
1647 hex !! 2032 bool
1648 default 0 if X86_32 <<
1649 default 0xdead000000000000 if X86_64 <<
1650 <<
1651 config X86_PMEM_LEGACY_DEVICE <<
1652 bool <<
1653 <<
1654 config X86_PMEM_LEGACY <<
1655 tristate "Support non-standard NVDIMM <<
1656 depends on PHYS_ADDR_T_64BIT <<
1657 depends on BLK_DEV <<
1658 select X86_PMEM_LEGACY_DEVICE <<
1659 select NUMA_KEEP_MEMINFO if NUMA <<
1660 select LIBNVDIMM <<
1661 help <<
1662 Treat memory marked using the non-s <<
1663 by the Intel Sandy Bridge-EP refere <<
1664 The kernel will offer these regions <<
1665 they can be used for persistent sto <<
1666 <<
1667 Say Y if unsure. <<
1668 <<
1669 config HIGHPTE <<
1670 bool "Allocate 3rd-level pagetables f <<
1671 depends on HIGHMEM <<
1672 help <<
1673 The VM uses one page table entry fo <<
1674 For systems with a lot of RAM, this <<
1675 low memory. Setting this option wi <<
1676 entries in high memory. <<
1677 <<
1678 config X86_CHECK_BIOS_CORRUPTION <<
1679 bool "Check for low memory corruption <<
1680 help <<
1681 Periodically check for memory corru <<
1682 is suspected to be caused by BIOS. <<
1683 configuration, it is disabled at ru <<
1684 setting "memory_corruption_check=1" <<
1685 line. By default it scans the low <<
1686 seconds; see the memory_corruption_ <<
1687 memory_corruption_check_period para <<
1688 Documentation/admin-guide/kernel-pa <<
1689 <<
1690 When enabled with the default param <<
1691 almost no overhead, as it reserves <<
1692 of memory and scans it infrequently <<
1693 and prevents it from affecting the <<
1694 <<
1695 It is, however, intended as a diagn <<
1696 BIOS-originated corruption always a <<
1697 you can use memmap= to prevent the <<
1698 memory. <<
1699 <<
1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK <<
1701 bool "Set the default setting of memo <<
1702 depends on X86_CHECK_BIOS_CORRUPTION <<
1703 default y <<
1704 help <<
1705 Set whether the default state of me <<
1706 on or off. <<
1707 <<
1708 config MATH_EMULATION <<
1709 bool <<
1710 depends on MODIFY_LDT_SYSCALL <<
1711 prompt "Math emulation" if X86_32 && <<
1712 help <<
1713 Linux can emulate a math coprocesso <<
1714 operations) if you don't have one. <<
1715 a math coprocessor built in, 486SX <<
1716 a 487DX or 387, respectively. (The <<
1717 give you some hints here ["man dmes <<
1718 coprocessor or this emulation. <<
1719 <<
1720 If you don't have a math coprocesso <<
1721 say Y here even though you have a c <<
1722 be used nevertheless. (This behavio <<
1723 command line option "no387", which <<
1724 is broken. Try "man bootparam" or s <<
1725 loader (lilo or loadlin) about how <<
1726 boot time.) This means that it is a <<
1727 intend to use this kernel on differ <<
1728 2033
1729 More information about the internal !! 2034 config SYS_HAS_CPU_BMIPS32_3300
1730 emulation can be found in <file:arc !! 2035 bool
>> 2036 select SYS_HAS_CPU_BMIPS
1731 2037
1732 If you are not sure, say Y; apart f !! 2038 config SYS_HAS_CPU_BMIPS4350
1733 kernel, it won't hurt. !! 2039 bool
>> 2040 select SYS_HAS_CPU_BMIPS
1734 2041
1735 config MTRR !! 2042 config SYS_HAS_CPU_BMIPS4380
1736 def_bool y !! 2043 bool
1737 prompt "MTRR (Memory Type Range Regis !! 2044 select SYS_HAS_CPU_BMIPS
1738 help <<
1739 On Intel P6 family processors (Pent <<
1740 the Memory Type Range Registers (MT <<
1741 processor access to memory ranges. <<
1742 a video (VGA) card on a PCI or AGP <<
1743 allows bus write transfers to be co <<
1744 before bursting over the PCI/AGP bu <<
1745 of image write operations 2.5 times <<
1746 /proc/mtrr file which may be used t <<
1747 MTRRs. Typically the X server shoul <<
1748 <<
1749 This code has a reasonably generic <<
1750 control registers on other processo <<
1751 as well: <<
1752 <<
1753 The Cyrix 6x86, 6x86MX and M II pro <<
1754 Registers (ARRs) which provide a si <<
1755 these, the ARRs are used to emulate <<
1756 The AMD K6-2 (stepping 8 and above) <<
1757 MTRRs. The Centaur C6 (WinChip) has <<
1758 write-combining. All of these proce <<
1759 and it makes sense to say Y here if <<
1760 <<
1761 Saying Y here also fixes a problem <<
1762 set the MTRRs for the boot CPU and <<
1763 can lead to all sorts of problems, <<
1764 2045
1765 You can safely say Y even if your m !! 2046 config SYS_HAS_CPU_BMIPS5000
1766 just add about 9 KB to your kernel. !! 2047 bool
>> 2048 select SYS_HAS_CPU_BMIPS
>> 2049 select ARCH_HAS_SYNC_DMA_FOR_CPU
1767 2050
1768 See <file:Documentation/arch/x86/mt !! 2051 config SYS_HAS_CPU_XLR
>> 2052 bool
1769 2053
1770 config MTRR_SANITIZER !! 2054 config SYS_HAS_CPU_XLP
1771 def_bool y !! 2055 bool
1772 prompt "MTRR cleanup support" <<
1773 depends on MTRR <<
1774 help <<
1775 Convert MTRR layout from continuous <<
1776 add writeback entries. <<
1777 2056
1778 Can be disabled with disable_mtrr_c !! 2057 #
1779 The largest mtrr entry size for a c !! 2058 # CPU may reorder R->R, R->W, W->R, W->W
1780 mtrr_chunk_size. !! 2059 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2060 #
>> 2061 config WEAK_ORDERING
>> 2062 bool
1781 2063
1782 If unsure, say Y. !! 2064 #
>> 2065 # CPU may reorder reads and writes beyond LL/SC
>> 2066 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2067 #
>> 2068 config WEAK_REORDERING_BEYOND_LLSC
>> 2069 bool
>> 2070 endmenu
1783 2071
1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2072 #
1785 int "MTRR cleanup enable value (0-1)" !! 2073 # These two indicate any level of the MIPS32 and MIPS64 architecture
1786 range 0 1 !! 2074 #
1787 default "0" !! 2075 config CPU_MIPS32
1788 depends on MTRR_SANITIZER !! 2076 bool
1789 help !! 2077 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1790 Enable mtrr cleanup default value !! 2078 CPU_MIPS32_R6 || CPU_P5600
1791 <<
1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT <<
1793 int "MTRR cleanup spare reg num (0-7) <<
1794 range 0 7 <<
1795 default "1" <<
1796 depends on MTRR_SANITIZER <<
1797 help <<
1798 mtrr cleanup spare entries default, <<
1799 mtrr_spare_reg_nr=N on the kernel c <<
1800 2079
1801 config X86_PAT !! 2080 config CPU_MIPS64
1802 def_bool y !! 2081 bool
1803 prompt "x86 PAT support" if EXPERT !! 2082 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1804 depends on MTRR !! 2083 CPU_MIPS64_R6
1805 select ARCH_USES_PG_ARCH_2 <<
1806 help <<
1807 Use PAT attributes to setup page le <<
1808 2084
1809 PATs are the modern equivalents of !! 2085 #
1810 flexible than MTRRs. !! 2086 # These indicate the revision of the architecture
>> 2087 #
>> 2088 config CPU_MIPSR1
>> 2089 bool
>> 2090 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1811 2091
1812 Say N here if you see bootup proble !! 2092 config CPU_MIPSR2
1813 spontaneous reboots) or a non-worki !! 2093 bool
>> 2094 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2095 select CPU_HAS_RIXI
>> 2096 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2097 select MIPS_SPRAM
1814 2098
1815 If unsure, say Y. !! 2099 config CPU_MIPSR5
>> 2100 bool
>> 2101 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 2102 select CPU_HAS_RIXI
>> 2103 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 2104 select MIPS_SPRAM
1816 2105
1817 config X86_UMIP !! 2106 config CPU_MIPSR6
1818 def_bool y !! 2107 bool
1819 prompt "User Mode Instruction Prevent !! 2108 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1820 help !! 2109 select CPU_HAS_RIXI
1821 User Mode Instruction Prevention (U !! 2110 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1822 some x86 processors. If enabled, a !! 2111 select HAVE_ARCH_BITREVERSE
1823 issued if the SGDT, SLDT, SIDT, SMS !! 2112 select MIPS_ASID_BITS_VARIABLE
1824 executed in user mode. These instru !! 2113 select MIPS_CRC_SUPPORT
1825 information about the hardware stat !! 2114 select MIPS_SPRAM
1826 <<
1827 The vast majority of applications d <<
1828 For the very few that do, software <<
1829 specific cases in protected and vir <<
1830 results are dummy. <<
1831 <<
1832 config CC_HAS_IBT <<
1833 # GCC >= 9 and binutils >= 2.29 <<
1834 # Retpoline check to work around http <<
1835 # Clang/LLVM >= 14 <<
1836 # https://github.com/llvm/llvm-projec <<
1837 # https://github.com/llvm/llvm-projec <<
1838 def_bool ((CC_IS_GCC && $(cc-option, <<
1839 (CC_IS_CLANG && CLANG_VERSI <<
1840 $(as-instr,endbr64) <<
1841 2115
1842 config X86_CET !! 2116 config TARGET_ISA_REV
1843 def_bool n !! 2117 int
>> 2118 default 1 if CPU_MIPSR1
>> 2119 default 2 if CPU_MIPSR2
>> 2120 default 5 if CPU_MIPSR5
>> 2121 default 6 if CPU_MIPSR6
>> 2122 default 0
1844 help 2123 help
1845 CET features configured (Shadow sta !! 2124 Reflects the ISA revision being targeted by the kernel build. This
>> 2125 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1846 2126
1847 config X86_KERNEL_IBT !! 2127 config EVA
1848 prompt "Indirect Branch Tracking" !! 2128 bool
1849 def_bool y <<
1850 depends on X86_64 && CC_HAS_IBT && HA <<
1851 # https://github.com/llvm/llvm-projec <<
1852 depends on !LD_IS_LLD || LLD_VERSION <<
1853 select OBJTOOL <<
1854 select X86_CET <<
1855 help <<
1856 Build the kernel with support for I <<
1857 hardware support course-grain forwa <<
1858 protection. It enforces that all in <<
1859 an ENDBR instruction, as such, the <<
1860 code with them to make this happen. <<
1861 <<
1862 In addition to building the kernel <<
1863 are not indirect call targets, avoi <<
1864 <<
1865 This requires LTO like objtool runs <<
1866 does significantly reduce the numbe <<
1867 kernel image. <<
1868 2129
1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2130 config XPA
1870 prompt "Memory Protection Keys" !! 2131 bool
1871 def_bool y <<
1872 # Note: only available in 64-bit mode <<
1873 depends on X86_64 && (CPU_SUP_INTEL | <<
1874 select ARCH_USES_HIGH_VMA_FLAGS <<
1875 select ARCH_HAS_PKEYS <<
1876 help <<
1877 Memory Protection Keys provides a m <<
1878 page-based protections, but without <<
1879 page tables when an application cha <<
1880 2132
1881 For details, see Documentation/core !! 2133 config SYS_SUPPORTS_32BIT_KERNEL
>> 2134 bool
>> 2135 config SYS_SUPPORTS_64BIT_KERNEL
>> 2136 bool
>> 2137 config CPU_SUPPORTS_32BIT_KERNEL
>> 2138 bool
>> 2139 config CPU_SUPPORTS_64BIT_KERNEL
>> 2140 bool
>> 2141 config CPU_SUPPORTS_CPUFREQ
>> 2142 bool
>> 2143 config CPU_SUPPORTS_ADDRWINCFG
>> 2144 bool
>> 2145 config CPU_SUPPORTS_HUGEPAGES
>> 2146 bool
>> 2147 depends on !(32BIT && (ARCH_PHYS_ADDR_T_64BIT || EVA))
>> 2148 config MIPS_PGD_C0_CONTEXT
>> 2149 bool
>> 2150 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
1882 2151
1883 If unsure, say y. !! 2152 #
>> 2153 # Set to y for ptrace access to watch registers.
>> 2154 #
>> 2155 config HARDWARE_WATCHPOINTS
>> 2156 bool
>> 2157 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1884 2158
1885 config ARCH_PKEY_BITS !! 2159 menu "Kernel type"
1886 int <<
1887 default 4 <<
1888 2160
1889 choice 2161 choice
1890 prompt "TSX enable mode" !! 2162 prompt "Kernel code model"
1891 depends on CPU_SUP_INTEL <<
1892 default X86_INTEL_TSX_MODE_OFF <<
1893 help 2163 help
1894 Intel's TSX (Transactional Synchron !! 2164 You should only select this option if you have a workload that
1895 allows to optimize locking protocol !! 2165 actually benefits from 64-bit processing or if your machine has
1896 can lead to a noticeable performanc !! 2166 large memory. You will only be presented a single option in this
>> 2167 menu if your system does not support both 32-bit and 64-bit kernels.
>> 2168
>> 2169 config 32BIT
>> 2170 bool "32-bit kernel"
>> 2171 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2172 select TRAD_SIGNALS
>> 2173 help
>> 2174 Select this option if you want to build a 32-bit kernel.
1897 2175
1898 On the other hand it has been shown !! 2176 config 64BIT
1899 to form side channel attacks (e.g. !! 2177 bool "64-bit kernel"
1900 will be more of those attacks disco !! 2178 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2179 help
>> 2180 Select this option if you want to build a 64-bit kernel.
1901 2181
1902 Therefore TSX is not enabled by def !! 2182 endchoice
1903 might override this decision by tsx <<
1904 Even with TSX enabled, the kernel w <<
1905 possible TAA mitigation setting dep <<
1906 for the particular machine. <<
1907 2183
1908 This option allows to set the defau !! 2184 config KVM_GUEST
1909 and =auto. See Documentation/admin- !! 2185 bool "KVM Guest Kernel"
1910 details. !! 2186 depends on CPU_MIPS32_R2
>> 2187 depends on BROKEN_ON_SMP
>> 2188 help
>> 2189 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2190 mode.
1911 2191
1912 Say off if not sure, auto if TSX is !! 2192 config KVM_GUEST_TIMER_FREQ
1913 platforms or on if TSX is in use an !! 2193 int "Count/Compare Timer Frequency (MHz)"
1914 relevant. !! 2194 depends on KVM_GUEST
>> 2195 default 100
>> 2196 help
>> 2197 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2198 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2199 timer frequency is specified directly.
1915 2200
1916 config X86_INTEL_TSX_MODE_OFF !! 2201 config MIPS_VA_BITS_48
1917 bool "off" !! 2202 bool "48 bits virtual memory"
>> 2203 depends on 64BIT
1918 help 2204 help
1919 TSX is disabled if possible - equal !! 2205 Support a maximum at least 48 bits of application virtual
>> 2206 memory. Default is 40 bits or less, depending on the CPU.
>> 2207 For page sizes 16k and above, this option results in a small
>> 2208 memory overhead for page tables. For 4k page size, a fourth
>> 2209 level of page tables is added which imposes both a memory
>> 2210 overhead as well as slower TLB fault handling.
1920 2211
1921 config X86_INTEL_TSX_MODE_ON !! 2212 If unsure, say N.
1922 bool "on" !! 2213
1923 help !! 2214 choice
1924 TSX is always enabled on TSX capabl !! 2215 prompt "Kernel page size"
1925 line parameter. !! 2216 default PAGE_SIZE_4KB
>> 2217
>> 2218 config PAGE_SIZE_4KB
>> 2219 bool "4kB"
>> 2220 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
>> 2221 help
>> 2222 This option select the standard 4kB Linux page size. On some
>> 2223 R3000-family processors this is the only available page size. Using
>> 2224 4kB page size will minimize memory consumption and is therefore
>> 2225 recommended for low memory systems.
>> 2226
>> 2227 config PAGE_SIZE_8KB
>> 2228 bool "8kB"
>> 2229 depends on CPU_CAVIUM_OCTEON
>> 2230 depends on !MIPS_VA_BITS_48
>> 2231 help
>> 2232 Using 8kB page size will result in higher performance kernel at
>> 2233 the price of higher memory consumption. This option is available
>> 2234 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2235 distribution to support this.
>> 2236
>> 2237 config PAGE_SIZE_16KB
>> 2238 bool "16kB"
>> 2239 depends on !CPU_R3000 && !CPU_TX39XX
>> 2240 help
>> 2241 Using 16kB page size will result in higher performance kernel at
>> 2242 the price of higher memory consumption. This option is available on
>> 2243 all non-R3000 family processors. Note that you will need a suitable
>> 2244 Linux distribution to support this.
>> 2245
>> 2246 config PAGE_SIZE_32KB
>> 2247 bool "32kB"
>> 2248 depends on CPU_CAVIUM_OCTEON
>> 2249 depends on !MIPS_VA_BITS_48
>> 2250 help
>> 2251 Using 32kB page size will result in higher performance kernel at
>> 2252 the price of higher memory consumption. This option is available
>> 2253 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2254 distribution to support this.
>> 2255
>> 2256 config PAGE_SIZE_64KB
>> 2257 bool "64kB"
>> 2258 depends on !CPU_R3000 && !CPU_TX39XX
>> 2259 help
>> 2260 Using 64kB page size will result in higher performance kernel at
>> 2261 the price of higher memory consumption. This option is available on
>> 2262 all non-R3000 family processor. Not that at the time of this
>> 2263 writing this option is still high experimental.
1926 2264
1927 config X86_INTEL_TSX_MODE_AUTO <<
1928 bool "auto" <<
1929 help <<
1930 TSX is enabled on TSX capable HW th <<
1931 side channel attacks- equals the ts <<
1932 endchoice 2265 endchoice
1933 2266
1934 config X86_SGX !! 2267 config FORCE_MAX_ZONEORDER
1935 bool "Software Guard eXtensions (SGX) !! 2268 int "Maximum zone order"
1936 depends on X86_64 && CPU_SUP_INTEL && !! 2269 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1937 depends on CRYPTO=y !! 2270 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1938 depends on CRYPTO_SHA256=y !! 2271 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1939 select MMU_NOTIFIER !! 2272 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1940 select NUMA_KEEP_MEMINFO if NUMA !! 2273 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1941 select XARRAY_MULTI !! 2274 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1942 help !! 2275 range 11 64
1943 Intel(R) Software Guard eXtensions !! 2276 default "11"
1944 that can be used by applications to !! 2277 help
1945 and data, referred to as enclaves. !! 2278 The kernel memory allocator divides physically contiguous memory
1946 only be accessed by code running wi !! 2279 blocks into "zones", where each zone is a power of two number of
1947 outside the enclave, including othe !! 2280 pages. This option selects the largest power of two that the kernel
1948 hardware. !! 2281 keeps in the memory allocator. If you need to allocate very large
>> 2282 blocks of physically contiguous memory, then you may need to
>> 2283 increase this value.
1949 2284
1950 If unsure, say N. !! 2285 This config option is actually maximum order plus one. For example,
>> 2286 a value of 11 means that the largest free memory block is 2^10 pages.
1951 2287
1952 config X86_USER_SHADOW_STACK !! 2288 The page size is not necessarily 4KB. Keep this in mind
1953 bool "X86 userspace shadow stack" !! 2289 when choosing a value for this option.
1954 depends on AS_WRUSS <<
1955 depends on X86_64 <<
1956 select ARCH_USES_HIGH_VMA_FLAGS <<
1957 select X86_CET <<
1958 help <<
1959 Shadow stack protection is a hardwa <<
1960 return address corruption. This he <<
1961 Applications must be enabled to use <<
1962 get protection "for free". <<
1963 2290
1964 CPUs supporting shadow stacks were !! 2291 config BOARD_SCACHE
>> 2292 bool
1965 2293
1966 See Documentation/arch/x86/shstk.rs !! 2294 config IP22_CPU_SCACHE
>> 2295 bool
>> 2296 select BOARD_SCACHE
1967 2297
1968 If unsure, say N. !! 2298 #
>> 2299 # Support for a MIPS32 / MIPS64 style S-caches
>> 2300 #
>> 2301 config MIPS_CPU_SCACHE
>> 2302 bool
>> 2303 select BOARD_SCACHE
1969 2304
1970 config INTEL_TDX_HOST !! 2305 config R5000_CPU_SCACHE
1971 bool "Intel Trust Domain Extensions ( !! 2306 bool
1972 depends on CPU_SUP_INTEL !! 2307 select BOARD_SCACHE
1973 depends on X86_64 <<
1974 depends on KVM_INTEL <<
1975 depends on X86_X2APIC <<
1976 select ARCH_KEEP_MEMBLOCK <<
1977 depends on CONTIG_ALLOC <<
1978 depends on !KEXEC_CORE <<
1979 depends on X86_MCE <<
1980 help <<
1981 Intel Trust Domain Extensions (TDX) <<
1982 host and certain physical attacks. <<
1983 support in the host kernel to run c <<
1984 2308
1985 If unsure, say N. !! 2309 config RM7000_CPU_SCACHE
>> 2310 bool
>> 2311 select BOARD_SCACHE
1986 2312
1987 config EFI !! 2313 config SIBYTE_DMA_PAGEOPS
1988 bool "EFI runtime service support" !! 2314 bool "Use DMA to clear/copy pages"
1989 depends on ACPI !! 2315 depends on CPU_SB1
1990 select UCS2_STRING <<
1991 select EFI_RUNTIME_WRAPPERS <<
1992 select ARCH_USE_MEMREMAP_PROT <<
1993 select EFI_RUNTIME_MAP if KEXEC_CORE <<
1994 help <<
1995 This enables the kernel to use EFI <<
1996 available (such as the EFI variable <<
1997 <<
1998 This option is only useful on syste <<
1999 In addition, you should use the lat <<
2000 at <http://elilo.sourceforge.net> i <<
2001 of EFI runtime services. However, e <<
2002 resultant kernel should continue to <<
2003 platforms. <<
2004 <<
2005 config EFI_STUB <<
2006 bool "EFI stub support" <<
2007 depends on EFI <<
2008 select RELOCATABLE <<
2009 help <<
2010 This kernel feature allows a bzImag <<
2011 by EFI firmware without the use of <<
2012 <<
2013 See Documentation/admin-guide/efi-s <<
2014 <<
2015 config EFI_HANDOVER_PROTOCOL <<
2016 bool "EFI handover protocol (DEPRECAT <<
2017 depends on EFI_STUB <<
2018 default y <<
2019 help <<
2020 Select this in order to include sup <<
2021 handover protocol, which defines al <<
2022 EFI stub. This is a practice that <<
2023 specification, and requires a prior <<
2024 bootloader about Linux/x86 specific <<
2025 and initrd, and where in memory tho <<
2026 <<
2027 If in doubt, say Y. Even though the <<
2028 present in upstream GRUB or other b <<
2029 GRUB with numerous downstream patch <<
2030 handover protocol as as result. <<
2031 <<
2032 config EFI_MIXED <<
2033 bool "EFI mixed-mode support" <<
2034 depends on EFI_STUB && X86_64 <<
2035 help 2316 help
2036 Enabling this feature allows a 64-b !! 2317 Instead of using the CPU to zero and copy pages, use a Data Mover
2037 on a 32-bit firmware, provided that !! 2318 channel. These DMA channels are otherwise unused by the standard
2038 mode. !! 2319 SiByte Linux port. Seems to give a small performance benefit.
2039 2320
2040 Note that it is not possible to boo !! 2321 config CPU_HAS_PREFETCH
2041 kernel via the EFI boot stub - a bo !! 2322 bool
2042 the EFI handover protocol must be u <<
2043 2323
2044 If unsure, say N. !! 2324 config CPU_GENERIC_DUMP_TLB
>> 2325 bool
>> 2326 default y if !(CPU_R3000 || CPU_TX39XX)
2045 2327
2046 config EFI_RUNTIME_MAP !! 2328 config MIPS_FP_SUPPORT
2047 bool "Export EFI runtime maps to sysf !! 2329 bool "Floating Point support" if EXPERT
2048 depends on EFI !! 2330 default y
2049 help 2331 help
2050 Export EFI runtime memory regions t !! 2332 Select y to include support for floating point in the kernel
2051 That memory map is required by the !! 2333 including initialization of FPU hardware, FP context save & restore
2052 mappings after kexec, but can also !! 2334 and emulation of an FPU where necessary. Without this support any
2053 !! 2335 userland program attempting to use floating point instructions will
2054 See also Documentation/ABI/testing/ !! 2336 receive a SIGILL.
2055 2337
2056 source "kernel/Kconfig.hz" !! 2338 If you know that your userland will not attempt to use floating point
>> 2339 instructions then you can say n here to shrink the kernel a little.
2057 2340
2058 config ARCH_SUPPORTS_KEXEC !! 2341 If unsure, say y.
2059 def_bool y <<
2060 2342
2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2343 config CPU_R2300_FPU
2062 def_bool X86_64 !! 2344 bool
>> 2345 depends on MIPS_FP_SUPPORT
>> 2346 default y if CPU_R3000 || CPU_TX39XX
2063 2347
2064 config ARCH_SELECTS_KEXEC_FILE !! 2348 config CPU_R3K_TLB
2065 def_bool y !! 2349 bool
2066 depends on KEXEC_FILE <<
2067 select HAVE_IMA_KEXEC if IMA <<
2068 2350
2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2351 config CPU_R4K_FPU
2070 def_bool y !! 2352 bool
>> 2353 depends on MIPS_FP_SUPPORT
>> 2354 default y if !CPU_R2300_FPU
2071 2355
2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2356 config CPU_R4K_CACHE_TLB
2073 def_bool y !! 2357 bool
>> 2358 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2074 2359
2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2360 config MIPS_MT_SMP
2076 def_bool y !! 2361 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2362 default y
>> 2363 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2364 select CPU_MIPSR2_IRQ_VI
>> 2365 select CPU_MIPSR2_IRQ_EI
>> 2366 select SYNC_R4K
>> 2367 select MIPS_MT
>> 2368 select SMP
>> 2369 select SMP_UP
>> 2370 select SYS_SUPPORTS_SMP
>> 2371 select SYS_SUPPORTS_SCHED_SMT
>> 2372 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2373 help
>> 2374 This is a kernel model which is known as SMVP. This is supported
>> 2375 on cores with the MT ASE and uses the available VPEs to implement
>> 2376 virtual processors which supports SMP. This is equivalent to the
>> 2377 Intel Hyperthreading feature. For further information go to
>> 2378 <http://www.imgtec.com/mips/mips-multithreading.asp>.
2077 2379
2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2380 config MIPS_MT
2079 def_bool y !! 2381 bool
2080 2382
2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2383 config SCHED_SMT
2082 def_bool y !! 2384 bool "SMT (multithreading) scheduler support"
>> 2385 depends on SYS_SUPPORTS_SCHED_SMT
>> 2386 default n
>> 2387 help
>> 2388 SMT scheduler support improves the CPU scheduler's decision making
>> 2389 when dealing with MIPS MT enabled cores at a cost of slightly
>> 2390 increased overhead in some places. If unsure say N here.
2083 2391
2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2392 config SYS_SUPPORTS_SCHED_SMT
2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2393 bool
2086 2394
2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2395 config SYS_SUPPORTS_MULTITHREADING
2088 def_bool y !! 2396 bool
2089 2397
2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2398 config MIPS_MT_FPAFF
2091 def_bool CRASH_RESERVE !! 2399 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2400 default y
>> 2401 depends on MIPS_MT_SMP
2092 2402
2093 config PHYSICAL_START !! 2403 config MIPSR2_TO_R6_EMULATOR
2094 hex "Physical address where the kerne !! 2404 bool "MIPS R2-to-R6 emulator"
2095 default "0x1000000" !! 2405 depends on CPU_MIPSR6
>> 2406 depends on MIPS_FP_SUPPORT
>> 2407 default y
2096 help 2408 help
2097 This gives the physical address whe !! 2409 Choose this option if you want to run non-R6 MIPS userland code.
2098 !! 2410 Even if you say 'Y' here, the emulator will still be disabled by
2099 If the kernel is not relocatable (C !! 2411 default. You can enable it using the 'mipsr2emu' kernel option.
2100 will decompress itself to above phy !! 2412 The only reason this is a build-time option is to save ~14K from the
2101 Otherwise, bzImage will run from th !! 2413 final kernel image.
2102 by the boot loader. The only except <<
2103 above physical address, in which ca <<
2104 <<
2105 In normal kdump cases one does not <<
2106 as now bzImage can be compiled as a <<
2107 (CONFIG_RELOCATABLE=y) and be used <<
2108 address. This option is mainly usef <<
2109 to use a bzImage for capturing the <<
2110 vmlinux instead. vmlinux is not rel <<
2111 to be specifically compiled to run <<
2112 (normally a reserved region) and th <<
2113 <<
2114 So if you are using bzImage for cap <<
2115 leave the value here unchanged to 0 <<
2116 CONFIG_RELOCATABLE=y. Otherwise if <<
2117 for capturing the crash dump change <<
2118 the reserved region. In other word <<
2119 the "X" value as specified in the " <<
2120 command line boot parameter passed <<
2121 kernel. Please take a look at Docum <<
2122 for more details about crash dumps. <<
2123 <<
2124 Usage of bzImage for capturing the <<
2125 one does not have to build two kern <<
2126 as production kernel and capture ke <<
2127 gone away after relocatable bzImage <<
2128 is present because there are users <<
2129 vmlinux for dump capture. This opti <<
2130 line. <<
2131 2414
2132 Don't change this unless you know w !! 2415 config SYS_SUPPORTS_VPE_LOADER
>> 2416 bool
>> 2417 depends on SYS_SUPPORTS_MULTITHREADING
>> 2418 help
>> 2419 Indicates that the platform supports the VPE loader, and provides
>> 2420 physical_memsize.
2133 2421
2134 config RELOCATABLE !! 2422 config MIPS_VPE_LOADER
2135 bool "Build a relocatable kernel" !! 2423 bool "VPE loader support."
2136 default y !! 2424 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2425 select CPU_MIPSR2_IRQ_VI
>> 2426 select CPU_MIPSR2_IRQ_EI
>> 2427 select MIPS_MT
2137 help 2428 help
2138 This builds a kernel image that ret !! 2429 Includes a loader for loading an elf relocatable object
2139 so it can be loaded someplace besid !! 2430 onto another VPE and running it.
2140 The relocations tend to make the ke <<
2141 but are discarded at runtime. <<
2142 2431
2143 One use is for the kexec on panic c !! 2432 config MIPS_VPE_LOADER_CMP
2144 must live at a different physical a !! 2433 bool
2145 kernel. !! 2434 default "y"
2146 !! 2435 depends on MIPS_VPE_LOADER && MIPS_CMP
2147 Note: If CONFIG_RELOCATABLE=y, then <<
2148 it has been loaded at and the compi <<
2149 (CONFIG_PHYSICAL_START) is used as <<
2150 2436
2151 config RANDOMIZE_BASE !! 2437 config MIPS_VPE_LOADER_MT
2152 bool "Randomize the address of the ke !! 2438 bool
2153 depends on RELOCATABLE !! 2439 default "y"
>> 2440 depends on MIPS_VPE_LOADER && !MIPS_CMP
>> 2441
>> 2442 config MIPS_VPE_LOADER_TOM
>> 2443 bool "Load VPE program into memory hidden from linux"
>> 2444 depends on MIPS_VPE_LOADER
2154 default y 2445 default y
2155 help 2446 help
2156 In support of Kernel Address Space !! 2447 The loader can use memory that is present but has been hidden from
2157 this randomizes the physical addres !! 2448 Linux using the kernel command line option "mem=xxMB". It's up to
2158 is decompressed and the virtual add !! 2449 you to ensure the amount you put in the option and the space your
2159 image is mapped, as a security feat !! 2450 program requires is less or equal to the amount physically present.
2160 attempts relying on knowledge of th <<
2161 code internals. <<
2162 <<
2163 On 64-bit, the kernel physical and <<
2164 randomized separately. The physical <<
2165 between 16MB and the top of physica <<
2166 virtual address will be randomized <<
2167 of entropy). Note that this also re <<
2168 available to kernel modules from 1. <<
2169 <<
2170 On 32-bit, the kernel physical and <<
2171 randomized together. They will be r <<
2172 512MB (8 bits of entropy). <<
2173 <<
2174 Entropy is generated using the RDRA <<
2175 supported. If RDTSC is supported, i <<
2176 the entropy pool as well. If neithe <<
2177 supported, then entropy is read fro <<
2178 usable entropy is limited by the ke <<
2179 2GB addressing, and that PHYSICAL_A <<
2180 minimum of 2MB. As a result, only 1 <<
2181 theoretically possible, but the imp <<
2182 limited due to memory layouts. <<
2183 2451
2184 If unsure, say Y. !! 2452 config MIPS_VPE_APSP_API
>> 2453 bool "Enable support for AP/SP API (RTLX)"
>> 2454 depends on MIPS_VPE_LOADER
2185 2455
2186 # Relocation on x86 needs some additional bui !! 2456 config MIPS_VPE_APSP_API_CMP
2187 config X86_NEED_RELOCS !! 2457 bool
2188 def_bool y !! 2458 default "y"
2189 depends on RANDOMIZE_BASE || (X86_32 !! 2459 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2460
>> 2461 config MIPS_VPE_APSP_API_MT
>> 2462 bool
>> 2463 default "y"
>> 2464 depends on MIPS_VPE_APSP_API && !MIPS_CMP
2190 2465
2191 config PHYSICAL_ALIGN !! 2466 config MIPS_CMP
2192 hex "Alignment value to which kernel !! 2467 bool "MIPS CMP framework support (DEPRECATED)"
2193 default "0x200000" !! 2468 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
2194 range 0x2000 0x1000000 if X86_32 !! 2469 select SMP
2195 range 0x200000 0x1000000 if X86_64 !! 2470 select SYNC_R4K
>> 2471 select SYS_SUPPORTS_SMP
>> 2472 select WEAK_ORDERING
>> 2473 default n
2196 help 2474 help
2197 This value puts the alignment restr !! 2475 Select this if you are using a bootloader which implements the "CMP
2198 where kernel is loaded and run from !! 2476 framework" protocol (ie. YAMON) and want your kernel to make use of
2199 address which meets above alignment !! 2477 its ability to start secondary CPUs.
>> 2478
>> 2479 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2480 instead of this.
>> 2481
>> 2482 config MIPS_CPS
>> 2483 bool "MIPS Coherent Processing System support"
>> 2484 depends on SYS_SUPPORTS_MIPS_CPS
>> 2485 select MIPS_CM
>> 2486 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2487 select SMP
>> 2488 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2489 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2490 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2491 select SYS_SUPPORTS_SMP
>> 2492 select WEAK_ORDERING
>> 2493 help
>> 2494 Select this if you wish to run an SMP kernel across multiple cores
>> 2495 within a MIPS Coherent Processing System. When this option is
>> 2496 enabled the kernel will probe for other cores and boot them with
>> 2497 no external assistance. It is safe to enable this when hardware
>> 2498 support is unavailable.
2200 2499
2201 If bootloader loads the kernel at a !! 2500 config MIPS_CPS_PM
2202 CONFIG_RELOCATABLE is set, kernel w !! 2501 depends on MIPS_CPS
2203 address aligned to above value and !! 2502 bool
2204 2503
2205 If bootloader loads the kernel at a !! 2504 config MIPS_CM
2206 CONFIG_RELOCATABLE is not set, kern !! 2505 bool
2207 load address and decompress itself !! 2506 select MIPS_CPC
2208 compiled for and run from there. Th <<
2209 compiled already meets above alignm <<
2210 end result is that kernel runs from <<
2211 above alignment restrictions. <<
2212 2507
2213 On 32-bit this value must be a mult !! 2508 config MIPS_CPC
2214 this value must be a multiple of 0x !! 2509 bool
2215 2510
2216 Don't change this unless you know w !! 2511 config SB1_PASS_2_WORKAROUNDS
>> 2512 bool
>> 2513 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2514 default y
2217 2515
2218 config DYNAMIC_MEMORY_LAYOUT !! 2516 config SB1_PASS_2_1_WORKAROUNDS
2219 bool 2517 bool
>> 2518 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2519 default y
>> 2520
>> 2521 choice
>> 2522 prompt "SmartMIPS or microMIPS ASE support"
>> 2523
>> 2524 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2525 bool "None"
2220 help 2526 help
2221 This option makes base addresses of !! 2527 Select this if you want neither microMIPS nor SmartMIPS support
2222 __PAGE_OFFSET movable during boot. <<
2223 2528
2224 config RANDOMIZE_MEMORY !! 2529 config CPU_HAS_SMARTMIPS
2225 bool "Randomize the kernel memory sec !! 2530 depends on SYS_SUPPORTS_SMARTMIPS
2226 depends on X86_64 !! 2531 bool "SmartMIPS"
2227 depends on RANDOMIZE_BASE !! 2532 help
2228 select DYNAMIC_MEMORY_LAYOUT !! 2533 SmartMIPS is a extension of the MIPS32 architecture aimed at
2229 default RANDOMIZE_BASE !! 2534 increased security at both hardware and software level for
>> 2535 smartcards. Enabling this option will allow proper use of the
>> 2536 SmartMIPS instructions by Linux applications. However a kernel with
>> 2537 this option will not work on a MIPS core without SmartMIPS core. If
>> 2538 you don't know you probably don't have SmartMIPS and should say N
>> 2539 here.
>> 2540
>> 2541 config CPU_MICROMIPS
>> 2542 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2543 bool "microMIPS"
2230 help 2544 help
2231 Randomizes the base virtual address !! 2545 When this option is enabled the kernel will be built using the
2232 (physical memory mapping, vmalloc & !! 2546 microMIPS ISA
2233 makes exploits relying on predictab !! 2547
2234 !! 2548 endchoice
2235 The order of allocations remains un !! 2549
2236 the same way as RANDOMIZE_BASE. Cur !! 2550 config CPU_HAS_MSA
2237 configuration have in average 30,00 !! 2551 bool "Support for the MIPS SIMD Architecture"
2238 addresses for each memory section. !! 2552 depends on CPU_SUPPORTS_MSA
>> 2553 depends on MIPS_FP_SUPPORT
>> 2554 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2555 help
>> 2556 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2557 and a set of SIMD instructions to operate on them. When this option
>> 2558 is enabled the kernel will support allocating & switching MSA
>> 2559 vector register contexts. If you know that your kernel will only be
>> 2560 running on CPUs which do not support MSA or that your userland will
>> 2561 not be making use of it then you may wish to say N here to reduce
>> 2562 the size & complexity of your kernel.
2239 2563
2240 If unsure, say Y. 2564 If unsure, say Y.
2241 2565
2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2566 config CPU_HAS_WB
2243 hex "Physical memory mapping padding" !! 2567 bool
2244 depends on RANDOMIZE_MEMORY <<
2245 default "0xa" if MEMORY_HOTPLUG <<
2246 default "0x0" <<
2247 range 0x1 0x40 if MEMORY_HOTPLUG <<
2248 range 0x0 0x40 <<
2249 help <<
2250 Define the padding in terabytes add <<
2251 memory size during kernel memory ra <<
2252 for memory hotplug support but redu <<
2253 address randomization. <<
2254 2568
2255 If unsure, leave at the default val !! 2569 config XKS01
>> 2570 bool
2256 2571
2257 config ADDRESS_MASKING !! 2572 config CPU_HAS_DIEI
2258 bool "Linear Address Masking support" !! 2573 depends on !CPU_DIEI_BROKEN
2259 depends on X86_64 !! 2574 bool
2260 depends on COMPILE_TEST || !CPU_MITIG <<
2261 help <<
2262 Linear Address Masking (LAM) modifi <<
2263 to 64-bit linear addresses, allowin <<
2264 untranslated address bits for metad <<
2265 2575
2266 The capability can be used for effi !! 2576 config CPU_DIEI_BROKEN
2267 implementation and for optimization !! 2577 bool
2268 2578
2269 config HOTPLUG_CPU !! 2579 config CPU_HAS_RIXI
2270 def_bool y !! 2580 bool
2271 depends on SMP <<
2272 2581
2273 config COMPAT_VDSO !! 2582 config CPU_NO_LOAD_STORE_LR
2274 def_bool n !! 2583 bool
2275 prompt "Disable the 32-bit vDSO (need <<
2276 depends on COMPAT_32 <<
2277 help 2584 help
2278 Certain buggy versions of glibc wil !! 2585 CPU lacks support for unaligned load and store instructions:
2279 presented with a 32-bit vDSO that i !! 2586 LWL, LWR, SWL, SWR (Load/store word left/right).
2280 indicated in its segment table. !! 2587 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2281 !! 2588 systems).
2282 The bug was introduced by f866314b8 <<
2283 and fixed by 3b3ddb4f7db98ec9e912cc <<
2284 49ad572a70b8aeb91e57483a11dd1b77e31 <<
2285 the only released version with the <<
2286 contains a buggy "glibc 2.3.2". <<
2287 <<
2288 The symptom of the bug is that ever <<
2289 dl_main: Assertion `(void *) ph->p_ <<
2290 <<
2291 Saying Y here changes the default v <<
2292 option from 1 to 0, which turns off <<
2293 This works around the glibc bug but <<
2294 <<
2295 If unsure, say N: if you are compil <<
2296 are unlikely to be using a buggy ve <<
2297 2589
2298 choice !! 2590 #
2299 prompt "vsyscall table for legacy app !! 2591 # Vectored interrupt mode is an R2 feature
2300 depends on X86_64 !! 2592 #
2301 default LEGACY_VSYSCALL_XONLY !! 2593 config CPU_MIPSR2_IRQ_VI
2302 help !! 2594 bool
2303 Legacy user code that does not know <<
2304 to be able to issue three syscalls <<
2305 kernel space. Since this location i <<
2306 it can be used to assist security v <<
2307 <<
2308 This setting can be changed at boot <<
2309 line parameter vsyscall=[emulate|xo <<
2310 is deprecated and can only be enabl <<
2311 line. <<
2312 <<
2313 On a system with recent enough glib <<
2314 static binaries, you can say None w <<
2315 to improve security. <<
2316 2595
2317 If unsure, select "Emulate executio !! 2596 #
>> 2597 # Extended interrupt mode is an R2 feature
>> 2598 #
>> 2599 config CPU_MIPSR2_IRQ_EI
>> 2600 bool
2318 2601
2319 config LEGACY_VSYSCALL_XONLY !! 2602 config CPU_HAS_SYNC
2320 bool "Emulate execution only" !! 2603 bool
2321 help !! 2604 depends on !CPU_R3000
2322 The kernel traps and emulat !! 2605 default y
2323 address mapping and does no <<
2324 configuration is recommende <<
2325 legacy vsyscall area but su <<
2326 instrumentation of legacy c <<
2327 certain uses of the vsyscal <<
2328 buffer. <<
2329 2606
2330 config LEGACY_VSYSCALL_NONE !! 2607 #
2331 bool "None" !! 2608 # CPU non-features
2332 help !! 2609 #
2333 There will be no vsyscall m !! 2610 config CPU_DADDI_WORKAROUNDS
2334 eliminate any risk of ASLR !! 2611 bool
2335 fixed address mapping. Atte <<
2336 will be reported to dmesg, <<
2337 malicious userspace program <<
2338 2612
2339 endchoice !! 2613 config CPU_R4000_WORKAROUNDS
>> 2614 bool
>> 2615 select CPU_R4400_WORKAROUNDS
2340 2616
2341 config CMDLINE_BOOL !! 2617 config CPU_R4400_WORKAROUNDS
2342 bool "Built-in kernel command line" !! 2618 bool
2343 help <<
2344 Allow for specifying boot arguments <<
2345 build time. On some systems (e.g. <<
2346 necessary or convenient to provide <<
2347 kernel boot arguments with the kern <<
2348 to not rely on the boot loader to p <<
2349 2619
2350 To compile command line arguments i !! 2620 config CPU_R4X00_BUGS64
2351 set this option to 'Y', then fill i !! 2621 bool
2352 boot arguments in CONFIG_CMDLINE. !! 2622 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2353 2623
2354 Systems with fully functional boot !! 2624 config MIPS_ASID_SHIFT
2355 should leave this option set to 'N' !! 2625 int
>> 2626 default 6 if CPU_R3000 || CPU_TX39XX
>> 2627 default 0
2356 2628
2357 config CMDLINE !! 2629 config MIPS_ASID_BITS
2358 string "Built-in kernel command strin !! 2630 int
2359 depends on CMDLINE_BOOL !! 2631 default 0 if MIPS_ASID_BITS_VARIABLE
2360 default "" !! 2632 default 6 if CPU_R3000 || CPU_TX39XX
2361 help !! 2633 default 8
2362 Enter arguments here that should be <<
2363 image and used at boot time. If th <<
2364 command line at boot time, it is ap <<
2365 form the full kernel command line, <<
2366 2634
2367 However, you can use the CONFIG_CMD !! 2635 config MIPS_ASID_BITS_VARIABLE
2368 change this behavior. !! 2636 bool
2369 2637
2370 In most cases, the command line (wh !! 2638 config MIPS_CRC_SUPPORT
2371 by the boot loader) should specify !! 2639 bool
2372 file system. <<
2373 2640
2374 config CMDLINE_OVERRIDE !! 2641 #
2375 bool "Built-in command line overrides !! 2642 # - Highmem only makes sense for the 32-bit kernel.
2376 depends on CMDLINE_BOOL && CMDLINE != !! 2643 # - The current highmem code will only work properly on physically indexed
2377 help !! 2644 # caches such as R3000, SB1, R7000 or those that look like they're virtually
2378 Set this option to 'Y' to have the !! 2645 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
2379 command line, and use ONLY the buil !! 2646 # moment we protect the user and offer the highmem option only on machines
>> 2647 # where it's known to be safe. This will not offer highmem on a few systems
>> 2648 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2649 # indexed CPUs but we're playing safe.
>> 2650 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2651 # know they might have memory configurations that could make use of highmem
>> 2652 # support.
>> 2653 #
>> 2654 config HIGHMEM
>> 2655 bool "High Memory Support"
>> 2656 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2380 2657
2381 This is used to work around broken !! 2658 config CPU_SUPPORTS_HIGHMEM
2382 be set to 'N' under normal conditio !! 2659 bool
2383 2660
2384 config MODIFY_LDT_SYSCALL !! 2661 config SYS_SUPPORTS_HIGHMEM
2385 bool "Enable the LDT (local descripto !! 2662 bool
2386 default y <<
2387 help <<
2388 Linux can allow user programs to in <<
2389 Local Descriptor Table (LDT) using <<
2390 call. This is required to run 16-b <<
2391 DOSEMU or some Wine programs. It i <<
2392 threading libraries. <<
2393 2663
2394 Enabling this feature adds a small !! 2664 config SYS_SUPPORTS_SMARTMIPS
2395 context switches and increases the !! 2665 bool
2396 surface. Disabling it removes the <<
2397 2666
2398 Saying 'N' here may make sense for !! 2667 config SYS_SUPPORTS_MICROMIPS
>> 2668 bool
2399 2669
2400 config STRICT_SIGALTSTACK_SIZE !! 2670 config SYS_SUPPORTS_MIPS16
2401 bool "Enforce strict size checking fo !! 2671 bool
2402 depends on DYNAMIC_SIGFRAME <<
2403 help 2672 help
2404 For historical reasons MINSIGSTKSZ !! 2673 This option must be set if a kernel might be executed on a MIPS16-
2405 already too small with AVX512 suppo !! 2674 enabled CPU even if MIPS16 is not actually being used. In other
2406 enforce strict checking of the siga !! 2675 words, it makes the kernel MIPS16-tolerant.
2407 real size of the FPU frame. This op <<
2408 by default. It can also be controll <<
2409 line option 'strict_sas_size' indep <<
2410 switch. Enabling it might break exi <<
2411 allocate a too small sigaltstack bu <<
2412 never get a signal delivered. <<
2413 2676
2414 Say 'N' unless you want to really e !! 2677 config CPU_SUPPORTS_MSA
>> 2678 bool
2415 2679
2416 config CFI_AUTO_DEFAULT !! 2680 config ARCH_FLATMEM_ENABLE
2417 bool "Attempt to use FineIBT by defau !! 2681 def_bool y
2418 depends on FINEIBT !! 2682 depends on !NUMA && !CPU_LOONGSON2EF
2419 default y <<
2420 help <<
2421 Attempt to use FineIBT by default a <<
2422 this is the same as booting with "c <<
2423 this is the same as booting with "c <<
2424 2683
2425 source "kernel/livepatch/Kconfig" !! 2684 config ARCH_SPARSEMEM_ENABLE
>> 2685 bool
>> 2686 select SPARSEMEM_STATIC if !SGI_IP27
2426 2687
2427 endmenu !! 2688 config NUMA
>> 2689 bool "NUMA Support"
>> 2690 depends on SYS_SUPPORTS_NUMA
>> 2691 help
>> 2692 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2693 Access). This option improves performance on systems with more
>> 2694 than two nodes; on two node systems it is generally better to
>> 2695 leave it disabled; on single node systems leave this option
>> 2696 disabled.
2428 2697
2429 config CC_HAS_NAMED_AS !! 2698 config SYS_SUPPORTS_NUMA
2430 def_bool $(success,echo 'int __seg_fs !! 2699 bool
2431 depends on CC_IS_GCC <<
2432 2700
2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS !! 2701 config HAVE_SETUP_PER_CPU_AREA
2434 def_bool CC_IS_GCC && GCC_VERSION >= !! 2702 def_bool y
>> 2703 depends on NUMA
2435 2704
2436 config USE_X86_SEG_SUPPORT !! 2705 config NEED_PER_CPU_EMBED_FIRST_CHUNK
2437 def_bool y 2706 def_bool y
2438 depends on CC_HAS_NAMED_AS !! 2707 depends on NUMA
2439 # <<
2440 # -fsanitize=kernel-address (KASAN) a <<
2441 # (KCSAN) are incompatible with named <<
2442 # GCC < 13.3 - see GCC PR sanitizer/1 <<
2443 # <<
2444 depends on !(KASAN || KCSAN) || CC_HA <<
2445 2708
2446 config CC_HAS_SLS !! 2709 config RELOCATABLE
2447 def_bool $(cc-option,-mharden-sls=all !! 2710 bool "Relocatable kernel"
>> 2711 depends on SYS_SUPPORTS_RELOCATABLE
>> 2712 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2713 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2714 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2715 CPU_P5600 || CAVIUM_OCTEON_SOC
>> 2716 help
>> 2717 This builds a kernel image that retains relocation information
>> 2718 so it can be loaded someplace besides the default 1MB.
>> 2719 The relocations make the kernel binary about 15% larger,
>> 2720 but are discarded at runtime
2448 2721
2449 config CC_HAS_RETURN_THUNK !! 2722 config RELOCATION_TABLE_SIZE
2450 def_bool $(cc-option,-mfunction-retur !! 2723 hex "Relocation table size"
>> 2724 depends on RELOCATABLE
>> 2725 range 0x0 0x01000000
>> 2726 default "0x00100000"
>> 2727 help
>> 2728 A table of relocation data will be appended to the kernel binary
>> 2729 and parsed at boot to fix up the relocated kernel.
2451 2730
2452 config CC_HAS_ENTRY_PADDING !! 2731 This option allows the amount of space reserved for the table to be
2453 def_bool $(cc-option,-fpatchable-func !! 2732 adjusted, although the default of 1Mb should be ok in most cases.
2454 2733
2455 config FUNCTION_PADDING_CFI !! 2734 The build will fail and a valid size suggested if this is too small.
2456 int <<
2457 default 59 if FUNCTION_ALIGNMENT_64B <<
2458 default 27 if FUNCTION_ALIGNMENT_32B <<
2459 default 11 if FUNCTION_ALIGNMENT_16B <<
2460 default 3 if FUNCTION_ALIGNMENT_8B <<
2461 default 0 <<
2462 <<
2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG <<
2464 # except Kconfig can't do arithmetic :/ <<
2465 config FUNCTION_PADDING_BYTES <<
2466 int <<
2467 default FUNCTION_PADDING_CFI if CFI_C <<
2468 default FUNCTION_ALIGNMENT <<
2469 2735
2470 config CALL_PADDING !! 2736 If unsure, leave at the default value.
2471 def_bool n <<
2472 depends on CC_HAS_ENTRY_PADDING && OB <<
2473 select FUNCTION_ALIGNMENT_16B <<
2474 2737
2475 config FINEIBT !! 2738 config RANDOMIZE_BASE
2476 def_bool y !! 2739 bool "Randomize the address of the kernel image"
2477 depends on X86_KERNEL_IBT && CFI_CLAN !! 2740 depends on RELOCATABLE
2478 select CALL_PADDING !! 2741 help
>> 2742 Randomizes the physical and virtual address at which the
>> 2743 kernel image is loaded, as a security feature that
>> 2744 deters exploit attempts relying on knowledge of the location
>> 2745 of kernel internals.
2479 2746
2480 config HAVE_CALL_THUNKS !! 2747 Entropy is generated using any coprocessor 0 registers available.
2481 def_bool y <<
2482 depends on CC_HAS_ENTRY_PADDING && MI <<
2483 2748
2484 config CALL_THUNKS !! 2749 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2485 def_bool n <<
2486 select CALL_PADDING <<
2487 2750
2488 config PREFIX_SYMBOLS !! 2751 If unsure, say N.
2489 def_bool y <<
2490 depends on CALL_PADDING && !CFI_CLANG <<
2491 <<
2492 menuconfig CPU_MITIGATIONS <<
2493 bool "Mitigations for CPU vulnerabili <<
2494 default y <<
2495 help <<
2496 Say Y here to enable options which <<
2497 vulnerabilities (usually related to <<
2498 Mitigations can be disabled or rest <<
2499 via the "mitigations" kernel parame <<
2500 2752
2501 If you say N, all mitigations will !! 2753 config RANDOMIZE_BASE_MAX_OFFSET
2502 overridden at runtime. !! 2754 hex "Maximum kASLR offset" if EXPERT
>> 2755 depends on RANDOMIZE_BASE
>> 2756 range 0x0 0x40000000 if EVA || 64BIT
>> 2757 range 0x0 0x08000000
>> 2758 default "0x01000000"
>> 2759 help
>> 2760 When kASLR is active, this provides the maximum offset that will
>> 2761 be applied to the kernel image. It should be set according to the
>> 2762 amount of physical RAM available in the target system minus
>> 2763 PHYSICAL_START and must be a power of 2.
2503 2764
2504 Say 'Y', unless you really know wha !! 2765 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2766 EVA or 64-bit. The default is 16Mb.
2505 2767
2506 if CPU_MITIGATIONS !! 2768 config NODES_SHIFT
>> 2769 int
>> 2770 default "6"
>> 2771 depends on NEED_MULTIPLE_NODES
2507 2772
2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2773 config HW_PERF_EVENTS
2509 bool "Remove the kernel mapping in us !! 2774 bool "Enable hardware performance counter support for perf events"
>> 2775 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON64)
2510 default y 2776 default y
2511 depends on (X86_64 || X86_PAE) <<
2512 help 2777 help
2513 This feature reduces the number of !! 2778 Enable hardware performance counter support for perf events. If
2514 ensuring that the majority of kerne !! 2779 disabled, perf events will use software events only.
2515 into userspace. <<
2516 <<
2517 See Documentation/arch/x86/pti.rst <<
2518 2780
2519 config MITIGATION_RETPOLINE !! 2781 config DMI
2520 bool "Avoid speculative indirect bran !! 2782 bool "Enable DMI scanning"
2521 select OBJTOOL if HAVE_OBJTOOL !! 2783 depends on MACH_LOONGSON64
>> 2784 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2522 default y 2785 default y
2523 help 2786 help
2524 Compile kernel with the retpoline c !! 2787 Enabled scanning of DMI to identify machine quirks. Say Y
2525 kernel-to-user data leaks by avoidi !! 2788 here unless you have verified that your setup is not
2526 branches. Requires a compiler with !! 2789 affected by entries in the DMI blacklist. Required by PNP
2527 support for full protection. The ke !! 2790 BIOS code.
2528 2791
2529 config MITIGATION_RETHUNK !! 2792 config SMP
2530 bool "Enable return-thunks" !! 2793 bool "Multi-Processing support"
2531 depends on MITIGATION_RETPOLINE && CC !! 2794 depends on SYS_SUPPORTS_SMP
2532 select OBJTOOL if HAVE_OBJTOOL <<
2533 default y if X86_64 <<
2534 help 2795 help
2535 Compile the kernel with the return- !! 2796 This enables support for systems with more than one CPU. If you have
2536 against kernel-to-user data leaks b !! 2797 a system with only one CPU, say N. If you have a system with more
2537 Requires a compiler with -mfunction !! 2798 than one CPU, say Y.
2538 support for full protection. The ke <<
2539 2799
2540 config MITIGATION_UNRET_ENTRY !! 2800 If you say N here, the kernel will run on uni- and multiprocessor
2541 bool "Enable UNRET on kernel entry" !! 2801 machines, but will use only one CPU of a multiprocessor machine. If
2542 depends on CPU_SUP_AMD && MITIGATION_ !! 2802 you say Y here, the kernel will run on many, but not all,
2543 default y !! 2803 uniprocessor machines. On a uniprocessor machine, the kernel
2544 help !! 2804 will run faster if you say N here.
2545 Compile the kernel with support for <<
2546 2805
2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2806 People using multiprocessor machines who say Y here should also say
2548 bool "Mitigate RSB underflow with cal !! 2807 Y to "Enhanced Real Time Clock Support", below.
2549 depends on CPU_SUP_INTEL && HAVE_CALL <<
2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB <<
2551 select CALL_THUNKS <<
2552 default y <<
2553 help <<
2554 Compile the kernel with call depth <<
2555 SKL Return-Speculation-Buffer (RSB) <<
2556 mitigation is off by default and ne <<
2557 kernel command line via the retblee <<
2558 non-affected systems the overhead o <<
2559 the call depth tracking is using ru <<
2560 in a compiler generated padding are <<
2561 increases text size by ~5%. For non <<
2562 is unused. On affected SKL systems <<
2563 performance gain over the IBRS miti <<
2564 2808
2565 config CALL_THUNKS_DEBUG !! 2809 See also the SMP-HOWTO available at
2566 bool "Enable call thunks and call dep !! 2810 <https://www.tldp.org/docs.html#howto>.
2567 depends on MITIGATION_CALL_DEPTH_TRAC <<
2568 select FUNCTION_ALIGNMENT_32B <<
2569 default n <<
2570 help <<
2571 Enable call/ret counters for imbala <<
2572 a noisy dmesg about callthunks gene <<
2573 trouble shooting. The debug prints <<
2574 kernel command line with 'debug-cal <<
2575 Only enable this when you are debug <<
2576 creates a noticeable runtime overhe <<
2577 2811
2578 config MITIGATION_IBPB_ENTRY !! 2812 If you don't know what to do here, say N.
2579 bool "Enable IBPB on kernel entry" <<
2580 depends on CPU_SUP_AMD && X86_64 <<
2581 default y <<
2582 help <<
2583 Compile the kernel with support for <<
2584 2813
2585 config MITIGATION_IBRS_ENTRY !! 2814 config HOTPLUG_CPU
2586 bool "Enable IBRS on kernel entry" !! 2815 bool "Support for hot-pluggable CPUs"
2587 depends on CPU_SUP_INTEL && X86_64 !! 2816 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2588 default y <<
2589 help 2817 help
2590 Compile the kernel with support for !! 2818 Say Y here to allow turning CPUs off and on. CPUs can be
2591 This mitigates both spectre_v2 and !! 2819 controlled through /sys/devices/system/cpu.
2592 performance. !! 2820 (Note: power management support will enable this option
>> 2821 automatically on SMP systems. )
>> 2822 Say N if you want to disable CPU hotplug.
2593 2823
2594 config MITIGATION_SRSO !! 2824 config SMP_UP
2595 bool "Mitigate speculative RAS overfl !! 2825 bool
2596 depends on CPU_SUP_AMD && X86_64 && M <<
2597 default y <<
2598 help <<
2599 Enable the SRSO mitigation needed o <<
2600 2826
2601 config MITIGATION_SLS !! 2827 config SYS_SUPPORTS_MIPS_CMP
2602 bool "Mitigate Straight-Line-Speculat !! 2828 bool
2603 depends on CC_HAS_SLS && X86_64 <<
2604 select OBJTOOL if HAVE_OBJTOOL <<
2605 default n <<
2606 help <<
2607 Compile the kernel with straight-li <<
2608 against straight line speculation. <<
2609 larger. <<
2610 2829
2611 config MITIGATION_GDS !! 2830 config SYS_SUPPORTS_MIPS_CPS
2612 bool "Mitigate Gather Data Sampling" !! 2831 bool
2613 depends on CPU_SUP_INTEL <<
2614 default y <<
2615 help <<
2616 Enable mitigation for Gather Data S <<
2617 vulnerability which allows unprivil <<
2618 which was previously stored in vect <<
2619 instructions to infer the stale vec <<
2620 2832
2621 config MITIGATION_RFDS !! 2833 config SYS_SUPPORTS_SMP
2622 bool "RFDS Mitigation" !! 2834 bool
2623 depends on CPU_SUP_INTEL <<
2624 default y <<
2625 help <<
2626 Enable mitigation for Register File <<
2627 RFDS is a hardware vulnerability wh <<
2628 allows unprivileged speculative acc <<
2629 stored in floating point, vector an <<
2630 See also <file:Documentation/admin- <<
2631 2835
2632 config MITIGATION_SPECTRE_BHI !! 2836 config NR_CPUS_DEFAULT_4
2633 bool "Mitigate Spectre-BHB (Branch Hi !! 2837 bool
2634 depends on CPU_SUP_INTEL <<
2635 default y <<
2636 help <<
2637 Enable BHI mitigations. BHI attacks <<
2638 where the branch history buffer is <<
2639 indirect branches. <<
2640 See <file:Documentation/admin-guide <<
2641 2838
2642 config MITIGATION_MDS !! 2839 config NR_CPUS_DEFAULT_8
2643 bool "Mitigate Microarchitectural Dat !! 2840 bool
2644 depends on CPU_SUP_INTEL <<
2645 default y <<
2646 help <<
2647 Enable mitigation for Microarchitec <<
2648 a hardware vulnerability which allo <<
2649 to data which is available in vario <<
2650 See also <file:Documentation/admin- <<
2651 2841
2652 config MITIGATION_TAA !! 2842 config NR_CPUS_DEFAULT_16
2653 bool "Mitigate TSX Asynchronous Abort !! 2843 bool
2654 depends on CPU_SUP_INTEL <<
2655 default y <<
2656 help <<
2657 Enable mitigation for TSX Asynchron <<
2658 vulnerability that allows unprivile <<
2659 which is available in various CPU i <<
2660 asynchronous aborts within an Intel <<
2661 See also <file:Documentation/admin- <<
2662 2844
2663 config MITIGATION_MMIO_STALE_DATA !! 2845 config NR_CPUS_DEFAULT_32
2664 bool "Mitigate MMIO Stale Data hardwa !! 2846 bool
2665 depends on CPU_SUP_INTEL <<
2666 default y <<
2667 help <<
2668 Enable mitigation for MMIO Stale Da <<
2669 Stale Data Vulnerabilities are a cl <<
2670 vulnerabilities that can expose dat <<
2671 attacker to have access to MMIO. <<
2672 See also <<
2673 <file:Documentation/admin-guide/hw- <<
2674 2847
2675 config MITIGATION_L1TF !! 2848 config NR_CPUS_DEFAULT_64
2676 bool "Mitigate L1 Terminal Fault (L1T !! 2849 bool
2677 depends on CPU_SUP_INTEL <<
2678 default y <<
2679 help <<
2680 Mitigate L1 Terminal Fault (L1TF) h <<
2681 hardware vulnerability which allows <<
2682 available in the Level 1 Data Cache <<
2683 See <file:Documentation/admin-guide <<
2684 2850
2685 config MITIGATION_RETBLEED !! 2851 config NR_CPUS
2686 bool "Mitigate RETBleed hardware bug" !! 2852 int "Maximum number of CPUs (2-256)"
2687 depends on (CPU_SUP_INTEL && MITIGATI !! 2853 range 2 256
2688 default y !! 2854 depends on SMP
>> 2855 default "4" if NR_CPUS_DEFAULT_4
>> 2856 default "8" if NR_CPUS_DEFAULT_8
>> 2857 default "16" if NR_CPUS_DEFAULT_16
>> 2858 default "32" if NR_CPUS_DEFAULT_32
>> 2859 default "64" if NR_CPUS_DEFAULT_64
2689 help 2860 help
2690 Enable mitigation for RETBleed (Arb !! 2861 This allows you to specify the maximum number of CPUs which this
2691 with Return Instructions) vulnerabi !! 2862 kernel will support. The maximum supported value is 32 for 32-bit
2692 execution attack which takes advant !! 2863 kernel and 64 for 64-bit kernels; the minimum value which makes
2693 in many modern microprocessors, sim !! 2864 sense is 1 for Qemu (useful only for kernel debugging purposes)
2694 unprivileged attacker can use these !! 2865 and 2 for all others.
2695 memory security restrictions to gai !! 2866
2696 that would otherwise be inaccessibl !! 2867 This is purely to save memory - each supported CPU adds
>> 2868 approximately eight kilobytes to the kernel image. For best
>> 2869 performance should round up your number of processors to the next
>> 2870 power of two.
2697 2871
2698 config MITIGATION_SPECTRE_V1 !! 2872 config MIPS_PERF_SHARED_TC_COUNTERS
2699 bool "Mitigate SPECTRE V1 hardware bu !! 2873 bool
2700 default y <<
2701 help <<
2702 Enable mitigation for Spectre V1 (B <<
2703 class of side channel attacks that <<
2704 execution that bypasses conditional <<
2705 memory access bounds check. <<
2706 See also <file:Documentation/admin- <<
2707 2874
2708 config MITIGATION_SPECTRE_V2 !! 2875 config MIPS_NR_CPU_NR_MAP_1024
2709 bool "Mitigate SPECTRE V2 hardware bu !! 2876 bool
2710 default y <<
2711 help <<
2712 Enable mitigation for Spectre V2 (B <<
2713 V2 is a class of side channel attac <<
2714 indirect branch predictors inside t <<
2715 attacks, the attacker can steer spe <<
2716 victim to gadget code by poisoning <<
2717 used for predicting indirect branch <<
2718 See also <file:Documentation/admin- <<
2719 2877
2720 config MITIGATION_SRBDS !! 2878 config MIPS_NR_CPU_NR_MAP
2721 bool "Mitigate Special Register Buffe !! 2879 int
2722 depends on CPU_SUP_INTEL !! 2880 depends on SMP
2723 default y !! 2881 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2724 help !! 2882 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2725 Enable mitigation for Special Regis <<
2726 SRBDS is a hardware vulnerability t <<
2727 Sampling (MDS) techniques to infer <<
2728 register accesses. An unprivileged <<
2729 from RDRAND and RDSEED executed on <<
2730 using MDS techniques. <<
2731 See also <<
2732 <file:Documentation/admin-guide/hw- <<
2733 2883
2734 config MITIGATION_SSB !! 2884 #
2735 bool "Mitigate Speculative Store Bypa !! 2885 # Timer Interrupt Frequency Configuration
2736 default y !! 2886 #
>> 2887
>> 2888 choice
>> 2889 prompt "Timer frequency"
>> 2890 default HZ_250
2737 help 2891 help
2738 Enable mitigation for Speculative S !! 2892 Allows the configuration of the timer frequency.
2739 hardware security vulnerability and <<
2740 of speculative execution in a simil <<
2741 security vulnerabilities. <<
2742 2893
2743 endif !! 2894 config HZ_24
>> 2895 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2744 2896
2745 config ARCH_HAS_ADD_PAGES !! 2897 config HZ_48
2746 def_bool y !! 2898 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG <<
2748 2899
2749 menu "Power management and ACPI options" !! 2900 config HZ_100
>> 2901 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2750 2902
2751 config ARCH_HIBERNATION_HEADER !! 2903 config HZ_128
2752 def_bool y !! 2904 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2753 depends on HIBERNATION <<
2754 2905
2755 source "kernel/power/Kconfig" !! 2906 config HZ_250
>> 2907 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2756 2908
2757 source "drivers/acpi/Kconfig" !! 2909 config HZ_256
>> 2910 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2758 2911
2759 config X86_APM_BOOT !! 2912 config HZ_1000
2760 def_bool y !! 2913 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2761 depends on APM <<
2762 2914
2763 menuconfig APM !! 2915 config HZ_1024
2764 tristate "APM (Advanced Power Managem !! 2916 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2765 depends on X86_32 && PM_SLEEP <<
2766 help <<
2767 APM is a BIOS specification for sav <<
2768 techniques. This is mostly useful f <<
2769 APM compliant BIOSes. If you say Y <<
2770 reset after a RESUME operation, the <<
2771 battery status information, and use <<
2772 notification of APM "events" (e.g. <<
2773 <<
2774 If you select "Y" here, you can dis <<
2775 BIOS by passing the "apm=off" optio <<
2776 <<
2777 Note that the APM support is almost <<
2778 machines with more than one CPU. <<
2779 <<
2780 In order to use APM, you will need <<
2781 and more information, read <file:Do <<
2782 and the Battery Powered Linux mini- <<
2783 <http://www.tldp.org/docs.html#howt <<
2784 <<
2785 This driver does not spin down disk <<
2786 manpage ("man 8 hdparm") for that), <<
2787 VESA-compliant "green" monitors. <<
2788 <<
2789 This driver does not support the TI <<
2790 486/DX4/75 because they don't have <<
2791 desktop machines also don't have co <<
2792 may cause those machines to panic d <<
2793 <<
2794 Generally, if you don't have a batt <<
2795 much point in using this driver and <<
2796 random kernel OOPSes or reboots tha <<
2797 anything, try disabling/enabling th <<
2798 APM in your BIOS). <<
2799 <<
2800 Some other things you should try wh <<
2801 "weird" problems: <<
2802 <<
2803 1) make sure that you have enough s <<
2804 enabled. <<
2805 2) pass the "idle=poll" option to t <<
2806 3) switch on floating point emulati <<
2807 the "no387" option to the kernel <<
2808 4) pass the "floppy=nodma" option t <<
2809 5) pass the "mem=4M" option to the <<
2810 all but the first 4 MB of RAM) <<
2811 6) make sure that the CPU is not ov <<
2812 7) read the sig11 FAQ at <http://ww <<
2813 8) disable the cache from your BIOS <<
2814 9) install a fan for the video card <<
2815 10) install a better fan for the CP <<
2816 11) exchange RAM chips <<
2817 12) exchange the motherboard. <<
2818 <<
2819 To compile this driver as a module, <<
2820 module will be called apm. <<
2821 <<
2822 if APM <<
2823 <<
2824 config APM_IGNORE_USER_SUSPEND <<
2825 bool "Ignore USER SUSPEND" <<
2826 help <<
2827 This option will ignore USER SUSPEN <<
2828 compliant APM BIOS, you want to say <<
2829 series notebooks, it is necessary t <<
2830 <<
2831 config APM_DO_ENABLE <<
2832 bool "Enable PM at boot time" <<
2833 help <<
2834 Enable APM features at boot time. F <<
2835 specification: "When disabled, the <<
2836 power manage devices, enter the Sta <<
2837 State, or take power saving steps i <<
2838 This driver will make CPU Idle call <<
2839 feature is turned off -- see "Do CP <<
2840 should always save battery power, b <<
2841 will be dependent on your BIOS impl <<
2842 this option off if your computer ha <<
2843 support, or if it beeps continuousl <<
2844 this off if you have a NEC UltraLit <<
2845 T400CDT. This is off by default sin <<
2846 this feature. <<
2847 <<
2848 config APM_CPU_IDLE <<
2849 depends on CPU_IDLE <<
2850 bool "Make CPU Idle calls when idle" <<
2851 help <<
2852 Enable calls to APM CPU Idle/CPU Bu <<
2853 On some machines, this can activate <<
2854 a slowed CPU clock rate, when the m <<
2855 are made after the idle loop has ru <<
2856 333 mS). On some machines, this wil <<
2857 whenever the CPU becomes idle. (On <<
2858 this option does nothing.) <<
2859 <<
2860 config APM_DISPLAY_BLANK <<
2861 bool "Enable console blanking using A <<
2862 help <<
2863 Enable console blanking using the A <<
2864 turn off the LCD backlight when the <<
2865 virtual console blanks the screen. <<
2866 the virtual console screen blanker, <<
2867 when using the X Window system. Thi <<
2868 do with your VESA-compliant power-s <<
2869 option doesn't work for all laptops <<
2870 backlight at all, or it might print <<
2871 especially if you are using gpm. <<
2872 <<
2873 config APM_ALLOW_INTS <<
2874 bool "Allow interrupts during APM BIO <<
2875 help <<
2876 Normally we disable external interr <<
2877 the APM BIOS as a measure to lessen <<
2878 BIOS implementation. The BIOS shou <<
2879 needs to. Unfortunately, some BIOS <<
2880 many of the newer IBM Thinkpads. I <<
2881 suspend, try setting this to Y. Ot <<
2882 2917
2883 endif # APM !! 2918 endchoice
2884 2919
2885 source "drivers/cpufreq/Kconfig" !! 2920 config SYS_SUPPORTS_24HZ
>> 2921 bool
2886 2922
2887 source "drivers/cpuidle/Kconfig" !! 2923 config SYS_SUPPORTS_48HZ
>> 2924 bool
2888 2925
2889 source "drivers/idle/Kconfig" !! 2926 config SYS_SUPPORTS_100HZ
>> 2927 bool
2890 2928
2891 endmenu !! 2929 config SYS_SUPPORTS_128HZ
>> 2930 bool
2892 2931
2893 menu "Bus options (PCI etc.)" !! 2932 config SYS_SUPPORTS_250HZ
>> 2933 bool
2894 2934
2895 choice !! 2935 config SYS_SUPPORTS_256HZ
2896 prompt "PCI access mode" !! 2936 bool
2897 depends on X86_32 && PCI <<
2898 default PCI_GOANY <<
2899 help <<
2900 On PCI systems, the BIOS can be use <<
2901 determine their configuration. Howe <<
2902 have BIOS bugs and may crash if thi <<
2903 PCI-based systems don't have any BI <<
2904 detect the PCI hardware directly wi <<
2905 <<
2906 With this option, you can specify h <<
2907 PCI devices. If you choose "BIOS", <<
2908 if you choose "Direct", the BIOS wo <<
2909 choose "MMConfig", then PCI Express <<
2910 If you choose "Any", the kernel wil <<
2911 direct access method and falls back <<
2912 work. If unsure, go with the defaul <<
2913 <<
2914 config PCI_GOBIOS <<
2915 bool "BIOS" <<
2916 <<
2917 config PCI_GOMMCONFIG <<
2918 bool "MMConfig" <<
2919 <<
2920 config PCI_GODIRECT <<
2921 bool "Direct" <<
2922 <<
2923 config PCI_GOOLPC <<
2924 bool "OLPC XO-1" <<
2925 depends on OLPC <<
2926 2937
2927 config PCI_GOANY !! 2938 config SYS_SUPPORTS_1000HZ
2928 bool "Any" !! 2939 bool
2929 2940
2930 endchoice !! 2941 config SYS_SUPPORTS_1024HZ
>> 2942 bool
2931 2943
2932 config PCI_BIOS !! 2944 config SYS_SUPPORTS_ARBIT_HZ
2933 def_bool y !! 2945 bool
2934 depends on X86_32 && PCI && (PCI_GOBI !! 2946 default y if !SYS_SUPPORTS_24HZ && \
>> 2947 !SYS_SUPPORTS_48HZ && \
>> 2948 !SYS_SUPPORTS_100HZ && \
>> 2949 !SYS_SUPPORTS_128HZ && \
>> 2950 !SYS_SUPPORTS_250HZ && \
>> 2951 !SYS_SUPPORTS_256HZ && \
>> 2952 !SYS_SUPPORTS_1000HZ && \
>> 2953 !SYS_SUPPORTS_1024HZ
2935 2954
2936 # x86-64 doesn't support PCI BIOS access from !! 2955 config HZ
2937 config PCI_DIRECT !! 2956 int
2938 def_bool y !! 2957 default 24 if HZ_24
2939 depends on PCI && (X86_64 || (PCI_GOD !! 2958 default 48 if HZ_48
>> 2959 default 100 if HZ_100
>> 2960 default 128 if HZ_128
>> 2961 default 250 if HZ_250
>> 2962 default 256 if HZ_256
>> 2963 default 1000 if HZ_1000
>> 2964 default 1024 if HZ_1024
>> 2965
>> 2966 config SCHED_HRTICK
>> 2967 def_bool HIGH_RES_TIMERS
>> 2968
>> 2969 config KEXEC
>> 2970 bool "Kexec system call"
>> 2971 select KEXEC_CORE
>> 2972 help
>> 2973 kexec is a system call that implements the ability to shutdown your
>> 2974 current kernel, and to start another kernel. It is like a reboot
>> 2975 but it is independent of the system firmware. And like a reboot
>> 2976 you can start any kernel with it, not just Linux.
>> 2977
>> 2978 The name comes from the similarity to the exec system call.
>> 2979
>> 2980 It is an ongoing process to be certain the hardware in a machine
>> 2981 is properly shutdown, so do not be surprised if this code does not
>> 2982 initially work for you. As of this writing the exact hardware
>> 2983 interface is strongly in flux, so no good recommendation can be
>> 2984 made.
>> 2985
>> 2986 config CRASH_DUMP
>> 2987 bool "Kernel crash dumps"
>> 2988 help
>> 2989 Generate crash dump after being started by kexec.
>> 2990 This should be normally only set in special crash dump kernels
>> 2991 which are loaded in the main kernel with kexec-tools into
>> 2992 a specially reserved region and then later executed after
>> 2993 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2994 to a memory address not used by the main kernel or firmware using
>> 2995 PHYSICAL_START.
2940 2996
2941 config PCI_MMCONFIG !! 2997 config PHYSICAL_START
2942 bool "Support mmconfig PCI config spa !! 2998 hex "Physical address where the kernel is loaded"
2943 default y !! 2999 default "0xffffffff84000000"
2944 depends on PCI && (ACPI || JAILHOUSE_ !! 3000 depends on CRASH_DUMP
2945 depends on X86_64 || (PCI_GOANY || PC !! 3001 help
>> 3002 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 3003 If you plan to use kernel for capturing the crash dump change
>> 3004 this value to start of the reserved region (the "X" value as
>> 3005 specified in the "crashkernel=YM@XM" command line boot parameter
>> 3006 passed to the panic-ed kernel).
>> 3007
>> 3008 config SECCOMP
>> 3009 bool "Enable seccomp to safely compute untrusted bytecode"
>> 3010 depends on PROC_FS
>> 3011 default y
>> 3012 help
>> 3013 This kernel feature is useful for number crunching applications
>> 3014 that may need to compute untrusted bytecode during their
>> 3015 execution. By using pipes or other transports made available to
>> 3016 the process as file descriptors supporting the read/write
>> 3017 syscalls, it's possible to isolate those applications in
>> 3018 their own address space using seccomp. Once seccomp is
>> 3019 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 3020 and the task is only allowed to execute a few safe syscalls
>> 3021 defined by each seccomp mode.
>> 3022
>> 3023 If unsure, say Y. Only embedded should say N here.
>> 3024
>> 3025 config MIPS_O32_FP64_SUPPORT
>> 3026 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 3027 depends on 32BIT || MIPS32_O32
>> 3028 help
>> 3029 When this is enabled, the kernel will support use of 64-bit floating
>> 3030 point registers with binaries using the O32 ABI along with the
>> 3031 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 3032 32-bit MIPS systems this support is at the cost of increasing the
>> 3033 size and complexity of the compiled FPU emulator. Thus if you are
>> 3034 running a MIPS32 system and know that none of your userland binaries
>> 3035 will require 64-bit floating point, you may wish to reduce the size
>> 3036 of your kernel & potentially improve FP emulation performance by
>> 3037 saying N here.
>> 3038
>> 3039 Although binutils currently supports use of this flag the details
>> 3040 concerning its effect upon the O32 ABI in userland are still being
>> 3041 worked on. In order to avoid userland becoming dependant upon current
>> 3042 behaviour before the details have been finalised, this option should
>> 3043 be considered experimental and only enabled by those working upon
>> 3044 said details.
2946 3045
2947 config PCI_OLPC !! 3046 If unsure, say N.
2948 def_bool y <<
2949 depends on PCI && OLPC && (PCI_GOOLPC <<
2950 3047
2951 config PCI_XEN !! 3048 config USE_OF
2952 def_bool y !! 3049 bool
2953 depends on PCI && XEN !! 3050 select OF
>> 3051 select OF_EARLY_FLATTREE
>> 3052 select IRQ_DOMAIN
2954 3053
2955 config MMCONF_FAM10H !! 3054 config UHI_BOOT
2956 def_bool y !! 3055 bool
2957 depends on X86_64 && PCI_MMCONFIG && <<
2958 3056
2959 config PCI_CNB20LE_QUIRK !! 3057 config BUILTIN_DTB
2960 bool "Read CNB20LE Host Bridge Window !! 3058 bool
2961 depends on PCI <<
2962 help <<
2963 Read the PCI windows out of the CNB <<
2964 PCI hotplug to work on systems with <<
2965 not have ACPI. <<
2966 3059
2967 There's no public spec for this chi !! 3060 choice
2968 is known to be incomplete. !! 3061 prompt "Kernel appended dtb support" if USE_OF
>> 3062 default MIPS_NO_APPENDED_DTB
2969 3063
2970 You should say N unless you know yo !! 3064 config MIPS_NO_APPENDED_DTB
>> 3065 bool "None"
>> 3066 help
>> 3067 Do not enable appended dtb support.
2971 3068
2972 config ISA_BUS !! 3069 config MIPS_ELF_APPENDED_DTB
2973 bool "ISA bus support on modern syste !! 3070 bool "vmlinux"
2974 help !! 3071 help
2975 Expose ISA bus device drivers and o !! 3072 With this option, the boot code will look for a device tree binary
2976 configuration. Enable this option i !! 3073 DTB) included in the vmlinux ELF section .appended_dtb. By default
2977 bus. ISA is an older system, displa !! 3074 it is empty and the DTB can be appended using binutils command
2978 architectures -- if your target mac !! 3075 objcopy:
2979 not have an ISA bus. !! 3076
>> 3077 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3078
>> 3079 This is meant as a backward compatiblity convenience for those
>> 3080 systems with a bootloader that can't be upgraded to accommodate
>> 3081 the documented boot protocol using a device tree.
2980 3082
2981 If unsure, say N. !! 3083 config MIPS_RAW_APPENDED_DTB
>> 3084 bool "vmlinux.bin or vmlinuz.bin"
>> 3085 help
>> 3086 With this option, the boot code will look for a device tree binary
>> 3087 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3088 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3089
>> 3090 This is meant as a backward compatibility convenience for those
>> 3091 systems with a bootloader that can't be upgraded to accommodate
>> 3092 the documented boot protocol using a device tree.
>> 3093
>> 3094 Beware that there is very little in terms of protection against
>> 3095 this option being confused by leftover garbage in memory that might
>> 3096 look like a DTB header after a reboot if no actual DTB is appended
>> 3097 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3098 if you don't intend to always append a DTB.
>> 3099 endchoice
2982 3100
2983 # x86_64 have no ISA slots, but can have ISA- !! 3101 choice
2984 config ISA_DMA_API !! 3102 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2985 bool "ISA-style DMA support" if (X86_ !! 3103 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 3104 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 3105 !CAVIUM_OCTEON_SOC
>> 3106 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 3107
>> 3108 config MIPS_CMDLINE_FROM_DTB
>> 3109 depends on USE_OF
>> 3110 bool "Dtb kernel arguments if available"
>> 3111
>> 3112 config MIPS_CMDLINE_DTB_EXTEND
>> 3113 depends on USE_OF
>> 3114 bool "Extend dtb kernel arguments with bootloader arguments"
>> 3115
>> 3116 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 3117 bool "Bootloader kernel arguments if available"
>> 3118
>> 3119 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3120 depends on CMDLINE_BOOL
>> 3121 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3122 endchoice
>> 3123
>> 3124 endmenu
>> 3125
>> 3126 config LOCKDEP_SUPPORT
>> 3127 bool
2986 default y 3128 default y
2987 help <<
2988 Enables ISA-style DMA support for d <<
2989 If unsure, say Y. <<
2990 3129
2991 if X86_32 !! 3130 config STACKTRACE_SUPPORT
>> 3131 bool
>> 3132 default y
2992 3133
2993 config ISA !! 3134 config PGTABLE_LEVELS
2994 bool "ISA support" !! 3135 int
2995 help !! 3136 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2996 Find out whether you have ISA slots !! 3137 default 3 if 64BIT && !PAGE_SIZE_64KB
2997 name of a bus system, i.e. the way !! 3138 default 2
2998 inside your box. Other bus systems <<
2999 (MCA) or VESA. ISA is an older sys <<
3000 newer boards don't support it. If <<
3001 <<
3002 config SCx200 <<
3003 tristate "NatSemi SCx200 support" <<
3004 help <<
3005 This provides basic support for Nat <<
3006 (now AMD's) Geode processors. The <<
3007 PCI-IDs of several on-chip devices, <<
3008 for other scx200_* drivers. <<
3009 <<
3010 If compiled as a module, the driver <<
3011 <<
3012 config SCx200HR_TIMER <<
3013 tristate "NatSemi SCx200 27MHz High-R <<
3014 depends on SCx200 <<
3015 default y <<
3016 help <<
3017 This driver provides a clocksource <<
3018 27MHz high-resolution timer. Its a <<
3019 NSC Geode SC-1100's buggy TSC, whic <<
3020 processor goes idle (as is done by <<
3021 other workaround is idle=poll boot <<
3022 <<
3023 config OLPC <<
3024 bool "One Laptop Per Child support" <<
3025 depends on !X86_PAE <<
3026 select GPIOLIB <<
3027 select OF <<
3028 select OF_PROMTREE <<
3029 select IRQ_DOMAIN <<
3030 select OLPC_EC <<
3031 help <<
3032 Add support for detecting the uniqu <<
3033 XO hardware. <<
3034 3139
3035 config OLPC_XO1_PM !! 3140 config MIPS_AUTO_PFN_OFFSET
3036 bool "OLPC XO-1 Power Management" !! 3141 bool
3037 depends on OLPC && MFD_CS5535=y && PM <<
3038 help <<
3039 Add support for poweroff and suspen <<
3040 3142
3041 config OLPC_XO1_RTC !! 3143 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
3042 bool "OLPC XO-1 Real Time Clock" <<
3043 depends on OLPC_XO1_PM && RTC_DRV_CMO <<
3044 help <<
3045 Add support for the XO-1 real time <<
3046 programmable wakeup source. <<
3047 3144
3048 config OLPC_XO1_SCI !! 3145 config PCI_DRIVERS_GENERIC
3049 bool "OLPC XO-1 SCI extras" !! 3146 select PCI_DOMAINS_GENERIC if PCI
3050 depends on OLPC && OLPC_XO1_PM && GPI !! 3147 bool
3051 depends on INPUT=y <<
3052 select POWER_SUPPLY <<
3053 help <<
3054 Add support for SCI-based features <<
3055 - EC-driven system wakeups <<
3056 - Power button <<
3057 - Ebook switch <<
3058 - Lid switch <<
3059 - AC adapter status updates <<
3060 - Battery status updates <<
3061 3148
3062 config OLPC_XO15_SCI !! 3149 config PCI_DRIVERS_LEGACY
3063 bool "OLPC XO-1.5 SCI extras" !! 3150 def_bool !PCI_DRIVERS_GENERIC
3064 depends on OLPC && ACPI !! 3151 select NO_GENERIC_PCI_IOPORT_MAP
3065 select POWER_SUPPLY !! 3152 select PCI_DOMAINS if PCI
3066 help <<
3067 Add support for SCI-based features <<
3068 - EC-driven system wakeups <<
3069 - AC adapter status updates <<
3070 - Battery status updates <<
3071 3153
3072 config GEODE_COMMON !! 3154 #
>> 3155 # ISA support is now enabled via select. Too many systems still have the one
>> 3156 # or other ISA chip on the board that users don't know about so don't expect
>> 3157 # users to choose the right thing ...
>> 3158 #
>> 3159 config ISA
3073 bool 3160 bool
3074 3161
3075 config ALIX !! 3162 config TC
3076 bool "PCEngines ALIX System Support ( !! 3163 bool "TURBOchannel support"
3077 select GPIOLIB !! 3164 depends on MACH_DECSTATION
3078 select GEODE_COMMON !! 3165 help
3079 help !! 3166 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3080 This option enables system support !! 3167 processors. TURBOchannel programming specifications are available
3081 At present this just sets up LEDs f !! 3168 at:
3082 ALIX2/3/6 boards. However, other s !! 3169 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3083 get added here. !! 3170 and:
>> 3171 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3172 Linux driver support status is documented at:
>> 3173 <http://www.linux-mips.org/wiki/DECstation>
>> 3174
>> 3175 config MMU
>> 3176 bool
>> 3177 default y
3084 3178
3085 Note: You must still enable the dri !! 3179 config ARCH_MMAP_RND_BITS_MIN
3086 (GPIO_CS5535 & LEDS_GPIO) to actual !! 3180 default 12 if 64BIT
>> 3181 default 8
3087 3182
3088 Note: You have to set alix.force=1 !! 3183 config ARCH_MMAP_RND_BITS_MAX
>> 3184 default 18 if 64BIT
>> 3185 default 15
3089 3186
3090 config NET5501 !! 3187 config ARCH_MMAP_RND_COMPAT_BITS_MIN
3091 bool "Soekris Engineering net5501 Sys !! 3188 default 8
3092 select GPIOLIB <<
3093 select GEODE_COMMON <<
3094 help <<
3095 This option enables system support <<
3096 3189
3097 config GEOS !! 3190 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3098 bool "Traverse Technologies GEOS Syst !! 3191 default 15
3099 select GPIOLIB <<
3100 select GEODE_COMMON <<
3101 depends on DMI <<
3102 help <<
3103 This option enables system support <<
3104 3192
3105 config TS5500 !! 3193 config I8253
3106 bool "Technologic Systems TS-5500 pla !! 3194 bool
3107 depends on MELAN !! 3195 select CLKSRC_I8253
3108 select CHECK_SIGNATURE !! 3196 select CLKEVT_I8253
3109 select NEW_LEDS !! 3197 select MIPS_EXTERNAL_TIMER
3110 select LEDS_CLASS <<
3111 help <<
3112 This option enables system support <<
3113 3198
3114 endif # X86_32 !! 3199 config ZONE_DMA
>> 3200 bool
3115 3201
3116 config AMD_NB !! 3202 config ZONE_DMA32
3117 def_bool y !! 3203 bool
3118 depends on CPU_SUP_AMD && PCI <<
3119 3204
3120 endmenu 3205 endmenu
3121 3206
3122 menu "Binary Emulations" !! 3207 config TRAD_SIGNALS
>> 3208 bool
>> 3209
>> 3210 config MIPS32_COMPAT
>> 3211 bool
>> 3212
>> 3213 config COMPAT
>> 3214 bool
>> 3215
>> 3216 config SYSVIPC_COMPAT
>> 3217 bool
3123 3218
3124 config IA32_EMULATION !! 3219 config MIPS32_O32
3125 bool "IA32 Emulation" !! 3220 bool "Kernel support for o32 binaries"
3126 depends on X86_64 !! 3221 depends on 64BIT
3127 select ARCH_WANT_OLD_COMPAT_IPC 3222 select ARCH_WANT_OLD_COMPAT_IPC
3128 select BINFMT_ELF !! 3223 select COMPAT
3129 select COMPAT_OLD_SIGACTION !! 3224 select MIPS32_COMPAT
3130 help !! 3225 select SYSVIPC_COMPAT if SYSVIPC
3131 Include code to run legacy 32-bit p !! 3226 help
3132 64-bit kernel. You should likely tu !! 3227 Select this option if you want to run o32 binaries. These are pure
3133 100% sure that you don't have any 3 !! 3228 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3229 existing binaries are in this format.
3134 3230
3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3231 If unsure, say Y.
3136 bool "IA32 emulation disabled by defa <<
3137 default n <<
3138 depends on IA32_EMULATION <<
3139 help <<
3140 Make IA32 emulation disabled by def <<
3141 processes and access to 32-bit sysc <<
3142 default value. <<
3143 <<
3144 config X86_X32_ABI <<
3145 bool "x32 ABI for 64-bit mode" <<
3146 depends on X86_64 <<
3147 # llvm-objcopy does not convert x86_6 <<
3148 # compressed debug sections to x86_x3 <<
3149 # https://github.com/ClangBuiltLinux/ <<
3150 # https://github.com/ClangBuiltLinux/ <<
3151 depends on $(success,$(OBJCOPY) --ver <<
3152 help <<
3153 Include code to run binaries for th <<
3154 for 64-bit processors. An x32 proc <<
3155 full 64-bit register file and wide <<
3156 pointers at 32 bits for smaller mem <<
3157 3232
3158 config COMPAT_32 !! 3233 config MIPS32_N32
3159 def_bool y !! 3234 bool "Kernel support for n32 binaries"
3160 depends on IA32_EMULATION || X86_32 !! 3235 depends on 64BIT
3161 select HAVE_UID16 !! 3236 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3162 select OLD_SIGSUSPEND3 !! 3237 select COMPAT
>> 3238 select MIPS32_COMPAT
>> 3239 select SYSVIPC_COMPAT if SYSVIPC
>> 3240 help
>> 3241 Select this option if you want to run n32 binaries. These are
>> 3242 64-bit binaries using 32-bit quantities for addressing and certain
>> 3243 data that would normally be 64-bit. They are used in special
>> 3244 cases.
3163 3245
3164 config COMPAT !! 3246 If unsure, say N.
>> 3247
>> 3248 config BINFMT_ELF32
>> 3249 bool
>> 3250 default y if MIPS32_O32 || MIPS32_N32
>> 3251 select ELFCORE
>> 3252
>> 3253 menu "Power management options"
>> 3254
>> 3255 config ARCH_HIBERNATION_POSSIBLE
3165 def_bool y 3256 def_bool y
3166 depends on IA32_EMULATION || X86_X32_ !! 3257 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3167 3258
3168 config COMPAT_FOR_U64_ALIGNMENT !! 3259 config ARCH_SUSPEND_POSSIBLE
3169 def_bool y 3260 def_bool y
3170 depends on COMPAT !! 3261 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3262
>> 3263 source "kernel/power/Kconfig"
3171 3264
3172 endmenu 3265 endmenu
3173 3266
3174 config HAVE_ATOMIC_IOMAP !! 3267 config MIPS_EXTERNAL_TIMER
3175 def_bool y !! 3268 bool
3176 depends on X86_32 !! 3269
>> 3270 menu "CPU Power Management"
>> 3271
>> 3272 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3273 source "drivers/cpufreq/Kconfig"
>> 3274 endif
>> 3275
>> 3276 source "drivers/cpuidle/Kconfig"
>> 3277
>> 3278 endmenu
>> 3279
>> 3280 source "drivers/firmware/Kconfig"
3177 3281
3178 source "arch/x86/kvm/Kconfig" !! 3282 source "arch/mips/kvm/Kconfig"
3179 3283
3180 source "arch/x86/Kconfig.assembler" !! 3284 source "arch/mips/vdso/Kconfig"
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