1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 # Select 32 or 64 bit !! 2 config MIPS
3 config 64BIT !! 3 bool
4 bool "64-bit kernel" if "$(ARCH)" = "x !! 4 default y
5 default "$(ARCH)" != "i386" !! 5 select ARCH_32BIT_OFF_T if !64BIT
6 help !! 6 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
7 Say yes to build a 64-bit kernel - f <<
8 Say no to build a 32-bit kernel - fo <<
9 <<
10 config X86_32 <<
11 def_bool y <<
12 depends on !64BIT <<
13 # Options that are inherently 32-bit k <<
14 select ARCH_WANT_IPC_PARSE_VERSION <<
15 select CLKSRC_I8253 <<
16 select CLONE_BACKWARDS <<
17 select GENERIC_VDSO_32 <<
18 select HAVE_DEBUG_STACKOVERFLOW <<
19 select KMAP_LOCAL <<
20 select MODULES_USE_ELF_REL <<
21 select OLD_SIGACTION <<
22 select ARCH_SPLIT_ARG64 <<
23 <<
24 config X86_64 <<
25 def_bool y <<
26 depends on 64BIT <<
27 # Options that are inherently 64-bit k <<
28 select ARCH_HAS_GIGANTIC_PAGE <<
29 select ARCH_SUPPORTS_INT128 if CC_HAS_ <<
30 select ARCH_SUPPORTS_PER_VMA_LOCK <<
31 select ARCH_SUPPORTS_HUGE_PFNMAP if TR <<
32 select HAVE_ARCH_SOFT_DIRTY <<
33 select MODULES_USE_ELF_RELA <<
34 select NEED_DMA_MAP_STATE <<
35 select SWIOTLB <<
36 select ARCH_HAS_ELFCORE_COMPAT <<
37 select ZONE_DMA32 <<
38 select EXECMEM if DYNAMIC_FTRACE <<
39 <<
40 config FORCE_DYNAMIC_FTRACE <<
41 def_bool y <<
42 depends on X86_32 <<
43 depends on FUNCTION_TRACER <<
44 select DYNAMIC_FTRACE <<
45 help <<
46 We keep the static function tracing <<
47 in order to test the non static func <<
48 generic code, as other architectures <<
49 only need to keep it around for x86_ <<
50 for x86_32. For x86_32, force DYNAMI <<
51 # <<
52 # Arch settings <<
53 # <<
54 # ( Note that options that are marked 'if X86_ <<
55 # ported to 32-bit as well. ) <<
56 # <<
57 config X86 <<
58 def_bool y <<
59 # <<
60 # Note: keep this list sorted alphabet <<
61 # <<
62 select ACPI_LEGACY_TABLES_LOOKUP <<
63 select ACPI_SYSTEM_POWER_STATES_SUPPOR <<
64 select ACPI_HOTPLUG_CPU <<
65 select ARCH_32BIT_OFF_T <<
66 select ARCH_CLOCKSOURCE_INIT <<
67 select ARCH_CONFIGURES_CPU_MITIGATIONS <<
68 select ARCH_CORRECT_STACKTRACE_ON_KRET <<
69 select ARCH_ENABLE_HUGEPAGE_MIGRATION <<
70 select ARCH_ENABLE_MEMORY_HOTPLUG if X <<
71 select ARCH_ENABLE_MEMORY_HOTREMOVE if <<
72 select ARCH_ENABLE_SPLIT_PMD_PTLOCK if <<
73 select ARCH_ENABLE_THP_MIGRATION if X8 <<
74 select ARCH_HAS_ACPI_TABLE_UPGRADE <<
75 select ARCH_HAS_CACHE_LINE_SIZE <<
76 select ARCH_HAS_CPU_CACHE_INVALIDATE_M <<
77 select ARCH_HAS_CPU_FINALIZE_INIT 7 select ARCH_HAS_CPU_FINALIZE_INIT
78 select ARCH_HAS_CPU_PASID !! 8 select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
79 select ARCH_HAS_CURRENT_STACK_POINTER !! 9 select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
80 select ARCH_HAS_DEBUG_VIRTUAL <<
81 select ARCH_HAS_DEBUG_VM_PGTABLE <<
82 select ARCH_HAS_DEVMEM_IS_ALLOWED <<
83 select ARCH_HAS_DMA_OPS <<
84 select ARCH_HAS_EARLY_DEBUG <<
85 select ARCH_HAS_ELF_RANDOMIZE <<
86 select ARCH_HAS_FAST_MULTIPLIER <<
87 select ARCH_HAS_FORTIFY_SOURCE 10 select ARCH_HAS_FORTIFY_SOURCE
>> 11 select ARCH_HAS_KCOV
>> 12 select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
>> 13 select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
>> 14 select ARCH_HAS_STRNCPY_FROM_USER
>> 15 select ARCH_HAS_STRNLEN_USER
>> 16 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
>> 17 select ARCH_HAS_UBSAN_SANITIZE_ALL
88 select ARCH_HAS_GCOV_PROFILE_ALL 18 select ARCH_HAS_GCOV_PROFILE_ALL
89 select ARCH_HAS_KCOV !! 19 select ARCH_KEEP_MEMBLOCK
90 select ARCH_HAS_KERNEL_FPU_SUPPORT <<
91 select ARCH_HAS_MEM_ENCRYPT <<
92 select ARCH_HAS_MEMBARRIER_SYNC_CORE <<
93 select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS <<
94 select ARCH_HAS_NON_OVERLAPPING_ADDRES <<
95 select ARCH_HAS_PMEM_API <<
96 select ARCH_HAS_PTE_DEVMAP <<
97 select ARCH_HAS_PTE_SPECIAL <<
98 select ARCH_HAS_HW_PTE_YOUNG <<
99 select ARCH_HAS_NONLEAF_PMD_YOUNG <<
100 select ARCH_HAS_UACCESS_FLUSHCACHE <<
101 select ARCH_HAS_COPY_MC <<
102 select ARCH_HAS_SET_MEMORY <<
103 select ARCH_HAS_SET_DIRECT_MAP <<
104 select ARCH_HAS_STRICT_KERNEL_RWX <<
105 select ARCH_HAS_STRICT_MODULE_RWX <<
106 select ARCH_HAS_SYNC_CORE_BEFORE_USERM <<
107 select ARCH_HAS_SYSCALL_WRAPPER <<
108 select ARCH_HAS_UBSAN <<
109 select ARCH_HAS_DEBUG_WX <<
110 select ARCH_HAS_ZONE_DMA_SET if EXPERT <<
111 select ARCH_HAVE_NMI_SAFE_CMPXCHG <<
112 select ARCH_HAVE_EXTRA_ELF_NOTES <<
113 select ARCH_MHP_MEMMAP_ON_MEMORY_ENABL <<
114 select ARCH_MIGHT_HAVE_ACPI_PDC <<
115 select ARCH_MIGHT_HAVE_PC_PARPORT <<
116 select ARCH_MIGHT_HAVE_PC_SERIO <<
117 select ARCH_STACKWALK <<
118 select ARCH_SUPPORTS_ACPI <<
119 select ARCH_SUPPORTS_ATOMIC_RMW <<
120 select ARCH_SUPPORTS_DEBUG_PAGEALLOC <<
121 select ARCH_SUPPORTS_PAGE_TABLE_CHECK <<
122 select ARCH_SUPPORTS_NUMA_BALANCING <<
123 select ARCH_SUPPORTS_KMAP_LOCAL_FORCE_ <<
124 select ARCH_SUPPORTS_CFI_CLANG <<
125 select ARCH_USES_CFI_TRAPS <<
126 select ARCH_SUPPORTS_LTO_CLANG <<
127 select ARCH_SUPPORTS_LTO_CLANG_THIN <<
128 select ARCH_SUPPORTS_RT <<
129 select ARCH_USE_BUILTIN_BSWAP 20 select ARCH_USE_BUILTIN_BSWAP
130 select ARCH_USE_CMPXCHG_LOCKREF !! 21 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
131 select ARCH_USE_MEMTEST 22 select ARCH_USE_MEMTEST
132 select ARCH_USE_QUEUED_RWLOCKS 23 select ARCH_USE_QUEUED_RWLOCKS
133 select ARCH_USE_QUEUED_SPINLOCKS 24 select ARCH_USE_QUEUED_SPINLOCKS
134 select ARCH_USE_SYM_ANNOTATIONS !! 25 select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
135 select ARCH_WANT_BATCHED_UNMAP_TLB_FLU !! 26 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
136 select ARCH_WANT_DEFAULT_BPF_JIT !! 27 select ARCH_WANT_IPC_PARSE_VERSION
137 select ARCH_WANTS_DYNAMIC_TASK_STRUCT <<
138 select ARCH_WANTS_NO_INSTR <<
139 select ARCH_WANT_GENERAL_HUGETLB <<
140 select ARCH_WANT_HUGE_PMD_SHARE <<
141 select ARCH_WANT_LD_ORPHAN_WARN 28 select ARCH_WANT_LD_ORPHAN_WARN
142 select ARCH_WANT_OPTIMIZE_DAX_VMEMMAP <<
143 select ARCH_WANT_OPTIMIZE_HUGETLB_VMEM <<
144 select ARCH_WANTS_THP_SWAP <<
145 select ARCH_HAS_PARANOID_L1D_FLUSH <<
146 select BUILDTIME_TABLE_SORT 29 select BUILDTIME_TABLE_SORT
147 select CLKEVT_I8253 !! 30 select CLONE_BACKWARDS
148 select CLOCKSOURCE_VALIDATE_LAST_CYCLE !! 31 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
149 select CLOCKSOURCE_WATCHDOG !! 32 select CPU_PM if CPU_IDLE
150 # Word-size accesses may read uninitia !! 33 select GENERIC_ATOMIC64 if !64BIT
151 # in strings and cause false KMSAN rep <<
152 select DCACHE_WORD_ACCESS <<
153 select DYNAMIC_SIGFRAME <<
154 select EDAC_ATOMIC_SCRUB <<
155 select EDAC_SUPPORT <<
156 select GENERIC_CLOCKEVENTS_BROADCAST <<
157 select GENERIC_CLOCKEVENTS_BROADCAST_I <<
158 select GENERIC_CLOCKEVENTS_MIN_ADJUST <<
159 select GENERIC_CMOS_UPDATE 34 select GENERIC_CMOS_UPDATE
160 select GENERIC_CPU_AUTOPROBE 35 select GENERIC_CPU_AUTOPROBE
161 select GENERIC_CPU_DEVICES !! 36 select GENERIC_GETTIMEOFDAY
162 select GENERIC_CPU_VULNERABILITIES <<
163 select GENERIC_EARLY_IOREMAP <<
164 select GENERIC_ENTRY <<
165 select GENERIC_IOMAP 37 select GENERIC_IOMAP
166 select GENERIC_IRQ_EFFECTIVE_AFF_MASK <<
167 select GENERIC_IRQ_MATRIX_ALLOCATOR <<
168 select GENERIC_IRQ_MIGRATION <<
169 select GENERIC_IRQ_PROBE 38 select GENERIC_IRQ_PROBE
170 select GENERIC_IRQ_RESERVATION_MODE <<
171 select GENERIC_IRQ_SHOW 39 select GENERIC_IRQ_SHOW
172 select GENERIC_PENDING_IRQ !! 40 select GENERIC_ISA_DMA if EISA
173 select GENERIC_PTDUMP !! 41 select GENERIC_LIB_ASHLDI3
>> 42 select GENERIC_LIB_ASHRDI3
>> 43 select GENERIC_LIB_CMPDI2
>> 44 select GENERIC_LIB_LSHRDI3
>> 45 select GENERIC_LIB_UCMPDI2
>> 46 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
174 select GENERIC_SMP_IDLE_THREAD 47 select GENERIC_SMP_IDLE_THREAD
>> 48 select GENERIC_IDLE_POLL_SETUP
175 select GENERIC_TIME_VSYSCALL 49 select GENERIC_TIME_VSYSCALL
176 select GENERIC_GETTIMEOFDAY !! 50 select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
177 select GENERIC_VDSO_TIME_NS !! 51 select HAS_IOPORT if !NO_IOPORT_MAP || ISA
178 select GENERIC_VDSO_OVERFLOW_PROTECT !! 52 select HAVE_ARCH_COMPILER_H
179 select GUP_GET_PXX_LOW_HIGH <<
180 select HARDIRQS_SW_RESEND <<
181 select HARDLOCKUP_CHECK_TIMESTAMP <<
182 select HAS_IOPORT <<
183 select HAVE_ACPI_APEI <<
184 select HAVE_ACPI_APEI_NMI <<
185 select HAVE_ALIGNED_STRUCT_PAGE <<
186 select HAVE_ARCH_AUDITSYSCALL <<
187 select HAVE_ARCH_HUGE_VMAP <<
188 select HAVE_ARCH_HUGE_VMALLOC <<
189 select HAVE_ARCH_JUMP_LABEL 53 select HAVE_ARCH_JUMP_LABEL
190 select HAVE_ARCH_JUMP_LABEL_RELATIVE !! 54 select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
191 select HAVE_ARCH_KASAN !! 55 select HAVE_ARCH_MMAP_RND_BITS if MMU
192 select HAVE_ARCH_KASAN_VMALLOC !! 56 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
193 select HAVE_ARCH_KFENCE <<
194 select HAVE_ARCH_KMSAN <<
195 select HAVE_ARCH_KGDB <<
196 select HAVE_ARCH_MMAP_RND_BITS <<
197 select HAVE_ARCH_MMAP_RND_COMPAT_BITS <<
198 select HAVE_ARCH_COMPAT_MMAP_BASES <<
199 select HAVE_ARCH_PREL32_RELOCATIONS <<
200 select HAVE_ARCH_SECCOMP_FILTER 57 select HAVE_ARCH_SECCOMP_FILTER
201 select HAVE_ARCH_THREAD_STRUCT_WHITELI <<
202 select HAVE_ARCH_STACKLEAK <<
203 select HAVE_ARCH_TRACEHOOK 58 select HAVE_ARCH_TRACEHOOK
204 select HAVE_ARCH_TRANSPARENT_HUGEPAGE !! 59 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
205 select HAVE_ARCH_TRANSPARENT_HUGEPAGE_ <<
206 select HAVE_ARCH_USERFAULTFD_WP <<
207 select HAVE_ARCH_USERFAULTFD_MINOR <<
208 select HAVE_ARCH_VMAP_STACK <<
209 select HAVE_ARCH_RANDOMIZE_KSTACK_OFFS <<
210 select HAVE_ARCH_WITHIN_STACK_FRAMES <<
211 select HAVE_ASM_MODVERSIONS 60 select HAVE_ASM_MODVERSIONS
212 select HAVE_CMPXCHG_DOUBLE !! 61 select HAVE_CONTEXT_TRACKING_USER
213 select HAVE_CMPXCHG_LOCAL !! 62 select HAVE_TIF_NOHZ
214 select HAVE_CONTEXT_TRACKING_USER <<
215 select HAVE_CONTEXT_TRACKING_USER_OFFS <<
216 select HAVE_C_RECORDMCOUNT 63 select HAVE_C_RECORDMCOUNT
217 select HAVE_OBJTOOL_MCOUNT <<
218 select HAVE_OBJTOOL_NOP_MCOUNT <<
219 select HAVE_BUILDTIME_MCOUNT_SORT <<
220 select HAVE_DEBUG_KMEMLEAK 64 select HAVE_DEBUG_KMEMLEAK
>> 65 select HAVE_DEBUG_STACKOVERFLOW
221 select HAVE_DMA_CONTIGUOUS 66 select HAVE_DMA_CONTIGUOUS
222 select HAVE_DYNAMIC_FTRACE 67 select HAVE_DYNAMIC_FTRACE
223 select HAVE_DYNAMIC_FTRACE_WITH_REGS !! 68 select HAVE_EBPF_JIT if !CPU_MICROMIPS
224 select HAVE_DYNAMIC_FTRACE_WITH_ARGS <<
225 select HAVE_DYNAMIC_FTRACE_WITH_DIRECT <<
226 select HAVE_SAMPLE_FTRACE_DIRECT <<
227 select HAVE_SAMPLE_FTRACE_DIRECT_MULTI <<
228 select HAVE_EBPF_JIT <<
229 select HAVE_EFFICIENT_UNALIGNED_ACCESS <<
230 select HAVE_EISA <<
231 select HAVE_EXIT_THREAD 69 select HAVE_EXIT_THREAD
232 select HAVE_GUP_FAST !! 70 select HAVE_FAST_GUP
233 select HAVE_FENTRY <<
234 select HAVE_FTRACE_MCOUNT_RECORD 71 select HAVE_FTRACE_MCOUNT_RECORD
235 select HAVE_FUNCTION_GRAPH_RETVAL !! 72 select HAVE_FUNCTION_GRAPH_TRACER
236 select HAVE_FUNCTION_GRAPH_TRACER <<
237 select HAVE_FUNCTION_TRACER 73 select HAVE_FUNCTION_TRACER
238 select HAVE_GCC_PLUGINS 74 select HAVE_GCC_PLUGINS
239 select HAVE_HW_BREAKPOINT !! 75 select HAVE_GENERIC_VDSO
240 select HAVE_IOREMAP_PROT 76 select HAVE_IOREMAP_PROT
241 select HAVE_IRQ_EXIT_ON_IRQ_STACK !! 77 select HAVE_IRQ_EXIT_ON_IRQ_STACK
242 select HAVE_IRQ_TIME_ACCOUNTING 78 select HAVE_IRQ_TIME_ACCOUNTING
243 select HAVE_JUMP_LABEL_HACK <<
244 select HAVE_KERNEL_BZIP2 <<
245 select HAVE_KERNEL_GZIP <<
246 select HAVE_KERNEL_LZ4 <<
247 select HAVE_KERNEL_LZMA <<
248 select HAVE_KERNEL_LZO <<
249 select HAVE_KERNEL_XZ <<
250 select HAVE_KERNEL_ZSTD <<
251 select HAVE_KPROBES 79 select HAVE_KPROBES
252 select HAVE_KPROBES_ON_FTRACE <<
253 select HAVE_FUNCTION_ERROR_INJECTION <<
254 select HAVE_KRETPROBES 80 select HAVE_KRETPROBES
255 select HAVE_RETHOOK !! 81 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
256 select HAVE_LIVEPATCH <<
257 select HAVE_MIXED_BREAKPOINTS_REGS <<
258 select HAVE_MOD_ARCH_SPECIFIC 82 select HAVE_MOD_ARCH_SPECIFIC
259 select HAVE_MOVE_PMD <<
260 select HAVE_MOVE_PUD <<
261 select HAVE_NOINSTR_HACK <<
262 select HAVE_NMI 83 select HAVE_NMI
263 select HAVE_NOINSTR_VALIDATION <<
264 select HAVE_OBJTOOL <<
265 select HAVE_OPTPROBES <<
266 select HAVE_PAGE_SIZE_4KB <<
267 select HAVE_PCSPKR_PLATFORM <<
268 select HAVE_PERF_EVENTS 84 select HAVE_PERF_EVENTS
269 select HAVE_PERF_EVENTS_NMI <<
270 select HAVE_HARDLOCKUP_DETECTOR_PERF <<
271 select HAVE_PCI <<
272 select HAVE_PERF_REGS 85 select HAVE_PERF_REGS
273 select HAVE_PERF_USER_STACK_DUMP 86 select HAVE_PERF_USER_STACK_DUMP
274 select MMU_GATHER_RCU_TABLE_FREE <<
275 select MMU_GATHER_MERGE_VMAS <<
276 select HAVE_POSIX_CPU_TIMERS_TASK_WORK <<
277 select HAVE_REGS_AND_STACK_ACCESS_API 87 select HAVE_REGS_AND_STACK_ACCESS_API
278 select HAVE_RELIABLE_STACKTRACE <<
279 select HAVE_FUNCTION_ARG_ACCESS_API <<
280 select HAVE_SETUP_PER_CPU_AREA <<
281 select HAVE_SOFTIRQ_ON_OWN_STACK <<
282 select HAVE_STACKPROTECTOR <<
283 select HAVE_STACK_VALIDATION <<
284 select HAVE_STATIC_CALL <<
285 select HAVE_STATIC_CALL_INLINE <<
286 select HAVE_PREEMPT_DYNAMIC_CALL <<
287 select HAVE_RSEQ 88 select HAVE_RSEQ
288 select HAVE_RUST !! 89 select HAVE_SPARSE_SYSCALL_NR
>> 90 select HAVE_STACKPROTECTOR
289 select HAVE_SYSCALL_TRACEPOINTS 91 select HAVE_SYSCALL_TRACEPOINTS
290 select HAVE_UACCESS_VALIDATION !! 92 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
291 select HAVE_UNSTABLE_SCHED_CLOCK <<
292 select HAVE_USER_RETURN_NOTIFIER <<
293 select HAVE_GENERIC_VDSO <<
294 select VDSO_GETRANDOM <<
295 select HOTPLUG_PARALLEL <<
296 select HOTPLUG_SMT <<
297 select HOTPLUG_SPLIT_STARTUP <<
298 select IRQ_FORCED_THREADING 93 select IRQ_FORCED_THREADING
>> 94 select ISA if EISA
299 select LOCK_MM_AND_FIND_VMA 95 select LOCK_MM_AND_FIND_VMA
300 select NEED_PER_CPU_EMBED_FIRST_CHUNK !! 96 select MODULES_USE_ELF_REL if MODULES
301 select NEED_PER_CPU_PAGE_FIRST_CHUNK !! 97 select MODULES_USE_ELF_RELA if MODULES && 64BIT
302 select NEED_SG_DMA_LENGTH !! 98 select PERF_USE_VMALLOC
303 select NUMA_MEMBLKS !! 99 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
304 select PCI_DOMAINS <<
305 select PCI_LOCKLESS_CONFIG <<
306 select PERF_EVENTS <<
307 select RTC_LIB 100 select RTC_LIB
308 select RTC_MC146818_LIB <<
309 select SPARSE_IRQ <<
310 select SYSCTL_EXCEPTION_TRACE 101 select SYSCTL_EXCEPTION_TRACE
311 select THREAD_INFO_IN_TASK <<
312 select TRACE_IRQFLAGS_SUPPORT 102 select TRACE_IRQFLAGS_SUPPORT
313 select TRACE_IRQFLAGS_NMI_SUPPORT !! 103 select ARCH_HAS_ELFCORE_COMPAT
314 select USER_STACKTRACE_SUPPORT !! 104 select HAVE_ARCH_KCSAN if 64BIT
315 select HAVE_ARCH_KCSAN <<
316 select PROC_PID_ARCH_STATUS <<
317 select HAVE_ARCH_NODE_DEV_GROUP <<
318 select FUNCTION_ALIGNMENT_16B <<
319 select FUNCTION_ALIGNMENT_4B <<
320 imply IMA_SECURE_AND_OR_TRUSTED_BOOT <<
321 select HAVE_DYNAMIC_FTRACE_NO_PATCHABL <<
322 105
323 config INSTRUCTION_DECODER !! 106 config MIPS_FIXUP_BIGPHYS_ADDR
324 def_bool y !! 107 bool
325 depends on KPROBES || PERF_EVENTS || U <<
326 108
327 config OUTPUT_FORMAT !! 109 config MIPS_GENERIC
328 string !! 110 bool
329 default "elf32-i386" if X86_32 <<
330 default "elf64-x86-64" if X86_64 <<
331 111
332 config LOCKDEP_SUPPORT !! 112 config MACH_INGENIC
333 def_bool y !! 113 bool
>> 114 select SYS_SUPPORTS_32BIT_KERNEL
>> 115 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 116 select SYS_SUPPORTS_ZBOOT
>> 117 select DMA_NONCOHERENT
>> 118 select IRQ_MIPS_CPU
>> 119 select PINCTRL
>> 120 select GPIOLIB
>> 121 select COMMON_CLK
>> 122 select GENERIC_IRQ_CHIP
>> 123 select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
>> 124 select USE_OF
>> 125 select CPU_SUPPORTS_CPUFREQ
>> 126 select MIPS_EXTERNAL_TIMER
334 127
335 config STACKTRACE_SUPPORT !! 128 menu "Machine selection"
336 def_bool y <<
337 129
338 config MMU !! 130 choice
339 def_bool y !! 131 prompt "System type"
>> 132 default MIPS_GENERIC_KERNEL
340 133
341 config ARCH_MMAP_RND_BITS_MIN !! 134 config MIPS_GENERIC_KERNEL
342 default 28 if 64BIT !! 135 bool "Generic board-agnostic MIPS kernel"
343 default 8 !! 136 select MIPS_GENERIC
>> 137 select BOOT_RAW
>> 138 select BUILTIN_DTB
>> 139 select CEVT_R4K
>> 140 select CLKSRC_MIPS_GIC
>> 141 select COMMON_CLK
>> 142 select CPU_MIPSR2_IRQ_EI
>> 143 select CPU_MIPSR2_IRQ_VI
>> 144 select CSRC_R4K
>> 145 select DMA_NONCOHERENT
>> 146 select HAVE_PCI
>> 147 select IRQ_MIPS_CPU
>> 148 select MIPS_AUTO_PFN_OFFSET
>> 149 select MIPS_CPU_SCACHE
>> 150 select MIPS_GIC
>> 151 select MIPS_L1_CACHE_SHIFT_7
>> 152 select NO_EXCEPT_FILL
>> 153 select PCI_DRIVERS_GENERIC
>> 154 select SMP_UP if SMP
>> 155 select SWAP_IO_SPACE
>> 156 select SYS_HAS_CPU_MIPS32_R1
>> 157 select SYS_HAS_CPU_MIPS32_R2
>> 158 select SYS_HAS_CPU_MIPS32_R5
>> 159 select SYS_HAS_CPU_MIPS32_R6
>> 160 select SYS_HAS_CPU_MIPS64_R1
>> 161 select SYS_HAS_CPU_MIPS64_R2
>> 162 select SYS_HAS_CPU_MIPS64_R5
>> 163 select SYS_HAS_CPU_MIPS64_R6
>> 164 select SYS_SUPPORTS_32BIT_KERNEL
>> 165 select SYS_SUPPORTS_64BIT_KERNEL
>> 166 select SYS_SUPPORTS_BIG_ENDIAN
>> 167 select SYS_SUPPORTS_HIGHMEM
>> 168 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 169 select SYS_SUPPORTS_MICROMIPS
>> 170 select SYS_SUPPORTS_MIPS16
>> 171 select SYS_SUPPORTS_MIPS_CPS
>> 172 select SYS_SUPPORTS_MULTITHREADING
>> 173 select SYS_SUPPORTS_RELOCATABLE
>> 174 select SYS_SUPPORTS_SMARTMIPS
>> 175 select SYS_SUPPORTS_ZBOOT
>> 176 select UHI_BOOT
>> 177 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 178 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 179 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 180 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 181 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 182 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 183 select USE_OF
>> 184 help
>> 185 Select this to build a kernel which aims to support multiple boards,
>> 186 generally using a flattened device tree passed from the bootloader
>> 187 using the boot protocol defined in the UHI (Unified Hosting
>> 188 Interface) specification.
344 189
345 config ARCH_MMAP_RND_BITS_MAX !! 190 config MIPS_ALCHEMY
346 default 32 if 64BIT !! 191 bool "Alchemy processor based machines"
347 default 16 !! 192 select PHYS_ADDR_T_64BIT
>> 193 select CEVT_R4K
>> 194 select CSRC_R4K
>> 195 select IRQ_MIPS_CPU
>> 196 select DMA_NONCOHERENT # Au1000,1500,1100 aren't, rest is
>> 197 select MIPS_FIXUP_BIGPHYS_ADDR if PCI
>> 198 select SYS_HAS_CPU_MIPS32_R1
>> 199 select SYS_SUPPORTS_32BIT_KERNEL
>> 200 select SYS_SUPPORTS_APM_EMULATION
>> 201 select GPIOLIB
>> 202 select SYS_SUPPORTS_ZBOOT
>> 203 select COMMON_CLK
348 204
349 config ARCH_MMAP_RND_COMPAT_BITS_MIN !! 205 config ATH25
350 default 8 !! 206 bool "Atheros AR231x/AR531x SoC support"
>> 207 select CEVT_R4K
>> 208 select CSRC_R4K
>> 209 select DMA_NONCOHERENT
>> 210 select IRQ_MIPS_CPU
>> 211 select IRQ_DOMAIN
>> 212 select SYS_HAS_CPU_MIPS32_R1
>> 213 select SYS_SUPPORTS_BIG_ENDIAN
>> 214 select SYS_SUPPORTS_32BIT_KERNEL
>> 215 select SYS_HAS_EARLY_PRINTK
>> 216 help
>> 217 Support for Atheros AR231x and Atheros AR531x based boards
>> 218
>> 219 config ATH79
>> 220 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 221 select ARCH_HAS_RESET_CONTROLLER
>> 222 select BOOT_RAW
>> 223 select CEVT_R4K
>> 224 select CSRC_R4K
>> 225 select DMA_NONCOHERENT
>> 226 select GPIOLIB
>> 227 select PINCTRL
>> 228 select COMMON_CLK
>> 229 select IRQ_MIPS_CPU
>> 230 select SYS_HAS_CPU_MIPS32_R2
>> 231 select SYS_HAS_EARLY_PRINTK
>> 232 select SYS_SUPPORTS_32BIT_KERNEL
>> 233 select SYS_SUPPORTS_BIG_ENDIAN
>> 234 select SYS_SUPPORTS_MIPS16
>> 235 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 236 select USE_OF
>> 237 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 238 help
>> 239 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 240
>> 241 config BMIPS_GENERIC
>> 242 bool "Broadcom Generic BMIPS kernel"
>> 243 select ARCH_HAS_RESET_CONTROLLER
>> 244 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 245 select BOOT_RAW
>> 246 select NO_EXCEPT_FILL
>> 247 select USE_OF
>> 248 select CEVT_R4K
>> 249 select CSRC_R4K
>> 250 select SYNC_R4K
>> 251 select COMMON_CLK
>> 252 select BCM6345_L1_IRQ
>> 253 select BCM7038_L1_IRQ
>> 254 select BCM7120_L2_IRQ
>> 255 select BRCMSTB_L2_IRQ
>> 256 select IRQ_MIPS_CPU
>> 257 select DMA_NONCOHERENT
>> 258 select SYS_SUPPORTS_32BIT_KERNEL
>> 259 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 260 select SYS_SUPPORTS_BIG_ENDIAN
>> 261 select SYS_SUPPORTS_HIGHMEM
>> 262 select SYS_HAS_CPU_BMIPS32_3300
>> 263 select SYS_HAS_CPU_BMIPS4350
>> 264 select SYS_HAS_CPU_BMIPS4380
>> 265 select SYS_HAS_CPU_BMIPS5000
>> 266 select SWAP_IO_SPACE
>> 267 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 268 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 269 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 270 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 271 select HARDIRQS_SW_RESEND
>> 272 select HAVE_PCI
>> 273 select PCI_DRIVERS_GENERIC
>> 274 select FW_CFE
>> 275 help
>> 276 Build a generic DT-based kernel image that boots on select
>> 277 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 278 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 279 must be set appropriately for your board.
>> 280
>> 281 config BCM47XX
>> 282 bool "Broadcom BCM47XX based boards"
>> 283 select BOOT_RAW
>> 284 select CEVT_R4K
>> 285 select CSRC_R4K
>> 286 select DMA_NONCOHERENT
>> 287 select HAVE_PCI
>> 288 select IRQ_MIPS_CPU
>> 289 select SYS_HAS_CPU_MIPS32_R1
>> 290 select NO_EXCEPT_FILL
>> 291 select SYS_SUPPORTS_32BIT_KERNEL
>> 292 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 293 select SYS_SUPPORTS_MIPS16
>> 294 select SYS_SUPPORTS_ZBOOT
>> 295 select SYS_HAS_EARLY_PRINTK
>> 296 select USE_GENERIC_EARLY_PRINTK_8250
>> 297 select GPIOLIB
>> 298 select LEDS_GPIO_REGISTER
>> 299 select BCM47XX_NVRAM
>> 300 select BCM47XX_SPROM
>> 301 select BCM47XX_SSB if !BCM47XX_BCMA
>> 302 help
>> 303 Support for BCM47XX based boards
>> 304
>> 305 config BCM63XX
>> 306 bool "Broadcom BCM63XX based boards"
>> 307 select BOOT_RAW
>> 308 select CEVT_R4K
>> 309 select CSRC_R4K
>> 310 select SYNC_R4K
>> 311 select DMA_NONCOHERENT
>> 312 select IRQ_MIPS_CPU
>> 313 select SYS_SUPPORTS_32BIT_KERNEL
>> 314 select SYS_SUPPORTS_BIG_ENDIAN
>> 315 select SYS_HAS_EARLY_PRINTK
>> 316 select SYS_HAS_CPU_BMIPS32_3300
>> 317 select SYS_HAS_CPU_BMIPS4350
>> 318 select SYS_HAS_CPU_BMIPS4380
>> 319 select SWAP_IO_SPACE
>> 320 select GPIOLIB
>> 321 select MIPS_L1_CACHE_SHIFT_4
>> 322 select HAVE_LEGACY_CLK
>> 323 help
>> 324 Support for BCM63XX based boards
351 325
352 config ARCH_MMAP_RND_COMPAT_BITS_MAX !! 326 config MIPS_COBALT
353 default 16 !! 327 bool "Cobalt Server"
>> 328 select CEVT_R4K
>> 329 select CSRC_R4K
>> 330 select CEVT_GT641XX
>> 331 select DMA_NONCOHERENT
>> 332 select FORCE_PCI
>> 333 select I8253
>> 334 select I8259
>> 335 select IRQ_MIPS_CPU
>> 336 select IRQ_GT641XX
>> 337 select PCI_GT64XXX_PCI0
>> 338 select SYS_HAS_CPU_NEVADA
>> 339 select SYS_HAS_EARLY_PRINTK
>> 340 select SYS_SUPPORTS_32BIT_KERNEL
>> 341 select SYS_SUPPORTS_64BIT_KERNEL
>> 342 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 343 select USE_GENERIC_EARLY_PRINTK_8250
>> 344
>> 345 config MACH_DECSTATION
>> 346 bool "DECstations"
>> 347 select BOOT_ELF32
>> 348 select CEVT_DS1287
>> 349 select CEVT_R4K if CPU_R4X00
>> 350 select CSRC_IOASIC
>> 351 select CSRC_R4K if CPU_R4X00
>> 352 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 353 select CPU_R4000_WORKAROUNDS if 64BIT
>> 354 select CPU_R4400_WORKAROUNDS if 64BIT
>> 355 select DMA_NONCOHERENT
>> 356 select NO_IOPORT_MAP
>> 357 select IRQ_MIPS_CPU
>> 358 select SYS_HAS_CPU_R3000
>> 359 select SYS_HAS_CPU_R4X00
>> 360 select SYS_SUPPORTS_32BIT_KERNEL
>> 361 select SYS_SUPPORTS_64BIT_KERNEL
>> 362 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 363 select SYS_SUPPORTS_128HZ
>> 364 select SYS_SUPPORTS_256HZ
>> 365 select SYS_SUPPORTS_1024HZ
>> 366 select MIPS_L1_CACHE_SHIFT_4
>> 367 help
>> 368 This enables support for DEC's MIPS based workstations. For details
>> 369 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 370 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 371
>> 372 If you have one of the following DECstation Models you definitely
>> 373 want to choose R4xx0 for the CPU Type:
>> 374
>> 375 DECstation 5000/50
>> 376 DECstation 5000/150
>> 377 DECstation 5000/260
>> 378 DECsystem 5900/260
>> 379
>> 380 otherwise choose R3000.
>> 381
>> 382 config MACH_JAZZ
>> 383 bool "Jazz family of machines"
>> 384 select ARC_MEMORY
>> 385 select ARC_PROMLIB
>> 386 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 387 select ARCH_MIGHT_HAVE_PC_SERIO
>> 388 select DMA_OPS
>> 389 select FW_ARC
>> 390 select FW_ARC32
>> 391 select ARCH_MAY_HAVE_PC_FDC
>> 392 select CEVT_R4K
>> 393 select CSRC_R4K
>> 394 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 395 select GENERIC_ISA_DMA
>> 396 select HAVE_PCSPKR_PLATFORM
>> 397 select IRQ_MIPS_CPU
>> 398 select I8253
>> 399 select I8259
>> 400 select ISA
>> 401 select SYS_HAS_CPU_R4X00
>> 402 select SYS_SUPPORTS_32BIT_KERNEL
>> 403 select SYS_SUPPORTS_64BIT_KERNEL
>> 404 select SYS_SUPPORTS_100HZ
>> 405 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 406 help
>> 407 This a family of machines based on the MIPS R4030 chipset which was
>> 408 used by several vendors to build RISC/os and Windows NT workstations.
>> 409 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 410 Olivetti M700-10 workstations.
>> 411
>> 412 config MACH_INGENIC_SOC
>> 413 bool "Ingenic SoC based machines"
>> 414 select MIPS_GENERIC
>> 415 select MACH_INGENIC
>> 416 select SYS_SUPPORTS_ZBOOT_UART16550
>> 417 select CPU_SUPPORTS_CPUFREQ
>> 418 select MIPS_EXTERNAL_TIMER
>> 419
>> 420 config LANTIQ
>> 421 bool "Lantiq based platforms"
>> 422 select DMA_NONCOHERENT
>> 423 select IRQ_MIPS_CPU
>> 424 select CEVT_R4K
>> 425 select CSRC_R4K
>> 426 select NO_EXCEPT_FILL
>> 427 select SYS_HAS_CPU_MIPS32_R1
>> 428 select SYS_HAS_CPU_MIPS32_R2
>> 429 select SYS_SUPPORTS_BIG_ENDIAN
>> 430 select SYS_SUPPORTS_32BIT_KERNEL
>> 431 select SYS_SUPPORTS_MIPS16
>> 432 select SYS_SUPPORTS_MULTITHREADING
>> 433 select SYS_SUPPORTS_VPE_LOADER
>> 434 select SYS_HAS_EARLY_PRINTK
>> 435 select GPIOLIB
>> 436 select SWAP_IO_SPACE
>> 437 select BOOT_RAW
>> 438 select HAVE_LEGACY_CLK
>> 439 select USE_OF
>> 440 select PINCTRL
>> 441 select PINCTRL_LANTIQ
>> 442 select ARCH_HAS_RESET_CONTROLLER
>> 443 select RESET_CONTROLLER
>> 444
>> 445 config MACH_LOONGSON32
>> 446 bool "Loongson 32-bit family of machines"
>> 447 select SYS_SUPPORTS_ZBOOT
>> 448 help
>> 449 This enables support for the Loongson-1 family of machines.
>> 450
>> 451 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 452 the Institute of Computing Technology (ICT), Chinese Academy of
>> 453 Sciences (CAS).
>> 454
>> 455 config MACH_LOONGSON2EF
>> 456 bool "Loongson-2E/F family of machines"
>> 457 select SYS_SUPPORTS_ZBOOT
>> 458 help
>> 459 This enables the support of early Loongson-2E/F family of machines.
>> 460
>> 461 config MACH_LOONGSON64
>> 462 bool "Loongson 64-bit family of machines"
>> 463 select ARCH_DMA_DEFAULT_COHERENT
>> 464 select ARCH_SPARSEMEM_ENABLE
>> 465 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 466 select ARCH_MIGHT_HAVE_PC_SERIO
>> 467 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 468 select BOOT_ELF32
>> 469 select BOARD_SCACHE
>> 470 select CSRC_R4K
>> 471 select CEVT_R4K
>> 472 select FORCE_PCI
>> 473 select ISA
>> 474 select I8259
>> 475 select IRQ_MIPS_CPU
>> 476 select NO_EXCEPT_FILL
>> 477 select NR_CPUS_DEFAULT_64
>> 478 select USE_GENERIC_EARLY_PRINTK_8250
>> 479 select PCI_DRIVERS_GENERIC
>> 480 select SYS_HAS_CPU_LOONGSON64
>> 481 select SYS_HAS_EARLY_PRINTK
>> 482 select SYS_SUPPORTS_SMP
>> 483 select SYS_SUPPORTS_HOTPLUG_CPU
>> 484 select SYS_SUPPORTS_NUMA
>> 485 select SYS_SUPPORTS_64BIT_KERNEL
>> 486 select SYS_SUPPORTS_HIGHMEM
>> 487 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 488 select SYS_SUPPORTS_ZBOOT
>> 489 select SYS_SUPPORTS_RELOCATABLE
>> 490 select ZONE_DMA32
>> 491 select COMMON_CLK
>> 492 select USE_OF
>> 493 select BUILTIN_DTB
>> 494 select PCI_HOST_GENERIC
>> 495 select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
>> 496 help
>> 497 This enables the support of Loongson-2/3 family of machines.
>> 498
>> 499 Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
>> 500 GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
>> 501 and Loongson-2F which will be removed), developed by the Institute
>> 502 of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
>> 503
>> 504 config MIPS_MALTA
>> 505 bool "MIPS Malta board"
>> 506 select ARCH_MAY_HAVE_PC_FDC
>> 507 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 508 select ARCH_MIGHT_HAVE_PC_SERIO
>> 509 select BOOT_ELF32
>> 510 select BOOT_RAW
>> 511 select BUILTIN_DTB
>> 512 select CEVT_R4K
>> 513 select CLKSRC_MIPS_GIC
>> 514 select COMMON_CLK
>> 515 select CSRC_R4K
>> 516 select DMA_NONCOHERENT
>> 517 select GENERIC_ISA_DMA
>> 518 select HAVE_PCSPKR_PLATFORM
>> 519 select HAVE_PCI
>> 520 select I8253
>> 521 select I8259
>> 522 select IRQ_MIPS_CPU
>> 523 select MIPS_BONITO64
>> 524 select MIPS_CPU_SCACHE
>> 525 select MIPS_GIC
>> 526 select MIPS_L1_CACHE_SHIFT_6
>> 527 select MIPS_MSC
>> 528 select PCI_GT64XXX_PCI0
>> 529 select SMP_UP if SMP
>> 530 select SWAP_IO_SPACE
>> 531 select SYS_HAS_CPU_MIPS32_R1
>> 532 select SYS_HAS_CPU_MIPS32_R2
>> 533 select SYS_HAS_CPU_MIPS32_R3_5
>> 534 select SYS_HAS_CPU_MIPS32_R5
>> 535 select SYS_HAS_CPU_MIPS32_R6
>> 536 select SYS_HAS_CPU_MIPS64_R1
>> 537 select SYS_HAS_CPU_MIPS64_R2
>> 538 select SYS_HAS_CPU_MIPS64_R6
>> 539 select SYS_HAS_CPU_NEVADA
>> 540 select SYS_HAS_CPU_RM7000
>> 541 select SYS_SUPPORTS_32BIT_KERNEL
>> 542 select SYS_SUPPORTS_64BIT_KERNEL
>> 543 select SYS_SUPPORTS_BIG_ENDIAN
>> 544 select SYS_SUPPORTS_HIGHMEM
>> 545 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 546 select SYS_SUPPORTS_MICROMIPS
>> 547 select SYS_SUPPORTS_MIPS16
>> 548 select SYS_SUPPORTS_MIPS_CPS
>> 549 select SYS_SUPPORTS_MULTITHREADING
>> 550 select SYS_SUPPORTS_RELOCATABLE
>> 551 select SYS_SUPPORTS_SMARTMIPS
>> 552 select SYS_SUPPORTS_VPE_LOADER
>> 553 select SYS_SUPPORTS_ZBOOT
>> 554 select USE_OF
>> 555 select WAR_ICACHE_REFILLS
>> 556 select ZONE_DMA32 if 64BIT
>> 557 help
>> 558 This enables support for the MIPS Technologies Malta evaluation
>> 559 board.
>> 560
>> 561 config MACH_PIC32
>> 562 bool "Microchip PIC32 Family"
>> 563 help
>> 564 This enables support for the Microchip PIC32 family of platforms.
>> 565
>> 566 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 567 microcontrollers.
>> 568
>> 569 config MACH_NINTENDO64
>> 570 bool "Nintendo 64 console"
>> 571 select CEVT_R4K
>> 572 select CSRC_R4K
>> 573 select SYS_HAS_CPU_R4300
>> 574 select SYS_SUPPORTS_BIG_ENDIAN
>> 575 select SYS_SUPPORTS_ZBOOT
>> 576 select SYS_SUPPORTS_32BIT_KERNEL
>> 577 select SYS_SUPPORTS_64BIT_KERNEL
>> 578 select DMA_NONCOHERENT
>> 579 select IRQ_MIPS_CPU
>> 580
>> 581 config RALINK
>> 582 bool "Ralink based machines"
>> 583 select CEVT_R4K
>> 584 select COMMON_CLK
>> 585 select CSRC_R4K
>> 586 select BOOT_RAW
>> 587 select DMA_NONCOHERENT
>> 588 select IRQ_MIPS_CPU
>> 589 select USE_OF
>> 590 select SYS_HAS_CPU_MIPS32_R2
>> 591 select SYS_SUPPORTS_32BIT_KERNEL
>> 592 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 593 select SYS_SUPPORTS_MIPS16
>> 594 select SYS_SUPPORTS_ZBOOT
>> 595 select SYS_HAS_EARLY_PRINTK
>> 596 select ARCH_HAS_RESET_CONTROLLER
>> 597 select RESET_CONTROLLER
>> 598
>> 599 config MACH_REALTEK_RTL
>> 600 bool "Realtek RTL838x/RTL839x based machines"
>> 601 select MIPS_GENERIC
>> 602 select DMA_NONCOHERENT
>> 603 select IRQ_MIPS_CPU
>> 604 select CSRC_R4K
>> 605 select CEVT_R4K
>> 606 select SYS_HAS_CPU_MIPS32_R1
>> 607 select SYS_HAS_CPU_MIPS32_R2
>> 608 select SYS_SUPPORTS_BIG_ENDIAN
>> 609 select SYS_SUPPORTS_32BIT_KERNEL
>> 610 select SYS_SUPPORTS_MIPS16
>> 611 select SYS_SUPPORTS_MULTITHREADING
>> 612 select SYS_SUPPORTS_VPE_LOADER
>> 613 select BOOT_RAW
>> 614 select PINCTRL
>> 615 select USE_OF
354 616
355 config SBUS !! 617 config SGI_IP22
356 bool !! 618 bool "SGI IP22 (Indy/Indigo2)"
>> 619 select ARC_MEMORY
>> 620 select ARC_PROMLIB
>> 621 select FW_ARC
>> 622 select FW_ARC32
>> 623 select ARCH_MIGHT_HAVE_PC_SERIO
>> 624 select BOOT_ELF32
>> 625 select CEVT_R4K
>> 626 select CSRC_R4K
>> 627 select DEFAULT_SGI_PARTITION
>> 628 select DMA_NONCOHERENT
>> 629 select HAVE_EISA
>> 630 select I8253
>> 631 select I8259
>> 632 select IP22_CPU_SCACHE
>> 633 select IRQ_MIPS_CPU
>> 634 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 635 select SGI_HAS_I8042
>> 636 select SGI_HAS_INDYDOG
>> 637 select SGI_HAS_HAL2
>> 638 select SGI_HAS_SEEQ
>> 639 select SGI_HAS_WD93
>> 640 select SGI_HAS_ZILOG
>> 641 select SWAP_IO_SPACE
>> 642 select SYS_HAS_CPU_R4X00
>> 643 select SYS_HAS_CPU_R5000
>> 644 select SYS_HAS_EARLY_PRINTK
>> 645 select SYS_SUPPORTS_32BIT_KERNEL
>> 646 select SYS_SUPPORTS_64BIT_KERNEL
>> 647 select SYS_SUPPORTS_BIG_ENDIAN
>> 648 select WAR_R4600_V1_INDEX_ICACHEOP
>> 649 select WAR_R4600_V1_HIT_CACHEOP
>> 650 select WAR_R4600_V2_HIT_CACHEOP
>> 651 select MIPS_L1_CACHE_SHIFT_7
>> 652 help
>> 653 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 654 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 655 that runs on these, say Y here.
>> 656
>> 657 config SGI_IP27
>> 658 bool "SGI IP27 (Origin200/2000)"
>> 659 select ARCH_HAS_PHYS_TO_DMA
>> 660 select ARCH_SPARSEMEM_ENABLE
>> 661 select FW_ARC
>> 662 select FW_ARC64
>> 663 select ARC_CMDLINE_ONLY
>> 664 select BOOT_ELF64
>> 665 select DEFAULT_SGI_PARTITION
>> 666 select FORCE_PCI
>> 667 select SYS_HAS_EARLY_PRINTK
>> 668 select HAVE_PCI
>> 669 select IRQ_MIPS_CPU
>> 670 select IRQ_DOMAIN_HIERARCHY
>> 671 select NR_CPUS_DEFAULT_64
>> 672 select PCI_DRIVERS_GENERIC
>> 673 select PCI_XTALK_BRIDGE
>> 674 select SYS_HAS_CPU_R10000
>> 675 select SYS_SUPPORTS_64BIT_KERNEL
>> 676 select SYS_SUPPORTS_BIG_ENDIAN
>> 677 select SYS_SUPPORTS_NUMA
>> 678 select SYS_SUPPORTS_SMP
>> 679 select WAR_R10000_LLSC
>> 680 select MIPS_L1_CACHE_SHIFT_7
>> 681 select NUMA
>> 682 select HAVE_ARCH_NODEDATA_EXTENSION
>> 683 help
>> 684 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 685 workstations. To compile a Linux kernel that runs on these, say Y
>> 686 here.
>> 687
>> 688 config SGI_IP28
>> 689 bool "SGI IP28 (Indigo2 R10k)"
>> 690 select ARC_MEMORY
>> 691 select ARC_PROMLIB
>> 692 select FW_ARC
>> 693 select FW_ARC64
>> 694 select ARCH_MIGHT_HAVE_PC_SERIO
>> 695 select BOOT_ELF64
>> 696 select CEVT_R4K
>> 697 select CSRC_R4K
>> 698 select DEFAULT_SGI_PARTITION
>> 699 select DMA_NONCOHERENT
>> 700 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 701 select IRQ_MIPS_CPU
>> 702 select HAVE_EISA
>> 703 select I8253
>> 704 select I8259
>> 705 select SGI_HAS_I8042
>> 706 select SGI_HAS_INDYDOG
>> 707 select SGI_HAS_HAL2
>> 708 select SGI_HAS_SEEQ
>> 709 select SGI_HAS_WD93
>> 710 select SGI_HAS_ZILOG
>> 711 select SWAP_IO_SPACE
>> 712 select SYS_HAS_CPU_R10000
>> 713 select SYS_HAS_EARLY_PRINTK
>> 714 select SYS_SUPPORTS_64BIT_KERNEL
>> 715 select SYS_SUPPORTS_BIG_ENDIAN
>> 716 select WAR_R10000_LLSC
>> 717 select MIPS_L1_CACHE_SHIFT_7
>> 718 help
>> 719 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 720 kernel that runs on these, say Y here.
>> 721
>> 722 config SGI_IP30
>> 723 bool "SGI IP30 (Octane/Octane2)"
>> 724 select ARCH_HAS_PHYS_TO_DMA
>> 725 select FW_ARC
>> 726 select FW_ARC64
>> 727 select BOOT_ELF64
>> 728 select CEVT_R4K
>> 729 select CSRC_R4K
>> 730 select FORCE_PCI
>> 731 select SYNC_R4K if SMP
>> 732 select ZONE_DMA32
>> 733 select HAVE_PCI
>> 734 select IRQ_MIPS_CPU
>> 735 select IRQ_DOMAIN_HIERARCHY
>> 736 select PCI_DRIVERS_GENERIC
>> 737 select PCI_XTALK_BRIDGE
>> 738 select SYS_HAS_EARLY_PRINTK
>> 739 select SYS_HAS_CPU_R10000
>> 740 select SYS_SUPPORTS_64BIT_KERNEL
>> 741 select SYS_SUPPORTS_BIG_ENDIAN
>> 742 select SYS_SUPPORTS_SMP
>> 743 select WAR_R10000_LLSC
>> 744 select MIPS_L1_CACHE_SHIFT_7
>> 745 select ARC_MEMORY
>> 746 help
>> 747 These are the SGI Octane and Octane2 graphics workstations. To
>> 748 compile a Linux kernel that runs on these, say Y here.
>> 749
>> 750 config SGI_IP32
>> 751 bool "SGI IP32 (O2)"
>> 752 select ARC_MEMORY
>> 753 select ARC_PROMLIB
>> 754 select ARCH_HAS_PHYS_TO_DMA
>> 755 select FW_ARC
>> 756 select FW_ARC32
>> 757 select BOOT_ELF32
>> 758 select CEVT_R4K
>> 759 select CSRC_R4K
>> 760 select DMA_NONCOHERENT
>> 761 select HAVE_PCI
>> 762 select IRQ_MIPS_CPU
>> 763 select R5000_CPU_SCACHE
>> 764 select RM7000_CPU_SCACHE
>> 765 select SYS_HAS_CPU_R5000
>> 766 select SYS_HAS_CPU_R10000 if BROKEN
>> 767 select SYS_HAS_CPU_RM7000
>> 768 select SYS_HAS_CPU_NEVADA
>> 769 select SYS_SUPPORTS_64BIT_KERNEL
>> 770 select SYS_SUPPORTS_BIG_ENDIAN
>> 771 select WAR_ICACHE_REFILLS
>> 772 help
>> 773 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 774
>> 775 config SIBYTE_CRHONE
>> 776 bool "Sibyte BCM91125C-CRhone"
>> 777 select BOOT_ELF32
>> 778 select SIBYTE_BCM1125
>> 779 select SWAP_IO_SPACE
>> 780 select SYS_HAS_CPU_SB1
>> 781 select SYS_SUPPORTS_BIG_ENDIAN
>> 782 select SYS_SUPPORTS_HIGHMEM
>> 783 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 784
>> 785 config SIBYTE_RHONE
>> 786 bool "Sibyte BCM91125E-Rhone"
>> 787 select BOOT_ELF32
>> 788 select SIBYTE_SB1250
>> 789 select SWAP_IO_SPACE
>> 790 select SYS_HAS_CPU_SB1
>> 791 select SYS_SUPPORTS_BIG_ENDIAN
>> 792 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 793
>> 794 config SIBYTE_SWARM
>> 795 bool "Sibyte BCM91250A-SWARM"
>> 796 select BOOT_ELF32
>> 797 select HAVE_PATA_PLATFORM
>> 798 select SIBYTE_SB1250
>> 799 select SWAP_IO_SPACE
>> 800 select SYS_HAS_CPU_SB1
>> 801 select SYS_SUPPORTS_BIG_ENDIAN
>> 802 select SYS_SUPPORTS_HIGHMEM
>> 803 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 804 select ZONE_DMA32 if 64BIT
>> 805 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 806
>> 807 config SIBYTE_LITTLESUR
>> 808 bool "Sibyte BCM91250C2-LittleSur"
>> 809 select BOOT_ELF32
>> 810 select HAVE_PATA_PLATFORM
>> 811 select SIBYTE_SB1250
>> 812 select SWAP_IO_SPACE
>> 813 select SYS_HAS_CPU_SB1
>> 814 select SYS_SUPPORTS_BIG_ENDIAN
>> 815 select SYS_SUPPORTS_HIGHMEM
>> 816 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 817 select ZONE_DMA32 if 64BIT
>> 818
>> 819 config SIBYTE_SENTOSA
>> 820 bool "Sibyte BCM91250E-Sentosa"
>> 821 select BOOT_ELF32
>> 822 select SIBYTE_SB1250
>> 823 select SWAP_IO_SPACE
>> 824 select SYS_HAS_CPU_SB1
>> 825 select SYS_SUPPORTS_BIG_ENDIAN
>> 826 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 827 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 828
>> 829 config SIBYTE_BIGSUR
>> 830 bool "Sibyte BCM91480B-BigSur"
>> 831 select BOOT_ELF32
>> 832 select NR_CPUS_DEFAULT_4
>> 833 select SIBYTE_BCM1x80
>> 834 select SWAP_IO_SPACE
>> 835 select SYS_HAS_CPU_SB1
>> 836 select SYS_SUPPORTS_BIG_ENDIAN
>> 837 select SYS_SUPPORTS_HIGHMEM
>> 838 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 839 select ZONE_DMA32 if 64BIT
>> 840 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 841
>> 842 config SNI_RM
>> 843 bool "SNI RM200/300/400"
>> 844 select ARC_MEMORY
>> 845 select ARC_PROMLIB
>> 846 select FW_ARC if CPU_LITTLE_ENDIAN
>> 847 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 848 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 849 select ARCH_MAY_HAVE_PC_FDC
>> 850 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 851 select ARCH_MIGHT_HAVE_PC_SERIO
>> 852 select BOOT_ELF32
>> 853 select CEVT_R4K
>> 854 select CSRC_R4K
>> 855 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 856 select DMA_NONCOHERENT
>> 857 select GENERIC_ISA_DMA
>> 858 select HAVE_EISA
>> 859 select HAVE_PCSPKR_PLATFORM
>> 860 select HAVE_PCI
>> 861 select IRQ_MIPS_CPU
>> 862 select I8253
>> 863 select I8259
>> 864 select ISA
>> 865 select MIPS_L1_CACHE_SHIFT_6
>> 866 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 867 select SYS_HAS_CPU_R4X00
>> 868 select SYS_HAS_CPU_R5000
>> 869 select SYS_HAS_CPU_R10000
>> 870 select R5000_CPU_SCACHE
>> 871 select SYS_HAS_EARLY_PRINTK
>> 872 select SYS_SUPPORTS_32BIT_KERNEL
>> 873 select SYS_SUPPORTS_64BIT_KERNEL
>> 874 select SYS_SUPPORTS_BIG_ENDIAN
>> 875 select SYS_SUPPORTS_HIGHMEM
>> 876 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 877 select WAR_R4600_V2_HIT_CACHEOP
>> 878 help
>> 879 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 880 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 881 Technology and now in turn merged with Fujitsu. Say Y here to
>> 882 support this machine type.
>> 883
>> 884 config MACH_TX49XX
>> 885 bool "Toshiba TX49 series based machines"
>> 886 select WAR_TX49XX_ICACHE_INDEX_INV
>> 887
>> 888 config MIKROTIK_RB532
>> 889 bool "Mikrotik RB532 boards"
>> 890 select CEVT_R4K
>> 891 select CSRC_R4K
>> 892 select DMA_NONCOHERENT
>> 893 select HAVE_PCI
>> 894 select IRQ_MIPS_CPU
>> 895 select SYS_HAS_CPU_MIPS32_R1
>> 896 select SYS_SUPPORTS_32BIT_KERNEL
>> 897 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 898 select SWAP_IO_SPACE
>> 899 select BOOT_RAW
>> 900 select GPIOLIB
>> 901 select MIPS_L1_CACHE_SHIFT_4
>> 902 help
>> 903 Support the Mikrotik(tm) RouterBoard 532 series,
>> 904 based on the IDT RC32434 SoC.
357 905
358 config GENERIC_ISA_DMA !! 906 config CAVIUM_OCTEON_SOC
359 def_bool y !! 907 bool "Cavium Networks Octeon SoC based boards"
360 depends on ISA_DMA_API !! 908 select CEVT_R4K
>> 909 select ARCH_HAS_PHYS_TO_DMA
>> 910 select HAVE_RAPIDIO
>> 911 select PHYS_ADDR_T_64BIT
>> 912 select SYS_SUPPORTS_64BIT_KERNEL
>> 913 select SYS_SUPPORTS_BIG_ENDIAN
>> 914 select EDAC_SUPPORT
>> 915 select EDAC_ATOMIC_SCRUB
>> 916 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 917 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 918 select SYS_HAS_EARLY_PRINTK
>> 919 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 920 select HAVE_PCI
>> 921 select HAVE_PLAT_DELAY
>> 922 select HAVE_PLAT_FW_INIT_CMDLINE
>> 923 select HAVE_PLAT_MEMCPY
>> 924 select ZONE_DMA32
>> 925 select GPIOLIB
>> 926 select USE_OF
>> 927 select ARCH_SPARSEMEM_ENABLE
>> 928 select SYS_SUPPORTS_SMP
>> 929 select NR_CPUS_DEFAULT_64
>> 930 select MIPS_NR_CPU_NR_MAP_1024
>> 931 select BUILTIN_DTB
>> 932 select MTD
>> 933 select MTD_COMPLEX_MAPPINGS
>> 934 select SWIOTLB
>> 935 select SYS_SUPPORTS_RELOCATABLE
>> 936 help
>> 937 This option supports all of the Octeon reference boards from Cavium
>> 938 Networks. It builds a kernel that dynamically determines the Octeon
>> 939 CPU type and supports all known board reference implementations.
>> 940 Some of the supported boards are:
>> 941 EBT3000
>> 942 EBH3000
>> 943 EBH3100
>> 944 Thunder
>> 945 Kodama
>> 946 Hikari
>> 947 Say Y here for most Octeon reference boards.
361 948
362 config GENERIC_CSUM !! 949 endchoice
>> 950
>> 951 source "arch/mips/alchemy/Kconfig"
>> 952 source "arch/mips/ath25/Kconfig"
>> 953 source "arch/mips/ath79/Kconfig"
>> 954 source "arch/mips/bcm47xx/Kconfig"
>> 955 source "arch/mips/bcm63xx/Kconfig"
>> 956 source "arch/mips/bmips/Kconfig"
>> 957 source "arch/mips/generic/Kconfig"
>> 958 source "arch/mips/ingenic/Kconfig"
>> 959 source "arch/mips/jazz/Kconfig"
>> 960 source "arch/mips/lantiq/Kconfig"
>> 961 source "arch/mips/pic32/Kconfig"
>> 962 source "arch/mips/ralink/Kconfig"
>> 963 source "arch/mips/sgi-ip27/Kconfig"
>> 964 source "arch/mips/sibyte/Kconfig"
>> 965 source "arch/mips/txx9/Kconfig"
>> 966 source "arch/mips/cavium-octeon/Kconfig"
>> 967 source "arch/mips/loongson2ef/Kconfig"
>> 968 source "arch/mips/loongson32/Kconfig"
>> 969 source "arch/mips/loongson64/Kconfig"
>> 970
>> 971 endmenu
>> 972
>> 973 config GENERIC_HWEIGHT
363 bool 974 bool
364 default y if KMSAN || KASAN !! 975 default y
365 976
366 config GENERIC_BUG !! 977 config GENERIC_CALIBRATE_DELAY
367 def_bool y !! 978 bool
368 depends on BUG !! 979 default y
369 select GENERIC_BUG_RELATIVE_POINTERS i !! 980
>> 981 config SCHED_OMIT_FRAME_POINTER
>> 982 bool
>> 983 default y
370 984
371 config GENERIC_BUG_RELATIVE_POINTERS !! 985 #
>> 986 # Select some configuration options automatically based on user selections.
>> 987 #
>> 988 config FW_ARC
372 bool 989 bool
373 990
374 config ARCH_MAY_HAVE_PC_FDC 991 config ARCH_MAY_HAVE_PC_FDC
375 def_bool y !! 992 bool
376 depends on ISA_DMA_API <<
377 993
378 config GENERIC_CALIBRATE_DELAY !! 994 config BOOT_RAW
379 def_bool y !! 995 bool
380 996
381 config ARCH_HAS_CPU_RELAX !! 997 config CEVT_BCM1480
382 def_bool y !! 998 bool
383 999
384 config ARCH_HIBERNATION_POSSIBLE !! 1000 config CEVT_DS1287
385 def_bool y !! 1001 bool
386 1002
387 config ARCH_SUSPEND_POSSIBLE !! 1003 config CEVT_GT641XX
388 def_bool y !! 1004 bool
389 1005
390 config AUDIT_ARCH !! 1006 config CEVT_R4K
391 def_bool y if X86_64 !! 1007 bool
392 1008
393 config KASAN_SHADOW_OFFSET !! 1009 config CEVT_SB1250
394 hex !! 1010 bool
395 depends on KASAN <<
396 default 0xdffffc0000000000 <<
397 1011
398 config HAVE_INTEL_TXT !! 1012 config CEVT_TXX9
399 def_bool y !! 1013 bool
400 depends on INTEL_IOMMU && ACPI <<
401 1014
402 config X86_64_SMP !! 1015 config CSRC_BCM1480
403 def_bool y !! 1016 bool
404 depends on X86_64 && SMP <<
405 1017
406 config ARCH_SUPPORTS_UPROBES !! 1018 config CSRC_IOASIC
407 def_bool y !! 1019 bool
>> 1020
>> 1021 config CSRC_R4K
>> 1022 select CLOCKSOURCE_WATCHDOG if CPU_FREQ
>> 1023 bool
>> 1024
>> 1025 config CSRC_SB1250
>> 1026 bool
>> 1027
>> 1028 config MIPS_CLOCK_VSYSCALL
>> 1029 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1030
>> 1031 config GPIO_TXX9
>> 1032 select GPIOLIB
>> 1033 bool
>> 1034
>> 1035 config FW_CFE
>> 1036 bool
408 1037
409 config FIX_EARLYCON_MEM !! 1038 config ARCH_SUPPORTS_UPROBES
410 def_bool y 1039 def_bool y
411 1040
412 config DYNAMIC_PHYSICAL_MASK !! 1041 config DMA_NONCOHERENT
413 bool 1042 bool
>> 1043 #
>> 1044 # MIPS allows mixing "slightly different" Cacheability and Coherency
>> 1045 # Attribute bits. It is believed that the uncached access through
>> 1046 # KSEG1 and the implementation specific "uncached accelerated" used
>> 1047 # by pgprot_writcombine can be mixed, and the latter sometimes provides
>> 1048 # significant advantages.
>> 1049 #
>> 1050 select ARCH_HAS_SETUP_DMA_OPS
>> 1051 select ARCH_HAS_DMA_WRITE_COMBINE
>> 1052 select ARCH_HAS_DMA_PREP_COHERENT
>> 1053 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1054 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1055 select ARCH_HAS_DMA_SET_UNCACHED
>> 1056 select DMA_NONCOHERENT_MMAP
>> 1057 select NEED_DMA_MAP_STATE
414 1058
415 config PGTABLE_LEVELS !! 1059 config SYS_HAS_EARLY_PRINTK
416 int !! 1060 bool
417 default 5 if X86_5LEVEL <<
418 default 4 if X86_64 <<
419 default 3 if X86_PAE <<
420 default 2 <<
421 1061
422 config CC_HAS_SANE_STACKPROTECTOR !! 1062 config SYS_SUPPORTS_HOTPLUG_CPU
423 bool 1063 bool
424 default $(success,$(srctree)/scripts/g <<
425 default $(success,$(srctree)/scripts/g <<
426 help <<
427 We have to make sure stack protector <<
428 the compiler produces broken code or <<
429 the segment on 32-bit kernels. <<
430 1064
431 menu "Processor type and features" !! 1065 config MIPS_BONITO64
>> 1066 bool
432 1067
433 config SMP !! 1068 config MIPS_MSC
434 bool "Symmetric multi-processing suppo !! 1069 bool
435 help <<
436 This enables support for systems wit <<
437 a system with only one CPU, say N. I <<
438 than one CPU, say Y. <<
439 1070
440 If you say N here, the kernel will r !! 1071 config SYNC_R4K
441 machines, but will use only one CPU !! 1072 bool
442 you say Y here, the kernel will run <<
443 uniprocessor machines. On a uniproce <<
444 will run faster if you say N here. <<
445 1073
446 Note that if you say Y here and choo !! 1074 config NO_IOPORT_MAP
447 "Pentium" under "Processor family", !! 1075 def_bool n
448 architectures. Similarly, multiproce <<
449 architecture may not work on all Pen <<
450 1076
451 People using multiprocessor machines !! 1077 config GENERIC_CSUM
452 Y to "Enhanced Real Time Clock Suppo !! 1078 def_bool CPU_NO_LOAD_STORE_LR
453 Management" code will be disabled if <<
454 1079
455 See also <file:Documentation/arch/x8 !! 1080 config GENERIC_ISA_DMA
456 <file:Documentation/admin-guide/lock !! 1081 bool
457 <http://www.tldp.org/docs.html#howto !! 1082 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1083 select ISA_DMA_API
458 1084
459 If you don't know what to do here, s !! 1085 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1086 bool
>> 1087 select GENERIC_ISA_DMA
460 1088
461 config X86_X2APIC !! 1089 config HAVE_PLAT_DELAY
462 bool "Support x2apic" !! 1090 bool
463 depends on X86_LOCAL_APIC && X86_64 && <<
464 help <<
465 This enables x2apic support on CPUs <<
466 <<
467 This allows 32-bit apic IDs (so it c <<
468 and accesses the local apic via MSRs <<
469 <<
470 Some Intel systems circa 2022 and la <<
471 and can not fall back to the legacy <<
472 enabled in the BIOS. They will boot <<
473 without enabling this option. <<
474 1091
475 If you don't know what to do here, s !! 1092 config HAVE_PLAT_FW_INIT_CMDLINE
>> 1093 bool
476 1094
477 config X86_POSTED_MSI !! 1095 config HAVE_PLAT_MEMCPY
478 bool "Enable MSI and MSI-x delivery by !! 1096 bool
479 depends on X86_64 && IRQ_REMAP <<
480 help <<
481 This enables MSIs that are under int <<
482 posted interrupts to the host kernel <<
483 potentially be improved by coalescin <<
484 frequency bursts. <<
485 1097
486 If you don't know what to do here, s !! 1098 config ISA_DMA_API
>> 1099 bool
487 1100
488 config X86_MPPARSE !! 1101 config SYS_SUPPORTS_RELOCATABLE
489 bool "Enable MPS table" if ACPI !! 1102 bool
490 default y <<
491 depends on X86_LOCAL_APIC <<
492 help 1103 help
493 For old smp systems that do not have !! 1104 Selected if the platform supports relocating the kernel.
494 (esp with 64bit cpus) with acpi supp !! 1105 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1106 to allow access to command line and entropy sources.
495 1107
496 config X86_CPU_RESCTRL !! 1108 #
497 bool "x86 CPU resource control support !! 1109 # Endianness selection. Sufficiently obscure so many users don't know what to
498 depends on X86 && (CPU_SUP_INTEL || CP !! 1110 # answer,so we try hard to limit the available choices. Also the use of a
499 select KERNFS !! 1111 # choice statement should be more obvious to the user.
500 select PROC_CPU_RESCTRL if PRO !! 1112 #
>> 1113 choice
>> 1114 prompt "Endianness selection"
501 help 1115 help
502 Enable x86 CPU resource control supp !! 1116 Some MIPS machines can be configured for either little or big endian
>> 1117 byte order. These modes require different kernels and a different
>> 1118 Linux distribution. In general there is one preferred byteorder for a
>> 1119 particular system but some systems are just as commonly used in the
>> 1120 one or the other endianness.
>> 1121
>> 1122 config CPU_BIG_ENDIAN
>> 1123 bool "Big endian"
>> 1124 depends on SYS_SUPPORTS_BIG_ENDIAN
>> 1125
>> 1126 config CPU_LITTLE_ENDIAN
>> 1127 bool "Little endian"
>> 1128 depends on SYS_SUPPORTS_LITTLE_ENDIAN
503 1129
504 Provide support for the allocation a !! 1130 endchoice
505 usage by the CPU. <<
506 1131
507 Intel calls this Intel Resource Dire !! 1132 config EXPORT_UASM
508 (Intel(R) RDT). More information abo !! 1133 bool
509 Intel x86 Architecture Software Deve <<
510 1134
511 AMD calls this AMD Platform Quality !! 1135 config SYS_SUPPORTS_APM_EMULATION
512 More information about AMD QoS can b !! 1136 bool
513 Platform Quality of Service Extensio <<
514 1137
515 Say N if unsure. !! 1138 config SYS_SUPPORTS_BIG_ENDIAN
>> 1139 bool
516 1140
517 config X86_FRED !! 1141 config SYS_SUPPORTS_LITTLE_ENDIAN
518 bool "Flexible Return and Event Delive !! 1142 bool
519 depends on X86_64 <<
520 help <<
521 When enabled, try to use Flexible Re <<
522 instead of the legacy SYSCALL/SYSENT <<
523 ring transitions and exception/inter <<
524 system supports it. <<
525 1143
526 config X86_BIGSMP !! 1144 config MIPS_HUGE_TLB_SUPPORT
527 bool "Support for big SMP systems with !! 1145 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
528 depends on SMP && X86_32 <<
529 help <<
530 This option is needed for the system <<
531 1146
532 config X86_EXTENDED_PLATFORM !! 1147 config IRQ_TXX9
533 bool "Support for extended (non-PC) x8 !! 1148 bool
534 default y <<
535 help <<
536 If you disable this option then the <<
537 standard PC platforms. (which covers <<
538 systems out there.) <<
539 <<
540 If you enable this option then you'l <<
541 for the following non-PC x86 platfor <<
542 CONFIG_64BIT. <<
543 <<
544 32-bit platforms (CONFIG_64BIT=n): <<
545 Goldfish (Android emulator) <<
546 AMD Elan <<
547 RDC R-321x SoC <<
548 SGI 320/540 (Visual Workstatio <<
549 STA2X11-based (e.g. Northville <<
550 Moorestown MID devices <<
551 <<
552 64-bit platforms (CONFIG_64BIT=y): <<
553 Numascale NumaChip <<
554 ScaleMP vSMP <<
555 SGI Ultraviolet <<
556 <<
557 If you have one of these systems, or <<
558 generic distribution kernel, say Y h <<
559 <<
560 # This is an alphabetically sorted list of 64 <<
561 # Please maintain the alphabetic order if and <<
562 config X86_NUMACHIP <<
563 bool "Numascale NumaChip" <<
564 depends on X86_64 <<
565 depends on X86_EXTENDED_PLATFORM <<
566 depends on NUMA <<
567 depends on SMP <<
568 depends on X86_X2APIC <<
569 depends on PCI_MMCONFIG <<
570 help <<
571 Adds support for Numascale NumaChip <<
572 enable more than ~168 cores. <<
573 If you don't have one of these, you <<
574 <<
575 config X86_VSMP <<
576 bool "ScaleMP vSMP" <<
577 select HYPERVISOR_GUEST <<
578 select PARAVIRT <<
579 depends on X86_64 && PCI <<
580 depends on X86_EXTENDED_PLATFORM <<
581 depends on SMP <<
582 help <<
583 Support for ScaleMP vSMP systems. S <<
584 supposed to run on these EM64T-based <<
585 if you have one of these machines. <<
586 <<
587 config X86_UV <<
588 bool "SGI Ultraviolet" <<
589 depends on X86_64 <<
590 depends on X86_EXTENDED_PLATFORM <<
591 depends on NUMA <<
592 depends on EFI <<
593 depends on KEXEC_CORE <<
594 depends on X86_X2APIC <<
595 depends on PCI <<
596 help <<
597 This option is needed in order to su <<
598 If you don't have one of these, you <<
599 <<
600 # Following is an alphabetically sorted list o <<
601 # Please maintain the alphabetic order if and <<
602 <<
603 config X86_GOLDFISH <<
604 bool "Goldfish (Virtual Platform)" <<
605 depends on X86_EXTENDED_PLATFORM <<
606 help <<
607 Enable support for the Goldfish virt <<
608 for Android development. Unless you <<
609 Goldfish emulator say N here. <<
610 <<
611 config X86_INTEL_CE <<
612 bool "CE4100 TV platform" <<
613 depends on PCI <<
614 depends on PCI_GODIRECT <<
615 depends on X86_IO_APIC <<
616 depends on X86_32 <<
617 depends on X86_EXTENDED_PLATFORM <<
618 select X86_REBOOTFIXUPS <<
619 select OF <<
620 select OF_EARLY_FLATTREE <<
621 help <<
622 Select for the Intel CE media proces <<
623 This option compiles in support for <<
624 boxes and media devices. <<
625 <<
626 config X86_INTEL_MID <<
627 bool "Intel MID platform support" <<
628 depends on X86_EXTENDED_PLATFORM <<
629 depends on X86_PLATFORM_DEVICES <<
630 depends on PCI <<
631 depends on X86_64 || (PCI_GOANY && X86 <<
632 depends on X86_IO_APIC <<
633 select I2C <<
634 select DW_APB_TIMER <<
635 select INTEL_SCU_PCI <<
636 help <<
637 Select to build a kernel capable of <<
638 Internet Device) platform systems wh <<
639 interfaces. If you are building for <<
640 <<
641 Intel MID platforms are based on an <<
642 consume less power than most of the <<
643 <<
644 config X86_INTEL_QUARK <<
645 bool "Intel Quark platform support" <<
646 depends on X86_32 <<
647 depends on X86_EXTENDED_PLATFORM <<
648 depends on X86_PLATFORM_DEVICES <<
649 depends on X86_TSC <<
650 depends on PCI <<
651 depends on PCI_GOANY <<
652 depends on X86_IO_APIC <<
653 select IOSF_MBI <<
654 select INTEL_IMR <<
655 select COMMON_CLK <<
656 help <<
657 Select to include support for Quark <<
658 Say Y here if you have a Quark based <<
659 compatible Intel Galileo. <<
660 <<
661 config X86_INTEL_LPSS <<
662 bool "Intel Low Power Subsystem Suppor <<
663 depends on X86 && ACPI && PCI <<
664 select COMMON_CLK <<
665 select PINCTRL <<
666 select IOSF_MBI <<
667 help <<
668 Select to build support for Intel Lo <<
669 found on Intel Lynxpoint PCH. Select <<
670 things like clock tree (common clock <<
671 which are needed by the LPSS periphe <<
672 <<
673 config X86_AMD_PLATFORM_DEVICE <<
674 bool "AMD ACPI2Platform devices suppor <<
675 depends on ACPI <<
676 select COMMON_CLK <<
677 select PINCTRL <<
678 help <<
679 Select to interpret AMD specific ACP <<
680 such as I2C, UART, GPIO found on AMD <<
681 I2C and UART depend on COMMON_CLK to <<
682 implemented under PINCTRL subsystem. <<
683 <<
684 config IOSF_MBI <<
685 tristate "Intel SoC IOSF Sideband supp <<
686 depends on PCI <<
687 help <<
688 This option enables sideband registe <<
689 platforms. On these platforms the IO <<
690 MSR's for some register accesses, mo <<
691 and power. Drivers may query the ava <<
692 determine if they need the sideband <<
693 platforms. The sideband is available <<
694 This list is not meant to be exclusi <<
695 - BayTrail <<
696 - Braswell <<
697 - Quark <<
698 <<
699 You should say Y if you are running <<
700 <<
701 config IOSF_MBI_DEBUG <<
702 bool "Enable IOSF sideband access thro <<
703 depends on IOSF_MBI && DEBUG_FS <<
704 help <<
705 Select this option to expose the IOS <<
706 MDR, MCRX) through debugfs to write <<
707 different units on the SoC. This is <<
708 state information for debug and anal <<
709 mechanism, users of this option woul <<
710 device they want to access. <<
711 <<
712 If you don't require the option or a <<
713 <<
714 config X86_RDC321X <<
715 bool "RDC R-321x SoC" <<
716 depends on X86_32 <<
717 depends on X86_EXTENDED_PLATFORM <<
718 select M486 <<
719 select X86_REBOOTFIXUPS <<
720 help <<
721 This option is needed for RDC R-321x <<
722 as R-8610-(G). <<
723 If you don't have one of these chips <<
724 <<
725 config X86_32_NON_STANDARD <<
726 bool "Support non-standard 32-bit SMP <<
727 depends on X86_32 && SMP <<
728 depends on X86_EXTENDED_PLATFORM <<
729 help <<
730 This option compiles in the bigsmp a <<
731 subarchitectures. It is intended fo <<
732 kernel. If you select them all, kern <<
733 one and will fallback to default. <<
734 1149
735 # Alphabetically sorted list of Non standard 3 !! 1150 config IRQ_GT641XX
>> 1151 bool
736 1152
737 config X86_SUPPORTS_MEMORY_FAILURE !! 1153 config PCI_GT64XXX_PCI0
738 def_bool y !! 1154 bool
739 # MCE code calls memory_failure(): <<
740 depends on X86_MCE <<
741 # On 32-bit this adds too big of NODES <<
742 # On 32-bit SPARSEMEM adds too big of <<
743 depends on X86_64 || !SPARSEMEM <<
744 select ARCH_SUPPORTS_MEMORY_FAILURE <<
745 <<
746 config STA2X11 <<
747 bool "STA2X11 Companion Chip Support" <<
748 depends on X86_32_NON_STANDARD && PCI <<
749 select SWIOTLB <<
750 select MFD_STA2X11 <<
751 select GPIOLIB <<
752 help <<
753 This adds support for boards based o <<
754 a.k.a. "ConneXt". The chip is used i <<
755 PC chipset, so all "standard" periph <<
756 option is selected the kernel will s <<
757 standard PC machines. <<
758 <<
759 config X86_32_IRIS <<
760 tristate "Eurobraille/Iris poweroff mo <<
761 depends on X86_32 <<
762 help <<
763 The Iris machines from EuroBraille d <<
764 to shut themselves down properly. A <<
765 needed to do so, which is what this <<
766 kernel shutdown. <<
767 1155
768 This is only for Iris machines from !! 1156 config PCI_XTALK_BRIDGE
>> 1157 bool
769 1158
770 If unused, say N. !! 1159 config NO_EXCEPT_FILL
>> 1160 bool
771 1161
772 config SCHED_OMIT_FRAME_POINTER !! 1162 config MIPS_SPRAM
773 def_bool y !! 1163 bool
774 prompt "Single-depth WCHAN output" <<
775 depends on X86 <<
776 help <<
777 Calculate simpler /proc/<PID>/wchan <<
778 is disabled then wchan values will r <<
779 caller function. This provides more <<
780 at the expense of slightly more sche <<
781 1164
782 If in doubt, say "Y". !! 1165 config SWAP_IO_SPACE
>> 1166 bool
783 1167
784 menuconfig HYPERVISOR_GUEST !! 1168 config SGI_HAS_INDYDOG
785 bool "Linux guest support" !! 1169 bool
786 help <<
787 Say Y here to enable options for run <<
788 visors. This option enables basic hy <<
789 setup. <<
790 1170
791 If you say N, all options in this su !! 1171 config SGI_HAS_HAL2
792 disabled, and Linux guest support wo !! 1172 bool
793 1173
794 if HYPERVISOR_GUEST !! 1174 config SGI_HAS_SEEQ
>> 1175 bool
795 1176
796 config PARAVIRT !! 1177 config SGI_HAS_WD93
797 bool "Enable paravirtualization code" !! 1178 bool
798 depends on HAVE_STATIC_CALL <<
799 help <<
800 This changes the kernel so it can mo <<
801 under a hypervisor, potentially impr <<
802 over full virtualization. However, <<
803 the kernel is theoretically slower a <<
804 1179
805 config PARAVIRT_XXL !! 1180 config SGI_HAS_ZILOG
806 bool 1181 bool
807 1182
808 config PARAVIRT_DEBUG !! 1183 config SGI_HAS_I8042
809 bool "paravirt-ops debugging" !! 1184 bool
810 depends on PARAVIRT && DEBUG_KERNEL <<
811 help <<
812 Enable to debug paravirt_ops interna <<
813 a paravirt_op is missing when it is <<
814 1185
815 config PARAVIRT_SPINLOCKS !! 1186 config DEFAULT_SGI_PARTITION
816 bool "Paravirtualization layer for spi !! 1187 bool
817 depends on PARAVIRT && SMP <<
818 help <<
819 Paravirtualized spinlocks allow a pv <<
820 spinlock implementation with somethi <<
821 (for example, block the virtual CPU <<
822 1188
823 It has a minimal impact on native ke !! 1189 config FW_ARC32
824 benefit on paravirtualized KVM / Xen !! 1190 bool
825 1191
826 If you are unsure how to answer this !! 1192 config FW_SNIPROM
>> 1193 bool
827 1194
828 config X86_HV_CALLBACK_VECTOR !! 1195 config BOOT_ELF32
829 def_bool n !! 1196 bool
830 1197
831 source "arch/x86/xen/Kconfig" !! 1198 config MIPS_L1_CACHE_SHIFT_4
>> 1199 bool
832 1200
833 config KVM_GUEST !! 1201 config MIPS_L1_CACHE_SHIFT_5
834 bool "KVM Guest support (including kvm !! 1202 bool
835 depends on PARAVIRT !! 1203
836 select PARAVIRT_CLOCK !! 1204 config MIPS_L1_CACHE_SHIFT_6
837 select ARCH_CPUIDLE_HALTPOLL !! 1205 bool
838 select X86_HV_CALLBACK_VECTOR !! 1206
839 default y !! 1207 config MIPS_L1_CACHE_SHIFT_7
>> 1208 bool
>> 1209
>> 1210 config MIPS_L1_CACHE_SHIFT
>> 1211 int
>> 1212 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1213 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1214 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1215 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1216 default "5"
>> 1217
>> 1218 config ARC_CMDLINE_ONLY
>> 1219 bool
>> 1220
>> 1221 config ARC_CONSOLE
>> 1222 bool "ARC console support"
>> 1223 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1224
>> 1225 config ARC_MEMORY
>> 1226 bool
>> 1227
>> 1228 config ARC_PROMLIB
>> 1229 bool
>> 1230
>> 1231 config FW_ARC64
>> 1232 bool
>> 1233
>> 1234 config BOOT_ELF64
>> 1235 bool
>> 1236
>> 1237 menu "CPU selection"
>> 1238
>> 1239 choice
>> 1240 prompt "CPU type"
>> 1241 default CPU_R4X00
>> 1242
>> 1243 config CPU_LOONGSON64
>> 1244 bool "Loongson 64-bit CPU"
>> 1245 depends on SYS_HAS_CPU_LOONGSON64
>> 1246 select ARCH_HAS_PHYS_TO_DMA
>> 1247 select CPU_MIPSR2
>> 1248 select CPU_HAS_PREFETCH
>> 1249 select CPU_SUPPORTS_64BIT_KERNEL
>> 1250 select CPU_SUPPORTS_HIGHMEM
>> 1251 select CPU_SUPPORTS_HUGEPAGES
>> 1252 select CPU_SUPPORTS_MSA
>> 1253 select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
>> 1254 select CPU_MIPSR2_IRQ_VI
>> 1255 select DMA_NONCOHERENT
>> 1256 select WEAK_ORDERING
>> 1257 select WEAK_REORDERING_BEYOND_LLSC
>> 1258 select MIPS_ASID_BITS_VARIABLE
>> 1259 select MIPS_PGD_C0_CONTEXT
>> 1260 select MIPS_L1_CACHE_SHIFT_6
>> 1261 select MIPS_FP_SUPPORT
>> 1262 select GPIOLIB
>> 1263 select SWIOTLB
>> 1264 select HAVE_KVM
840 help 1265 help
841 This option enables various optimiza !! 1266 The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
842 hypervisor. It includes a paravirtua !! 1267 cores implements the MIPS64R2 instruction set with many extensions,
843 of relying on a PIT (or probably oth !! 1268 including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
844 underlying device model, the host pr !! 1269 3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
845 timing infrastructure such as time o !! 1270 Loongson-2E/2F is not covered here and will be removed in future.
846 1271
847 config ARCH_CPUIDLE_HALTPOLL !! 1272 config LOONGSON3_ENHANCEMENT
848 def_bool n !! 1273 bool "New Loongson-3 CPU Enhancements"
849 prompt "Disable host haltpoll when loa !! 1274 default n
>> 1275 depends on CPU_LOONGSON64
>> 1276 help
>> 1277 New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
>> 1278 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1279 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
>> 1280 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1281 Fast TLB refill support, etc.
>> 1282
>> 1283 This option enable those enhancements which are not probed at run
>> 1284 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1285 please say 'N' here. If you want a high-performance kernel to run on
>> 1286 new Loongson-3 machines only, please say 'Y' here.
>> 1287
>> 1288 config CPU_LOONGSON3_WORKAROUNDS
>> 1289 bool "Loongson-3 LLSC Workarounds"
>> 1290 default y if SMP
>> 1291 depends on CPU_LOONGSON64
>> 1292 help
>> 1293 Loongson-3 processors have the llsc issues which require workarounds.
>> 1294 Without workarounds the system may hang unexpectedly.
>> 1295
>> 1296 Say Y, unless you know what you are doing.
>> 1297
>> 1298 config CPU_LOONGSON3_CPUCFG_EMULATION
>> 1299 bool "Emulate the CPUCFG instruction on older Loongson cores"
>> 1300 default y
>> 1301 depends on CPU_LOONGSON64
>> 1302 help
>> 1303 Loongson-3A R4 and newer have the CPUCFG instruction available for
>> 1304 userland to query CPU capabilities, much like CPUID on x86. This
>> 1305 option provides emulation of the instruction on older Loongson
>> 1306 cores, back to Loongson-3A1000.
>> 1307
>> 1308 If unsure, please say Y.
>> 1309
>> 1310 config CPU_LOONGSON2E
>> 1311 bool "Loongson 2E"
>> 1312 depends on SYS_HAS_CPU_LOONGSON2E
>> 1313 select CPU_LOONGSON2EF
>> 1314 help
>> 1315 The Loongson 2E processor implements the MIPS III instruction set
>> 1316 with many extensions.
>> 1317
>> 1318 It has an internal FPGA northbridge, which is compatible to
>> 1319 bonito64.
>> 1320
>> 1321 config CPU_LOONGSON2F
>> 1322 bool "Loongson 2F"
>> 1323 depends on SYS_HAS_CPU_LOONGSON2F
>> 1324 select CPU_LOONGSON2EF
>> 1325 help
>> 1326 The Loongson 2F processor implements the MIPS III instruction set
>> 1327 with many extensions.
>> 1328
>> 1329 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1330 have a similar programming interface with FPGA northbridge used in
>> 1331 Loongson2E.
>> 1332
>> 1333 config CPU_LOONGSON1B
>> 1334 bool "Loongson 1B"
>> 1335 depends on SYS_HAS_CPU_LOONGSON1B
>> 1336 select CPU_LOONGSON32
>> 1337 select LEDS_GPIO_REGISTER
>> 1338 help
>> 1339 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1340 Release 1 instruction set and part of the MIPS32 Release 2
>> 1341 instruction set.
>> 1342
>> 1343 config CPU_LOONGSON1C
>> 1344 bool "Loongson 1C"
>> 1345 depends on SYS_HAS_CPU_LOONGSON1C
>> 1346 select CPU_LOONGSON32
>> 1347 select LEDS_GPIO_REGISTER
>> 1348 help
>> 1349 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1350 Release 1 instruction set and part of the MIPS32 Release 2
>> 1351 instruction set.
>> 1352
>> 1353 config CPU_MIPS32_R1
>> 1354 bool "MIPS32 Release 1"
>> 1355 depends on SYS_HAS_CPU_MIPS32_R1
>> 1356 select CPU_HAS_PREFETCH
>> 1357 select CPU_SUPPORTS_32BIT_KERNEL
>> 1358 select CPU_SUPPORTS_HIGHMEM
>> 1359 help
>> 1360 Choose this option to build a kernel for release 1 or later of the
>> 1361 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1362 MIPS processor are based on a MIPS32 processor. If you know the
>> 1363 specific type of processor in your system, choose those that one
>> 1364 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1365 Release 2 of the MIPS32 architecture is available since several
>> 1366 years so chances are you even have a MIPS32 Release 2 processor
>> 1367 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1368 performance.
>> 1369
>> 1370 config CPU_MIPS32_R2
>> 1371 bool "MIPS32 Release 2"
>> 1372 depends on SYS_HAS_CPU_MIPS32_R2
>> 1373 select CPU_HAS_PREFETCH
>> 1374 select CPU_SUPPORTS_32BIT_KERNEL
>> 1375 select CPU_SUPPORTS_HIGHMEM
>> 1376 select CPU_SUPPORTS_MSA
>> 1377 select HAVE_KVM
>> 1378 help
>> 1379 Choose this option to build a kernel for release 2 or later of the
>> 1380 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1381 MIPS processor are based on a MIPS32 processor. If you know the
>> 1382 specific type of processor in your system, choose those that one
>> 1383 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1384
>> 1385 config CPU_MIPS32_R5
>> 1386 bool "MIPS32 Release 5"
>> 1387 depends on SYS_HAS_CPU_MIPS32_R5
>> 1388 select CPU_HAS_PREFETCH
>> 1389 select CPU_SUPPORTS_32BIT_KERNEL
>> 1390 select CPU_SUPPORTS_HIGHMEM
>> 1391 select CPU_SUPPORTS_MSA
>> 1392 select HAVE_KVM
>> 1393 select MIPS_O32_FP64_SUPPORT
>> 1394 help
>> 1395 Choose this option to build a kernel for release 5 or later of the
>> 1396 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1397 family, are based on a MIPS32r5 processor. If you own an older
>> 1398 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1399
>> 1400 config CPU_MIPS32_R6
>> 1401 bool "MIPS32 Release 6"
>> 1402 depends on SYS_HAS_CPU_MIPS32_R6
>> 1403 select CPU_HAS_PREFETCH
>> 1404 select CPU_NO_LOAD_STORE_LR
>> 1405 select CPU_SUPPORTS_32BIT_KERNEL
>> 1406 select CPU_SUPPORTS_HIGHMEM
>> 1407 select CPU_SUPPORTS_MSA
>> 1408 select HAVE_KVM
>> 1409 select MIPS_O32_FP64_SUPPORT
>> 1410 help
>> 1411 Choose this option to build a kernel for release 6 or later of the
>> 1412 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1413 family, are based on a MIPS32r6 processor. If you own an older
>> 1414 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1415
>> 1416 config CPU_MIPS64_R1
>> 1417 bool "MIPS64 Release 1"
>> 1418 depends on SYS_HAS_CPU_MIPS64_R1
>> 1419 select CPU_HAS_PREFETCH
>> 1420 select CPU_SUPPORTS_32BIT_KERNEL
>> 1421 select CPU_SUPPORTS_64BIT_KERNEL
>> 1422 select CPU_SUPPORTS_HIGHMEM
>> 1423 select CPU_SUPPORTS_HUGEPAGES
>> 1424 help
>> 1425 Choose this option to build a kernel for release 1 or later of the
>> 1426 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1427 MIPS processor are based on a MIPS64 processor. If you know the
>> 1428 specific type of processor in your system, choose those that one
>> 1429 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1430 Release 2 of the MIPS64 architecture is available since several
>> 1431 years so chances are you even have a MIPS64 Release 2 processor
>> 1432 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1433 performance.
>> 1434
>> 1435 config CPU_MIPS64_R2
>> 1436 bool "MIPS64 Release 2"
>> 1437 depends on SYS_HAS_CPU_MIPS64_R2
>> 1438 select CPU_HAS_PREFETCH
>> 1439 select CPU_SUPPORTS_32BIT_KERNEL
>> 1440 select CPU_SUPPORTS_64BIT_KERNEL
>> 1441 select CPU_SUPPORTS_HIGHMEM
>> 1442 select CPU_SUPPORTS_HUGEPAGES
>> 1443 select CPU_SUPPORTS_MSA
>> 1444 select HAVE_KVM
>> 1445 help
>> 1446 Choose this option to build a kernel for release 2 or later of the
>> 1447 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1448 MIPS processor are based on a MIPS64 processor. If you know the
>> 1449 specific type of processor in your system, choose those that one
>> 1450 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1451
>> 1452 config CPU_MIPS64_R5
>> 1453 bool "MIPS64 Release 5"
>> 1454 depends on SYS_HAS_CPU_MIPS64_R5
>> 1455 select CPU_HAS_PREFETCH
>> 1456 select CPU_SUPPORTS_32BIT_KERNEL
>> 1457 select CPU_SUPPORTS_64BIT_KERNEL
>> 1458 select CPU_SUPPORTS_HIGHMEM
>> 1459 select CPU_SUPPORTS_HUGEPAGES
>> 1460 select CPU_SUPPORTS_MSA
>> 1461 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1462 select HAVE_KVM
>> 1463 help
>> 1464 Choose this option to build a kernel for release 5 or later of the
>> 1465 MIPS64 architecture. This is a intermediate MIPS architecture
>> 1466 release partly implementing release 6 features. Though there is no
>> 1467 any hardware known to be based on this release.
>> 1468
>> 1469 config CPU_MIPS64_R6
>> 1470 bool "MIPS64 Release 6"
>> 1471 depends on SYS_HAS_CPU_MIPS64_R6
>> 1472 select CPU_HAS_PREFETCH
>> 1473 select CPU_NO_LOAD_STORE_LR
>> 1474 select CPU_SUPPORTS_32BIT_KERNEL
>> 1475 select CPU_SUPPORTS_64BIT_KERNEL
>> 1476 select CPU_SUPPORTS_HIGHMEM
>> 1477 select CPU_SUPPORTS_HUGEPAGES
>> 1478 select CPU_SUPPORTS_MSA
>> 1479 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1480 select HAVE_KVM
>> 1481 help
>> 1482 Choose this option to build a kernel for release 6 or later of the
>> 1483 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1484 family, are based on a MIPS64r6 processor. If you own an older
>> 1485 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1486
>> 1487 config CPU_P5600
>> 1488 bool "MIPS Warrior P5600"
>> 1489 depends on SYS_HAS_CPU_P5600
>> 1490 select CPU_HAS_PREFETCH
>> 1491 select CPU_SUPPORTS_32BIT_KERNEL
>> 1492 select CPU_SUPPORTS_HIGHMEM
>> 1493 select CPU_SUPPORTS_MSA
>> 1494 select CPU_SUPPORTS_CPUFREQ
>> 1495 select CPU_MIPSR2_IRQ_VI
>> 1496 select CPU_MIPSR2_IRQ_EI
>> 1497 select HAVE_KVM
>> 1498 select MIPS_O32_FP64_SUPPORT
>> 1499 help
>> 1500 Choose this option to build a kernel for MIPS Warrior P5600 CPU.
>> 1501 It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
>> 1502 MMU with two-levels TLB, UCA, MSA, MDU core level features and system
>> 1503 level features like up to six P5600 calculation cores, CM2 with L2
>> 1504 cache, IOCU/IOMMU (though might be unused depending on the system-
>> 1505 specific IP core configuration), GIC, CPC, virtualisation module,
>> 1506 eJTAG and PDtrace.
>> 1507
>> 1508 config CPU_R3000
>> 1509 bool "R3000"
>> 1510 depends on SYS_HAS_CPU_R3000
>> 1511 select CPU_HAS_WB
>> 1512 select CPU_R3K_TLB
>> 1513 select CPU_SUPPORTS_32BIT_KERNEL
>> 1514 select CPU_SUPPORTS_HIGHMEM
>> 1515 help
>> 1516 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1517 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1518 *not* work on R4000 machines and vice versa. However, since most
>> 1519 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1520 might be a safe bet. If the resulting kernel does not work,
>> 1521 try to recompile with R3000.
>> 1522
>> 1523 config CPU_R4300
>> 1524 bool "R4300"
>> 1525 depends on SYS_HAS_CPU_R4300
>> 1526 select CPU_SUPPORTS_32BIT_KERNEL
>> 1527 select CPU_SUPPORTS_64BIT_KERNEL
>> 1528 help
>> 1529 MIPS Technologies R4300-series processors.
>> 1530
>> 1531 config CPU_R4X00
>> 1532 bool "R4x00"
>> 1533 depends on SYS_HAS_CPU_R4X00
>> 1534 select CPU_SUPPORTS_32BIT_KERNEL
>> 1535 select CPU_SUPPORTS_64BIT_KERNEL
>> 1536 select CPU_SUPPORTS_HUGEPAGES
>> 1537 help
>> 1538 MIPS Technologies R4000-series processors other than 4300, including
>> 1539 the R4000, R4400, R4600, and 4700.
>> 1540
>> 1541 config CPU_TX49XX
>> 1542 bool "R49XX"
>> 1543 depends on SYS_HAS_CPU_TX49XX
>> 1544 select CPU_HAS_PREFETCH
>> 1545 select CPU_SUPPORTS_32BIT_KERNEL
>> 1546 select CPU_SUPPORTS_64BIT_KERNEL
>> 1547 select CPU_SUPPORTS_HUGEPAGES
>> 1548
>> 1549 config CPU_R5000
>> 1550 bool "R5000"
>> 1551 depends on SYS_HAS_CPU_R5000
>> 1552 select CPU_SUPPORTS_32BIT_KERNEL
>> 1553 select CPU_SUPPORTS_64BIT_KERNEL
>> 1554 select CPU_SUPPORTS_HUGEPAGES
>> 1555 help
>> 1556 MIPS Technologies R5000-series processors other than the Nevada.
>> 1557
>> 1558 config CPU_R5500
>> 1559 bool "R5500"
>> 1560 depends on SYS_HAS_CPU_R5500
>> 1561 select CPU_SUPPORTS_32BIT_KERNEL
>> 1562 select CPU_SUPPORTS_64BIT_KERNEL
>> 1563 select CPU_SUPPORTS_HUGEPAGES
>> 1564 help
>> 1565 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1566 instruction set.
>> 1567
>> 1568 config CPU_NEVADA
>> 1569 bool "RM52xx"
>> 1570 depends on SYS_HAS_CPU_NEVADA
>> 1571 select CPU_SUPPORTS_32BIT_KERNEL
>> 1572 select CPU_SUPPORTS_64BIT_KERNEL
>> 1573 select CPU_SUPPORTS_HUGEPAGES
>> 1574 help
>> 1575 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1576
>> 1577 config CPU_R10000
>> 1578 bool "R10000"
>> 1579 depends on SYS_HAS_CPU_R10000
>> 1580 select CPU_HAS_PREFETCH
>> 1581 select CPU_SUPPORTS_32BIT_KERNEL
>> 1582 select CPU_SUPPORTS_64BIT_KERNEL
>> 1583 select CPU_SUPPORTS_HIGHMEM
>> 1584 select CPU_SUPPORTS_HUGEPAGES
>> 1585 help
>> 1586 MIPS Technologies R10000-series processors.
>> 1587
>> 1588 config CPU_RM7000
>> 1589 bool "RM7000"
>> 1590 depends on SYS_HAS_CPU_RM7000
>> 1591 select CPU_HAS_PREFETCH
>> 1592 select CPU_SUPPORTS_32BIT_KERNEL
>> 1593 select CPU_SUPPORTS_64BIT_KERNEL
>> 1594 select CPU_SUPPORTS_HIGHMEM
>> 1595 select CPU_SUPPORTS_HUGEPAGES
>> 1596
>> 1597 config CPU_SB1
>> 1598 bool "SB1"
>> 1599 depends on SYS_HAS_CPU_SB1
>> 1600 select CPU_SUPPORTS_32BIT_KERNEL
>> 1601 select CPU_SUPPORTS_64BIT_KERNEL
>> 1602 select CPU_SUPPORTS_HIGHMEM
>> 1603 select CPU_SUPPORTS_HUGEPAGES
>> 1604 select WEAK_ORDERING
>> 1605
>> 1606 config CPU_CAVIUM_OCTEON
>> 1607 bool "Cavium Octeon processor"
>> 1608 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1609 select CPU_HAS_PREFETCH
>> 1610 select CPU_SUPPORTS_64BIT_KERNEL
>> 1611 select WEAK_ORDERING
>> 1612 select CPU_SUPPORTS_HIGHMEM
>> 1613 select CPU_SUPPORTS_HUGEPAGES
>> 1614 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1615 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1616 select MIPS_L1_CACHE_SHIFT_7
>> 1617 select HAVE_KVM
>> 1618 help
>> 1619 The Cavium Octeon processor is a highly integrated chip containing
>> 1620 many ethernet hardware widgets for networking tasks. The processor
>> 1621 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1622 Full details can be found at http://www.caviumnetworks.com.
>> 1623
>> 1624 config CPU_BMIPS
>> 1625 bool "Broadcom BMIPS"
>> 1626 depends on SYS_HAS_CPU_BMIPS
>> 1627 select CPU_MIPS32
>> 1628 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1629 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1630 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1631 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1632 select CPU_SUPPORTS_32BIT_KERNEL
>> 1633 select DMA_NONCOHERENT
>> 1634 select IRQ_MIPS_CPU
>> 1635 select SWAP_IO_SPACE
>> 1636 select WEAK_ORDERING
>> 1637 select CPU_SUPPORTS_HIGHMEM
>> 1638 select CPU_HAS_PREFETCH
>> 1639 select CPU_SUPPORTS_CPUFREQ
>> 1640 select MIPS_EXTERNAL_TIMER
>> 1641 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
850 help 1642 help
851 If virtualized under KVM, disable ho !! 1643 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1644
>> 1645 endchoice
852 1646
853 config PVH !! 1647 config CPU_MIPS32_3_5_FEATURES
854 bool "Support for running PVH guests" !! 1648 bool "MIPS32 Release 3.5 Features"
>> 1649 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1650 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
>> 1651 CPU_P5600
>> 1652 help
>> 1653 Choose this option to build a kernel for release 2 or later of the
>> 1654 MIPS32 architecture including features from the 3.5 release such as
>> 1655 support for Enhanced Virtual Addressing (EVA).
>> 1656
>> 1657 config CPU_MIPS32_3_5_EVA
>> 1658 bool "Enhanced Virtual Addressing (EVA)"
>> 1659 depends on CPU_MIPS32_3_5_FEATURES
>> 1660 select EVA
>> 1661 default y
>> 1662 help
>> 1663 Choose this option if you want to enable the Enhanced Virtual
>> 1664 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1665 One of its primary benefits is an increase in the maximum size
>> 1666 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1667
>> 1668 config CPU_MIPS32_R5_FEATURES
>> 1669 bool "MIPS32 Release 5 Features"
>> 1670 depends on SYS_HAS_CPU_MIPS32_R5
>> 1671 depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
>> 1672 help
>> 1673 Choose this option to build a kernel for release 2 or later of the
>> 1674 MIPS32 architecture including features from release 5 such as
>> 1675 support for Extended Physical Addressing (XPA).
>> 1676
>> 1677 config CPU_MIPS32_R5_XPA
>> 1678 bool "Extended Physical Addressing (XPA)"
>> 1679 depends on CPU_MIPS32_R5_FEATURES
>> 1680 depends on !EVA
>> 1681 depends on !PAGE_SIZE_4KB
>> 1682 depends on SYS_SUPPORTS_HIGHMEM
>> 1683 select XPA
>> 1684 select HIGHMEM
>> 1685 select PHYS_ADDR_T_64BIT
>> 1686 default n
855 help 1687 help
856 This option enables the PVH entry po !! 1688 Choose this option if you want to enable the Extended Physical
857 as specified in the x86/HVM direct b !! 1689 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
858 !! 1690 benefit is to increase physical addressing equal to or greater
859 config PARAVIRT_TIME_ACCOUNTING !! 1691 than 40 bits. Note that this has the side effect of turning on
860 bool "Paravirtual steal time accountin !! 1692 64-bit addressing which in turn makes the PTEs 64-bit in size.
861 depends on PARAVIRT !! 1693 If unsure, say 'N' here.
862 help <<
863 Select this option to enable fine gr <<
864 accounting. Time spent executing oth <<
865 the current vCPU is discounted from <<
866 that, there can be a small performan <<
867 <<
868 If in doubt, say N here. <<
869 <<
870 config PARAVIRT_CLOCK <<
871 bool <<
872 <<
873 config JAILHOUSE_GUEST <<
874 bool "Jailhouse non-root cell support" <<
875 depends on X86_64 && PCI <<
876 select X86_PM_TIMER <<
877 help <<
878 This option allows to run Linux as g <<
879 cell. You can leave this option disa <<
880 Jailhouse and run Linux afterwards i <<
881 <<
882 config ACRN_GUEST <<
883 bool "ACRN Guest support" <<
884 depends on X86_64 <<
885 select X86_HV_CALLBACK_VECTOR <<
886 help <<
887 This option allows to run Linux as g <<
888 a flexible, lightweight reference op <<
889 real-time and safety-criticality in <<
890 IOT with small footprint and real-ti <<
891 found in https://projectacrn.org/. <<
892 <<
893 config INTEL_TDX_GUEST <<
894 bool "Intel TDX (Trust Domain Extensio <<
895 depends on X86_64 && CPU_SUP_INTEL <<
896 depends on X86_X2APIC <<
897 depends on EFI_STUB <<
898 select ARCH_HAS_CC_PLATFORM <<
899 select X86_MEM_ENCRYPT <<
900 select X86_MCE <<
901 select UNACCEPTED_MEMORY <<
902 help <<
903 Support running as a guest under Int <<
904 the guest kernel can not boot or run <<
905 TDX includes memory encryption and i <<
906 which protect the confidentiality an <<
907 memory contents and CPU state. TDX g <<
908 some attacks from the VMM. <<
909 <<
910 endif # HYPERVISOR_GUEST <<
911 <<
912 source "arch/x86/Kconfig.cpu" <<
913 <<
914 config HPET_TIMER <<
915 def_bool X86_64 <<
916 prompt "HPET Timer Support" if X86_32 <<
917 help <<
918 Use the IA-PC HPET (High Precision E <<
919 time in preference to the PIT and RT <<
920 present. <<
921 HPET is the next generation timer re <<
922 The HPET provides a stable time base <<
923 systems, unlike the TSC, but it is m <<
924 as it is off-chip. The interface us <<
925 in the HPET spec, revision 1. <<
926 <<
927 You can safely choose Y here. Howev <<
928 activated if the platform and the BI <<
929 Otherwise the 8254 will be used for <<
930 1694
931 Choose N to continue using the legac !! 1695 if CPU_LOONGSON2F
>> 1696 config CPU_NOP_WORKAROUNDS
>> 1697 bool
932 1698
933 config HPET_EMULATE_RTC !! 1699 config CPU_JUMP_WORKAROUNDS
934 def_bool y !! 1700 bool
935 depends on HPET_TIMER && (RTC_DRV_CMOS <<
936 1701
937 # Mark as expert because too many people got i !! 1702 config CPU_LOONGSON2F_WORKAROUNDS
938 # The code disables itself when not needed. !! 1703 bool "Loongson 2F Workarounds"
939 config DMI <<
940 default y 1704 default y
941 select DMI_SCAN_MACHINE_NON_EFI_FALLBA !! 1705 select CPU_NOP_WORKAROUNDS
942 bool "Enable DMI scanning" if EXPERT !! 1706 select CPU_JUMP_WORKAROUNDS
943 help 1707 help
944 Enabled scanning of DMI to identify !! 1708 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
945 here unless you have verified that y !! 1709 require workarounds. Without workarounds the system may hang
946 affected by entries in the DMI black !! 1710 unexpectedly. For more information please refer to the gas
947 BIOS code. !! 1711 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1712
>> 1713 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1714 are needed. The workarounds have no significant side effect on them
>> 1715 but may decrease the performance of the system so this option should
>> 1716 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1717 systems.
948 1718
949 config GART_IOMMU !! 1719 If unsure, please say Y.
950 bool "Old AMD GART IOMMU support" !! 1720 endif # CPU_LOONGSON2F
951 select IOMMU_HELPER <<
952 select SWIOTLB <<
953 depends on X86_64 && PCI && AMD_NB <<
954 help <<
955 Provides a driver for older AMD Athl <<
956 GART based hardware IOMMUs. <<
957 1721
958 The GART supports full DMA access fo !! 1722 config SYS_SUPPORTS_ZBOOT
959 limitations, on systems with more th !! 1723 bool
960 for USB, sound, many IDE/SATA chipse !! 1724 select HAVE_KERNEL_GZIP
>> 1725 select HAVE_KERNEL_BZIP2
>> 1726 select HAVE_KERNEL_LZ4
>> 1727 select HAVE_KERNEL_LZMA
>> 1728 select HAVE_KERNEL_LZO
>> 1729 select HAVE_KERNEL_XZ
>> 1730 select HAVE_KERNEL_ZSTD
961 1731
962 Newer systems typically have a moder !! 1732 config SYS_SUPPORTS_ZBOOT_UART16550
963 the CONFIG_AMD_IOMMU=y config option !! 1733 bool
>> 1734 select SYS_SUPPORTS_ZBOOT
964 1735
965 In normal configurations this driver !! 1736 config SYS_SUPPORTS_ZBOOT_UART_PROM
966 there's more than 3 GB of memory and !! 1737 bool
967 32-bit limited device. !! 1738 select SYS_SUPPORTS_ZBOOT
968 1739
969 If unsure, say Y. !! 1740 config CPU_LOONGSON2EF
>> 1741 bool
>> 1742 select CPU_SUPPORTS_32BIT_KERNEL
>> 1743 select CPU_SUPPORTS_64BIT_KERNEL
>> 1744 select CPU_SUPPORTS_HIGHMEM
>> 1745 select CPU_SUPPORTS_HUGEPAGES
970 1746
971 config BOOT_VESA_SUPPORT !! 1747 config CPU_LOONGSON32
972 bool 1748 bool
973 help !! 1749 select CPU_MIPS32
974 If true, at least one selected frame !! 1750 select CPU_MIPSR2
975 of VESA video modes set at an early !! 1751 select CPU_HAS_PREFETCH
>> 1752 select CPU_SUPPORTS_32BIT_KERNEL
>> 1753 select CPU_SUPPORTS_HIGHMEM
>> 1754 select CPU_SUPPORTS_CPUFREQ
976 1755
977 config MAXSMP !! 1756 config CPU_BMIPS32_3300
978 bool "Enable Maximum number of SMP Pro !! 1757 select SMP_UP if SMP
979 depends on X86_64 && SMP && DEBUG_KERN !! 1758 bool
980 select CPUMASK_OFFSTACK <<
981 help <<
982 Enable maximum number of CPUS and NU <<
983 If unsure, say N. <<
984 1759
985 # !! 1760 config CPU_BMIPS4350
986 # The maximum number of CPUs supported: !! 1761 bool
987 # !! 1762 select SYS_SUPPORTS_SMP
988 # The main config value is NR_CPUS, which defa !! 1763 select SYS_SUPPORTS_HOTPLUG_CPU
989 # and which can be configured interactively in <<
990 # [NR_CPUS_RANGE_BEGIN ... NR_CPUS_RANGE_END] <<
991 # <<
992 # The ranges are different on 32-bit and 64-bi <<
993 # hardware capabilities and scalability featur <<
994 # <<
995 # ( If MAXSMP is enabled we just use the highe <<
996 # interactive configuration. ) <<
997 # <<
998 1764
999 config NR_CPUS_RANGE_BEGIN !! 1765 config CPU_BMIPS4380
1000 int !! 1766 bool
1001 default NR_CPUS_RANGE_END if MAXSMP !! 1767 select MIPS_L1_CACHE_SHIFT_6
1002 default 1 if !SMP !! 1768 select SYS_SUPPORTS_SMP
1003 default 2 !! 1769 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1770 select CPU_HAS_RIXI
1004 1771
1005 config NR_CPUS_RANGE_END !! 1772 config CPU_BMIPS5000
1006 int !! 1773 bool
1007 depends on X86_32 !! 1774 select MIPS_CPU_SCACHE
1008 default 64 if SMP && X86_BIGSMP !! 1775 select MIPS_L1_CACHE_SHIFT_7
1009 default 8 if SMP && !X86_BIGSMP !! 1776 select SYS_SUPPORTS_SMP
1010 default 1 if !SMP !! 1777 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1778 select CPU_HAS_RIXI
1011 1779
1012 config NR_CPUS_RANGE_END !! 1780 config SYS_HAS_CPU_LOONGSON64
1013 int !! 1781 bool
1014 depends on X86_64 !! 1782 select CPU_SUPPORTS_CPUFREQ
1015 default 8192 if SMP && CPUMASK_OFFST !! 1783 select CPU_HAS_RIXI
1016 default 512 if SMP && !CPUMASK_OFFS <<
1017 default 1 if !SMP <<
1018 1784
1019 config NR_CPUS_DEFAULT !! 1785 config SYS_HAS_CPU_LOONGSON2E
1020 int !! 1786 bool
1021 depends on X86_32 <<
1022 default 32 if X86_BIGSMP <<
1023 default 8 if SMP <<
1024 default 1 if !SMP <<
1025 1787
1026 config NR_CPUS_DEFAULT !! 1788 config SYS_HAS_CPU_LOONGSON2F
1027 int !! 1789 bool
1028 depends on X86_64 !! 1790 select CPU_SUPPORTS_CPUFREQ
1029 default 8192 if MAXSMP !! 1791 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1030 default 64 if SMP <<
1031 default 1 if !SMP <<
1032 1792
1033 config NR_CPUS !! 1793 config SYS_HAS_CPU_LOONGSON1B
1034 int "Maximum number of CPUs" if SMP & !! 1794 bool
1035 range NR_CPUS_RANGE_BEGIN NR_CPUS_RAN <<
1036 default NR_CPUS_DEFAULT <<
1037 help <<
1038 This allows you to specify the maxi <<
1039 kernel will support. If CPUMASK_OF <<
1040 supported value is 8192, otherwise <<
1041 minimum value which makes sense is <<
1042 1795
1043 This is purely to save memory: each !! 1796 config SYS_HAS_CPU_LOONGSON1C
1044 to the kernel image. !! 1797 bool
1045 1798
1046 config SCHED_CLUSTER !! 1799 config SYS_HAS_CPU_MIPS32_R1
1047 bool "Cluster scheduler support" !! 1800 bool
1048 depends on SMP <<
1049 default y <<
1050 help <<
1051 Cluster scheduler support improves <<
1052 making when dealing with machines t <<
1053 Cluster usually means a couple of C <<
1054 by sharing mid-level caches, last-l <<
1055 busses. <<
1056 1801
1057 config SCHED_SMT !! 1802 config SYS_HAS_CPU_MIPS32_R2
1058 def_bool y if SMP !! 1803 bool
1059 1804
1060 config SCHED_MC !! 1805 config SYS_HAS_CPU_MIPS32_R3_5
1061 def_bool y !! 1806 bool
1062 prompt "Multi-core scheduler support" <<
1063 depends on SMP <<
1064 help <<
1065 Multi-core scheduler support improv <<
1066 making when dealing with multi-core <<
1067 increased overhead in some places. <<
1068 1807
1069 config SCHED_MC_PRIO !! 1808 config SYS_HAS_CPU_MIPS32_R5
1070 bool "CPU core priorities scheduler s !! 1809 bool
1071 depends on SCHED_MC <<
1072 select X86_INTEL_PSTATE if CPU_SUP_IN <<
1073 select X86_AMD_PSTATE if CPU_SUP_AMD <<
1074 select CPU_FREQ <<
1075 default y <<
1076 help <<
1077 Intel Turbo Boost Max Technology 3. <<
1078 core ordering determined at manufac <<
1079 certain cores to reach higher turbo <<
1080 single threaded workloads) than oth <<
1081 1810
1082 Enabling this kernel feature teache !! 1811 config SYS_HAS_CPU_MIPS32_R6
1083 the TBM3 (aka ITMT) priority order !! 1812 bool
1084 scheduler's CPU selection logic acc <<
1085 overall system performance can be a <<
1086 1813
1087 This feature will have no effect on !! 1814 config SYS_HAS_CPU_MIPS64_R1
>> 1815 bool
1088 1816
1089 If unsure say Y here. !! 1817 config SYS_HAS_CPU_MIPS64_R2
>> 1818 bool
1090 1819
1091 config UP_LATE_INIT !! 1820 config SYS_HAS_CPU_MIPS64_R5
1092 def_bool y !! 1821 bool
1093 depends on !SMP && X86_LOCAL_APIC <<
1094 1822
1095 config X86_UP_APIC !! 1823 config SYS_HAS_CPU_MIPS64_R6
1096 bool "Local APIC support on uniproces !! 1824 bool
1097 default PCI_MSI <<
1098 depends on X86_32 && !SMP && !X86_32_ <<
1099 help <<
1100 A local APIC (Advanced Programmable <<
1101 integrated interrupt controller in <<
1102 system which has a processor with a <<
1103 enable and use it. If you say Y her <<
1104 have a local APIC, then the kernel <<
1105 all. The local APIC supports CPU-ge <<
1106 performance counters), and the NMI <<
1107 lockups. <<
1108 <<
1109 config X86_UP_IOAPIC <<
1110 bool "IO-APIC support on uniprocessor <<
1111 depends on X86_UP_APIC <<
1112 help <<
1113 An IO-APIC (I/O Advanced Programmab <<
1114 SMP-capable replacement for PC-styl <<
1115 SMP systems and many recent uniproc <<
1116 <<
1117 If you have a single-CPU system wit <<
1118 to use it. If you say Y here even t <<
1119 an IO-APIC, then the kernel will st <<
1120 1825
1121 config X86_LOCAL_APIC !! 1826 config SYS_HAS_CPU_P5600
1122 def_bool y !! 1827 bool
1123 depends on X86_64 || SMP || X86_32_NO <<
1124 select IRQ_DOMAIN_HIERARCHY <<
1125 1828
1126 config ACPI_MADT_WAKEUP !! 1829 config SYS_HAS_CPU_R3000
1127 def_bool y !! 1830 bool
1128 depends on X86_64 <<
1129 depends on ACPI <<
1130 depends on SMP <<
1131 depends on X86_LOCAL_APIC <<
1132 1831
1133 config X86_IO_APIC !! 1832 config SYS_HAS_CPU_R4300
1134 def_bool y !! 1833 bool
1135 depends on X86_LOCAL_APIC || X86_UP_I <<
1136 1834
1137 config X86_REROUTE_FOR_BROKEN_BOOT_IRQS !! 1835 config SYS_HAS_CPU_R4X00
1138 bool "Reroute for broken boot IRQs" !! 1836 bool
1139 depends on X86_IO_APIC <<
1140 help <<
1141 This option enables a workaround th <<
1142 spurious interrupts. This is recomm <<
1143 interrupt handling is used on syste <<
1144 superfluous "boot interrupts" canno <<
1145 <<
1146 Some chipsets generate a legacy INT <<
1147 entry in the chipset's IO-APIC is m <<
1148 kernel does during interrupt handli <<
1149 boot IRQ generation cannot be disab <<
1150 the original IRQ line masked so tha <<
1151 IRQ" is delivered to the CPUs. The <<
1152 kernel to set up the IRQ handler on <<
1153 way only one interrupt is delivered <<
1154 the spurious second interrupt may c <<
1155 down (vital) interrupt lines. <<
1156 <<
1157 Only affects "broken" chipsets. Int <<
1158 increased on these systems. <<
1159 <<
1160 config X86_MCE <<
1161 bool "Machine Check / overheating rep <<
1162 select GENERIC_ALLOCATOR <<
1163 default y <<
1164 help <<
1165 Machine Check support allows the pr <<
1166 kernel if it detects a problem (e.g <<
1167 The action the kernel takes depends <<
1168 ranging from warning messages to ha <<
1169 <<
1170 config X86_MCELOG_LEGACY <<
1171 bool "Support for deprecated /dev/mce <<
1172 depends on X86_MCE <<
1173 help <<
1174 Enable support for /dev/mcelog whic <<
1175 userspace logging daemon. Consider <<
1176 rasdaemon solution. <<
1177 1837
1178 config X86_MCE_INTEL !! 1838 config SYS_HAS_CPU_TX49XX
1179 def_bool y !! 1839 bool
1180 prompt "Intel MCE features" <<
1181 depends on X86_MCE && X86_LOCAL_APIC <<
1182 help <<
1183 Additional support for intel specif <<
1184 the thermal monitor. <<
1185 1840
1186 config X86_MCE_AMD !! 1841 config SYS_HAS_CPU_R5000
1187 def_bool y !! 1842 bool
1188 prompt "AMD MCE features" <<
1189 depends on X86_MCE && X86_LOCAL_APIC <<
1190 help <<
1191 Additional support for AMD specific <<
1192 the DRAM Error Threshold. <<
1193 1843
1194 config X86_ANCIENT_MCE !! 1844 config SYS_HAS_CPU_R5500
1195 bool "Support for old Pentium 5 / Win !! 1845 bool
1196 depends on X86_32 && X86_MCE <<
1197 help <<
1198 Include support for machine check h <<
1199 systems. These typically need to be <<
1200 line. <<
1201 1846
1202 config X86_MCE_THRESHOLD !! 1847 config SYS_HAS_CPU_NEVADA
1203 depends on X86_MCE_AMD || X86_MCE_INT !! 1848 bool
1204 def_bool y <<
1205 1849
1206 config X86_MCE_INJECT !! 1850 config SYS_HAS_CPU_R10000
1207 depends on X86_MCE && X86_LOCAL_APIC !! 1851 bool
1208 tristate "Machine check injector supp <<
1209 help <<
1210 Provide support for injecting machi <<
1211 If you don't know what a machine ch <<
1212 QA it is safe to say n. <<
1213 1852
1214 source "arch/x86/events/Kconfig" !! 1853 config SYS_HAS_CPU_RM7000
>> 1854 bool
1215 1855
1216 config X86_LEGACY_VM86 !! 1856 config SYS_HAS_CPU_SB1
1217 bool "Legacy VM86 support" !! 1857 bool
1218 depends on X86_32 <<
1219 help <<
1220 This option allows user programs to <<
1221 mode, which is an 80286-era approxi <<
1222 1858
1223 Some very old versions of X and/or !! 1859 config SYS_HAS_CPU_CAVIUM_OCTEON
1224 for user mode setting. Similarly, !! 1860 bool
1225 available to accelerate real mode D <<
1226 recent version of DOSEMU, X, or vbe <<
1227 functional even without kernel VM86 <<
1228 fall back to software emulation. Ne <<
1229 a 16-bit DOS program where 16-bit p <<
1230 mode might be faster than emulation <<
1231 enable this option. <<
1232 1861
1233 Note that any app that works on a 6 !! 1862 config SYS_HAS_CPU_BMIPS
1234 need this option, as 64-bit kernels !! 1863 bool
1235 V8086 mode. This option is also unr <<
1236 mode and is not needed to run most <<
1237 1864
1238 Enabling this option increases the !! 1865 config SYS_HAS_CPU_BMIPS32_3300
1239 and slows down exception handling a !! 1866 bool
>> 1867 select SYS_HAS_CPU_BMIPS
1240 1868
1241 If unsure, say N here. !! 1869 config SYS_HAS_CPU_BMIPS4350
>> 1870 bool
>> 1871 select SYS_HAS_CPU_BMIPS
1242 1872
1243 config VM86 !! 1873 config SYS_HAS_CPU_BMIPS4380
1244 bool 1874 bool
1245 default X86_LEGACY_VM86 !! 1875 select SYS_HAS_CPU_BMIPS
1246 1876
1247 config X86_16BIT !! 1877 config SYS_HAS_CPU_BMIPS5000
1248 bool "Enable support for 16-bit segme !! 1878 bool
1249 default y !! 1879 select SYS_HAS_CPU_BMIPS
1250 depends on MODIFY_LDT_SYSCALL <<
1251 help <<
1252 This option is required by programs <<
1253 protected mode legacy code on x86 p <<
1254 this option saves about 300 bytes o <<
1255 plus 16K runtime memory on x86-64, <<
1256 1880
1257 config X86_ESPFIX32 !! 1881 #
1258 def_bool y !! 1882 # CPU may reorder R->R, R->W, W->R, W->W
1259 depends on X86_16BIT && X86_32 !! 1883 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1884 #
>> 1885 config WEAK_ORDERING
>> 1886 bool
1260 1887
1261 config X86_ESPFIX64 !! 1888 #
1262 def_bool y !! 1889 # CPU may reorder reads and writes beyond LL/SC
1263 depends on X86_16BIT && X86_64 !! 1890 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1891 #
>> 1892 config WEAK_REORDERING_BEYOND_LLSC
>> 1893 bool
>> 1894 endmenu
1264 1895
1265 config X86_VSYSCALL_EMULATION !! 1896 #
1266 bool "Enable vsyscall emulation" if E !! 1897 # These two indicate any level of the MIPS32 and MIPS64 architecture
1267 default y !! 1898 #
1268 depends on X86_64 !! 1899 config CPU_MIPS32
1269 help !! 1900 bool
1270 This enables emulation of the legac !! 1901 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1271 it is roughly equivalent to booting !! 1902 CPU_MIPS32_R6 || CPU_P5600
1272 that it will also disable the helpf <<
1273 tries to use a vsyscall. With this <<
1274 programs will just segfault, citing <<
1275 0xffffffffff600?00. <<
1276 1903
1277 This option is required by many pro !! 1904 config CPU_MIPS64
1278 care should be used even with newer !! 1905 bool
>> 1906 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
>> 1907 CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1279 1908
1280 Disabling this option saves about 7 !! 1909 #
1281 possibly 4K of additional runtime p !! 1910 # These indicate the revision of the architecture
>> 1911 #
>> 1912 config CPU_MIPSR1
>> 1913 bool
>> 1914 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1282 1915
1283 config X86_IOPL_IOPERM !! 1916 config CPU_MIPSR2
1284 bool "IOPERM and IOPL Emulation" !! 1917 bool
1285 default y !! 1918 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 1919 select CPU_HAS_RIXI
>> 1920 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1921 select MIPS_SPRAM
>> 1922
>> 1923 config CPU_MIPSR5
>> 1924 bool
>> 1925 default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
>> 1926 select CPU_HAS_RIXI
>> 1927 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1928 select MIPS_SPRAM
>> 1929
>> 1930 config CPU_MIPSR6
>> 1931 bool
>> 1932 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 1933 select CPU_HAS_RIXI
>> 1934 select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
>> 1935 select HAVE_ARCH_BITREVERSE
>> 1936 select MIPS_ASID_BITS_VARIABLE
>> 1937 select MIPS_CRC_SUPPORT
>> 1938 select MIPS_SPRAM
>> 1939
>> 1940 config TARGET_ISA_REV
>> 1941 int
>> 1942 default 1 if CPU_MIPSR1
>> 1943 default 2 if CPU_MIPSR2
>> 1944 default 5 if CPU_MIPSR5
>> 1945 default 6 if CPU_MIPSR6
>> 1946 default 0
1286 help 1947 help
1287 This enables the ioperm() and iopl( !! 1948 Reflects the ISA revision being targeted by the kernel build. This
1288 for legacy applications. !! 1949 is effectively the Kconfig equivalent of MIPS_ISA_REV.
1289 1950
1290 Legacy IOPL support is an overbroad !! 1951 config EVA
1291 space aside of accessing all 65536 !! 1952 bool
1292 interrupts. To gain this access the <<
1293 capabilities and permission from po <<
1294 modules. <<
1295 <<
1296 The emulation restricts the functio <<
1297 only allowing the full range I/O po <<
1298 ability to disable interrupts from <<
1299 granted if the hardware IOPL mechan <<
1300 <<
1301 config TOSHIBA <<
1302 tristate "Toshiba Laptop support" <<
1303 depends on X86_32 <<
1304 help <<
1305 This adds a driver to safely access <<
1306 the CPU on Toshiba portables with a <<
1307 not work on models with a Phoenix B <<
1308 is used to set the BIOS and power s <<
1309 <<
1310 For information on utilities to mak <<
1311 Toshiba Linux utilities web site at <<
1312 <http://www.buzzard.org.uk/toshiba/ <<
1313 <<
1314 Say Y if you intend to run this ker <<
1315 Say N otherwise. <<
1316 <<
1317 config X86_REBOOTFIXUPS <<
1318 bool "Enable X86 board specific fixup <<
1319 depends on X86_32 <<
1320 help <<
1321 This enables chipset and/or board s <<
1322 in order to get reboot to work corr <<
1323 some combinations of hardware and B <<
1324 this config is intended, is when re <<
1325 system. <<
1326 <<
1327 Currently, the only fixup is for th <<
1328 CS5530A and CS5536 chipsets and the <<
1329 <<
1330 Say Y if you want to enable the fix <<
1331 enable this option even if you don' <<
1332 Say N otherwise. <<
1333 1953
1334 config MICROCODE !! 1954 config XPA
1335 def_bool y !! 1955 bool
1336 depends on CPU_SUP_AMD || CPU_SUP_INT <<
1337 1956
1338 config MICROCODE_INITRD32 !! 1957 config SYS_SUPPORTS_32BIT_KERNEL
1339 def_bool y !! 1958 bool
1340 depends on MICROCODE && X86_32 && BLK !! 1959 config SYS_SUPPORTS_64BIT_KERNEL
>> 1960 bool
>> 1961 config CPU_SUPPORTS_32BIT_KERNEL
>> 1962 bool
>> 1963 config CPU_SUPPORTS_64BIT_KERNEL
>> 1964 bool
>> 1965 config CPU_SUPPORTS_CPUFREQ
>> 1966 bool
>> 1967 config CPU_SUPPORTS_ADDRWINCFG
>> 1968 bool
>> 1969 config CPU_SUPPORTS_HUGEPAGES
>> 1970 bool
>> 1971 depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
>> 1972 config MIPS_PGD_C0_CONTEXT
>> 1973 bool
>> 1974 depends on 64BIT
>> 1975 default y if (CPU_MIPSR2 || CPU_MIPSR6)
1341 1976
1342 config MICROCODE_LATE_LOADING !! 1977 #
1343 bool "Late microcode loading (DANGERO !! 1978 # Set to y for ptrace access to watch registers.
1344 default n !! 1979 #
1345 depends on MICROCODE && SMP !! 1980 config HARDWARE_WATCHPOINTS
>> 1981 bool
>> 1982 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 1983
>> 1984 menu "Kernel type"
>> 1985
>> 1986 choice
>> 1987 prompt "Kernel code model"
>> 1988 help
>> 1989 You should only select this option if you have a workload that
>> 1990 actually benefits from 64-bit processing or if your machine has
>> 1991 large memory. You will only be presented a single option in this
>> 1992 menu if your system does not support both 32-bit and 64-bit kernels.
>> 1993
>> 1994 config 32BIT
>> 1995 bool "32-bit kernel"
>> 1996 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 1997 select TRAD_SIGNALS
1346 help 1998 help
1347 Loading microcode late, when the sy !! 1999 Select this option if you want to build a 32-bit kernel.
1348 is a tricky business and should be <<
1349 of synchronizing all cores and SMT <<
1350 not guarantee that cores might not <<
1351 use this at your own risk. Late loa <<
1352 microcode header indicates that it <<
1353 minimal revision check. This minima <<
1354 the kernel command line with "micro <<
1355 2000
1356 config MICROCODE_LATE_FORCE_MINREV !! 2001 config 64BIT
1357 bool "Enforce late microcode loading !! 2002 bool "64-bit kernel"
1358 default n !! 2003 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1359 depends on MICROCODE_LATE_LOADING <<
1360 help 2004 help
1361 To prevent that users load microcod !! 2005 Select this option if you want to build a 64-bit kernel.
1362 in use features, newer microcode pa !! 2006
1363 in the microcode header, which tell !! 2007 endchoice
1364 revision must be active in the CPU <<
1365 late into the running system. If di <<
1366 be enforced but the kernel will be <<
1367 revision check fails. <<
1368 <<
1369 This minimal revision check can als <<
1370 "microcode.minrev" parameter on the <<
1371 <<
1372 If unsure say Y. <<
1373 <<
1374 config X86_MSR <<
1375 tristate "/dev/cpu/*/msr - Model-spec <<
1376 help <<
1377 This device gives privileged proces <<
1378 Model-Specific Registers (MSRs). I <<
1379 major 202 and minors 0 to 31 for /d <<
1380 MSR accesses are directed to a spec <<
1381 systems. <<
1382 2008
1383 config X86_CPUID !! 2009 config MIPS_VA_BITS_48
1384 tristate "/dev/cpu/*/cpuid - CPU info !! 2010 bool "48 bits virtual memory"
>> 2011 depends on 64BIT
1385 help 2012 help
1386 This device gives processes access !! 2013 Support a maximum at least 48 bits of application virtual
1387 be executed on a specific processor !! 2014 memory. Default is 40 bits or less, depending on the CPU.
1388 with major 203 and minors 0 to 31 f !! 2015 For page sizes 16k and above, this option results in a small
1389 /dev/cpu/31/cpuid. !! 2016 memory overhead for page tables. For 4k page size, a fourth
>> 2017 level of page tables is added which imposes both a memory
>> 2018 overhead as well as slower TLB fault handling.
1390 2019
1391 choice !! 2020 If unsure, say N.
1392 prompt "High Memory Support" !! 2021
1393 default HIGHMEM4G !! 2022 config ZBOOT_LOAD_ADDRESS
1394 depends on X86_32 !! 2023 hex "Compressed kernel load address"
1395 !! 2024 default 0xffffffff80400000 if BCM47XX
1396 config NOHIGHMEM !! 2025 default 0x0
1397 bool "off" !! 2026 depends on SYS_SUPPORTS_ZBOOT
1398 help <<
1399 Linux can use up to 64 Gigabytes of <<
1400 However, the address space of 32-bi <<
1401 Gigabytes large. That means that, i <<
1402 physical memory, not all of it can <<
1403 kernel. The physical memory that's <<
1404 "high memory". <<
1405 <<
1406 If you are compiling a kernel which <<
1407 more than 1 Gigabyte total physical <<
1408 choice and suitable for most users) <<
1409 split: 3GB are mapped so that each <<
1410 space and the remaining part of the <<
1411 by the kernel to permanently map as <<
1412 possible. <<
1413 <<
1414 If the machine has between 1 and 4 <<
1415 answer "4GB" here. <<
1416 <<
1417 If more than 4 Gigabytes is used th <<
1418 selection turns Intel PAE (Physical <<
1419 PAE implements 3-level paging on IA <<
1420 supported by Linux, PAE mode is imp <<
1421 processors (Pentium Pro and better) <<
1422 then the kernel will not boot on CP <<
1423 <<
1424 The actual amount of total physical <<
1425 auto detected or can be forced by u <<
1426 such as "mem=256M". (Try "man bootp <<
1427 your boot loader (lilo or loadlin) <<
1428 kernel at boot time.) <<
1429 <<
1430 If unsure, say "off". <<
1431 <<
1432 config HIGHMEM4G <<
1433 bool "4GB" <<
1434 help <<
1435 Select this if you have a 32-bit pr <<
1436 gigabytes of physical RAM. <<
1437 <<
1438 config HIGHMEM64G <<
1439 bool "64GB" <<
1440 depends on X86_HAVE_PAE <<
1441 select X86_PAE <<
1442 help 2027 help
1443 Select this if you have a 32-bit pr !! 2028 The address to load compressed kernel, aka vmlinuz.
1444 gigabytes of physical RAM. <<
1445 2029
1446 endchoice !! 2030 This is only used if non-zero.
1447 2031
1448 choice 2032 choice
1449 prompt "Memory split" if EXPERT !! 2033 prompt "Kernel page size"
1450 default VMSPLIT_3G !! 2034 default PAGE_SIZE_4KB
1451 depends on X86_32 <<
1452 help <<
1453 Select the desired split between ke <<
1454 <<
1455 If the address range available to t <<
1456 physical memory installed, the rema <<
1457 as "high memory". Accessing high me <<
1458 than low memory, as it needs to be <<
1459 Note that increasing the kernel add <<
1460 available to user programs, making <<
1461 tighter. Selecting anything other <<
1462 will also likely make your kernel i <<
1463 kernel modules. <<
1464 <<
1465 If you are not absolutely sure what <<
1466 option alone! <<
1467 <<
1468 config VMSPLIT_3G <<
1469 bool "3G/1G user/kernel split <<
1470 config VMSPLIT_3G_OPT <<
1471 depends on !X86_PAE <<
1472 bool "3G/1G user/kernel split <<
1473 config VMSPLIT_2G <<
1474 bool "2G/2G user/kernel split <<
1475 config VMSPLIT_2G_OPT <<
1476 depends on !X86_PAE <<
1477 bool "2G/2G user/kernel split <<
1478 config VMSPLIT_1G <<
1479 bool "1G/3G user/kernel split <<
1480 endchoice <<
1481 2035
1482 config PAGE_OFFSET !! 2036 config PAGE_SIZE_4KB
1483 hex !! 2037 bool "4kB"
1484 default 0xB0000000 if VMSPLIT_3G_OPT !! 2038 depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
1485 default 0x80000000 if VMSPLIT_2G !! 2039 help
1486 default 0x78000000 if VMSPLIT_2G_OPT !! 2040 This option select the standard 4kB Linux page size. On some
1487 default 0x40000000 if VMSPLIT_1G !! 2041 R3000-family processors this is the only available page size. Using
1488 default 0xC0000000 !! 2042 4kB page size will minimize memory consumption and is therefore
1489 depends on X86_32 !! 2043 recommended for low memory systems.
>> 2044
>> 2045 config PAGE_SIZE_8KB
>> 2046 bool "8kB"
>> 2047 depends on CPU_CAVIUM_OCTEON
>> 2048 depends on !MIPS_VA_BITS_48
>> 2049 help
>> 2050 Using 8kB page size will result in higher performance kernel at
>> 2051 the price of higher memory consumption. This option is available
>> 2052 only on cnMIPS processors. Note that you will need a suitable Linux
>> 2053 distribution to support this.
>> 2054
>> 2055 config PAGE_SIZE_16KB
>> 2056 bool "16kB"
>> 2057 depends on !CPU_R3000
>> 2058 help
>> 2059 Using 16kB page size will result in higher performance kernel at
>> 2060 the price of higher memory consumption. This option is available on
>> 2061 all non-R3000 family processors. Note that you will need a suitable
>> 2062 Linux distribution to support this.
>> 2063
>> 2064 config PAGE_SIZE_32KB
>> 2065 bool "32kB"
>> 2066 depends on CPU_CAVIUM_OCTEON
>> 2067 depends on !MIPS_VA_BITS_48
>> 2068 help
>> 2069 Using 32kB page size will result in higher performance kernel at
>> 2070 the price of higher memory consumption. This option is available
>> 2071 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2072 distribution to support this.
>> 2073
>> 2074 config PAGE_SIZE_64KB
>> 2075 bool "64kB"
>> 2076 depends on !CPU_R3000
>> 2077 help
>> 2078 Using 64kB page size will result in higher performance kernel at
>> 2079 the price of higher memory consumption. This option is available on
>> 2080 all non-R3000 family processor. Not that at the time of this
>> 2081 writing this option is still high experimental.
1490 2082
1491 config HIGHMEM !! 2083 endchoice
1492 def_bool y <<
1493 depends on X86_32 && (HIGHMEM64G || H <<
1494 <<
1495 config X86_PAE <<
1496 bool "PAE (Physical Address Extension <<
1497 depends on X86_32 && X86_HAVE_PAE <<
1498 select PHYS_ADDR_T_64BIT <<
1499 select SWIOTLB <<
1500 help <<
1501 PAE is required for NX support, and <<
1502 larger swapspace support for non-ov <<
1503 has the cost of more pagetable look <<
1504 consumes more pagetable space per p <<
1505 2084
1506 config X86_5LEVEL !! 2085 config ARCH_FORCE_MAX_ORDER
1507 bool "Enable 5-level page tables supp !! 2086 int "Maximum zone order"
1508 default y !! 2087 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
1509 select DYNAMIC_MEMORY_LAYOUT !! 2088 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
1510 select SPARSEMEM_VMEMMAP !! 2089 default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
1511 depends on X86_64 !! 2090 default "10"
1512 help !! 2091 help
1513 5-level paging enables access to la !! 2092 The kernel memory allocator divides physically contiguous memory
1514 up to 128 PiB of virtual address sp !! 2093 blocks into "zones", where each zone is a power of two number of
1515 physical address space. !! 2094 pages. This option selects the largest power of two that the kernel
>> 2095 keeps in the memory allocator. If you need to allocate very large
>> 2096 blocks of physically contiguous memory, then you may need to
>> 2097 increase this value.
1516 2098
1517 It will be supported by future Inte !! 2099 The page size is not necessarily 4KB. Keep this in mind
>> 2100 when choosing a value for this option.
1518 2101
1519 A kernel with the option enabled ca !! 2102 config BOARD_SCACHE
1520 support 4- or 5-level paging. !! 2103 bool
1521 2104
1522 See Documentation/arch/x86/x86_64/5 !! 2105 config IP22_CPU_SCACHE
1523 information. !! 2106 bool
>> 2107 select BOARD_SCACHE
1524 2108
1525 Say N if unsure. !! 2109 #
>> 2110 # Support for a MIPS32 / MIPS64 style S-caches
>> 2111 #
>> 2112 config MIPS_CPU_SCACHE
>> 2113 bool
>> 2114 select BOARD_SCACHE
1526 2115
1527 config X86_DIRECT_GBPAGES !! 2116 config R5000_CPU_SCACHE
1528 def_bool y !! 2117 bool
1529 depends on X86_64 !! 2118 select BOARD_SCACHE
1530 help <<
1531 Certain kernel features effectively <<
1532 linear 1 GB mappings (even if the C <<
1533 supports them), so don't confuse th <<
1534 that we have them enabled. <<
1535 <<
1536 config X86_CPA_STATISTICS <<
1537 bool "Enable statistic for Change Pag <<
1538 depends on DEBUG_FS <<
1539 help <<
1540 Expose statistics about the Change <<
1541 helps to determine the effectivenes <<
1542 page mappings when mapping protecti <<
1543 <<
1544 config X86_MEM_ENCRYPT <<
1545 select ARCH_HAS_FORCE_DMA_UNENCRYPTED <<
1546 select DYNAMIC_PHYSICAL_MASK <<
1547 def_bool n <<
1548 2119
1549 config AMD_MEM_ENCRYPT !! 2120 config RM7000_CPU_SCACHE
1550 bool "AMD Secure Memory Encryption (S !! 2121 bool
1551 depends on X86_64 && CPU_SUP_AMD !! 2122 select BOARD_SCACHE
1552 depends on EFI_STUB <<
1553 select DMA_COHERENT_POOL <<
1554 select ARCH_USE_MEMREMAP_PROT <<
1555 select INSTRUCTION_DECODER <<
1556 select ARCH_HAS_CC_PLATFORM <<
1557 select X86_MEM_ENCRYPT <<
1558 select UNACCEPTED_MEMORY <<
1559 help <<
1560 Say yes to enable support for the e <<
1561 This requires an AMD processor that <<
1562 Encryption (SME). <<
1563 2123
1564 # Common NUMA Features !! 2124 config SIBYTE_DMA_PAGEOPS
1565 config NUMA !! 2125 bool "Use DMA to clear/copy pages"
1566 bool "NUMA Memory Allocation and Sche !! 2126 depends on CPU_SB1
1567 depends on SMP <<
1568 depends on X86_64 || (X86_32 && HIGHM <<
1569 default y if X86_BIGSMP <<
1570 select USE_PERCPU_NUMA_NODE_ID <<
1571 select OF_NUMA if OF <<
1572 help 2127 help
1573 Enable NUMA (Non-Uniform Memory Acc !! 2128 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2129 channel. These DMA channels are otherwise unused by the standard
>> 2130 SiByte Linux port. Seems to give a small performance benefit.
1574 2131
1575 The kernel will try to allocate mem !! 2132 config CPU_HAS_PREFETCH
1576 local memory controller of the CPU !! 2133 bool
1577 NUMA awareness to the kernel. <<
1578 2134
1579 For 64-bit this is recommended if t !! 2135 config CPU_GENERIC_DUMP_TLB
1580 (or later), AMD Opteron, or EM64T N !! 2136 bool
>> 2137 default y if !CPU_R3000
1581 2138
1582 For 32-bit this is only needed if y !! 2139 config MIPS_FP_SUPPORT
1583 kernel on a 64-bit NUMA platform. !! 2140 bool "Floating Point support" if EXPERT
>> 2141 default y
>> 2142 help
>> 2143 Select y to include support for floating point in the kernel
>> 2144 including initialization of FPU hardware, FP context save & restore
>> 2145 and emulation of an FPU where necessary. Without this support any
>> 2146 userland program attempting to use floating point instructions will
>> 2147 receive a SIGILL.
1584 2148
1585 Otherwise, you should say N. !! 2149 If you know that your userland will not attempt to use floating point
>> 2150 instructions then you can say n here to shrink the kernel a little.
1586 2151
1587 config AMD_NUMA !! 2152 If unsure, say y.
1588 def_bool y <<
1589 prompt "Old style AMD Opteron NUMA de <<
1590 depends on X86_64 && NUMA && PCI <<
1591 help <<
1592 Enable AMD NUMA node topology detec <<
1593 you have a multi processor AMD syst <<
1594 read the NUMA configuration directl <<
1595 of Opteron. It is recommended to us <<
1596 which also takes priority if both a <<
1597 2153
1598 config X86_64_ACPI_NUMA !! 2154 config CPU_R2300_FPU
1599 def_bool y !! 2155 bool
1600 prompt "ACPI NUMA detection" !! 2156 depends on MIPS_FP_SUPPORT
1601 depends on X86_64 && NUMA && ACPI && !! 2157 default y if CPU_R3000
1602 select ACPI_NUMA <<
1603 help <<
1604 Enable ACPI SRAT based node topolog <<
1605 2158
1606 config NODES_SHIFT !! 2159 config CPU_R3K_TLB
1607 int "Maximum NUMA Nodes (as a power o !! 2160 bool
1608 range 1 10 <<
1609 default "10" if MAXSMP <<
1610 default "6" if X86_64 <<
1611 default "3" <<
1612 depends on NUMA <<
1613 help <<
1614 Specify the maximum number of NUMA <<
1615 system. Increases memory reserved <<
1616 2161
1617 config ARCH_FLATMEM_ENABLE !! 2162 config CPU_R4K_FPU
1618 def_bool y !! 2163 bool
1619 depends on X86_32 && !NUMA !! 2164 depends on MIPS_FP_SUPPORT
>> 2165 default y if !CPU_R2300_FPU
1620 2166
1621 config ARCH_SPARSEMEM_ENABLE !! 2167 config CPU_R4K_CACHE_TLB
1622 def_bool y !! 2168 bool
1623 depends on X86_64 || NUMA || X86_32 | !! 2169 default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
1624 select SPARSEMEM_STATIC if X86_32 <<
1625 select SPARSEMEM_VMEMMAP_ENABLE if X8 <<
1626 2170
1627 config ARCH_SPARSEMEM_DEFAULT !! 2171 config MIPS_MT_SMP
1628 def_bool X86_64 || (NUMA && X86_32) !! 2172 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2173 default y
>> 2174 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2175 select CPU_MIPSR2_IRQ_VI
>> 2176 select CPU_MIPSR2_IRQ_EI
>> 2177 select SYNC_R4K
>> 2178 select MIPS_MT
>> 2179 select SMP
>> 2180 select SMP_UP
>> 2181 select SYS_SUPPORTS_SMP
>> 2182 select SYS_SUPPORTS_SCHED_SMT
>> 2183 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2184 help
>> 2185 This is a kernel model which is known as SMVP. This is supported
>> 2186 on cores with the MT ASE and uses the available VPEs to implement
>> 2187 virtual processors which supports SMP. This is equivalent to the
>> 2188 Intel Hyperthreading feature. For further information go to
>> 2189 <http://www.imgtec.com/mips/mips-multithreading.asp>.
1629 2190
1630 config ARCH_SELECT_MEMORY_MODEL !! 2191 config MIPS_MT
1631 def_bool y !! 2192 bool
1632 depends on ARCH_SPARSEMEM_ENABLE && A <<
1633 2193
1634 config ARCH_MEMORY_PROBE !! 2194 config SCHED_SMT
1635 bool "Enable sysfs memory/probe inter !! 2195 bool "SMT (multithreading) scheduler support"
1636 depends on MEMORY_HOTPLUG !! 2196 depends on SYS_SUPPORTS_SCHED_SMT
>> 2197 default n
1637 help 2198 help
1638 This option enables a sysfs memory/ !! 2199 SMT scheduler support improves the CPU scheduler's decision making
1639 See Documentation/admin-guide/mm/me !! 2200 when dealing with MIPS MT enabled cores at a cost of slightly
1640 If you are unsure how to answer thi !! 2201 increased overhead in some places. If unsure say N here.
1641 2202
1642 config ARCH_PROC_KCORE_TEXT !! 2203 config SYS_SUPPORTS_SCHED_SMT
1643 def_bool y !! 2204 bool
1644 depends on X86_64 && PROC_KCORE !! 2205
>> 2206 config SYS_SUPPORTS_MULTITHREADING
>> 2207 bool
>> 2208
>> 2209 config MIPS_MT_FPAFF
>> 2210 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2211 default y
>> 2212 depends on MIPS_MT_SMP
1645 2213
1646 config ILLEGAL_POINTER_VALUE !! 2214 config MIPSR2_TO_R6_EMULATOR
1647 hex !! 2215 bool "MIPS R2-to-R6 emulator"
1648 default 0 if X86_32 !! 2216 depends on CPU_MIPSR6
1649 default 0xdead000000000000 if X86_64 !! 2217 depends on MIPS_FP_SUPPORT
1650 <<
1651 config X86_PMEM_LEGACY_DEVICE <<
1652 bool <<
1653 <<
1654 config X86_PMEM_LEGACY <<
1655 tristate "Support non-standard NVDIMM <<
1656 depends on PHYS_ADDR_T_64BIT <<
1657 depends on BLK_DEV <<
1658 select X86_PMEM_LEGACY_DEVICE <<
1659 select NUMA_KEEP_MEMINFO if NUMA <<
1660 select LIBNVDIMM <<
1661 help <<
1662 Treat memory marked using the non-s <<
1663 by the Intel Sandy Bridge-EP refere <<
1664 The kernel will offer these regions <<
1665 they can be used for persistent sto <<
1666 <<
1667 Say Y if unsure. <<
1668 <<
1669 config HIGHPTE <<
1670 bool "Allocate 3rd-level pagetables f <<
1671 depends on HIGHMEM <<
1672 help <<
1673 The VM uses one page table entry fo <<
1674 For systems with a lot of RAM, this <<
1675 low memory. Setting this option wi <<
1676 entries in high memory. <<
1677 <<
1678 config X86_CHECK_BIOS_CORRUPTION <<
1679 bool "Check for low memory corruption <<
1680 help <<
1681 Periodically check for memory corru <<
1682 is suspected to be caused by BIOS. <<
1683 configuration, it is disabled at ru <<
1684 setting "memory_corruption_check=1" <<
1685 line. By default it scans the low <<
1686 seconds; see the memory_corruption_ <<
1687 memory_corruption_check_period para <<
1688 Documentation/admin-guide/kernel-pa <<
1689 <<
1690 When enabled with the default param <<
1691 almost no overhead, as it reserves <<
1692 of memory and scans it infrequently <<
1693 and prevents it from affecting the <<
1694 <<
1695 It is, however, intended as a diagn <<
1696 BIOS-originated corruption always a <<
1697 you can use memmap= to prevent the <<
1698 memory. <<
1699 <<
1700 config X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK <<
1701 bool "Set the default setting of memo <<
1702 depends on X86_CHECK_BIOS_CORRUPTION <<
1703 default y 2218 default y
1704 help 2219 help
1705 Set whether the default state of me !! 2220 Choose this option if you want to run non-R6 MIPS userland code.
1706 on or off. !! 2221 Even if you say 'Y' here, the emulator will still be disabled by
>> 2222 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2223 The only reason this is a build-time option is to save ~14K from the
>> 2224 final kernel image.
1707 2225
1708 config MATH_EMULATION !! 2226 config SYS_SUPPORTS_VPE_LOADER
1709 bool 2227 bool
1710 depends on MODIFY_LDT_SYSCALL !! 2228 depends on SYS_SUPPORTS_MULTITHREADING
1711 prompt "Math emulation" if X86_32 && <<
1712 help 2229 help
1713 Linux can emulate a math coprocesso !! 2230 Indicates that the platform supports the VPE loader, and provides
1714 operations) if you don't have one. !! 2231 physical_memsize.
1715 a math coprocessor built in, 486SX <<
1716 a 487DX or 387, respectively. (The <<
1717 give you some hints here ["man dmes <<
1718 coprocessor or this emulation. <<
1719 <<
1720 If you don't have a math coprocesso <<
1721 say Y here even though you have a c <<
1722 be used nevertheless. (This behavio <<
1723 command line option "no387", which <<
1724 is broken. Try "man bootparam" or s <<
1725 loader (lilo or loadlin) about how <<
1726 boot time.) This means that it is a <<
1727 intend to use this kernel on differ <<
1728 2232
1729 More information about the internal !! 2233 config MIPS_VPE_LOADER
1730 emulation can be found in <file:arc !! 2234 bool "VPE loader support."
>> 2235 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2236 select CPU_MIPSR2_IRQ_VI
>> 2237 select CPU_MIPSR2_IRQ_EI
>> 2238 select MIPS_MT
>> 2239 help
>> 2240 Includes a loader for loading an elf relocatable object
>> 2241 onto another VPE and running it.
1731 2242
1732 If you are not sure, say Y; apart f !! 2243 config MIPS_VPE_LOADER_MT
1733 kernel, it won't hurt. !! 2244 bool
>> 2245 default "y"
>> 2246 depends on MIPS_VPE_LOADER
1734 2247
1735 config MTRR !! 2248 config MIPS_VPE_LOADER_TOM
1736 def_bool y !! 2249 bool "Load VPE program into memory hidden from linux"
1737 prompt "MTRR (Memory Type Range Regis !! 2250 depends on MIPS_VPE_LOADER
>> 2251 default y
1738 help 2252 help
1739 On Intel P6 family processors (Pent !! 2253 The loader can use memory that is present but has been hidden from
1740 the Memory Type Range Registers (MT !! 2254 Linux using the kernel command line option "mem=xxMB". It's up to
1741 processor access to memory ranges. !! 2255 you to ensure the amount you put in the option and the space your
1742 a video (VGA) card on a PCI or AGP !! 2256 program requires is less or equal to the amount physically present.
1743 allows bus write transfers to be co <<
1744 before bursting over the PCI/AGP bu <<
1745 of image write operations 2.5 times <<
1746 /proc/mtrr file which may be used t <<
1747 MTRRs. Typically the X server shoul <<
1748 <<
1749 This code has a reasonably generic <<
1750 control registers on other processo <<
1751 as well: <<
1752 <<
1753 The Cyrix 6x86, 6x86MX and M II pro <<
1754 Registers (ARRs) which provide a si <<
1755 these, the ARRs are used to emulate <<
1756 The AMD K6-2 (stepping 8 and above) <<
1757 MTRRs. The Centaur C6 (WinChip) has <<
1758 write-combining. All of these proce <<
1759 and it makes sense to say Y here if <<
1760 <<
1761 Saying Y here also fixes a problem <<
1762 set the MTRRs for the boot CPU and <<
1763 can lead to all sorts of problems, <<
1764 2257
1765 You can safely say Y even if your m !! 2258 config MIPS_VPE_APSP_API
1766 just add about 9 KB to your kernel. !! 2259 bool "Enable support for AP/SP API (RTLX)"
>> 2260 depends on MIPS_VPE_LOADER
1767 2261
1768 See <file:Documentation/arch/x86/mt !! 2262 config MIPS_VPE_APSP_API_MT
1769 !! 2263 bool
1770 config MTRR_SANITIZER !! 2264 default "y"
1771 def_bool y !! 2265 depends on MIPS_VPE_APSP_API
1772 prompt "MTRR cleanup support" <<
1773 depends on MTRR <<
1774 help <<
1775 Convert MTRR layout from continuous <<
1776 add writeback entries. <<
1777 2266
1778 Can be disabled with disable_mtrr_c !! 2267 config MIPS_CPS
1779 The largest mtrr entry size for a c !! 2268 bool "MIPS Coherent Processing System support"
1780 mtrr_chunk_size. !! 2269 depends on SYS_SUPPORTS_MIPS_CPS
>> 2270 select MIPS_CM
>> 2271 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2272 select SMP
>> 2273 select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
>> 2274 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2275 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2276 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2277 select SYS_SUPPORTS_SMP
>> 2278 select WEAK_ORDERING
>> 2279 select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
>> 2280 help
>> 2281 Select this if you wish to run an SMP kernel across multiple cores
>> 2282 within a MIPS Coherent Processing System. When this option is
>> 2283 enabled the kernel will probe for other cores and boot them with
>> 2284 no external assistance. It is safe to enable this when hardware
>> 2285 support is unavailable.
1781 2286
1782 If unsure, say Y. !! 2287 config MIPS_CPS_PM
>> 2288 depends on MIPS_CPS
>> 2289 bool
1783 2290
1784 config MTRR_SANITIZER_ENABLE_DEFAULT !! 2291 config MIPS_CM
1785 int "MTRR cleanup enable value (0-1)" !! 2292 bool
1786 range 0 1 !! 2293 select MIPS_CPC
1787 default "0" <<
1788 depends on MTRR_SANITIZER <<
1789 help <<
1790 Enable mtrr cleanup default value <<
1791 <<
1792 config MTRR_SANITIZER_SPARE_REG_NR_DEFAULT <<
1793 int "MTRR cleanup spare reg num (0-7) <<
1794 range 0 7 <<
1795 default "1" <<
1796 depends on MTRR_SANITIZER <<
1797 help <<
1798 mtrr cleanup spare entries default, <<
1799 mtrr_spare_reg_nr=N on the kernel c <<
1800 2294
1801 config X86_PAT !! 2295 config MIPS_CPC
1802 def_bool y !! 2296 bool
1803 prompt "x86 PAT support" if EXPERT <<
1804 depends on MTRR <<
1805 select ARCH_USES_PG_ARCH_2 <<
1806 help <<
1807 Use PAT attributes to setup page le <<
1808 2297
1809 PATs are the modern equivalents of !! 2298 config SB1_PASS_2_WORKAROUNDS
1810 flexible than MTRRs. !! 2299 bool
>> 2300 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2301 default y
1811 2302
1812 Say N here if you see bootup proble !! 2303 config SB1_PASS_2_1_WORKAROUNDS
1813 spontaneous reboots) or a non-worki !! 2304 bool
>> 2305 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2306 default y
1814 2307
1815 If unsure, say Y. !! 2308 choice
>> 2309 prompt "SmartMIPS or microMIPS ASE support"
1816 2310
1817 config X86_UMIP !! 2311 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
1818 def_bool y !! 2312 bool "None"
1819 prompt "User Mode Instruction Prevent <<
1820 help 2313 help
1821 User Mode Instruction Prevention (U !! 2314 Select this if you want neither microMIPS nor SmartMIPS support
1822 some x86 processors. If enabled, a <<
1823 issued if the SGDT, SLDT, SIDT, SMS <<
1824 executed in user mode. These instru <<
1825 information about the hardware stat <<
1826 <<
1827 The vast majority of applications d <<
1828 For the very few that do, software <<
1829 specific cases in protected and vir <<
1830 results are dummy. <<
1831 <<
1832 config CC_HAS_IBT <<
1833 # GCC >= 9 and binutils >= 2.29 <<
1834 # Retpoline check to work around http <<
1835 # Clang/LLVM >= 14 <<
1836 # https://github.com/llvm/llvm-projec <<
1837 # https://github.com/llvm/llvm-projec <<
1838 def_bool ((CC_IS_GCC && $(cc-option, <<
1839 (CC_IS_CLANG && CLANG_VERSI <<
1840 $(as-instr,endbr64) <<
1841 2315
1842 config X86_CET !! 2316 config CPU_HAS_SMARTMIPS
1843 def_bool n !! 2317 depends on SYS_SUPPORTS_SMARTMIPS
>> 2318 bool "SmartMIPS"
>> 2319 help
>> 2320 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2321 increased security at both hardware and software level for
>> 2322 smartcards. Enabling this option will allow proper use of the
>> 2323 SmartMIPS instructions by Linux applications. However a kernel with
>> 2324 this option will not work on a MIPS core without SmartMIPS core. If
>> 2325 you don't know you probably don't have SmartMIPS and should say N
>> 2326 here.
>> 2327
>> 2328 config CPU_MICROMIPS
>> 2329 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2330 bool "microMIPS"
1844 help 2331 help
1845 CET features configured (Shadow sta !! 2332 When this option is enabled the kernel will be built using the
>> 2333 microMIPS ISA
1846 2334
1847 config X86_KERNEL_IBT !! 2335 endchoice
1848 prompt "Indirect Branch Tracking" <<
1849 def_bool y <<
1850 depends on X86_64 && CC_HAS_IBT && HA <<
1851 # https://github.com/llvm/llvm-projec <<
1852 depends on !LD_IS_LLD || LLD_VERSION <<
1853 select OBJTOOL <<
1854 select X86_CET <<
1855 help <<
1856 Build the kernel with support for I <<
1857 hardware support course-grain forwa <<
1858 protection. It enforces that all in <<
1859 an ENDBR instruction, as such, the <<
1860 code with them to make this happen. <<
1861 <<
1862 In addition to building the kernel <<
1863 are not indirect call targets, avoi <<
1864 <<
1865 This requires LTO like objtool runs <<
1866 does significantly reduce the numbe <<
1867 kernel image. <<
1868 2336
1869 config X86_INTEL_MEMORY_PROTECTION_KEYS !! 2337 config CPU_HAS_MSA
1870 prompt "Memory Protection Keys" !! 2338 bool "Support for the MIPS SIMD Architecture"
1871 def_bool y !! 2339 depends on CPU_SUPPORTS_MSA
1872 # Note: only available in 64-bit mode !! 2340 depends on MIPS_FP_SUPPORT
1873 depends on X86_64 && (CPU_SUP_INTEL | !! 2341 depends on 64BIT || MIPS_O32_FP64_SUPPORT
1874 select ARCH_USES_HIGH_VMA_FLAGS !! 2342 help
1875 select ARCH_HAS_PKEYS !! 2343 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
1876 help !! 2344 and a set of SIMD instructions to operate on them. When this option
1877 Memory Protection Keys provides a m !! 2345 is enabled the kernel will support allocating & switching MSA
1878 page-based protections, but without !! 2346 vector register contexts. If you know that your kernel will only be
1879 page tables when an application cha !! 2347 running on CPUs which do not support MSA or that your userland will
>> 2348 not be making use of it then you may wish to say N here to reduce
>> 2349 the size & complexity of your kernel.
1880 2350
1881 For details, see Documentation/core !! 2351 If unsure, say Y.
1882 2352
1883 If unsure, say y. !! 2353 config CPU_HAS_WB
>> 2354 bool
1884 2355
1885 config ARCH_PKEY_BITS !! 2356 config XKS01
1886 int !! 2357 bool
1887 default 4 <<
1888 2358
1889 choice !! 2359 config CPU_HAS_DIEI
1890 prompt "TSX enable mode" !! 2360 depends on !CPU_DIEI_BROKEN
1891 depends on CPU_SUP_INTEL !! 2361 bool
1892 default X86_INTEL_TSX_MODE_OFF <<
1893 help <<
1894 Intel's TSX (Transactional Synchron <<
1895 allows to optimize locking protocol <<
1896 can lead to a noticeable performanc <<
1897 2362
1898 On the other hand it has been shown !! 2363 config CPU_DIEI_BROKEN
1899 to form side channel attacks (e.g. !! 2364 bool
1900 will be more of those attacks disco <<
1901 2365
1902 Therefore TSX is not enabled by def !! 2366 config CPU_HAS_RIXI
1903 might override this decision by tsx !! 2367 bool
1904 Even with TSX enabled, the kernel w <<
1905 possible TAA mitigation setting dep <<
1906 for the particular machine. <<
1907 2368
1908 This option allows to set the defau !! 2369 config CPU_NO_LOAD_STORE_LR
1909 and =auto. See Documentation/admin- !! 2370 bool
1910 details. !! 2371 help
>> 2372 CPU lacks support for unaligned load and store instructions:
>> 2373 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2374 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
>> 2375 systems).
1911 2376
1912 Say off if not sure, auto if TSX is !! 2377 #
1913 platforms or on if TSX is in use an !! 2378 # Vectored interrupt mode is an R2 feature
1914 relevant. !! 2379 #
>> 2380 config CPU_MIPSR2_IRQ_VI
>> 2381 bool
1915 2382
1916 config X86_INTEL_TSX_MODE_OFF !! 2383 #
1917 bool "off" !! 2384 # Extended interrupt mode is an R2 feature
1918 help !! 2385 #
1919 TSX is disabled if possible - equal !! 2386 config CPU_MIPSR2_IRQ_EI
>> 2387 bool
1920 2388
1921 config X86_INTEL_TSX_MODE_ON !! 2389 config CPU_HAS_SYNC
1922 bool "on" !! 2390 bool
1923 help !! 2391 depends on !CPU_R3000
1924 TSX is always enabled on TSX capabl !! 2392 default y
1925 line parameter. <<
1926 2393
1927 config X86_INTEL_TSX_MODE_AUTO !! 2394 #
1928 bool "auto" !! 2395 # CPU non-features
1929 help !! 2396 #
1930 TSX is enabled on TSX capable HW th <<
1931 side channel attacks- equals the ts <<
1932 endchoice <<
1933 2397
1934 config X86_SGX !! 2398 # Work around the "daddi" and "daddiu" CPU errata:
1935 bool "Software Guard eXtensions (SGX) !! 2399 #
1936 depends on X86_64 && CPU_SUP_INTEL && !! 2400 # - The `daddi' instruction fails to trap on overflow.
1937 depends on CRYPTO=y !! 2401 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
1938 depends on CRYPTO_SHA256=y !! 2402 # erratum #23
1939 select MMU_NOTIFIER !! 2403 #
1940 select NUMA_KEEP_MEMINFO if NUMA !! 2404 # - The `daddiu' instruction can produce an incorrect result.
1941 select XARRAY_MULTI !! 2405 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
1942 help !! 2406 # erratum #41
1943 Intel(R) Software Guard eXtensions !! 2407 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
1944 that can be used by applications to !! 2408 # #15
1945 and data, referred to as enclaves. !! 2409 # "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
1946 only be accessed by code running wi !! 2410 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
1947 outside the enclave, including othe !! 2411 config CPU_DADDI_WORKAROUNDS
1948 hardware. !! 2412 bool
1949 2413
1950 If unsure, say N. !! 2414 # Work around certain R4000 CPU errata (as implemented by GCC):
>> 2415 #
>> 2416 # - A double-word or a variable shift may give an incorrect result
>> 2417 # if executed immediately after starting an integer division:
>> 2418 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2419 # erratum #28
>> 2420 # "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
>> 2421 # #19
>> 2422 #
>> 2423 # - A double-word or a variable shift may give an incorrect result
>> 2424 # if executed while an integer multiplication is in progress:
>> 2425 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2426 # errata #16 & #28
>> 2427 #
>> 2428 # - An integer division may give an incorrect result if started in
>> 2429 # a delay slot of a taken branch or a jump:
>> 2430 # "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
>> 2431 # erratum #52
>> 2432 config CPU_R4000_WORKAROUNDS
>> 2433 bool
>> 2434 select CPU_R4400_WORKAROUNDS
1951 2435
1952 config X86_USER_SHADOW_STACK !! 2436 # Work around certain R4400 CPU errata (as implemented by GCC):
1953 bool "X86 userspace shadow stack" !! 2437 #
1954 depends on AS_WRUSS !! 2438 # - A double-word or a variable shift may give an incorrect result
1955 depends on X86_64 !! 2439 # if executed immediately after starting an integer division:
1956 select ARCH_USES_HIGH_VMA_FLAGS !! 2440 # "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
1957 select X86_CET !! 2441 # "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
1958 help !! 2442 config CPU_R4400_WORKAROUNDS
1959 Shadow stack protection is a hardwa !! 2443 bool
1960 return address corruption. This he <<
1961 Applications must be enabled to use <<
1962 get protection "for free". <<
1963 2444
1964 CPUs supporting shadow stacks were !! 2445 config CPU_R4X00_BUGS64
>> 2446 bool
>> 2447 default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
1965 2448
1966 See Documentation/arch/x86/shstk.rs !! 2449 config MIPS_ASID_SHIFT
>> 2450 int
>> 2451 default 6 if CPU_R3000
>> 2452 default 0
1967 2453
1968 If unsure, say N. !! 2454 config MIPS_ASID_BITS
>> 2455 int
>> 2456 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2457 default 6 if CPU_R3000
>> 2458 default 8
1969 2459
1970 config INTEL_TDX_HOST !! 2460 config MIPS_ASID_BITS_VARIABLE
1971 bool "Intel Trust Domain Extensions ( !! 2461 bool
1972 depends on CPU_SUP_INTEL <<
1973 depends on X86_64 <<
1974 depends on KVM_INTEL <<
1975 depends on X86_X2APIC <<
1976 select ARCH_KEEP_MEMBLOCK <<
1977 depends on CONTIG_ALLOC <<
1978 depends on !KEXEC_CORE <<
1979 depends on X86_MCE <<
1980 help <<
1981 Intel Trust Domain Extensions (TDX) <<
1982 host and certain physical attacks. <<
1983 support in the host kernel to run c <<
1984 2462
1985 If unsure, say N. !! 2463 config MIPS_CRC_SUPPORT
>> 2464 bool
1986 2465
1987 config EFI !! 2466 # R4600 erratum. Due to the lack of errata information the exact
1988 bool "EFI runtime service support" !! 2467 # technical details aren't known. I've experimentally found that disabling
1989 depends on ACPI !! 2468 # interrupts during indexed I-cache flushes seems to be sufficient to deal
1990 select UCS2_STRING !! 2469 # with the issue.
1991 select EFI_RUNTIME_WRAPPERS !! 2470 config WAR_R4600_V1_INDEX_ICACHEOP
1992 select ARCH_USE_MEMREMAP_PROT !! 2471 bool
1993 select EFI_RUNTIME_MAP if KEXEC_CORE <<
1994 help <<
1995 This enables the kernel to use EFI <<
1996 available (such as the EFI variable <<
1997 <<
1998 This option is only useful on syste <<
1999 In addition, you should use the lat <<
2000 at <http://elilo.sourceforge.net> i <<
2001 of EFI runtime services. However, e <<
2002 resultant kernel should continue to <<
2003 platforms. <<
2004 <<
2005 config EFI_STUB <<
2006 bool "EFI stub support" <<
2007 depends on EFI <<
2008 select RELOCATABLE <<
2009 help <<
2010 This kernel feature allows a bzImag <<
2011 by EFI firmware without the use of <<
2012 <<
2013 See Documentation/admin-guide/efi-s <<
2014 <<
2015 config EFI_HANDOVER_PROTOCOL <<
2016 bool "EFI handover protocol (DEPRECAT <<
2017 depends on EFI_STUB <<
2018 default y <<
2019 help <<
2020 Select this in order to include sup <<
2021 handover protocol, which defines al <<
2022 EFI stub. This is a practice that <<
2023 specification, and requires a prior <<
2024 bootloader about Linux/x86 specific <<
2025 and initrd, and where in memory tho <<
2026 <<
2027 If in doubt, say Y. Even though the <<
2028 present in upstream GRUB or other b <<
2029 GRUB with numerous downstream patch <<
2030 handover protocol as as result. <<
2031 <<
2032 config EFI_MIXED <<
2033 bool "EFI mixed-mode support" <<
2034 depends on EFI_STUB && X86_64 <<
2035 help <<
2036 Enabling this feature allows a 64-b <<
2037 on a 32-bit firmware, provided that <<
2038 mode. <<
2039 <<
2040 Note that it is not possible to boo <<
2041 kernel via the EFI boot stub - a bo <<
2042 the EFI handover protocol must be u <<
2043 2472
2044 If unsure, say N. !! 2473 # Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
>> 2474 #
>> 2475 # 18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
>> 2476 # Hit_Invalidate_D and Create_Dirty_Excl_D should only be
>> 2477 # executed if there is no other dcache activity. If the dcache is
>> 2478 # accessed for another instruction immediately preceding when these
>> 2479 # cache instructions are executing, it is possible that the dcache
>> 2480 # tag match outputs used by these cache instructions will be
>> 2481 # incorrect. These cache instructions should be preceded by at least
>> 2482 # four instructions that are not any kind of load or store
>> 2483 # instruction.
>> 2484 #
>> 2485 # This is not allowed: lw
>> 2486 # nop
>> 2487 # nop
>> 2488 # nop
>> 2489 # cache Hit_Writeback_Invalidate_D
>> 2490 #
>> 2491 # This is allowed: lw
>> 2492 # nop
>> 2493 # nop
>> 2494 # nop
>> 2495 # nop
>> 2496 # cache Hit_Writeback_Invalidate_D
>> 2497 config WAR_R4600_V1_HIT_CACHEOP
>> 2498 bool
2045 2499
2046 config EFI_RUNTIME_MAP !! 2500 # Writeback and invalidate the primary cache dcache before DMA.
2047 bool "Export EFI runtime maps to sysf !! 2501 #
2048 depends on EFI !! 2502 # R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2049 help !! 2503 # Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2050 Export EFI runtime memory regions t !! 2504 # operate correctly if the internal data cache refill buffer is empty. These
2051 That memory map is required by the !! 2505 # CACHE instructions should be separated from any potential data cache miss
2052 mappings after kexec, but can also !! 2506 # by a load instruction to an uncached address to empty the response buffer."
>> 2507 # (Revision 2.0 device errata from IDT available on https://www.idt.com/
>> 2508 # in .pdf format.)
>> 2509 config WAR_R4600_V2_HIT_CACHEOP
>> 2510 bool
2053 2511
2054 See also Documentation/ABI/testing/ !! 2512 # From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
>> 2513 # the line which this instruction itself exists, the following
>> 2514 # operation is not guaranteed."
>> 2515 #
>> 2516 # Workaround: do two phase flushing for Index_Invalidate_I
>> 2517 config WAR_TX49XX_ICACHE_INDEX_INV
>> 2518 bool
2055 2519
2056 source "kernel/Kconfig.hz" !! 2520 # The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
>> 2521 # opposes it being called that) where invalid instructions in the same
>> 2522 # I-cache line worth of instructions being fetched may case spurious
>> 2523 # exceptions.
>> 2524 config WAR_ICACHE_REFILLS
>> 2525 bool
2057 2526
2058 config ARCH_SUPPORTS_KEXEC !! 2527 # On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2059 def_bool y !! 2528 # may cause ll / sc and lld / scd sequences to execute non-atomically.
>> 2529 config WAR_R10000_LLSC
>> 2530 bool
2060 2531
2061 config ARCH_SUPPORTS_KEXEC_FILE !! 2532 # 34K core erratum: "Problems Executing the TLBR Instruction"
2062 def_bool X86_64 !! 2533 config WAR_MIPS34K_MISSED_ITLB
>> 2534 bool
2063 2535
2064 config ARCH_SELECTS_KEXEC_FILE !! 2536 #
2065 def_bool y !! 2537 # - Highmem only makes sense for the 32-bit kernel.
2066 depends on KEXEC_FILE !! 2538 # - The current highmem code will only work properly on physically indexed
2067 select HAVE_IMA_KEXEC if IMA !! 2539 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2540 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2541 # moment we protect the user and offer the highmem option only on machines
>> 2542 # where it's known to be safe. This will not offer highmem on a few systems
>> 2543 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2544 # indexed CPUs but we're playing safe.
>> 2545 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2546 # know they might have memory configurations that could make use of highmem
>> 2547 # support.
>> 2548 #
>> 2549 config HIGHMEM
>> 2550 bool "High Memory Support"
>> 2551 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2552 select KMAP_LOCAL
2068 2553
2069 config ARCH_SUPPORTS_KEXEC_PURGATORY !! 2554 config CPU_SUPPORTS_HIGHMEM
2070 def_bool y !! 2555 bool
2071 2556
2072 config ARCH_SUPPORTS_KEXEC_SIG !! 2557 config SYS_SUPPORTS_HIGHMEM
2073 def_bool y !! 2558 bool
2074 2559
2075 config ARCH_SUPPORTS_KEXEC_SIG_FORCE !! 2560 config SYS_SUPPORTS_SMARTMIPS
2076 def_bool y !! 2561 bool
2077 2562
2078 config ARCH_SUPPORTS_KEXEC_BZIMAGE_VERIFY_SIG !! 2563 config SYS_SUPPORTS_MICROMIPS
2079 def_bool y !! 2564 bool
2080 2565
2081 config ARCH_SUPPORTS_KEXEC_JUMP !! 2566 config SYS_SUPPORTS_MIPS16
2082 def_bool y !! 2567 bool
>> 2568 help
>> 2569 This option must be set if a kernel might be executed on a MIPS16-
>> 2570 enabled CPU even if MIPS16 is not actually being used. In other
>> 2571 words, it makes the kernel MIPS16-tolerant.
2083 2572
2084 config ARCH_SUPPORTS_CRASH_DUMP !! 2573 config CPU_SUPPORTS_MSA
2085 def_bool X86_64 || (X86_32 && HIGHMEM !! 2574 bool
2086 2575
2087 config ARCH_SUPPORTS_CRASH_HOTPLUG !! 2576 config ARCH_FLATMEM_ENABLE
2088 def_bool y 2577 def_bool y
>> 2578 depends on !NUMA && !CPU_LOONGSON2EF
2089 2579
2090 config ARCH_HAS_GENERIC_CRASHKERNEL_RESERVATI !! 2580 config ARCH_SPARSEMEM_ENABLE
2091 def_bool CRASH_RESERVE !! 2581 bool
2092 2582
2093 config PHYSICAL_START !! 2583 config NUMA
2094 hex "Physical address where the kerne !! 2584 bool "NUMA Support"
2095 default "0x1000000" !! 2585 depends on SYS_SUPPORTS_NUMA
>> 2586 select SMP
>> 2587 select HAVE_SETUP_PER_CPU_AREA
>> 2588 select NEED_PER_CPU_EMBED_FIRST_CHUNK
2096 help 2589 help
2097 This gives the physical address whe !! 2590 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2591 Access). This option improves performance on systems with more
>> 2592 than two nodes; on two node systems it is generally better to
>> 2593 leave it disabled; on single node systems leave this option
>> 2594 disabled.
2098 2595
2099 If the kernel is not relocatable (C !! 2596 config SYS_SUPPORTS_NUMA
2100 will decompress itself to above phy !! 2597 bool
2101 Otherwise, bzImage will run from th <<
2102 by the boot loader. The only except <<
2103 above physical address, in which ca <<
2104 <<
2105 In normal kdump cases one does not <<
2106 as now bzImage can be compiled as a <<
2107 (CONFIG_RELOCATABLE=y) and be used <<
2108 address. This option is mainly usef <<
2109 to use a bzImage for capturing the <<
2110 vmlinux instead. vmlinux is not rel <<
2111 to be specifically compiled to run <<
2112 (normally a reserved region) and th <<
2113 <<
2114 So if you are using bzImage for cap <<
2115 leave the value here unchanged to 0 <<
2116 CONFIG_RELOCATABLE=y. Otherwise if <<
2117 for capturing the crash dump change <<
2118 the reserved region. In other word <<
2119 the "X" value as specified in the " <<
2120 command line boot parameter passed <<
2121 kernel. Please take a look at Docum <<
2122 for more details about crash dumps. <<
2123 <<
2124 Usage of bzImage for capturing the <<
2125 one does not have to build two kern <<
2126 as production kernel and capture ke <<
2127 gone away after relocatable bzImage <<
2128 is present because there are users <<
2129 vmlinux for dump capture. This opti <<
2130 line. <<
2131 2598
2132 Don't change this unless you know w !! 2599 config HAVE_ARCH_NODEDATA_EXTENSION
>> 2600 bool
2133 2601
2134 config RELOCATABLE 2602 config RELOCATABLE
2135 bool "Build a relocatable kernel" !! 2603 bool "Relocatable kernel"
2136 default y !! 2604 depends on SYS_SUPPORTS_RELOCATABLE
>> 2605 depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
>> 2606 CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
>> 2607 CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
>> 2608 CPU_P5600 || CAVIUM_OCTEON_SOC || \
>> 2609 CPU_LOONGSON64
2137 help 2610 help
2138 This builds a kernel image that ret 2611 This builds a kernel image that retains relocation information
2139 so it can be loaded someplace besid 2612 so it can be loaded someplace besides the default 1MB.
2140 The relocations tend to make the ke !! 2613 The relocations make the kernel binary about 15% larger,
2141 but are discarded at runtime. !! 2614 but are discarded at runtime
2142 <<
2143 One use is for the kexec on panic c <<
2144 must live at a different physical a <<
2145 kernel. <<
2146 <<
2147 Note: If CONFIG_RELOCATABLE=y, then <<
2148 it has been loaded at and the compi <<
2149 (CONFIG_PHYSICAL_START) is used as <<
2150 2615
2151 config RANDOMIZE_BASE !! 2616 config RELOCATION_TABLE_SIZE
2152 bool "Randomize the address of the ke !! 2617 hex "Relocation table size"
2153 depends on RELOCATABLE 2618 depends on RELOCATABLE
2154 default y !! 2619 range 0x0 0x01000000
>> 2620 default "0x00200000" if CPU_LOONGSON64
>> 2621 default "0x00100000"
2155 help 2622 help
2156 In support of Kernel Address Space !! 2623 A table of relocation data will be appended to the kernel binary
2157 this randomizes the physical addres !! 2624 and parsed at boot to fix up the relocated kernel.
2158 is decompressed and the virtual add <<
2159 image is mapped, as a security feat <<
2160 attempts relying on knowledge of th <<
2161 code internals. <<
2162 <<
2163 On 64-bit, the kernel physical and <<
2164 randomized separately. The physical <<
2165 between 16MB and the top of physica <<
2166 virtual address will be randomized <<
2167 of entropy). Note that this also re <<
2168 available to kernel modules from 1. <<
2169 <<
2170 On 32-bit, the kernel physical and <<
2171 randomized together. They will be r <<
2172 512MB (8 bits of entropy). <<
2173 <<
2174 Entropy is generated using the RDRA <<
2175 supported. If RDTSC is supported, i <<
2176 the entropy pool as well. If neithe <<
2177 supported, then entropy is read fro <<
2178 usable entropy is limited by the ke <<
2179 2GB addressing, and that PHYSICAL_A <<
2180 minimum of 2MB. As a result, only 1 <<
2181 theoretically possible, but the imp <<
2182 limited due to memory layouts. <<
2183 2625
2184 If unsure, say Y. !! 2626 This option allows the amount of space reserved for the table to be
>> 2627 adjusted, although the default of 1Mb should be ok in most cases.
2185 2628
2186 # Relocation on x86 needs some additional bui !! 2629 The build will fail and a valid size suggested if this is too small.
2187 config X86_NEED_RELOCS <<
2188 def_bool y <<
2189 depends on RANDOMIZE_BASE || (X86_32 <<
2190 2630
2191 config PHYSICAL_ALIGN !! 2631 If unsure, leave at the default value.
2192 hex "Alignment value to which kernel !! 2632
2193 default "0x200000" !! 2633 config RANDOMIZE_BASE
2194 range 0x2000 0x1000000 if X86_32 !! 2634 bool "Randomize the address of the kernel image"
2195 range 0x200000 0x1000000 if X86_64 !! 2635 depends on RELOCATABLE
2196 help 2636 help
2197 This value puts the alignment restr !! 2637 Randomizes the physical and virtual address at which the
2198 where kernel is loaded and run from !! 2638 kernel image is loaded, as a security feature that
2199 address which meets above alignment !! 2639 deters exploit attempts relying on knowledge of the location
>> 2640 of kernel internals.
2200 2641
2201 If bootloader loads the kernel at a !! 2642 Entropy is generated using any coprocessor 0 registers available.
2202 CONFIG_RELOCATABLE is set, kernel w <<
2203 address aligned to above value and <<
2204 2643
2205 If bootloader loads the kernel at a !! 2644 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2206 CONFIG_RELOCATABLE is not set, kern <<
2207 load address and decompress itself <<
2208 compiled for and run from there. Th <<
2209 compiled already meets above alignm <<
2210 end result is that kernel runs from <<
2211 above alignment restrictions. <<
2212 2645
2213 On 32-bit this value must be a mult !! 2646 If unsure, say N.
2214 this value must be a multiple of 0x !! 2647
>> 2648 config RANDOMIZE_BASE_MAX_OFFSET
>> 2649 hex "Maximum kASLR offset" if EXPERT
>> 2650 depends on RANDOMIZE_BASE
>> 2651 range 0x0 0x40000000 if EVA || 64BIT
>> 2652 range 0x0 0x08000000
>> 2653 default "0x01000000"
>> 2654 help
>> 2655 When kASLR is active, this provides the maximum offset that will
>> 2656 be applied to the kernel image. It should be set according to the
>> 2657 amount of physical RAM available in the target system minus
>> 2658 PHYSICAL_START and must be a power of 2.
2215 2659
2216 Don't change this unless you know w !! 2660 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2661 EVA or 64-bit. The default is 16Mb.
2217 2662
2218 config DYNAMIC_MEMORY_LAYOUT !! 2663 config NODES_SHIFT
2219 bool !! 2664 int
>> 2665 default "6"
>> 2666 depends on NUMA
>> 2667
>> 2668 config HW_PERF_EVENTS
>> 2669 bool "Enable hardware performance counter support for perf events"
>> 2670 depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
>> 2671 default y
2220 help 2672 help
2221 This option makes base addresses of !! 2673 Enable hardware performance counter support for perf events. If
2222 __PAGE_OFFSET movable during boot. !! 2674 disabled, perf events will use software events only.
2223 2675
2224 config RANDOMIZE_MEMORY !! 2676 config DMI
2225 bool "Randomize the kernel memory sec !! 2677 bool "Enable DMI scanning"
2226 depends on X86_64 !! 2678 depends on MACH_LOONGSON64
2227 depends on RANDOMIZE_BASE !! 2679 select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2228 select DYNAMIC_MEMORY_LAYOUT !! 2680 default y
2229 default RANDOMIZE_BASE <<
2230 help 2681 help
2231 Randomizes the base virtual address !! 2682 Enabled scanning of DMI to identify machine quirks. Say Y
2232 (physical memory mapping, vmalloc & !! 2683 here unless you have verified that your setup is not
2233 makes exploits relying on predictab !! 2684 affected by entries in the DMI blacklist. Required by PNP
2234 !! 2685 BIOS code.
2235 The order of allocations remains un <<
2236 the same way as RANDOMIZE_BASE. Cur <<
2237 configuration have in average 30,00 <<
2238 addresses for each memory section. <<
2239 2686
2240 If unsure, say Y. !! 2687 config SMP
>> 2688 bool "Multi-Processing support"
>> 2689 depends on SYS_SUPPORTS_SMP
>> 2690 help
>> 2691 This enables support for systems with more than one CPU. If you have
>> 2692 a system with only one CPU, say N. If you have a system with more
>> 2693 than one CPU, say Y.
2241 2694
2242 config RANDOMIZE_MEMORY_PHYSICAL_PADDING !! 2695 If you say N here, the kernel will run on uni- and multiprocessor
2243 hex "Physical memory mapping padding" !! 2696 machines, but will use only one CPU of a multiprocessor machine. If
2244 depends on RANDOMIZE_MEMORY !! 2697 you say Y here, the kernel will run on many, but not all,
2245 default "0xa" if MEMORY_HOTPLUG !! 2698 uniprocessor machines. On a uniprocessor machine, the kernel
2246 default "0x0" !! 2699 will run faster if you say N here.
2247 range 0x1 0x40 if MEMORY_HOTPLUG <<
2248 range 0x0 0x40 <<
2249 help <<
2250 Define the padding in terabytes add <<
2251 memory size during kernel memory ra <<
2252 for memory hotplug support but redu <<
2253 address randomization. <<
2254 2700
2255 If unsure, leave at the default val !! 2701 People using multiprocessor machines who say Y here should also say
>> 2702 Y to "Enhanced Real Time Clock Support", below.
2256 2703
2257 config ADDRESS_MASKING !! 2704 See also the SMP-HOWTO available at
2258 bool "Linear Address Masking support" !! 2705 <https://www.tldp.org/docs.html#howto>.
2259 depends on X86_64 <<
2260 depends on COMPILE_TEST || !CPU_MITIG <<
2261 help <<
2262 Linear Address Masking (LAM) modifi <<
2263 to 64-bit linear addresses, allowin <<
2264 untranslated address bits for metad <<
2265 2706
2266 The capability can be used for effi !! 2707 If you don't know what to do here, say N.
2267 implementation and for optimization <<
2268 2708
2269 config HOTPLUG_CPU 2709 config HOTPLUG_CPU
2270 def_bool y !! 2710 bool "Support for hot-pluggable CPUs"
2271 depends on SMP !! 2711 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2272 <<
2273 config COMPAT_VDSO <<
2274 def_bool n <<
2275 prompt "Disable the 32-bit vDSO (need <<
2276 depends on COMPAT_32 <<
2277 help 2712 help
2278 Certain buggy versions of glibc wil !! 2713 Say Y here to allow turning CPUs off and on. CPUs can be
2279 presented with a 32-bit vDSO that i !! 2714 controlled through /sys/devices/system/cpu.
2280 indicated in its segment table. !! 2715 (Note: power management support will enable this option
2281 !! 2716 automatically on SMP systems. )
2282 The bug was introduced by f866314b8 !! 2717 Say N if you want to disable CPU hotplug.
2283 and fixed by 3b3ddb4f7db98ec9e912cc <<
2284 49ad572a70b8aeb91e57483a11dd1b77e31 <<
2285 the only released version with the <<
2286 contains a buggy "glibc 2.3.2". <<
2287 <<
2288 The symptom of the bug is that ever <<
2289 dl_main: Assertion `(void *) ph->p_ <<
2290 <<
2291 Saying Y here changes the default v <<
2292 option from 1 to 0, which turns off <<
2293 This works around the glibc bug but <<
2294 2718
2295 If unsure, say N: if you are compil !! 2719 config SMP_UP
2296 are unlikely to be using a buggy ve !! 2720 bool
2297 2721
2298 choice !! 2722 config SYS_SUPPORTS_MIPS_CPS
2299 prompt "vsyscall table for legacy app !! 2723 bool
2300 depends on X86_64 <<
2301 default LEGACY_VSYSCALL_XONLY <<
2302 help <<
2303 Legacy user code that does not know <<
2304 to be able to issue three syscalls <<
2305 kernel space. Since this location i <<
2306 it can be used to assist security v <<
2307 <<
2308 This setting can be changed at boot <<
2309 line parameter vsyscall=[emulate|xo <<
2310 is deprecated and can only be enabl <<
2311 line. <<
2312 <<
2313 On a system with recent enough glib <<
2314 static binaries, you can say None w <<
2315 to improve security. <<
2316 2724
2317 If unsure, select "Emulate executio !! 2725 config SYS_SUPPORTS_SMP
>> 2726 bool
2318 2727
2319 config LEGACY_VSYSCALL_XONLY !! 2728 config NR_CPUS_DEFAULT_4
2320 bool "Emulate execution only" !! 2729 bool
2321 help <<
2322 The kernel traps and emulat <<
2323 address mapping and does no <<
2324 configuration is recommende <<
2325 legacy vsyscall area but su <<
2326 instrumentation of legacy c <<
2327 certain uses of the vsyscal <<
2328 buffer. <<
2329 2730
2330 config LEGACY_VSYSCALL_NONE !! 2731 config NR_CPUS_DEFAULT_8
2331 bool "None" !! 2732 bool
2332 help <<
2333 There will be no vsyscall m <<
2334 eliminate any risk of ASLR <<
2335 fixed address mapping. Atte <<
2336 will be reported to dmesg, <<
2337 malicious userspace program <<
2338 2733
2339 endchoice !! 2734 config NR_CPUS_DEFAULT_16
>> 2735 bool
2340 2736
2341 config CMDLINE_BOOL !! 2737 config NR_CPUS_DEFAULT_32
2342 bool "Built-in kernel command line" !! 2738 bool
2343 help <<
2344 Allow for specifying boot arguments <<
2345 build time. On some systems (e.g. <<
2346 necessary or convenient to provide <<
2347 kernel boot arguments with the kern <<
2348 to not rely on the boot loader to p <<
2349 <<
2350 To compile command line arguments i <<
2351 set this option to 'Y', then fill i <<
2352 boot arguments in CONFIG_CMDLINE. <<
2353 <<
2354 Systems with fully functional boot <<
2355 should leave this option set to 'N' <<
2356 <<
2357 config CMDLINE <<
2358 string "Built-in kernel command strin <<
2359 depends on CMDLINE_BOOL <<
2360 default "" <<
2361 help <<
2362 Enter arguments here that should be <<
2363 image and used at boot time. If th <<
2364 command line at boot time, it is ap <<
2365 form the full kernel command line, <<
2366 <<
2367 However, you can use the CONFIG_CMD <<
2368 change this behavior. <<
2369 <<
2370 In most cases, the command line (wh <<
2371 by the boot loader) should specify <<
2372 file system. <<
2373 <<
2374 config CMDLINE_OVERRIDE <<
2375 bool "Built-in command line overrides <<
2376 depends on CMDLINE_BOOL && CMDLINE != <<
2377 help <<
2378 Set this option to 'Y' to have the <<
2379 command line, and use ONLY the buil <<
2380 2739
2381 This is used to work around broken !! 2740 config NR_CPUS_DEFAULT_64
2382 be set to 'N' under normal conditio !! 2741 bool
2383 2742
2384 config MODIFY_LDT_SYSCALL !! 2743 config NR_CPUS
2385 bool "Enable the LDT (local descripto !! 2744 int "Maximum number of CPUs (2-256)"
2386 default y !! 2745 range 2 256
2387 help !! 2746 depends on SMP
2388 Linux can allow user programs to in !! 2747 default "4" if NR_CPUS_DEFAULT_4
2389 Local Descriptor Table (LDT) using !! 2748 default "8" if NR_CPUS_DEFAULT_8
2390 call. This is required to run 16-b !! 2749 default "16" if NR_CPUS_DEFAULT_16
2391 DOSEMU or some Wine programs. It i !! 2750 default "32" if NR_CPUS_DEFAULT_32
2392 threading libraries. !! 2751 default "64" if NR_CPUS_DEFAULT_64
2393 <<
2394 Enabling this feature adds a small <<
2395 context switches and increases the <<
2396 surface. Disabling it removes the <<
2397 <<
2398 Saying 'N' here may make sense for <<
2399 <<
2400 config STRICT_SIGALTSTACK_SIZE <<
2401 bool "Enforce strict size checking fo <<
2402 depends on DYNAMIC_SIGFRAME <<
2403 help <<
2404 For historical reasons MINSIGSTKSZ <<
2405 already too small with AVX512 suppo <<
2406 enforce strict checking of the siga <<
2407 real size of the FPU frame. This op <<
2408 by default. It can also be controll <<
2409 line option 'strict_sas_size' indep <<
2410 switch. Enabling it might break exi <<
2411 allocate a too small sigaltstack bu <<
2412 never get a signal delivered. <<
2413 <<
2414 Say 'N' unless you want to really e <<
2415 <<
2416 config CFI_AUTO_DEFAULT <<
2417 bool "Attempt to use FineIBT by defau <<
2418 depends on FINEIBT <<
2419 default y <<
2420 help 2752 help
2421 Attempt to use FineIBT by default a !! 2753 This allows you to specify the maximum number of CPUs which this
2422 this is the same as booting with "c !! 2754 kernel will support. The maximum supported value is 32 for 32-bit
2423 this is the same as booting with "c !! 2755 kernel and 64 for 64-bit kernels; the minimum value which makes
2424 !! 2756 sense is 1 for Qemu (useful only for kernel debugging purposes)
2425 source "kernel/livepatch/Kconfig" !! 2757 and 2 for all others.
2426 !! 2758
2427 endmenu !! 2759 This is purely to save memory - each supported CPU adds
2428 !! 2760 approximately eight kilobytes to the kernel image. For best
2429 config CC_HAS_NAMED_AS !! 2761 performance should round up your number of processors to the next
2430 def_bool $(success,echo 'int __seg_fs !! 2762 power of two.
2431 depends on CC_IS_GCC <<
2432 <<
2433 config CC_HAS_NAMED_AS_FIXED_SANITIZERS <<
2434 def_bool CC_IS_GCC && GCC_VERSION >= <<
2435 <<
2436 config USE_X86_SEG_SUPPORT <<
2437 def_bool y <<
2438 depends on CC_HAS_NAMED_AS <<
2439 # <<
2440 # -fsanitize=kernel-address (KASAN) a <<
2441 # (KCSAN) are incompatible with named <<
2442 # GCC < 13.3 - see GCC PR sanitizer/1 <<
2443 # <<
2444 depends on !(KASAN || KCSAN) || CC_HA <<
2445 <<
2446 config CC_HAS_SLS <<
2447 def_bool $(cc-option,-mharden-sls=all <<
2448 2763
2449 config CC_HAS_RETURN_THUNK !! 2764 config MIPS_PERF_SHARED_TC_COUNTERS
2450 def_bool $(cc-option,-mfunction-retur !! 2765 bool
2451 2766
2452 config CC_HAS_ENTRY_PADDING !! 2767 config MIPS_NR_CPU_NR_MAP_1024
2453 def_bool $(cc-option,-fpatchable-func !! 2768 bool
2454 2769
2455 config FUNCTION_PADDING_CFI !! 2770 config MIPS_NR_CPU_NR_MAP
2456 int 2771 int
2457 default 59 if FUNCTION_ALIGNMENT_64B !! 2772 depends on SMP
2458 default 27 if FUNCTION_ALIGNMENT_32B !! 2773 default 1024 if MIPS_NR_CPU_NR_MAP_1024
2459 default 11 if FUNCTION_ALIGNMENT_16B !! 2774 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2460 default 3 if FUNCTION_ALIGNMENT_8B <<
2461 default 0 <<
2462 <<
2463 # Basically: FUNCTION_ALIGNMENT - 5*CFI_CLANG <<
2464 # except Kconfig can't do arithmetic :/ <<
2465 config FUNCTION_PADDING_BYTES <<
2466 int <<
2467 default FUNCTION_PADDING_CFI if CFI_C <<
2468 default FUNCTION_ALIGNMENT <<
2469 2775
2470 config CALL_PADDING !! 2776 #
2471 def_bool n !! 2777 # Timer Interrupt Frequency Configuration
2472 depends on CC_HAS_ENTRY_PADDING && OB !! 2778 #
2473 select FUNCTION_ALIGNMENT_16B <<
2474 2779
2475 config FINEIBT !! 2780 choice
2476 def_bool y !! 2781 prompt "Timer frequency"
2477 depends on X86_KERNEL_IBT && CFI_CLAN !! 2782 default HZ_250
2478 select CALL_PADDING !! 2783 help
>> 2784 Allows the configuration of the timer frequency.
2479 2785
2480 config HAVE_CALL_THUNKS !! 2786 config HZ_24
2481 def_bool y !! 2787 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2482 depends on CC_HAS_ENTRY_PADDING && MI <<
2483 2788
2484 config CALL_THUNKS !! 2789 config HZ_48
2485 def_bool n !! 2790 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2486 select CALL_PADDING <<
2487 2791
2488 config PREFIX_SYMBOLS !! 2792 config HZ_100
2489 def_bool y !! 2793 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2490 depends on CALL_PADDING && !CFI_CLANG <<
2491 2794
2492 menuconfig CPU_MITIGATIONS !! 2795 config HZ_128
2493 bool "Mitigations for CPU vulnerabili !! 2796 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2494 default y <<
2495 help <<
2496 Say Y here to enable options which <<
2497 vulnerabilities (usually related to <<
2498 Mitigations can be disabled or rest <<
2499 via the "mitigations" kernel parame <<
2500 2797
2501 If you say N, all mitigations will !! 2798 config HZ_250
2502 overridden at runtime. !! 2799 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2503 2800
2504 Say 'Y', unless you really know wha !! 2801 config HZ_256
>> 2802 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2505 2803
2506 if CPU_MITIGATIONS !! 2804 config HZ_1000
>> 2805 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2507 2806
2508 config MITIGATION_PAGE_TABLE_ISOLATION !! 2807 config HZ_1024
2509 bool "Remove the kernel mapping in us !! 2808 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2510 default y <<
2511 depends on (X86_64 || X86_PAE) <<
2512 help <<
2513 This feature reduces the number of <<
2514 ensuring that the majority of kerne <<
2515 into userspace. <<
2516 2809
2517 See Documentation/arch/x86/pti.rst !! 2810 endchoice
2518 2811
2519 config MITIGATION_RETPOLINE !! 2812 config SYS_SUPPORTS_24HZ
2520 bool "Avoid speculative indirect bran !! 2813 bool
2521 select OBJTOOL if HAVE_OBJTOOL <<
2522 default y <<
2523 help <<
2524 Compile kernel with the retpoline c <<
2525 kernel-to-user data leaks by avoidi <<
2526 branches. Requires a compiler with <<
2527 support for full protection. The ke <<
2528 <<
2529 config MITIGATION_RETHUNK <<
2530 bool "Enable return-thunks" <<
2531 depends on MITIGATION_RETPOLINE && CC <<
2532 select OBJTOOL if HAVE_OBJTOOL <<
2533 default y if X86_64 <<
2534 help <<
2535 Compile the kernel with the return- <<
2536 against kernel-to-user data leaks b <<
2537 Requires a compiler with -mfunction <<
2538 support for full protection. The ke <<
2539 <<
2540 config MITIGATION_UNRET_ENTRY <<
2541 bool "Enable UNRET on kernel entry" <<
2542 depends on CPU_SUP_AMD && MITIGATION_ <<
2543 default y <<
2544 help <<
2545 Compile the kernel with support for <<
2546 2814
2547 config MITIGATION_CALL_DEPTH_TRACKING !! 2815 config SYS_SUPPORTS_48HZ
2548 bool "Mitigate RSB underflow with cal !! 2816 bool
2549 depends on CPU_SUP_INTEL && HAVE_CALL <<
2550 select HAVE_DYNAMIC_FTRACE_NO_PATCHAB <<
2551 select CALL_THUNKS <<
2552 default y <<
2553 help <<
2554 Compile the kernel with call depth <<
2555 SKL Return-Speculation-Buffer (RSB) <<
2556 mitigation is off by default and ne <<
2557 kernel command line via the retblee <<
2558 non-affected systems the overhead o <<
2559 the call depth tracking is using ru <<
2560 in a compiler generated padding are <<
2561 increases text size by ~5%. For non <<
2562 is unused. On affected SKL systems <<
2563 performance gain over the IBRS miti <<
2564 <<
2565 config CALL_THUNKS_DEBUG <<
2566 bool "Enable call thunks and call dep <<
2567 depends on MITIGATION_CALL_DEPTH_TRAC <<
2568 select FUNCTION_ALIGNMENT_32B <<
2569 default n <<
2570 help <<
2571 Enable call/ret counters for imbala <<
2572 a noisy dmesg about callthunks gene <<
2573 trouble shooting. The debug prints <<
2574 kernel command line with 'debug-cal <<
2575 Only enable this when you are debug <<
2576 creates a noticeable runtime overhe <<
2577 <<
2578 config MITIGATION_IBPB_ENTRY <<
2579 bool "Enable IBPB on kernel entry" <<
2580 depends on CPU_SUP_AMD && X86_64 <<
2581 default y <<
2582 help <<
2583 Compile the kernel with support for <<
2584 2817
2585 config MITIGATION_IBRS_ENTRY !! 2818 config SYS_SUPPORTS_100HZ
2586 bool "Enable IBRS on kernel entry" !! 2819 bool
2587 depends on CPU_SUP_INTEL && X86_64 <<
2588 default y <<
2589 help <<
2590 Compile the kernel with support for <<
2591 This mitigates both spectre_v2 and <<
2592 performance. <<
2593 2820
2594 config MITIGATION_SRSO !! 2821 config SYS_SUPPORTS_128HZ
2595 bool "Mitigate speculative RAS overfl !! 2822 bool
2596 depends on CPU_SUP_AMD && X86_64 && M <<
2597 default y <<
2598 help <<
2599 Enable the SRSO mitigation needed o <<
2600 2823
2601 config MITIGATION_SLS !! 2824 config SYS_SUPPORTS_250HZ
2602 bool "Mitigate Straight-Line-Speculat !! 2825 bool
2603 depends on CC_HAS_SLS && X86_64 <<
2604 select OBJTOOL if HAVE_OBJTOOL <<
2605 default n <<
2606 help <<
2607 Compile the kernel with straight-li <<
2608 against straight line speculation. <<
2609 larger. <<
2610 <<
2611 config MITIGATION_GDS <<
2612 bool "Mitigate Gather Data Sampling" <<
2613 depends on CPU_SUP_INTEL <<
2614 default y <<
2615 help <<
2616 Enable mitigation for Gather Data S <<
2617 vulnerability which allows unprivil <<
2618 which was previously stored in vect <<
2619 instructions to infer the stale vec <<
2620 <<
2621 config MITIGATION_RFDS <<
2622 bool "RFDS Mitigation" <<
2623 depends on CPU_SUP_INTEL <<
2624 default y <<
2625 help <<
2626 Enable mitigation for Register File <<
2627 RFDS is a hardware vulnerability wh <<
2628 allows unprivileged speculative acc <<
2629 stored in floating point, vector an <<
2630 See also <file:Documentation/admin- <<
2631 <<
2632 config MITIGATION_SPECTRE_BHI <<
2633 bool "Mitigate Spectre-BHB (Branch Hi <<
2634 depends on CPU_SUP_INTEL <<
2635 default y <<
2636 help <<
2637 Enable BHI mitigations. BHI attacks <<
2638 where the branch history buffer is <<
2639 indirect branches. <<
2640 See <file:Documentation/admin-guide <<
2641 <<
2642 config MITIGATION_MDS <<
2643 bool "Mitigate Microarchitectural Dat <<
2644 depends on CPU_SUP_INTEL <<
2645 default y <<
2646 help <<
2647 Enable mitigation for Microarchitec <<
2648 a hardware vulnerability which allo <<
2649 to data which is available in vario <<
2650 See also <file:Documentation/admin- <<
2651 <<
2652 config MITIGATION_TAA <<
2653 bool "Mitigate TSX Asynchronous Abort <<
2654 depends on CPU_SUP_INTEL <<
2655 default y <<
2656 help <<
2657 Enable mitigation for TSX Asynchron <<
2658 vulnerability that allows unprivile <<
2659 which is available in various CPU i <<
2660 asynchronous aborts within an Intel <<
2661 See also <file:Documentation/admin- <<
2662 <<
2663 config MITIGATION_MMIO_STALE_DATA <<
2664 bool "Mitigate MMIO Stale Data hardwa <<
2665 depends on CPU_SUP_INTEL <<
2666 default y <<
2667 help <<
2668 Enable mitigation for MMIO Stale Da <<
2669 Stale Data Vulnerabilities are a cl <<
2670 vulnerabilities that can expose dat <<
2671 attacker to have access to MMIO. <<
2672 See also <<
2673 <file:Documentation/admin-guide/hw- <<
2674 <<
2675 config MITIGATION_L1TF <<
2676 bool "Mitigate L1 Terminal Fault (L1T <<
2677 depends on CPU_SUP_INTEL <<
2678 default y <<
2679 help <<
2680 Mitigate L1 Terminal Fault (L1TF) h <<
2681 hardware vulnerability which allows <<
2682 available in the Level 1 Data Cache <<
2683 See <file:Documentation/admin-guide <<
2684 <<
2685 config MITIGATION_RETBLEED <<
2686 bool "Mitigate RETBleed hardware bug" <<
2687 depends on (CPU_SUP_INTEL && MITIGATI <<
2688 default y <<
2689 help <<
2690 Enable mitigation for RETBleed (Arb <<
2691 with Return Instructions) vulnerabi <<
2692 execution attack which takes advant <<
2693 in many modern microprocessors, sim <<
2694 unprivileged attacker can use these <<
2695 memory security restrictions to gai <<
2696 that would otherwise be inaccessibl <<
2697 2826
2698 config MITIGATION_SPECTRE_V1 !! 2827 config SYS_SUPPORTS_256HZ
2699 bool "Mitigate SPECTRE V1 hardware bu !! 2828 bool
2700 default y <<
2701 help <<
2702 Enable mitigation for Spectre V1 (B <<
2703 class of side channel attacks that <<
2704 execution that bypasses conditional <<
2705 memory access bounds check. <<
2706 See also <file:Documentation/admin- <<
2707 2829
2708 config MITIGATION_SPECTRE_V2 !! 2830 config SYS_SUPPORTS_1000HZ
2709 bool "Mitigate SPECTRE V2 hardware bu !! 2831 bool
2710 default y <<
2711 help <<
2712 Enable mitigation for Spectre V2 (B <<
2713 V2 is a class of side channel attac <<
2714 indirect branch predictors inside t <<
2715 attacks, the attacker can steer spe <<
2716 victim to gadget code by poisoning <<
2717 used for predicting indirect branch <<
2718 See also <file:Documentation/admin- <<
2719 <<
2720 config MITIGATION_SRBDS <<
2721 bool "Mitigate Special Register Buffe <<
2722 depends on CPU_SUP_INTEL <<
2723 default y <<
2724 help <<
2725 Enable mitigation for Special Regis <<
2726 SRBDS is a hardware vulnerability t <<
2727 Sampling (MDS) techniques to infer <<
2728 register accesses. An unprivileged <<
2729 from RDRAND and RDSEED executed on <<
2730 using MDS techniques. <<
2731 See also <<
2732 <file:Documentation/admin-guide/hw- <<
2733 2832
2734 config MITIGATION_SSB !! 2833 config SYS_SUPPORTS_1024HZ
2735 bool "Mitigate Speculative Store Bypa !! 2834 bool
2736 default y <<
2737 help <<
2738 Enable mitigation for Speculative S <<
2739 hardware security vulnerability and <<
2740 of speculative execution in a simil <<
2741 security vulnerabilities. <<
2742 2835
2743 endif !! 2836 config SYS_SUPPORTS_ARBIT_HZ
>> 2837 bool
>> 2838 default y if !SYS_SUPPORTS_24HZ && \
>> 2839 !SYS_SUPPORTS_48HZ && \
>> 2840 !SYS_SUPPORTS_100HZ && \
>> 2841 !SYS_SUPPORTS_128HZ && \
>> 2842 !SYS_SUPPORTS_250HZ && \
>> 2843 !SYS_SUPPORTS_256HZ && \
>> 2844 !SYS_SUPPORTS_1000HZ && \
>> 2845 !SYS_SUPPORTS_1024HZ
2744 2846
2745 config ARCH_HAS_ADD_PAGES !! 2847 config HZ
2746 def_bool y !! 2848 int
2747 depends on ARCH_ENABLE_MEMORY_HOTPLUG !! 2849 default 24 if HZ_24
>> 2850 default 48 if HZ_48
>> 2851 default 100 if HZ_100
>> 2852 default 128 if HZ_128
>> 2853 default 250 if HZ_250
>> 2854 default 256 if HZ_256
>> 2855 default 1000 if HZ_1000
>> 2856 default 1024 if HZ_1024
2748 2857
2749 menu "Power management and ACPI options" !! 2858 config SCHED_HRTICK
>> 2859 def_bool HIGH_RES_TIMERS
2750 2860
2751 config ARCH_HIBERNATION_HEADER !! 2861 config ARCH_SUPPORTS_KEXEC
2752 def_bool y 2862 def_bool y
2753 depends on HIBERNATION <<
2754 2863
2755 source "kernel/power/Kconfig" !! 2864 config ARCH_SUPPORTS_CRASH_DUMP
2756 <<
2757 source "drivers/acpi/Kconfig" <<
2758 <<
2759 config X86_APM_BOOT <<
2760 def_bool y 2865 def_bool y
2761 depends on APM <<
2762 2866
2763 menuconfig APM !! 2867 config PHYSICAL_START
2764 tristate "APM (Advanced Power Managem !! 2868 hex "Physical address where the kernel is loaded"
2765 depends on X86_32 && PM_SLEEP !! 2869 default "0xffffffff84000000"
2766 help !! 2870 depends on CRASH_DUMP
2767 APM is a BIOS specification for sav !! 2871 help
2768 techniques. This is mostly useful f !! 2872 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2769 APM compliant BIOSes. If you say Y !! 2873 If you plan to use kernel for capturing the crash dump change
2770 reset after a RESUME operation, the !! 2874 this value to start of the reserved region (the "X" value as
2771 battery status information, and use !! 2875 specified in the "crashkernel=YM@XM" command line boot parameter
2772 notification of APM "events" (e.g. !! 2876 passed to the panic-ed kernel).
2773 !! 2877
2774 If you select "Y" here, you can dis !! 2878 config MIPS_O32_FP64_SUPPORT
2775 BIOS by passing the "apm=off" optio !! 2879 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2776 !! 2880 depends on 32BIT || MIPS32_O32
2777 Note that the APM support is almost !! 2881 help
2778 machines with more than one CPU. !! 2882 When this is enabled, the kernel will support use of 64-bit floating
2779 !! 2883 point registers with binaries using the O32 ABI along with the
2780 In order to use APM, you will need !! 2884 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2781 and more information, read <file:Do !! 2885 32-bit MIPS systems this support is at the cost of increasing the
2782 and the Battery Powered Linux mini- !! 2886 size and complexity of the compiled FPU emulator. Thus if you are
2783 <http://www.tldp.org/docs.html#howt !! 2887 running a MIPS32 system and know that none of your userland binaries
2784 !! 2888 will require 64-bit floating point, you may wish to reduce the size
2785 This driver does not spin down disk !! 2889 of your kernel & potentially improve FP emulation performance by
2786 manpage ("man 8 hdparm") for that), !! 2890 saying N here.
2787 VESA-compliant "green" monitors. !! 2891
2788 !! 2892 Although binutils currently supports use of this flag the details
2789 This driver does not support the TI !! 2893 concerning its effect upon the O32 ABI in userland are still being
2790 486/DX4/75 because they don't have !! 2894 worked on. In order to avoid userland becoming dependent upon current
2791 desktop machines also don't have co !! 2895 behaviour before the details have been finalised, this option should
2792 may cause those machines to panic d !! 2896 be considered experimental and only enabled by those working upon
2793 !! 2897 said details.
2794 Generally, if you don't have a batt <<
2795 much point in using this driver and <<
2796 random kernel OOPSes or reboots tha <<
2797 anything, try disabling/enabling th <<
2798 APM in your BIOS). <<
2799 <<
2800 Some other things you should try wh <<
2801 "weird" problems: <<
2802 <<
2803 1) make sure that you have enough s <<
2804 enabled. <<
2805 2) pass the "idle=poll" option to t <<
2806 3) switch on floating point emulati <<
2807 the "no387" option to the kernel <<
2808 4) pass the "floppy=nodma" option t <<
2809 5) pass the "mem=4M" option to the <<
2810 all but the first 4 MB of RAM) <<
2811 6) make sure that the CPU is not ov <<
2812 7) read the sig11 FAQ at <http://ww <<
2813 8) disable the cache from your BIOS <<
2814 9) install a fan for the video card <<
2815 10) install a better fan for the CP <<
2816 11) exchange RAM chips <<
2817 12) exchange the motherboard. <<
2818 <<
2819 To compile this driver as a module, <<
2820 module will be called apm. <<
2821 <<
2822 if APM <<
2823 <<
2824 config APM_IGNORE_USER_SUSPEND <<
2825 bool "Ignore USER SUSPEND" <<
2826 help <<
2827 This option will ignore USER SUSPEN <<
2828 compliant APM BIOS, you want to say <<
2829 series notebooks, it is necessary t <<
2830 <<
2831 config APM_DO_ENABLE <<
2832 bool "Enable PM at boot time" <<
2833 help <<
2834 Enable APM features at boot time. F <<
2835 specification: "When disabled, the <<
2836 power manage devices, enter the Sta <<
2837 State, or take power saving steps i <<
2838 This driver will make CPU Idle call <<
2839 feature is turned off -- see "Do CP <<
2840 should always save battery power, b <<
2841 will be dependent on your BIOS impl <<
2842 this option off if your computer ha <<
2843 support, or if it beeps continuousl <<
2844 this off if you have a NEC UltraLit <<
2845 T400CDT. This is off by default sin <<
2846 this feature. <<
2847 <<
2848 config APM_CPU_IDLE <<
2849 depends on CPU_IDLE <<
2850 bool "Make CPU Idle calls when idle" <<
2851 help <<
2852 Enable calls to APM CPU Idle/CPU Bu <<
2853 On some machines, this can activate <<
2854 a slowed CPU clock rate, when the m <<
2855 are made after the idle loop has ru <<
2856 333 mS). On some machines, this wil <<
2857 whenever the CPU becomes idle. (On <<
2858 this option does nothing.) <<
2859 <<
2860 config APM_DISPLAY_BLANK <<
2861 bool "Enable console blanking using A <<
2862 help <<
2863 Enable console blanking using the A <<
2864 turn off the LCD backlight when the <<
2865 virtual console blanks the screen. <<
2866 the virtual console screen blanker, <<
2867 when using the X Window system. Thi <<
2868 do with your VESA-compliant power-s <<
2869 option doesn't work for all laptops <<
2870 backlight at all, or it might print <<
2871 especially if you are using gpm. <<
2872 <<
2873 config APM_ALLOW_INTS <<
2874 bool "Allow interrupts during APM BIO <<
2875 help <<
2876 Normally we disable external interr <<
2877 the APM BIOS as a measure to lessen <<
2878 BIOS implementation. The BIOS shou <<
2879 needs to. Unfortunately, some BIOS <<
2880 many of the newer IBM Thinkpads. I <<
2881 suspend, try setting this to Y. Ot <<
2882 <<
2883 endif # APM <<
2884 <<
2885 source "drivers/cpufreq/Kconfig" <<
2886 2898
2887 source "drivers/cpuidle/Kconfig" !! 2899 If unsure, say N.
2888 2900
2889 source "drivers/idle/Kconfig" !! 2901 config USE_OF
>> 2902 bool
>> 2903 select OF
>> 2904 select OF_EARLY_FLATTREE
>> 2905 select IRQ_DOMAIN
2890 2906
2891 endmenu !! 2907 config UHI_BOOT
>> 2908 bool
2892 2909
2893 menu "Bus options (PCI etc.)" !! 2910 config BUILTIN_DTB
>> 2911 bool
2894 2912
2895 choice 2913 choice
2896 prompt "PCI access mode" !! 2914 prompt "Kernel appended dtb support" if USE_OF
2897 depends on X86_32 && PCI !! 2915 default MIPS_NO_APPENDED_DTB
2898 default PCI_GOANY !! 2916
2899 help !! 2917 config MIPS_NO_APPENDED_DTB
2900 On PCI systems, the BIOS can be use !! 2918 bool "None"
2901 determine their configuration. Howe !! 2919 help
2902 have BIOS bugs and may crash if thi !! 2920 Do not enable appended dtb support.
2903 PCI-based systems don't have any BI <<
2904 detect the PCI hardware directly wi <<
2905 <<
2906 With this option, you can specify h <<
2907 PCI devices. If you choose "BIOS", <<
2908 if you choose "Direct", the BIOS wo <<
2909 choose "MMConfig", then PCI Express <<
2910 If you choose "Any", the kernel wil <<
2911 direct access method and falls back <<
2912 work. If unsure, go with the defaul <<
2913 <<
2914 config PCI_GOBIOS <<
2915 bool "BIOS" <<
2916 <<
2917 config PCI_GOMMCONFIG <<
2918 bool "MMConfig" <<
2919 <<
2920 config PCI_GODIRECT <<
2921 bool "Direct" <<
2922 <<
2923 config PCI_GOOLPC <<
2924 bool "OLPC XO-1" <<
2925 depends on OLPC <<
2926 2921
2927 config PCI_GOANY !! 2922 config MIPS_ELF_APPENDED_DTB
2928 bool "Any" !! 2923 bool "vmlinux"
>> 2924 help
>> 2925 With this option, the boot code will look for a device tree binary
>> 2926 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2927 it is empty and the DTB can be appended using binutils command
>> 2928 objcopy:
>> 2929
>> 2930 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2931
>> 2932 This is meant as a backward compatibility convenience for those
>> 2933 systems with a bootloader that can't be upgraded to accommodate
>> 2934 the documented boot protocol using a device tree.
2929 2935
>> 2936 config MIPS_RAW_APPENDED_DTB
>> 2937 bool "vmlinux.bin or vmlinuz.bin"
>> 2938 help
>> 2939 With this option, the boot code will look for a device tree binary
>> 2940 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2941 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2942
>> 2943 This is meant as a backward compatibility convenience for those
>> 2944 systems with a bootloader that can't be upgraded to accommodate
>> 2945 the documented boot protocol using a device tree.
>> 2946
>> 2947 Beware that there is very little in terms of protection against
>> 2948 this option being confused by leftover garbage in memory that might
>> 2949 look like a DTB header after a reboot if no actual DTB is appended
>> 2950 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2951 if you don't intend to always append a DTB.
2930 endchoice 2952 endchoice
2931 2953
2932 config PCI_BIOS !! 2954 choice
2933 def_bool y !! 2955 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2934 depends on X86_32 && PCI && (PCI_GOBI !! 2956 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
>> 2957 !MACH_LOONGSON64 && !MIPS_MALTA && \
>> 2958 !CAVIUM_OCTEON_SOC
>> 2959 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2960
>> 2961 config MIPS_CMDLINE_FROM_DTB
>> 2962 depends on USE_OF
>> 2963 bool "Dtb kernel arguments if available"
>> 2964
>> 2965 config MIPS_CMDLINE_DTB_EXTEND
>> 2966 depends on USE_OF
>> 2967 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2968
>> 2969 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2970 bool "Bootloader kernel arguments if available"
>> 2971
>> 2972 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2973 depends on CMDLINE_BOOL
>> 2974 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2975 endchoice
2935 2976
2936 # x86-64 doesn't support PCI BIOS access from !! 2977 endmenu
2937 config PCI_DIRECT <<
2938 def_bool y <<
2939 depends on PCI && (X86_64 || (PCI_GOD <<
2940 2978
2941 config PCI_MMCONFIG !! 2979 config LOCKDEP_SUPPORT
2942 bool "Support mmconfig PCI config spa !! 2980 bool
2943 default y 2981 default y
2944 depends on PCI && (ACPI || JAILHOUSE_ <<
2945 depends on X86_64 || (PCI_GOANY || PC <<
2946 2982
2947 config PCI_OLPC !! 2983 config STACKTRACE_SUPPORT
2948 def_bool y !! 2984 bool
2949 depends on PCI && OLPC && (PCI_GOOLPC !! 2985 default y
2950 2986
2951 config PCI_XEN !! 2987 config PGTABLE_LEVELS
2952 def_bool y !! 2988 int
2953 depends on PCI && XEN !! 2989 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2990 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 2991 default 2
2954 2992
2955 config MMCONF_FAM10H !! 2993 config MIPS_AUTO_PFN_OFFSET
2956 def_bool y !! 2994 bool
2957 depends on X86_64 && PCI_MMCONFIG && <<
2958 2995
2959 config PCI_CNB20LE_QUIRK !! 2996 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2960 bool "Read CNB20LE Host Bridge Window <<
2961 depends on PCI <<
2962 help <<
2963 Read the PCI windows out of the CNB <<
2964 PCI hotplug to work on systems with <<
2965 not have ACPI. <<
2966 2997
2967 There's no public spec for this chi !! 2998 config PCI_DRIVERS_GENERIC
2968 is known to be incomplete. !! 2999 select PCI_DOMAINS_GENERIC if PCI
>> 3000 bool
2969 3001
2970 You should say N unless you know yo !! 3002 config PCI_DRIVERS_LEGACY
>> 3003 def_bool !PCI_DRIVERS_GENERIC
>> 3004 select NO_GENERIC_PCI_IOPORT_MAP
>> 3005 select PCI_DOMAINS if PCI
2971 3006
2972 config ISA_BUS !! 3007 #
2973 bool "ISA bus support on modern syste !! 3008 # ISA support is now enabled via select. Too many systems still have the one
2974 help !! 3009 # or other ISA chip on the board that users don't know about so don't expect
2975 Expose ISA bus device drivers and o !! 3010 # users to choose the right thing ...
2976 configuration. Enable this option i !! 3011 #
2977 bus. ISA is an older system, displa !! 3012 config ISA
2978 architectures -- if your target mac !! 3013 bool
2979 not have an ISA bus. <<
2980 3014
2981 If unsure, say N. !! 3015 config TC
>> 3016 bool "TURBOchannel support"
>> 3017 depends on MACH_DECSTATION
>> 3018 help
>> 3019 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3020 processors. TURBOchannel programming specifications are available
>> 3021 at:
>> 3022 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3023 and:
>> 3024 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3025 Linux driver support status is documented at:
>> 3026 <http://www.linux-mips.org/wiki/DECstation>
2982 3027
2983 # x86_64 have no ISA slots, but can have ISA- !! 3028 config MMU
2984 config ISA_DMA_API !! 3029 bool
2985 bool "ISA-style DMA support" if (X86_ <<
2986 default y 3030 default y
2987 help <<
2988 Enables ISA-style DMA support for d <<
2989 If unsure, say Y. <<
2990 3031
2991 if X86_32 !! 3032 config ARCH_MMAP_RND_BITS_MIN
>> 3033 default 12 if 64BIT
>> 3034 default 8
>> 3035
>> 3036 config ARCH_MMAP_RND_BITS_MAX
>> 3037 default 18 if 64BIT
>> 3038 default 15
2992 3039
2993 config ISA !! 3040 config ARCH_MMAP_RND_COMPAT_BITS_MIN
2994 bool "ISA support" !! 3041 default 8
2995 help <<
2996 Find out whether you have ISA slots <<
2997 name of a bus system, i.e. the way <<
2998 inside your box. Other bus systems <<
2999 (MCA) or VESA. ISA is an older sys <<
3000 newer boards don't support it. If <<
3001 <<
3002 config SCx200 <<
3003 tristate "NatSemi SCx200 support" <<
3004 help <<
3005 This provides basic support for Nat <<
3006 (now AMD's) Geode processors. The <<
3007 PCI-IDs of several on-chip devices, <<
3008 for other scx200_* drivers. <<
3009 <<
3010 If compiled as a module, the driver <<
3011 <<
3012 config SCx200HR_TIMER <<
3013 tristate "NatSemi SCx200 27MHz High-R <<
3014 depends on SCx200 <<
3015 default y <<
3016 help <<
3017 This driver provides a clocksource <<
3018 27MHz high-resolution timer. Its a <<
3019 NSC Geode SC-1100's buggy TSC, whic <<
3020 processor goes idle (as is done by <<
3021 other workaround is idle=poll boot <<
3022 <<
3023 config OLPC <<
3024 bool "One Laptop Per Child support" <<
3025 depends on !X86_PAE <<
3026 select GPIOLIB <<
3027 select OF <<
3028 select OF_PROMTREE <<
3029 select IRQ_DOMAIN <<
3030 select OLPC_EC <<
3031 help <<
3032 Add support for detecting the uniqu <<
3033 XO hardware. <<
3034 3042
3035 config OLPC_XO1_PM !! 3043 config ARCH_MMAP_RND_COMPAT_BITS_MAX
3036 bool "OLPC XO-1 Power Management" !! 3044 default 15
3037 depends on OLPC && MFD_CS5535=y && PM <<
3038 help <<
3039 Add support for poweroff and suspen <<
3040 3045
3041 config OLPC_XO1_RTC !! 3046 config I8253
3042 bool "OLPC XO-1 Real Time Clock" !! 3047 bool
3043 depends on OLPC_XO1_PM && RTC_DRV_CMO !! 3048 select CLKSRC_I8253
3044 help !! 3049 select CLKEVT_I8253
3045 Add support for the XO-1 real time !! 3050 select MIPS_EXTERNAL_TIMER
3046 programmable wakeup source. !! 3051 endmenu
3047 3052
3048 config OLPC_XO1_SCI !! 3053 config TRAD_SIGNALS
3049 bool "OLPC XO-1 SCI extras" !! 3054 bool
3050 depends on OLPC && OLPC_XO1_PM && GPI <<
3051 depends on INPUT=y <<
3052 select POWER_SUPPLY <<
3053 help <<
3054 Add support for SCI-based features <<
3055 - EC-driven system wakeups <<
3056 - Power button <<
3057 - Ebook switch <<
3058 - Lid switch <<
3059 - AC adapter status updates <<
3060 - Battery status updates <<
3061 3055
3062 config OLPC_XO15_SCI !! 3056 config MIPS32_COMPAT
3063 bool "OLPC XO-1.5 SCI extras" !! 3057 bool
3064 depends on OLPC && ACPI <<
3065 select POWER_SUPPLY <<
3066 help <<
3067 Add support for SCI-based features <<
3068 - EC-driven system wakeups <<
3069 - AC adapter status updates <<
3070 - Battery status updates <<
3071 3058
3072 config GEODE_COMMON !! 3059 config COMPAT
3073 bool 3060 bool
3074 3061
3075 config ALIX !! 3062 config MIPS32_O32
3076 bool "PCEngines ALIX System Support ( !! 3063 bool "Kernel support for o32 binaries"
3077 select GPIOLIB !! 3064 depends on 64BIT
3078 select GEODE_COMMON !! 3065 select ARCH_WANT_OLD_COMPAT_IPC
>> 3066 select COMPAT
>> 3067 select MIPS32_COMPAT
3079 help 3068 help
3080 This option enables system support !! 3069 Select this option if you want to run o32 binaries. These are pure
3081 At present this just sets up LEDs f !! 3070 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
3082 ALIX2/3/6 boards. However, other s !! 3071 existing binaries are in this format.
3083 get added here. <<
3084 3072
3085 Note: You must still enable the dri !! 3073 If unsure, say Y.
3086 (GPIO_CS5535 & LEDS_GPIO) to actual <<
3087 3074
3088 Note: You have to set alix.force=1 !! 3075 config MIPS32_N32
>> 3076 bool "Kernel support for n32 binaries"
>> 3077 depends on 64BIT
>> 3078 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3079 select COMPAT
>> 3080 select MIPS32_COMPAT
>> 3081 help
>> 3082 Select this option if you want to run n32 binaries. These are
>> 3083 64-bit binaries using 32-bit quantities for addressing and certain
>> 3084 data that would normally be 64-bit. They are used in special
>> 3085 cases.
3089 3086
3090 config NET5501 !! 3087 If unsure, say N.
3091 bool "Soekris Engineering net5501 Sys <<
3092 select GPIOLIB <<
3093 select GEODE_COMMON <<
3094 help <<
3095 This option enables system support <<
3096 3088
3097 config GEOS !! 3089 config CC_HAS_MNO_BRANCH_LIKELY
3098 bool "Traverse Technologies GEOS Syst !! 3090 def_bool y
3099 select GPIOLIB !! 3091 depends on $(cc-option,-mno-branch-likely)
3100 select GEODE_COMMON <<
3101 depends on DMI <<
3102 help <<
3103 This option enables system support <<
3104 3092
3105 config TS5500 !! 3093 # https://github.com/llvm/llvm-project/issues/61045
3106 bool "Technologic Systems TS-5500 pla !! 3094 config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3107 depends on MELAN !! 3095 def_bool y if CC_IS_CLANG
3108 select CHECK_SIGNATURE <<
3109 select NEW_LEDS <<
3110 select LEDS_CLASS <<
3111 help <<
3112 This option enables system support <<
3113 3096
3114 endif # X86_32 !! 3097 menu "Power management options"
3115 3098
3116 config AMD_NB !! 3099 config ARCH_HIBERNATION_POSSIBLE
3117 def_bool y 3100 def_bool y
3118 depends on CPU_SUP_AMD && PCI !! 3101 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3119 3102
3120 endmenu !! 3103 config ARCH_SUSPEND_POSSIBLE
>> 3104 def_bool y
>> 3105 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3121 3106
3122 menu "Binary Emulations" !! 3107 source "kernel/power/Kconfig"
3123 3108
3124 config IA32_EMULATION !! 3109 endmenu
3125 bool "IA32 Emulation" <<
3126 depends on X86_64 <<
3127 select ARCH_WANT_OLD_COMPAT_IPC <<
3128 select BINFMT_ELF <<
3129 select COMPAT_OLD_SIGACTION <<
3130 help <<
3131 Include code to run legacy 32-bit p <<
3132 64-bit kernel. You should likely tu <<
3133 100% sure that you don't have any 3 <<
3134 3110
3135 config IA32_EMULATION_DEFAULT_DISABLED !! 3111 config MIPS_EXTERNAL_TIMER
3136 bool "IA32 emulation disabled by defa !! 3112 bool
3137 default n <<
3138 depends on IA32_EMULATION <<
3139 help <<
3140 Make IA32 emulation disabled by def <<
3141 processes and access to 32-bit sysc <<
3142 default value. <<
3143 <<
3144 config X86_X32_ABI <<
3145 bool "x32 ABI for 64-bit mode" <<
3146 depends on X86_64 <<
3147 # llvm-objcopy does not convert x86_6 <<
3148 # compressed debug sections to x86_x3 <<
3149 # https://github.com/ClangBuiltLinux/ <<
3150 # https://github.com/ClangBuiltLinux/ <<
3151 depends on $(success,$(OBJCOPY) --ver <<
3152 help <<
3153 Include code to run binaries for th <<
3154 for 64-bit processors. An x32 proc <<
3155 full 64-bit register file and wide <<
3156 pointers at 32 bits for smaller mem <<
3157 3113
3158 config COMPAT_32 !! 3114 menu "CPU Power Management"
3159 def_bool y <<
3160 depends on IA32_EMULATION || X86_32 <<
3161 select HAVE_UID16 <<
3162 select OLD_SIGSUSPEND3 <<
3163 3115
3164 config COMPAT !! 3116 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3165 def_bool y !! 3117 source "drivers/cpufreq/Kconfig"
3166 depends on IA32_EMULATION || X86_X32_ !! 3118 endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3167 3119
3168 config COMPAT_FOR_U64_ALIGNMENT !! 3120 source "drivers/cpuidle/Kconfig"
3169 def_bool y <<
3170 depends on COMPAT <<
3171 3121
3172 endmenu 3122 endmenu
3173 3123
3174 config HAVE_ATOMIC_IOMAP !! 3124 source "arch/mips/kvm/Kconfig"
3175 def_bool y <<
3176 depends on X86_32 <<
3177 <<
3178 source "arch/x86/kvm/Kconfig" <<
3179 3125
3180 source "arch/x86/Kconfig.assembler" !! 3126 source "arch/mips/vdso/Kconfig"
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