1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 #ifndef _ASM_X86_CACHEINFO_H 3 #define _ASM_X86_CACHEINFO_H 4 5 /* Kernel controls MTRR and/or PAT MSRs. */ 6 extern unsigned int memory_caching_control; 7 #define CACHE_MTRR 0x01 8 #define CACHE_PAT 0x02 9 10 void cache_disable(void); 11 void cache_enable(void); 12 void set_cache_aps_delayed_init(bool val); 13 bool get_cache_aps_delayed_init(void); 14 void cache_bp_init(void); 15 void cache_bp_restore(void); 16 void cache_aps_init(void); 17 18 #endif /* _ASM_X86_CACHEINFO_H */ 19
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