1 /* SPDX-License-Identifier: GPL-2.0 */ 1
2 #ifndef _ASM_X86_INVPCID
3 #define _ASM_X86_INVPCID
4
5 static inline void __invpcid(unsigned long pci
6 unsigned long typ
7 {
8 struct { u64 d[2]; } desc = { { pcid,
9
10 /*
11 * The memory clobber is because the w
12 * stale TLB entries and, especially i
13 * mappings, we don't want the compile
14 * memory accesses before the TLB flus
15 */
16 asm volatile("invpcid %[desc], %[type]
17 :: [desc] "m" (desc), [ty
18 }
19
20 #define INVPCID_TYPE_INDIV_ADDR 0
21 #define INVPCID_TYPE_SINGLE_CTXT 1
22 #define INVPCID_TYPE_ALL_INCL_GLOBAL 2
23 #define INVPCID_TYPE_ALL_NON_GLOBAL 3
24
25 /* Flush all mappings for a given pcid and add
26 static inline void invpcid_flush_one(unsigned
27 unsigned
28 {
29 __invpcid(pcid, addr, INVPCID_TYPE_IND
30 }
31
32 /* Flush all mappings for a given PCID, not in
33 static inline void invpcid_flush_single_contex
34 {
35 __invpcid(pcid, 0, INVPCID_TYPE_SINGLE
36 }
37
38 /* Flush all mappings, including globals, for
39 static inline void invpcid_flush_all(void)
40 {
41 __invpcid(0, 0, INVPCID_TYPE_ALL_INCL_
42 }
43
44 /* Flush all mappings for all PCIDs except glo
45 static inline void invpcid_flush_all_nonglobal
46 {
47 __invpcid(0, 0, INVPCID_TYPE_ALL_NON_G
48 }
49
50 #endif /* _ASM_X86_INVPCID */
51
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