1 /* SPDX-License-Identifier: GPL-2.0 */
2 #include <asm/asm-offsets.h>
3 #include <asm/frame.h>
4 #include <asm/asm.h>
5 #include <asm/tdx.h>
6
7 /*
8 * TDCALL and SEAMCALL are supported in Binuti
9 */
10 #define tdcall .byte 0x66,0x0f,0x01,0
11 #define seamcall .byte 0x66,0x0f,0x01,0
12
13 /*
14 * TDX_MODULE_CALL - common helper macro for b
15 * TDCALL and SEAMCALL instruc
16 *
17 * TDCALL - used by TDX guests to make reque
18 * TDX module and hypercalls to the
19 * SEAMCALL - used by TDX hosts to make reques
20 * TDX module.
21 *
22 *--------------------------------------------
23 * TDCALL/SEAMCALL ABI:
24 *--------------------------------------------
25 * Input Registers:
26 *
27 * RAX - TDCALL/SEAMCAL
28 * RCX,RDX,RDI,RSI,RBX,R8-R15 - TDCALL/SEAMCAL
29 *
30 * Output Registers:
31 *
32 * RAX - TDCALL/SEAMCAL
33 * RCX,RDX,RDI,RSI,RBX,R8-R15 - TDCALL/SEAMCAL
34 *
35 *--------------------------------------------
36 *
37 * So while the common core (RAX,RCX,RDX,R8-R1
38 * callee-clobbered registers and even leaves
39 * base pointer, some leafs (e.g., VP.ENTER) m
40 *
41 * For simplicity, assume that anything that n
42 * also tramples on RDI,RSI. This isn't stric
43 * TDH.EXPORT.MEM.
44 */
45 .macro TDX_MODULE_CALL host:req ret=0 saved=0
46 FRAME_BEGIN
47
48 /* Move Leaf ID to RAX */
49 mov %rdi, %rax
50
51 /* Move other input regs from 'struct
52 movq TDX_MODULE_rcx(%rsi), %rcx
53 movq TDX_MODULE_rdx(%rsi), %rdx
54 movq TDX_MODULE_r8(%rsi), %r8
55 movq TDX_MODULE_r9(%rsi), %r9
56 movq TDX_MODULE_r10(%rsi), %r10
57 movq TDX_MODULE_r11(%rsi), %r11
58
59 .if \saved
60 /*
61 * Move additional input regs from the
62 * assume that anything needs the call
63 * on RDI/RSI (see VP.ENTER).
64 */
65 /* Save those callee-saved GPRs as man
66 pushq %rbx
67 pushq %r12
68 pushq %r13
69 pushq %r14
70 pushq %r15
71
72 movq TDX_MODULE_r12(%rsi), %r12
73 movq TDX_MODULE_r13(%rsi), %r13
74 movq TDX_MODULE_r14(%rsi), %r14
75 movq TDX_MODULE_r15(%rsi), %r15
76 movq TDX_MODULE_rbx(%rsi), %rbx
77
78 .if \ret
79 /* Save the structure pointer as RSI i
80 pushq %rsi
81 .endif
82
83 movq TDX_MODULE_rdi(%rsi), %rdi
84 /* RSI needs to be done at last */
85 movq TDX_MODULE_rsi(%rsi), %rsi
86 .endif /* \saved */
87
88 .if \host
89 .Lseamcall\@:
90 seamcall
91 /*
92 * SEAMCALL instruction is essentially
93 * mode to SEAM VMX root mode. VMfail
94 * that the targeted SEAM firmware is
95 * or P-SEAMLDR is busy with another S
96 * changed in this case.
97 *
98 * Set %rax to TDX_SEAMCALL_VMFAILINVA
99 * This value will never be used as ac
100 * it is from the Reserved status code
101 */
102 jc .Lseamcall_vmfailinvalid\@
103 .else
104 tdcall
105 .endif
106
107 .if \ret
108 .if \saved
109 /*
110 * Restore the structure from stack to
111 *
112 * In case of VP.ENTER returns due to
113 * valid thus no register can be used
114 * structure from the stack (see "TDH.
115 * Definition on TDCALL(TDG.VP.VMCALL)
116 * For this case, need to make one reg
117 * to the stack and then manually load
118 * the spare register.
119 *
120 * Note for other TDCALLs/SEAMCALLs th
121 * thus no need for such hack but just
122 */
123 pushq %rax /* save the TD
124 movq 8(%rsp), %rax /* restore the
125 movq %rsi, TDX_MODULE_rsi(%rax)
126 popq %rax /* restore the
127 popq %rsi /* pop the str
128
129 /* Copy additional output regs to the
130 movq %r12, TDX_MODULE_r12(%rsi)
131 movq %r13, TDX_MODULE_r13(%rsi)
132 movq %r14, TDX_MODULE_r14(%rsi)
133 movq %r15, TDX_MODULE_r15(%rsi)
134 movq %rbx, TDX_MODULE_rbx(%rsi)
135 movq %rdi, TDX_MODULE_rdi(%rsi)
136 .endif /* \saved */
137
138 /* Copy output registers to the struct
139 movq %rcx, TDX_MODULE_rcx(%rsi)
140 movq %rdx, TDX_MODULE_rdx(%rsi)
141 movq %r8, TDX_MODULE_r8(%rsi)
142 movq %r9, TDX_MODULE_r9(%rsi)
143 movq %r10, TDX_MODULE_r10(%rsi)
144 movq %r11, TDX_MODULE_r11(%rsi)
145 .endif /* \ret */
146
147 .if \saved && \ret
148 /*
149 * Clear registers shared by guest for
150 * speculative use of guest's/VMM's va
151 * restored from the stack.
152 *
153 * See arch/x86/kvm/vmx/vmenter.S:
154 *
155 * In theory, a L1 cache miss when res
156 * could lead to speculative execution
157 *
158 * Note: RBP/RSP are not used as share
159 * restored already.
160 *
161 * XOR is cheap, thus unconditionally
162 */
163 xorl %ecx, %ecx
164 xorl %edx, %edx
165 xorl %r8d, %r8d
166 xorl %r9d, %r9d
167 xorl %r10d, %r10d
168 xorl %r11d, %r11d
169 xorl %r12d, %r12d
170 xorl %r13d, %r13d
171 xorl %r14d, %r14d
172 xorl %r15d, %r15d
173 xorl %ebx, %ebx
174 xorl %edi, %edi
175 .endif /* \ret && \host */
176
177 .if \host
178 .Lout\@:
179 .endif
180
181 .if \saved
182 /* Restore callee-saved GPRs as mandat
183 popq %r15
184 popq %r14
185 popq %r13
186 popq %r12
187 popq %rbx
188 .endif /* \saved */
189
190 FRAME_END
191 RET
192
193 .if \host
194 .Lseamcall_vmfailinvalid\@:
195 mov $TDX_SEAMCALL_VMFAILINVALID, %rax
196 jmp .Lseamcall_fail\@
197
198 .Lseamcall_trap\@:
199 /*
200 * SEAMCALL caused #GP or #UD. By rea
201 * the trap number. Convert the trap
202 * code by setting TDX_SW_ERROR to the
203 *
204 * Note cannot OR TDX_SW_ERROR directl
205 * only accepts 32-bit immediate at mo
206 */
207 movq $TDX_SW_ERROR, %rdi
208 orq %rdi, %rax
209
210 .Lseamcall_fail\@:
211 .if \ret && \saved
212 /* pop the unused structure pointer ba
213 popq %rsi
214 .endif
215 jmp .Lout\@
216
217 _ASM_EXTABLE_FAULT(.Lseamcall\@, .Lsea
218 .endif /* \host */
219
220 .endm
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