1 # SPDX-License-Identifier: GPL-2.0 !! 1 config MIPS
2 config XTENSA !! 2 bool
3 def_bool y !! 3 default y
4 select ARCH_32BIT_OFF_T !! 4 select ARCH_SUPPORTS_UPROBES
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_MIGHT_HAVE_PC_PARPORT
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_MIGHT_HAVE_PC_SERIO
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_USE_BUILTIN_BSWAP
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select HAVE_CONTEXT_TRACKING
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select HAVE_GENERIC_DMA_COHERENT
11 select ARCH_HAS_KCOV !! 11 select HAVE_IDE
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select HAVE_IRQ_EXIT_ON_IRQ_STACK
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 select HAVE_OPROFILE
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 14 select HAVE_PERF_EVENTS
15 select ARCH_HAS_STRNCPY_FROM_USER if ! !! 15 select PERF_USE_VMALLOC
16 select ARCH_HAS_STRNLEN_USER !! 16 select HAVE_ARCH_KGDB
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS <<
20 select ARCH_USE_QUEUED_SPINLOCKS <<
21 select ARCH_WANT_IPC_PARSE_VERSION <<
22 select BUILDTIME_TABLE_SORT <<
23 select CLONE_BACKWARDS <<
24 select COMMON_CLK <<
25 select DMA_NONCOHERENT_MMAP if MMU <<
26 select GENERIC_ATOMIC64 <<
27 select GENERIC_IRQ_SHOW <<
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP <<
32 select GENERIC_SCHED_CLOCK <<
33 select GENERIC_IOREMAP if MMU <<
34 select HAVE_ARCH_AUDITSYSCALL <<
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
36 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
37 select HAVE_ARCH_KCSAN <<
38 select HAVE_ARCH_SECCOMP_FILTER 17 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 18 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 19 select HAVE_CBPF_JIT if !CPU_MICROMIPS
41 select HAVE_CONTEXT_TRACKING_USER <<
42 select HAVE_DEBUG_KMEMLEAK <<
43 select HAVE_DMA_CONTIGUOUS <<
44 select HAVE_EXIT_THREAD <<
45 select HAVE_FUNCTION_TRACER 20 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 21 select HAVE_DYNAMIC_FTRACE
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 22 select HAVE_FTRACE_MCOUNT_RECORD
48 select HAVE_IRQ_TIME_ACCOUNTING !! 23 select HAVE_C_RECORDMCOUNT
49 select HAVE_PAGE_SIZE_4KB !! 24 select HAVE_FUNCTION_GRAPH_TRACER
50 select HAVE_PCI !! 25 select HAVE_KPROBES
51 select HAVE_PERF_EVENTS !! 26 select HAVE_KRETPROBES
52 select HAVE_STACKPROTECTOR !! 27 select HAVE_SYSCALL_TRACEPOINTS
>> 28 select HAVE_DEBUG_KMEMLEAK
53 select HAVE_SYSCALL_TRACEPOINTS 29 select HAVE_SYSCALL_TRACEPOINTS
>> 30 select ARCH_HAS_ELF_RANDOMIZE
>> 31 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
>> 32 select RTC_LIB if !MACH_LOONGSON64
>> 33 select GENERIC_ATOMIC64 if !64BIT
>> 34 select HAVE_DMA_CONTIGUOUS
>> 35 select HAVE_DMA_API_DEBUG
>> 36 select GENERIC_IRQ_PROBE
>> 37 select GENERIC_IRQ_SHOW
>> 38 select GENERIC_PCI_IOMAP
>> 39 select HAVE_ARCH_JUMP_LABEL
>> 40 select ARCH_WANT_IPC_PARSE_VERSION
>> 41 select IRQ_FORCED_THREADING
>> 42 select HAVE_MEMBLOCK
>> 43 select HAVE_MEMBLOCK_NODE_MAP
>> 44 select ARCH_DISCARD_MEMBLOCK
>> 45 select GENERIC_SMP_IDLE_THREAD
>> 46 select BUILDTIME_EXTABLE_SORT
>> 47 select GENERIC_CLOCKEVENTS
>> 48 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
>> 49 select GENERIC_CMOS_UPDATE
>> 50 select HAVE_MOD_ARCH_SPECIFIC
>> 51 select HAVE_NMI
>> 52 select VIRT_TO_BUS
>> 53 select MODULES_USE_ELF_REL if MODULES
>> 54 select MODULES_USE_ELF_RELA if MODULES && 64BIT
>> 55 select CLONE_BACKWARDS
>> 56 select HAVE_DEBUG_STACKOVERFLOW
>> 57 select HAVE_CC_STACKPROTECTOR
>> 58 select CPU_PM if CPU_IDLE
>> 59 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
>> 60 select ARCH_BINFMT_ELF_STATE
>> 61 select SYSCTL_EXCEPTION_TRACE
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN 62 select HAVE_VIRT_CPU_ACCOUNTING_GEN
>> 63 select HAVE_IRQ_TIME_ACCOUNTING
>> 64 select GENERIC_TIME_VSYSCALL
>> 65 select ARCH_CLOCKSOURCE_DATA
>> 66 select HANDLE_DOMAIN_IRQ
>> 67 select HAVE_EXIT_THREAD
>> 68 select HAVE_REGS_AND_STACK_ACCESS_API
>> 69 select HAVE_ARCH_HARDENED_USERCOPY
>> 70
>> 71 menu "Machine selection"
>> 72
>> 73 choice
>> 74 prompt "System type"
>> 75 default SGI_IP22
>> 76
>> 77 config MIPS_GENERIC
>> 78 bool "Generic board-agnostic MIPS kernel"
>> 79 select BOOT_RAW
>> 80 select BUILTIN_DTB
>> 81 select CEVT_R4K
>> 82 select CLKSRC_MIPS_GIC
>> 83 select COMMON_CLK
>> 84 select CPU_MIPSR2_IRQ_VI
>> 85 select CPU_MIPSR2_IRQ_EI
>> 86 select CSRC_R4K
>> 87 select DMA_PERDEV_COHERENT
>> 88 select HW_HAS_PCI
>> 89 select IRQ_MIPS_CPU
>> 90 select LIBFDT
>> 91 select MIPS_CPU_SCACHE
>> 92 select MIPS_GIC
>> 93 select MIPS_L1_CACHE_SHIFT_7
>> 94 select NO_EXCEPT_FILL
>> 95 select PCI_DRIVERS_GENERIC
>> 96 select PINCTRL
>> 97 select SMP_UP if SMP
>> 98 select SYS_HAS_CPU_MIPS32_R1
>> 99 select SYS_HAS_CPU_MIPS32_R2
>> 100 select SYS_HAS_CPU_MIPS32_R6
>> 101 select SYS_HAS_CPU_MIPS64_R1
>> 102 select SYS_HAS_CPU_MIPS64_R2
>> 103 select SYS_HAS_CPU_MIPS64_R6
>> 104 select SYS_SUPPORTS_32BIT_KERNEL
>> 105 select SYS_SUPPORTS_64BIT_KERNEL
>> 106 select SYS_SUPPORTS_BIG_ENDIAN
>> 107 select SYS_SUPPORTS_HIGHMEM
>> 108 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 109 select SYS_SUPPORTS_MICROMIPS
>> 110 select SYS_SUPPORTS_MIPS_CPS
>> 111 select SYS_SUPPORTS_MIPS16
>> 112 select SYS_SUPPORTS_MULTITHREADING
>> 113 select SYS_SUPPORTS_RELOCATABLE
>> 114 select SYS_SUPPORTS_SMARTMIPS
>> 115 select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 116 select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 117 select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 118 select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 119 select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 120 select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 121 select USE_OF
>> 122 help
>> 123 Select this to build a kernel which aims to support multiple boards,
>> 124 generally using a flattened device tree passed from the bootloader
>> 125 using the boot protocol defined in the UHI (Unified Hosting
>> 126 Interface) specification.
>> 127
>> 128 config MIPS_ALCHEMY
>> 129 bool "Alchemy processor based machines"
>> 130 select ARCH_PHYS_ADDR_T_64BIT
>> 131 select CEVT_R4K
>> 132 select CSRC_R4K
>> 133 select IRQ_MIPS_CPU
>> 134 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 135 select SYS_HAS_CPU_MIPS32_R1
>> 136 select SYS_SUPPORTS_32BIT_KERNEL
>> 137 select SYS_SUPPORTS_APM_EMULATION
>> 138 select GPIOLIB
>> 139 select SYS_SUPPORTS_ZBOOT
>> 140 select COMMON_CLK
>> 141
>> 142 config AR7
>> 143 bool "Texas Instruments AR7"
>> 144 select BOOT_ELF32
>> 145 select DMA_NONCOHERENT
>> 146 select CEVT_R4K
>> 147 select CSRC_R4K
>> 148 select IRQ_MIPS_CPU
>> 149 select NO_EXCEPT_FILL
>> 150 select SWAP_IO_SPACE
>> 151 select SYS_HAS_CPU_MIPS32_R1
>> 152 select SYS_HAS_EARLY_PRINTK
>> 153 select SYS_SUPPORTS_32BIT_KERNEL
>> 154 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 155 select SYS_SUPPORTS_MIPS16
>> 156 select SYS_SUPPORTS_ZBOOT_UART16550
>> 157 select GPIOLIB
>> 158 select VLYNQ
>> 159 select HAVE_CLK
>> 160 help
>> 161 Support for the Texas Instruments AR7 System-on-a-Chip
>> 162 family: TNETD7100, 7200 and 7300.
>> 163
>> 164 config ATH25
>> 165 bool "Atheros AR231x/AR531x SoC support"
>> 166 select CEVT_R4K
>> 167 select CSRC_R4K
>> 168 select DMA_NONCOHERENT
>> 169 select IRQ_MIPS_CPU
55 select IRQ_DOMAIN 170 select IRQ_DOMAIN
56 select LOCK_MM_AND_FIND_VMA !! 171 select SYS_HAS_CPU_MIPS32_R1
57 select MODULES_USE_ELF_RELA !! 172 select SYS_SUPPORTS_BIG_ENDIAN
58 select PERF_USE_VMALLOC !! 173 select SYS_SUPPORTS_32BIT_KERNEL
59 select TRACE_IRQFLAGS_SUPPORT !! 174 select SYS_HAS_EARLY_PRINTK
>> 175 help
>> 176 Support for Atheros AR231x and Atheros AR531x based boards
>> 177
>> 178 config ATH79
>> 179 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 180 select ARCH_HAS_RESET_CONTROLLER
>> 181 select BOOT_RAW
>> 182 select CEVT_R4K
>> 183 select CSRC_R4K
>> 184 select DMA_NONCOHERENT
>> 185 select GPIOLIB
>> 186 select HAVE_CLK
>> 187 select COMMON_CLK
>> 188 select CLKDEV_LOOKUP
>> 189 select IRQ_MIPS_CPU
>> 190 select MIPS_MACHINE
>> 191 select SYS_HAS_CPU_MIPS32_R2
>> 192 select SYS_HAS_EARLY_PRINTK
>> 193 select SYS_SUPPORTS_32BIT_KERNEL
>> 194 select SYS_SUPPORTS_BIG_ENDIAN
>> 195 select SYS_SUPPORTS_MIPS16
>> 196 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 197 select USE_OF
>> 198 help
>> 199 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 200
>> 201 config BMIPS_GENERIC
>> 202 bool "Broadcom Generic BMIPS kernel"
>> 203 select BOOT_RAW
>> 204 select NO_EXCEPT_FILL
>> 205 select USE_OF
>> 206 select CEVT_R4K
>> 207 select CSRC_R4K
>> 208 select SYNC_R4K
>> 209 select COMMON_CLK
>> 210 select BCM6345_L1_IRQ
>> 211 select BCM7038_L1_IRQ
>> 212 select BCM7120_L2_IRQ
>> 213 select BRCMSTB_L2_IRQ
>> 214 select IRQ_MIPS_CPU
>> 215 select DMA_NONCOHERENT
>> 216 select SYS_SUPPORTS_32BIT_KERNEL
>> 217 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 218 select SYS_SUPPORTS_BIG_ENDIAN
>> 219 select SYS_SUPPORTS_HIGHMEM
>> 220 select SYS_HAS_CPU_BMIPS32_3300
>> 221 select SYS_HAS_CPU_BMIPS4350
>> 222 select SYS_HAS_CPU_BMIPS4380
>> 223 select SYS_HAS_CPU_BMIPS5000
>> 224 select SWAP_IO_SPACE
>> 225 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 226 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 227 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 228 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 229 help
>> 230 Build a generic DT-based kernel image that boots on select
>> 231 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 232 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 233 must be set appropriately for your board.
>> 234
>> 235 config BCM47XX
>> 236 bool "Broadcom BCM47XX based boards"
>> 237 select BOOT_RAW
>> 238 select CEVT_R4K
>> 239 select CSRC_R4K
>> 240 select DMA_NONCOHERENT
>> 241 select HW_HAS_PCI
>> 242 select IRQ_MIPS_CPU
>> 243 select SYS_HAS_CPU_MIPS32_R1
>> 244 select NO_EXCEPT_FILL
>> 245 select SYS_SUPPORTS_32BIT_KERNEL
>> 246 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 247 select SYS_SUPPORTS_MIPS16
>> 248 select SYS_HAS_EARLY_PRINTK
>> 249 select USE_GENERIC_EARLY_PRINTK_8250
>> 250 select GPIOLIB
>> 251 select LEDS_GPIO_REGISTER
>> 252 select BCM47XX_NVRAM
>> 253 select BCM47XX_SPROM
>> 254 help
>> 255 Support for BCM47XX based boards
>> 256
>> 257 config BCM63XX
>> 258 bool "Broadcom BCM63XX based boards"
>> 259 select BOOT_RAW
>> 260 select CEVT_R4K
>> 261 select CSRC_R4K
>> 262 select SYNC_R4K
>> 263 select DMA_NONCOHERENT
>> 264 select IRQ_MIPS_CPU
>> 265 select SYS_SUPPORTS_32BIT_KERNEL
>> 266 select SYS_SUPPORTS_BIG_ENDIAN
>> 267 select SYS_HAS_EARLY_PRINTK
>> 268 select SWAP_IO_SPACE
>> 269 select GPIOLIB
>> 270 select HAVE_CLK
>> 271 select MIPS_L1_CACHE_SHIFT_4
>> 272 help
>> 273 Support for BCM63XX based boards
>> 274
>> 275 config MIPS_COBALT
>> 276 bool "Cobalt Server"
>> 277 select CEVT_R4K
>> 278 select CSRC_R4K
>> 279 select CEVT_GT641XX
>> 280 select DMA_NONCOHERENT
>> 281 select HW_HAS_PCI
>> 282 select I8253
>> 283 select I8259
>> 284 select IRQ_MIPS_CPU
>> 285 select IRQ_GT641XX
>> 286 select PCI_GT64XXX_PCI0
>> 287 select PCI
>> 288 select SYS_HAS_CPU_NEVADA
>> 289 select SYS_HAS_EARLY_PRINTK
>> 290 select SYS_SUPPORTS_32BIT_KERNEL
>> 291 select SYS_SUPPORTS_64BIT_KERNEL
>> 292 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 293 select USE_GENERIC_EARLY_PRINTK_8250
>> 294
>> 295 config MACH_DECSTATION
>> 296 bool "DECstations"
>> 297 select BOOT_ELF32
>> 298 select CEVT_DS1287
>> 299 select CEVT_R4K if CPU_R4X00
>> 300 select CSRC_IOASIC
>> 301 select CSRC_R4K if CPU_R4X00
>> 302 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 303 select CPU_R4000_WORKAROUNDS if 64BIT
>> 304 select CPU_R4400_WORKAROUNDS if 64BIT
>> 305 select DMA_NONCOHERENT
>> 306 select NO_IOPORT_MAP
>> 307 select IRQ_MIPS_CPU
>> 308 select SYS_HAS_CPU_R3000
>> 309 select SYS_HAS_CPU_R4X00
>> 310 select SYS_SUPPORTS_32BIT_KERNEL
>> 311 select SYS_SUPPORTS_64BIT_KERNEL
>> 312 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 313 select SYS_SUPPORTS_128HZ
>> 314 select SYS_SUPPORTS_256HZ
>> 315 select SYS_SUPPORTS_1024HZ
>> 316 select MIPS_L1_CACHE_SHIFT_4
>> 317 help
>> 318 This enables support for DEC's MIPS based workstations. For details
>> 319 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 320 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 321
>> 322 If you have one of the following DECstation Models you definitely
>> 323 want to choose R4xx0 for the CPU Type:
>> 324
>> 325 DECstation 5000/50
>> 326 DECstation 5000/150
>> 327 DECstation 5000/260
>> 328 DECsystem 5900/260
>> 329
>> 330 otherwise choose R3000.
>> 331
>> 332 config MACH_JAZZ
>> 333 bool "Jazz family of machines"
>> 334 select FW_ARC
>> 335 select FW_ARC32
>> 336 select ARCH_MAY_HAVE_PC_FDC
>> 337 select CEVT_R4K
>> 338 select CSRC_R4K
>> 339 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 340 select GENERIC_ISA_DMA
>> 341 select HAVE_PCSPKR_PLATFORM
>> 342 select IRQ_MIPS_CPU
>> 343 select I8253
>> 344 select I8259
>> 345 select ISA
>> 346 select SYS_HAS_CPU_R4X00
>> 347 select SYS_SUPPORTS_32BIT_KERNEL
>> 348 select SYS_SUPPORTS_64BIT_KERNEL
>> 349 select SYS_SUPPORTS_100HZ
>> 350 help
>> 351 This a family of machines based on the MIPS R4030 chipset which was
>> 352 used by several vendors to build RISC/os and Windows NT workstations.
>> 353 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 354 Olivetti M700-10 workstations.
>> 355
>> 356 config MACH_INGENIC
>> 357 bool "Ingenic SoC based machines"
>> 358 select SYS_SUPPORTS_32BIT_KERNEL
>> 359 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 360 select SYS_SUPPORTS_ZBOOT_UART16550
>> 361 select DMA_NONCOHERENT
>> 362 select IRQ_MIPS_CPU
>> 363 select GPIOLIB
>> 364 select COMMON_CLK
>> 365 select GENERIC_IRQ_CHIP
>> 366 select BUILTIN_DTB
>> 367 select USE_OF
>> 368 select LIBFDT
>> 369
>> 370 config LANTIQ
>> 371 bool "Lantiq based platforms"
>> 372 select DMA_NONCOHERENT
>> 373 select IRQ_MIPS_CPU
>> 374 select CEVT_R4K
>> 375 select CSRC_R4K
>> 376 select SYS_HAS_CPU_MIPS32_R1
>> 377 select SYS_HAS_CPU_MIPS32_R2
>> 378 select SYS_SUPPORTS_BIG_ENDIAN
>> 379 select SYS_SUPPORTS_32BIT_KERNEL
>> 380 select SYS_SUPPORTS_MIPS16
>> 381 select SYS_SUPPORTS_MULTITHREADING
>> 382 select SYS_HAS_EARLY_PRINTK
>> 383 select GPIOLIB
>> 384 select SWAP_IO_SPACE
>> 385 select BOOT_RAW
>> 386 select CLKDEV_LOOKUP
>> 387 select USE_OF
>> 388 select PINCTRL
>> 389 select PINCTRL_LANTIQ
>> 390 select ARCH_HAS_RESET_CONTROLLER
>> 391 select RESET_CONTROLLER
>> 392
>> 393 config LASAT
>> 394 bool "LASAT Networks platforms"
>> 395 select CEVT_R4K
>> 396 select CRC32
>> 397 select CSRC_R4K
>> 398 select DMA_NONCOHERENT
>> 399 select SYS_HAS_EARLY_PRINTK
>> 400 select HW_HAS_PCI
>> 401 select IRQ_MIPS_CPU
>> 402 select PCI_GT64XXX_PCI0
>> 403 select MIPS_NILE4
>> 404 select R5000_CPU_SCACHE
>> 405 select SYS_HAS_CPU_R5000
>> 406 select SYS_SUPPORTS_32BIT_KERNEL
>> 407 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 408 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 409
>> 410 config MACH_LOONGSON32
>> 411 bool "Loongson-1 family of machines"
>> 412 select SYS_SUPPORTS_ZBOOT
>> 413 help
>> 414 This enables support for the Loongson-1 family of machines.
>> 415
>> 416 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 417 the Institute of Computing Technology (ICT), Chinese Academy of
>> 418 Sciences (CAS).
>> 419
>> 420 config MACH_LOONGSON64
>> 421 bool "Loongson-2/3 family of machines"
>> 422 select SYS_SUPPORTS_ZBOOT
>> 423 help
>> 424 This enables the support of Loongson-2/3 family of machines.
>> 425
>> 426 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 427 family of multi-core CPUs. They are both 64-bit general-purpose
>> 428 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 429 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 430 in the People's Republic of China. The chief architect is Professor
>> 431 Weiwu Hu.
>> 432
>> 433 config MACH_PISTACHIO
>> 434 bool "IMG Pistachio SoC based boards"
>> 435 select BOOT_ELF32
>> 436 select BOOT_RAW
>> 437 select CEVT_R4K
>> 438 select CLKSRC_MIPS_GIC
>> 439 select COMMON_CLK
>> 440 select CSRC_R4K
>> 441 select DMA_NONCOHERENT
>> 442 select GPIOLIB
>> 443 select IRQ_MIPS_CPU
>> 444 select LIBFDT
>> 445 select MFD_SYSCON
>> 446 select MIPS_CPU_SCACHE
>> 447 select MIPS_GIC
>> 448 select PINCTRL
>> 449 select REGULATOR
>> 450 select SYS_HAS_CPU_MIPS32_R2
>> 451 select SYS_SUPPORTS_32BIT_KERNEL
>> 452 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 453 select SYS_SUPPORTS_MIPS_CPS
>> 454 select SYS_SUPPORTS_MULTITHREADING
>> 455 select SYS_SUPPORTS_RELOCATABLE
>> 456 select SYS_SUPPORTS_ZBOOT
>> 457 select SYS_HAS_EARLY_PRINTK
>> 458 select USE_GENERIC_EARLY_PRINTK_8250
>> 459 select USE_OF
>> 460 help
>> 461 This enables support for the IMG Pistachio SoC platform.
>> 462
>> 463 config MACH_XILFPGA
>> 464 bool "MIPSfpga Xilinx based boards"
>> 465 select BOOT_ELF32
>> 466 select BOOT_RAW
>> 467 select BUILTIN_DTB
>> 468 select CEVT_R4K
>> 469 select COMMON_CLK
>> 470 select CSRC_R4K
>> 471 select GPIOLIB
>> 472 select IRQ_MIPS_CPU
>> 473 select LIBFDT
>> 474 select MIPS_CPU_SCACHE
>> 475 select SYS_HAS_EARLY_PRINTK
>> 476 select SYS_HAS_CPU_MIPS32_R2
>> 477 select SYS_SUPPORTS_32BIT_KERNEL
>> 478 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 479 select SYS_SUPPORTS_ZBOOT_UART16550
>> 480 select USE_OF
>> 481 select USE_GENERIC_EARLY_PRINTK_8250
>> 482 help
>> 483 This enables support for the IMG University Program MIPSfpga platform.
>> 484
>> 485 config MIPS_MALTA
>> 486 bool "MIPS Malta board"
>> 487 select ARCH_MAY_HAVE_PC_FDC
>> 488 select BOOT_ELF32
>> 489 select BOOT_RAW
>> 490 select BUILTIN_DTB
>> 491 select CEVT_R4K
>> 492 select CSRC_R4K
>> 493 select CLKSRC_MIPS_GIC
>> 494 select COMMON_CLK
>> 495 select DMA_MAYBE_COHERENT
>> 496 select GENERIC_ISA_DMA
>> 497 select HAVE_PCSPKR_PLATFORM
>> 498 select IRQ_MIPS_CPU
>> 499 select MIPS_GIC
>> 500 select HW_HAS_PCI
>> 501 select I8253
>> 502 select I8259
>> 503 select MIPS_BONITO64
>> 504 select MIPS_CPU_SCACHE
>> 505 select MIPS_L1_CACHE_SHIFT_6
>> 506 select PCI_GT64XXX_PCI0
>> 507 select MIPS_MSC
>> 508 select SMP_UP if SMP
>> 509 select SWAP_IO_SPACE
>> 510 select SYS_HAS_CPU_MIPS32_R1
>> 511 select SYS_HAS_CPU_MIPS32_R2
>> 512 select SYS_HAS_CPU_MIPS32_R3_5
>> 513 select SYS_HAS_CPU_MIPS32_R5
>> 514 select SYS_HAS_CPU_MIPS32_R6
>> 515 select SYS_HAS_CPU_MIPS64_R1
>> 516 select SYS_HAS_CPU_MIPS64_R2
>> 517 select SYS_HAS_CPU_MIPS64_R6
>> 518 select SYS_HAS_CPU_NEVADA
>> 519 select SYS_HAS_CPU_RM7000
>> 520 select SYS_SUPPORTS_32BIT_KERNEL
>> 521 select SYS_SUPPORTS_64BIT_KERNEL
>> 522 select SYS_SUPPORTS_BIG_ENDIAN
>> 523 select SYS_SUPPORTS_HIGHMEM
>> 524 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 525 select SYS_SUPPORTS_MICROMIPS
>> 526 select SYS_SUPPORTS_MIPS_CMP
>> 527 select SYS_SUPPORTS_MIPS_CPS
>> 528 select SYS_SUPPORTS_MIPS16
>> 529 select SYS_SUPPORTS_MULTITHREADING
>> 530 select SYS_SUPPORTS_SMARTMIPS
>> 531 select SYS_SUPPORTS_ZBOOT
>> 532 select SYS_SUPPORTS_RELOCATABLE
>> 533 select USE_OF
>> 534 select LIBFDT
>> 535 select ZONE_DMA32 if 64BIT
>> 536 select BUILTIN_DTB
>> 537 select LIBFDT
>> 538 help
>> 539 This enables support for the MIPS Technologies Malta evaluation
>> 540 board.
>> 541
>> 542 config MACH_PIC32
>> 543 bool "Microchip PIC32 Family"
>> 544 help
>> 545 This enables support for the Microchip PIC32 family of platforms.
>> 546
>> 547 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 548 microcontrollers.
>> 549
>> 550 config NEC_MARKEINS
>> 551 bool "NEC EMMA2RH Mark-eins board"
>> 552 select SOC_EMMA2RH
>> 553 select HW_HAS_PCI
>> 554 help
>> 555 This enables support for the NEC Electronics Mark-eins boards.
>> 556
>> 557 config MACH_VR41XX
>> 558 bool "NEC VR4100 series based machines"
>> 559 select CEVT_R4K
>> 560 select CSRC_R4K
>> 561 select SYS_HAS_CPU_VR41XX
>> 562 select SYS_SUPPORTS_MIPS16
>> 563 select GPIOLIB
>> 564
>> 565 config NXP_STB220
>> 566 bool "NXP STB220 board"
>> 567 select SOC_PNX833X
>> 568 help
>> 569 Support for NXP Semiconductors STB220 Development Board.
>> 570
>> 571 config NXP_STB225
>> 572 bool "NXP 225 board"
>> 573 select SOC_PNX833X
>> 574 select SOC_PNX8335
>> 575 help
>> 576 Support for NXP Semiconductors STB225 Development Board.
>> 577
>> 578 config PMC_MSP
>> 579 bool "PMC-Sierra MSP chipsets"
>> 580 select CEVT_R4K
>> 581 select CSRC_R4K
>> 582 select DMA_NONCOHERENT
>> 583 select SWAP_IO_SPACE
>> 584 select NO_EXCEPT_FILL
>> 585 select BOOT_RAW
>> 586 select SYS_HAS_CPU_MIPS32_R1
>> 587 select SYS_HAS_CPU_MIPS32_R2
>> 588 select SYS_SUPPORTS_32BIT_KERNEL
>> 589 select SYS_SUPPORTS_BIG_ENDIAN
>> 590 select SYS_SUPPORTS_MIPS16
>> 591 select IRQ_MIPS_CPU
>> 592 select SERIAL_8250
>> 593 select SERIAL_8250_CONSOLE
>> 594 select USB_EHCI_BIG_ENDIAN_MMIO
>> 595 select USB_EHCI_BIG_ENDIAN_DESC
>> 596 help
>> 597 This adds support for the PMC-Sierra family of Multi-Service
>> 598 Processor System-On-A-Chips. These parts include a number
>> 599 of integrated peripherals, interfaces and DSPs in addition to
>> 600 a variety of MIPS cores.
>> 601
>> 602 config RALINK
>> 603 bool "Ralink based machines"
>> 604 select CEVT_R4K
>> 605 select CSRC_R4K
>> 606 select BOOT_RAW
>> 607 select DMA_NONCOHERENT
>> 608 select IRQ_MIPS_CPU
>> 609 select USE_OF
>> 610 select SYS_HAS_CPU_MIPS32_R1
>> 611 select SYS_HAS_CPU_MIPS32_R2
>> 612 select SYS_SUPPORTS_32BIT_KERNEL
>> 613 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 614 select SYS_SUPPORTS_MIPS16
>> 615 select SYS_HAS_EARLY_PRINTK
>> 616 select CLKDEV_LOOKUP
>> 617 select ARCH_HAS_RESET_CONTROLLER
>> 618 select RESET_CONTROLLER
>> 619
>> 620 config SGI_IP22
>> 621 bool "SGI IP22 (Indy/Indigo2)"
>> 622 select FW_ARC
>> 623 select FW_ARC32
>> 624 select BOOT_ELF32
>> 625 select CEVT_R4K
>> 626 select CSRC_R4K
>> 627 select DEFAULT_SGI_PARTITION
>> 628 select DMA_NONCOHERENT
>> 629 select HW_HAS_EISA
>> 630 select I8253
>> 631 select I8259
>> 632 select IP22_CPU_SCACHE
>> 633 select IRQ_MIPS_CPU
>> 634 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 635 select SGI_HAS_I8042
>> 636 select SGI_HAS_INDYDOG
>> 637 select SGI_HAS_HAL2
>> 638 select SGI_HAS_SEEQ
>> 639 select SGI_HAS_WD93
>> 640 select SGI_HAS_ZILOG
>> 641 select SWAP_IO_SPACE
>> 642 select SYS_HAS_CPU_R4X00
>> 643 select SYS_HAS_CPU_R5000
>> 644 #
>> 645 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 646 # memory during early boot on some machines.
>> 647 #
>> 648 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 649 # for a more details discussion
>> 650 #
>> 651 # select SYS_HAS_EARLY_PRINTK
>> 652 select SYS_SUPPORTS_32BIT_KERNEL
>> 653 select SYS_SUPPORTS_64BIT_KERNEL
>> 654 select SYS_SUPPORTS_BIG_ENDIAN
>> 655 select MIPS_L1_CACHE_SHIFT_7
>> 656 help
>> 657 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 658 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 659 that runs on these, say Y here.
>> 660
>> 661 config SGI_IP27
>> 662 bool "SGI IP27 (Origin200/2000)"
>> 663 select FW_ARC
>> 664 select FW_ARC64
>> 665 select BOOT_ELF64
>> 666 select DEFAULT_SGI_PARTITION
>> 667 select DMA_COHERENT
>> 668 select SYS_HAS_EARLY_PRINTK
>> 669 select HW_HAS_PCI
>> 670 select NR_CPUS_DEFAULT_64
>> 671 select SYS_HAS_CPU_R10000
>> 672 select SYS_SUPPORTS_64BIT_KERNEL
>> 673 select SYS_SUPPORTS_BIG_ENDIAN
>> 674 select SYS_SUPPORTS_NUMA
>> 675 select SYS_SUPPORTS_SMP
>> 676 select MIPS_L1_CACHE_SHIFT_7
>> 677 help
>> 678 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 679 workstations. To compile a Linux kernel that runs on these, say Y
>> 680 here.
>> 681
>> 682 config SGI_IP28
>> 683 bool "SGI IP28 (Indigo2 R10k)"
>> 684 select FW_ARC
>> 685 select FW_ARC64
>> 686 select BOOT_ELF64
>> 687 select CEVT_R4K
>> 688 select CSRC_R4K
>> 689 select DEFAULT_SGI_PARTITION
>> 690 select DMA_NONCOHERENT
>> 691 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 692 select IRQ_MIPS_CPU
>> 693 select HW_HAS_EISA
>> 694 select I8253
>> 695 select I8259
>> 696 select SGI_HAS_I8042
>> 697 select SGI_HAS_INDYDOG
>> 698 select SGI_HAS_HAL2
>> 699 select SGI_HAS_SEEQ
>> 700 select SGI_HAS_WD93
>> 701 select SGI_HAS_ZILOG
>> 702 select SWAP_IO_SPACE
>> 703 select SYS_HAS_CPU_R10000
>> 704 #
>> 705 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 706 # memory during early boot on some machines.
>> 707 #
>> 708 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 709 # for a more details discussion
>> 710 #
>> 711 # select SYS_HAS_EARLY_PRINTK
>> 712 select SYS_SUPPORTS_64BIT_KERNEL
>> 713 select SYS_SUPPORTS_BIG_ENDIAN
>> 714 select MIPS_L1_CACHE_SHIFT_7
>> 715 help
>> 716 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 717 kernel that runs on these, say Y here.
>> 718
>> 719 config SGI_IP32
>> 720 bool "SGI IP32 (O2)"
>> 721 select FW_ARC
>> 722 select FW_ARC32
>> 723 select BOOT_ELF32
>> 724 select CEVT_R4K
>> 725 select CSRC_R4K
>> 726 select DMA_NONCOHERENT
>> 727 select HW_HAS_PCI
>> 728 select IRQ_MIPS_CPU
>> 729 select R5000_CPU_SCACHE
>> 730 select RM7000_CPU_SCACHE
>> 731 select SYS_HAS_CPU_R5000
>> 732 select SYS_HAS_CPU_R10000 if BROKEN
>> 733 select SYS_HAS_CPU_RM7000
>> 734 select SYS_HAS_CPU_NEVADA
>> 735 select SYS_SUPPORTS_64BIT_KERNEL
>> 736 select SYS_SUPPORTS_BIG_ENDIAN
>> 737 help
>> 738 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 739
>> 740 config SIBYTE_CRHINE
>> 741 bool "Sibyte BCM91120C-CRhine"
>> 742 select BOOT_ELF32
>> 743 select DMA_COHERENT
>> 744 select SIBYTE_BCM1120
>> 745 select SWAP_IO_SPACE
>> 746 select SYS_HAS_CPU_SB1
>> 747 select SYS_SUPPORTS_BIG_ENDIAN
>> 748 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 749
>> 750 config SIBYTE_CARMEL
>> 751 bool "Sibyte BCM91120x-Carmel"
>> 752 select BOOT_ELF32
>> 753 select DMA_COHERENT
>> 754 select SIBYTE_BCM1120
>> 755 select SWAP_IO_SPACE
>> 756 select SYS_HAS_CPU_SB1
>> 757 select SYS_SUPPORTS_BIG_ENDIAN
>> 758 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 759
>> 760 config SIBYTE_CRHONE
>> 761 bool "Sibyte BCM91125C-CRhone"
>> 762 select BOOT_ELF32
>> 763 select DMA_COHERENT
>> 764 select SIBYTE_BCM1125
>> 765 select SWAP_IO_SPACE
>> 766 select SYS_HAS_CPU_SB1
>> 767 select SYS_SUPPORTS_BIG_ENDIAN
>> 768 select SYS_SUPPORTS_HIGHMEM
>> 769 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 770
>> 771 config SIBYTE_RHONE
>> 772 bool "Sibyte BCM91125E-Rhone"
>> 773 select BOOT_ELF32
>> 774 select DMA_COHERENT
>> 775 select SIBYTE_BCM1125H
>> 776 select SWAP_IO_SPACE
>> 777 select SYS_HAS_CPU_SB1
>> 778 select SYS_SUPPORTS_BIG_ENDIAN
>> 779 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 780
>> 781 config SIBYTE_SWARM
>> 782 bool "Sibyte BCM91250A-SWARM"
>> 783 select BOOT_ELF32
>> 784 select DMA_COHERENT
>> 785 select HAVE_PATA_PLATFORM
>> 786 select SIBYTE_SB1250
>> 787 select SWAP_IO_SPACE
>> 788 select SYS_HAS_CPU_SB1
>> 789 select SYS_SUPPORTS_BIG_ENDIAN
>> 790 select SYS_SUPPORTS_HIGHMEM
>> 791 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 792 select ZONE_DMA32 if 64BIT
>> 793
>> 794 config SIBYTE_LITTLESUR
>> 795 bool "Sibyte BCM91250C2-LittleSur"
>> 796 select BOOT_ELF32
>> 797 select DMA_COHERENT
>> 798 select HAVE_PATA_PLATFORM
>> 799 select SIBYTE_SB1250
>> 800 select SWAP_IO_SPACE
>> 801 select SYS_HAS_CPU_SB1
>> 802 select SYS_SUPPORTS_BIG_ENDIAN
>> 803 select SYS_SUPPORTS_HIGHMEM
>> 804 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 805
>> 806 config SIBYTE_SENTOSA
>> 807 bool "Sibyte BCM91250E-Sentosa"
>> 808 select BOOT_ELF32
>> 809 select DMA_COHERENT
>> 810 select SIBYTE_SB1250
>> 811 select SWAP_IO_SPACE
>> 812 select SYS_HAS_CPU_SB1
>> 813 select SYS_SUPPORTS_BIG_ENDIAN
>> 814 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 815
>> 816 config SIBYTE_BIGSUR
>> 817 bool "Sibyte BCM91480B-BigSur"
>> 818 select BOOT_ELF32
>> 819 select DMA_COHERENT
>> 820 select NR_CPUS_DEFAULT_4
>> 821 select SIBYTE_BCM1x80
>> 822 select SWAP_IO_SPACE
>> 823 select SYS_HAS_CPU_SB1
>> 824 select SYS_SUPPORTS_BIG_ENDIAN
>> 825 select SYS_SUPPORTS_HIGHMEM
>> 826 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 827 select ZONE_DMA32 if 64BIT
>> 828
>> 829 config SNI_RM
>> 830 bool "SNI RM200/300/400"
>> 831 select FW_ARC if CPU_LITTLE_ENDIAN
>> 832 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 833 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 834 select ARCH_MAY_HAVE_PC_FDC
>> 835 select BOOT_ELF32
>> 836 select CEVT_R4K
>> 837 select CSRC_R4K
>> 838 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 839 select DMA_NONCOHERENT
>> 840 select GENERIC_ISA_DMA
>> 841 select HAVE_PCSPKR_PLATFORM
>> 842 select HW_HAS_EISA
>> 843 select HW_HAS_PCI
>> 844 select IRQ_MIPS_CPU
>> 845 select I8253
>> 846 select I8259
>> 847 select ISA
>> 848 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 849 select SYS_HAS_CPU_R4X00
>> 850 select SYS_HAS_CPU_R5000
>> 851 select SYS_HAS_CPU_R10000
>> 852 select R5000_CPU_SCACHE
>> 853 select SYS_HAS_EARLY_PRINTK
>> 854 select SYS_SUPPORTS_32BIT_KERNEL
>> 855 select SYS_SUPPORTS_64BIT_KERNEL
>> 856 select SYS_SUPPORTS_BIG_ENDIAN
>> 857 select SYS_SUPPORTS_HIGHMEM
>> 858 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 859 help
>> 860 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 861 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 862 Technology and now in turn merged with Fujitsu. Say Y here to
>> 863 support this machine type.
>> 864
>> 865 config MACH_TX39XX
>> 866 bool "Toshiba TX39 series based machines"
>> 867
>> 868 config MACH_TX49XX
>> 869 bool "Toshiba TX49 series based machines"
>> 870
>> 871 config MIKROTIK_RB532
>> 872 bool "Mikrotik RB532 boards"
>> 873 select CEVT_R4K
>> 874 select CSRC_R4K
>> 875 select DMA_NONCOHERENT
>> 876 select HW_HAS_PCI
>> 877 select IRQ_MIPS_CPU
>> 878 select SYS_HAS_CPU_MIPS32_R1
>> 879 select SYS_SUPPORTS_32BIT_KERNEL
>> 880 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 881 select SWAP_IO_SPACE
>> 882 select BOOT_RAW
>> 883 select GPIOLIB
>> 884 select MIPS_L1_CACHE_SHIFT_4
>> 885 help
>> 886 Support the Mikrotik(tm) RouterBoard 532 series,
>> 887 based on the IDT RC32434 SoC.
>> 888
>> 889 config CAVIUM_OCTEON_SOC
>> 890 bool "Cavium Networks Octeon SoC based boards"
>> 891 select CEVT_R4K
>> 892 select ARCH_PHYS_ADDR_T_64BIT
>> 893 select DMA_COHERENT
>> 894 select SYS_SUPPORTS_64BIT_KERNEL
>> 895 select SYS_SUPPORTS_BIG_ENDIAN
>> 896 select EDAC_SUPPORT
>> 897 select EDAC_ATOMIC_SCRUB
>> 898 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 899 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 900 select SYS_HAS_EARLY_PRINTK
>> 901 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 902 select HW_HAS_PCI
>> 903 select ZONE_DMA32
>> 904 select HOLES_IN_ZONE
>> 905 select GPIOLIB
>> 906 select LIBFDT
>> 907 select USE_OF
>> 908 select ARCH_SPARSEMEM_ENABLE
>> 909 select SYS_SUPPORTS_SMP
>> 910 select NR_CPUS_DEFAULT_16
>> 911 select BUILTIN_DTB
>> 912 select MTD_COMPLEX_MAPPINGS
>> 913 help
>> 914 This option supports all of the Octeon reference boards from Cavium
>> 915 Networks. It builds a kernel that dynamically determines the Octeon
>> 916 CPU type and supports all known board reference implementations.
>> 917 Some of the supported boards are:
>> 918 EBT3000
>> 919 EBH3000
>> 920 EBH3100
>> 921 Thunder
>> 922 Kodama
>> 923 Hikari
>> 924 Say Y here for most Octeon reference boards.
>> 925
>> 926 config NLM_XLR_BOARD
>> 927 bool "Netlogic XLR/XLS based systems"
>> 928 select BOOT_ELF32
>> 929 select NLM_COMMON
>> 930 select SYS_HAS_CPU_XLR
>> 931 select SYS_SUPPORTS_SMP
>> 932 select HW_HAS_PCI
>> 933 select SWAP_IO_SPACE
>> 934 select SYS_SUPPORTS_32BIT_KERNEL
>> 935 select SYS_SUPPORTS_64BIT_KERNEL
>> 936 select ARCH_PHYS_ADDR_T_64BIT
>> 937 select SYS_SUPPORTS_BIG_ENDIAN
>> 938 select SYS_SUPPORTS_HIGHMEM
>> 939 select DMA_COHERENT
>> 940 select NR_CPUS_DEFAULT_32
>> 941 select CEVT_R4K
>> 942 select CSRC_R4K
>> 943 select IRQ_MIPS_CPU
>> 944 select ZONE_DMA32 if 64BIT
>> 945 select SYNC_R4K
>> 946 select SYS_HAS_EARLY_PRINTK
>> 947 select SYS_SUPPORTS_ZBOOT
>> 948 select SYS_SUPPORTS_ZBOOT_UART16550
>> 949 help
>> 950 Support for systems based on Netlogic XLR and XLS processors.
>> 951 Say Y here if you have a XLR or XLS based board.
>> 952
>> 953 config NLM_XLP_BOARD
>> 954 bool "Netlogic XLP based systems"
>> 955 select BOOT_ELF32
>> 956 select NLM_COMMON
>> 957 select SYS_HAS_CPU_XLP
>> 958 select SYS_SUPPORTS_SMP
>> 959 select HW_HAS_PCI
>> 960 select SYS_SUPPORTS_32BIT_KERNEL
>> 961 select SYS_SUPPORTS_64BIT_KERNEL
>> 962 select ARCH_PHYS_ADDR_T_64BIT
>> 963 select GPIOLIB
>> 964 select SYS_SUPPORTS_BIG_ENDIAN
>> 965 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 966 select SYS_SUPPORTS_HIGHMEM
>> 967 select DMA_COHERENT
>> 968 select NR_CPUS_DEFAULT_32
>> 969 select CEVT_R4K
>> 970 select CSRC_R4K
>> 971 select IRQ_MIPS_CPU
>> 972 select ZONE_DMA32 if 64BIT
>> 973 select SYNC_R4K
>> 974 select SYS_HAS_EARLY_PRINTK
>> 975 select USE_OF
>> 976 select SYS_SUPPORTS_ZBOOT
>> 977 select SYS_SUPPORTS_ZBOOT_UART16550
>> 978 help
>> 979 This board is based on Netlogic XLP Processor.
>> 980 Say Y here if you have a XLP based board.
>> 981
>> 982 config MIPS_PARAVIRT
>> 983 bool "Para-Virtualized guest system"
>> 984 select CEVT_R4K
>> 985 select CSRC_R4K
>> 986 select DMA_COHERENT
>> 987 select SYS_SUPPORTS_64BIT_KERNEL
>> 988 select SYS_SUPPORTS_32BIT_KERNEL
>> 989 select SYS_SUPPORTS_BIG_ENDIAN
>> 990 select SYS_SUPPORTS_SMP
>> 991 select NR_CPUS_DEFAULT_4
>> 992 select SYS_HAS_EARLY_PRINTK
>> 993 select SYS_HAS_CPU_MIPS32_R2
>> 994 select SYS_HAS_CPU_MIPS64_R2
>> 995 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 996 select HW_HAS_PCI
>> 997 select SWAP_IO_SPACE
60 help 998 help
61 Xtensa processors are 32-bit RISC ma !! 999 This option supports guest running under ????
62 primarily for embedded systems. The <<
63 configurable and extensible. The Li <<
64 architecture supports all processor <<
65 with reasonable minimum requirements <<
66 a home page at <http://www.linux-xte <<
67 1000
68 config GENERIC_HWEIGHT !! 1001 endchoice
69 def_bool y !! 1002
>> 1003 source "arch/mips/alchemy/Kconfig"
>> 1004 source "arch/mips/ath25/Kconfig"
>> 1005 source "arch/mips/ath79/Kconfig"
>> 1006 source "arch/mips/bcm47xx/Kconfig"
>> 1007 source "arch/mips/bcm63xx/Kconfig"
>> 1008 source "arch/mips/bmips/Kconfig"
>> 1009 source "arch/mips/generic/Kconfig"
>> 1010 source "arch/mips/jazz/Kconfig"
>> 1011 source "arch/mips/jz4740/Kconfig"
>> 1012 source "arch/mips/lantiq/Kconfig"
>> 1013 source "arch/mips/lasat/Kconfig"
>> 1014 source "arch/mips/pic32/Kconfig"
>> 1015 source "arch/mips/pistachio/Kconfig"
>> 1016 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1017 source "arch/mips/ralink/Kconfig"
>> 1018 source "arch/mips/sgi-ip27/Kconfig"
>> 1019 source "arch/mips/sibyte/Kconfig"
>> 1020 source "arch/mips/txx9/Kconfig"
>> 1021 source "arch/mips/vr41xx/Kconfig"
>> 1022 source "arch/mips/cavium-octeon/Kconfig"
>> 1023 source "arch/mips/loongson32/Kconfig"
>> 1024 source "arch/mips/loongson64/Kconfig"
>> 1025 source "arch/mips/netlogic/Kconfig"
>> 1026 source "arch/mips/paravirt/Kconfig"
>> 1027 source "arch/mips/xilfpga/Kconfig"
>> 1028
>> 1029 endmenu
>> 1030
>> 1031 config RWSEM_GENERIC_SPINLOCK
>> 1032 bool
>> 1033 default y
>> 1034
>> 1035 config RWSEM_XCHGADD_ALGORITHM
>> 1036 bool
70 1037
71 config ARCH_HAS_ILOG2_U32 1038 config ARCH_HAS_ILOG2_U32
72 def_bool n !! 1039 bool
>> 1040 default n
73 1041
74 config ARCH_HAS_ILOG2_U64 1042 config ARCH_HAS_ILOG2_U64
75 def_bool n !! 1043 bool
>> 1044 default n
76 1045
77 config ARCH_MTD_XIP !! 1046 config GENERIC_HWEIGHT
78 def_bool y !! 1047 bool
>> 1048 default y
79 1049
80 config NO_IOPORT_MAP !! 1050 config GENERIC_CALIBRATE_DELAY
81 def_bool n !! 1051 bool
>> 1052 default y
82 1053
83 config HZ !! 1054 config SCHED_OMIT_FRAME_POINTER
84 int !! 1055 bool
85 default 100 !! 1056 default y
86 1057
87 config LOCKDEP_SUPPORT !! 1058 #
88 def_bool y !! 1059 # Select some configuration options automatically based on user selections.
>> 1060 #
>> 1061 config FW_ARC
>> 1062 bool
89 1063
90 config STACKTRACE_SUPPORT !! 1064 config ARCH_MAY_HAVE_PC_FDC
91 def_bool y !! 1065 bool
92 1066
93 config MMU !! 1067 config BOOT_RAW
>> 1068 bool
>> 1069
>> 1070 config CEVT_BCM1480
>> 1071 bool
>> 1072
>> 1073 config CEVT_DS1287
>> 1074 bool
>> 1075
>> 1076 config CEVT_GT641XX
>> 1077 bool
>> 1078
>> 1079 config CEVT_R4K
>> 1080 bool
>> 1081
>> 1082 config CEVT_SB1250
>> 1083 bool
>> 1084
>> 1085 config CEVT_TXX9
>> 1086 bool
>> 1087
>> 1088 config CSRC_BCM1480
>> 1089 bool
>> 1090
>> 1091 config CSRC_IOASIC
>> 1092 bool
>> 1093
>> 1094 config CSRC_R4K
>> 1095 bool
>> 1096
>> 1097 config CSRC_SB1250
>> 1098 bool
>> 1099
>> 1100 config MIPS_CLOCK_VSYSCALL
>> 1101 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1102
>> 1103 config GPIO_TXX9
>> 1104 select GPIOLIB
>> 1105 bool
>> 1106
>> 1107 config FW_CFE
>> 1108 bool
>> 1109
>> 1110 config ARCH_DMA_ADDR_T_64BIT
>> 1111 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
>> 1112
>> 1113 config ARCH_SUPPORTS_UPROBES
>> 1114 bool
>> 1115
>> 1116 config DMA_MAYBE_COHERENT
>> 1117 select DMA_NONCOHERENT
>> 1118 bool
>> 1119
>> 1120 config DMA_PERDEV_COHERENT
>> 1121 bool
>> 1122 select DMA_MAYBE_COHERENT
>> 1123
>> 1124 config DMA_COHERENT
>> 1125 bool
>> 1126
>> 1127 config DMA_NONCOHERENT
>> 1128 bool
>> 1129 select NEED_DMA_MAP_STATE
>> 1130
>> 1131 config NEED_DMA_MAP_STATE
>> 1132 bool
>> 1133
>> 1134 config SYS_HAS_EARLY_PRINTK
>> 1135 bool
>> 1136
>> 1137 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1138 bool
>> 1139
>> 1140 config MIPS_BONITO64
>> 1141 bool
>> 1142
>> 1143 config MIPS_MSC
>> 1144 bool
>> 1145
>> 1146 config MIPS_NILE4
>> 1147 bool
>> 1148
>> 1149 config SYNC_R4K
>> 1150 bool
>> 1151
>> 1152 config MIPS_MACHINE
94 def_bool n 1153 def_bool n
95 select PFAULT <<
96 1154
97 config HAVE_XTENSA_GPIO32 !! 1155 config NO_IOPORT_MAP
98 def_bool n 1156 def_bool n
99 1157
100 config KASAN_SHADOW_OFFSET !! 1158 config GENERIC_CSUM
101 hex !! 1159 bool
102 default 0x6e400000 !! 1160
>> 1161 config GENERIC_ISA_DMA
>> 1162 bool
>> 1163 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1164 select ISA_DMA_API
>> 1165
>> 1166 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1167 bool
>> 1168 select GENERIC_ISA_DMA
>> 1169
>> 1170 config ISA_DMA_API
>> 1171 bool
>> 1172
>> 1173 config HOLES_IN_ZONE
>> 1174 bool
>> 1175
>> 1176 config SYS_SUPPORTS_RELOCATABLE
>> 1177 bool
>> 1178 help
>> 1179 Selected if the platform supports relocating the kernel.
>> 1180 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1181 to allow access to command line and entropy sources.
>> 1182
>> 1183 #
>> 1184 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1185 # answer,so we try hard to limit the available choices. Also the use of a
>> 1186 # choice statement should be more obvious to the user.
>> 1187 #
>> 1188 choice
>> 1189 prompt "Endianness selection"
>> 1190 help
>> 1191 Some MIPS machines can be configured for either little or big endian
>> 1192 byte order. These modes require different kernels and a different
>> 1193 Linux distribution. In general there is one preferred byteorder for a
>> 1194 particular system but some systems are just as commonly used in the
>> 1195 one or the other endianness.
103 1196
104 config CPU_BIG_ENDIAN 1197 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1198 bool "Big endian"
>> 1199 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1200
107 config CPU_LITTLE_ENDIAN 1201 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1202 bool "Little endian"
>> 1203 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1204
110 config CC_HAVE_CALL0_ABI !! 1205 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1206
113 menu "Processor type and features" !! 1207 config EXPORT_UASM
>> 1208 bool
114 1209
115 choice !! 1210 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1211 bool
117 default XTENSA_VARIANT_FSF <<
118 1212
119 config XTENSA_VARIANT_FSF !! 1213 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1214 bool
121 select MMU <<
122 1215
123 config XTENSA_VARIANT_DC232B !! 1216 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1217 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1218
130 config XTENSA_VARIANT_DC233C !! 1219 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1220 bool
132 select MMU !! 1221 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1222 default y
134 help !! 1223
135 This variant refers to Tensilica's D !! 1224 config MIPS_HUGE_TLB_SUPPORT
>> 1225 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1226
>> 1227 config IRQ_CPU_RM7K
>> 1228 bool
>> 1229
>> 1230 config IRQ_MSP_SLP
>> 1231 bool
>> 1232
>> 1233 config IRQ_MSP_CIC
>> 1234 bool
136 1235
137 config XTENSA_VARIANT_CUSTOM !! 1236 config IRQ_TXX9
138 bool "Custom Xtensa processor configur !! 1237 bool
139 select HAVE_XTENSA_GPIO32 !! 1238
>> 1239 config IRQ_GT641XX
>> 1240 bool
>> 1241
>> 1242 config PCI_GT64XXX_PCI0
>> 1243 bool
>> 1244
>> 1245 config NO_EXCEPT_FILL
>> 1246 bool
>> 1247
>> 1248 config SOC_EMMA2RH
>> 1249 bool
>> 1250 select CEVT_R4K
>> 1251 select CSRC_R4K
>> 1252 select DMA_NONCOHERENT
>> 1253 select IRQ_MIPS_CPU
>> 1254 select SWAP_IO_SPACE
>> 1255 select SYS_HAS_CPU_R5500
>> 1256 select SYS_SUPPORTS_32BIT_KERNEL
>> 1257 select SYS_SUPPORTS_64BIT_KERNEL
>> 1258 select SYS_SUPPORTS_BIG_ENDIAN
>> 1259
>> 1260 config SOC_PNX833X
>> 1261 bool
>> 1262 select CEVT_R4K
>> 1263 select CSRC_R4K
>> 1264 select IRQ_MIPS_CPU
>> 1265 select DMA_NONCOHERENT
>> 1266 select SYS_HAS_CPU_MIPS32_R2
>> 1267 select SYS_SUPPORTS_32BIT_KERNEL
>> 1268 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1269 select SYS_SUPPORTS_BIG_ENDIAN
>> 1270 select SYS_SUPPORTS_MIPS16
>> 1271 select CPU_MIPSR2_IRQ_VI
>> 1272
>> 1273 config SOC_PNX8335
>> 1274 bool
>> 1275 select SOC_PNX833X
>> 1276
>> 1277 config MIPS_SPRAM
>> 1278 bool
>> 1279
>> 1280 config SWAP_IO_SPACE
>> 1281 bool
>> 1282
>> 1283 config SGI_HAS_INDYDOG
>> 1284 bool
>> 1285
>> 1286 config SGI_HAS_HAL2
>> 1287 bool
>> 1288
>> 1289 config SGI_HAS_SEEQ
>> 1290 bool
>> 1291
>> 1292 config SGI_HAS_WD93
>> 1293 bool
>> 1294
>> 1295 config SGI_HAS_ZILOG
>> 1296 bool
>> 1297
>> 1298 config SGI_HAS_I8042
>> 1299 bool
>> 1300
>> 1301 config DEFAULT_SGI_PARTITION
>> 1302 bool
>> 1303
>> 1304 config FW_ARC32
>> 1305 bool
>> 1306
>> 1307 config FW_SNIPROM
>> 1308 bool
>> 1309
>> 1310 config BOOT_ELF32
>> 1311 bool
>> 1312
>> 1313 config MIPS_L1_CACHE_SHIFT_4
>> 1314 bool
>> 1315
>> 1316 config MIPS_L1_CACHE_SHIFT_5
>> 1317 bool
>> 1318
>> 1319 config MIPS_L1_CACHE_SHIFT_6
>> 1320 bool
>> 1321
>> 1322 config MIPS_L1_CACHE_SHIFT_7
>> 1323 bool
>> 1324
>> 1325 config MIPS_L1_CACHE_SHIFT
>> 1326 int
>> 1327 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1328 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1329 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1330 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1331 default "5"
>> 1332
>> 1333 config HAVE_STD_PC_SERIAL_PORT
>> 1334 bool
>> 1335
>> 1336 config ARC_CONSOLE
>> 1337 bool "ARC console support"
>> 1338 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1339
>> 1340 config ARC_MEMORY
>> 1341 bool
>> 1342 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1343 default y
>> 1344
>> 1345 config ARC_PROMLIB
>> 1346 bool
>> 1347 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1348 default y
>> 1349
>> 1350 config FW_ARC64
>> 1351 bool
>> 1352
>> 1353 config BOOT_ELF64
>> 1354 bool
>> 1355
>> 1356 menu "CPU selection"
>> 1357
>> 1358 choice
>> 1359 prompt "CPU type"
>> 1360 default CPU_R4X00
>> 1361
>> 1362 config CPU_LOONGSON3
>> 1363 bool "Loongson 3 CPU"
>> 1364 depends on SYS_HAS_CPU_LOONGSON3
>> 1365 select CPU_SUPPORTS_64BIT_KERNEL
>> 1366 select CPU_SUPPORTS_HIGHMEM
>> 1367 select CPU_SUPPORTS_HUGEPAGES
>> 1368 select WEAK_ORDERING
>> 1369 select WEAK_REORDERING_BEYOND_LLSC
>> 1370 select MIPS_PGD_C0_CONTEXT
>> 1371 select GPIOLIB
140 help 1372 help
141 Select this variant to use a custom !! 1373 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1374 set with many extensions.
143 endchoice <<
144 1375
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1376 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1377 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1378 default n
>> 1379 select CPU_MIPSR2
>> 1380 select CPU_HAS_PREFETCH
>> 1381 depends on CPU_LOONGSON3
>> 1382 help
>> 1383 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1384 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1385 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1386 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1387 Fast TLB refill support, etc.
>> 1388
>> 1389 This option enable those enhancements which are not probed at run
>> 1390 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1391 please say 'N' here. If you want a high-performance kernel to run on
>> 1392 new Loongson 3 machines only, please say 'Y' here.
>> 1393
>> 1394 config CPU_LOONGSON2E
>> 1395 bool "Loongson 2E"
>> 1396 depends on SYS_HAS_CPU_LOONGSON2E
>> 1397 select CPU_LOONGSON2
>> 1398 help
>> 1399 The Loongson 2E processor implements the MIPS III instruction set
>> 1400 with many extensions.
>> 1401
>> 1402 It has an internal FPGA northbridge, which is compatible to
>> 1403 bonito64.
>> 1404
>> 1405 config CPU_LOONGSON2F
>> 1406 bool "Loongson 2F"
>> 1407 depends on SYS_HAS_CPU_LOONGSON2F
>> 1408 select CPU_LOONGSON2
>> 1409 select GPIOLIB
>> 1410 help
>> 1411 The Loongson 2F processor implements the MIPS III instruction set
>> 1412 with many extensions.
>> 1413
>> 1414 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1415 have a similar programming interface with FPGA northbridge used in
>> 1416 Loongson2E.
>> 1417
>> 1418 config CPU_LOONGSON1B
>> 1419 bool "Loongson 1B"
>> 1420 depends on SYS_HAS_CPU_LOONGSON1B
>> 1421 select CPU_LOONGSON1
>> 1422 select LEDS_GPIO_REGISTER
>> 1423 help
>> 1424 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1425 release 2 instruction set.
>> 1426
>> 1427 config CPU_LOONGSON1C
>> 1428 bool "Loongson 1C"
>> 1429 depends on SYS_HAS_CPU_LOONGSON1C
>> 1430 select CPU_LOONGSON1
>> 1431 select ARCH_WANT_OPTIONAL_GPIOLIB
>> 1432 select LEDS_GPIO_REGISTER
>> 1433 help
>> 1434 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1435 release 2 instruction set.
>> 1436
>> 1437 config CPU_MIPS32_R1
>> 1438 bool "MIPS32 Release 1"
>> 1439 depends on SYS_HAS_CPU_MIPS32_R1
>> 1440 select CPU_HAS_PREFETCH
>> 1441 select CPU_SUPPORTS_32BIT_KERNEL
>> 1442 select CPU_SUPPORTS_HIGHMEM
>> 1443 help
>> 1444 Choose this option to build a kernel for release 1 or later of the
>> 1445 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1446 MIPS processor are based on a MIPS32 processor. If you know the
>> 1447 specific type of processor in your system, choose those that one
>> 1448 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1449 Release 2 of the MIPS32 architecture is available since several
>> 1450 years so chances are you even have a MIPS32 Release 2 processor
>> 1451 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1452 performance.
>> 1453
>> 1454 config CPU_MIPS32_R2
>> 1455 bool "MIPS32 Release 2"
>> 1456 depends on SYS_HAS_CPU_MIPS32_R2
>> 1457 select CPU_HAS_PREFETCH
>> 1458 select CPU_SUPPORTS_32BIT_KERNEL
>> 1459 select CPU_SUPPORTS_HIGHMEM
>> 1460 select CPU_SUPPORTS_MSA
>> 1461 select HAVE_KVM
>> 1462 help
>> 1463 Choose this option to build a kernel for release 2 or later of the
>> 1464 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1465 MIPS processor are based on a MIPS32 processor. If you know the
>> 1466 specific type of processor in your system, choose those that one
>> 1467 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1468
>> 1469 config CPU_MIPS32_R6
>> 1470 bool "MIPS32 Release 6"
>> 1471 depends on SYS_HAS_CPU_MIPS32_R6
>> 1472 select CPU_HAS_PREFETCH
>> 1473 select CPU_SUPPORTS_32BIT_KERNEL
>> 1474 select CPU_SUPPORTS_HIGHMEM
>> 1475 select CPU_SUPPORTS_MSA
>> 1476 select GENERIC_CSUM
>> 1477 select HAVE_KVM
>> 1478 select MIPS_O32_FP64_SUPPORT
>> 1479 help
>> 1480 Choose this option to build a kernel for release 6 or later of the
>> 1481 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1482 family, are based on a MIPS32r6 processor. If you own an older
>> 1483 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1484
>> 1485 config CPU_MIPS64_R1
>> 1486 bool "MIPS64 Release 1"
>> 1487 depends on SYS_HAS_CPU_MIPS64_R1
>> 1488 select CPU_HAS_PREFETCH
>> 1489 select CPU_SUPPORTS_32BIT_KERNEL
>> 1490 select CPU_SUPPORTS_64BIT_KERNEL
>> 1491 select CPU_SUPPORTS_HIGHMEM
>> 1492 select CPU_SUPPORTS_HUGEPAGES
>> 1493 help
>> 1494 Choose this option to build a kernel for release 1 or later of the
>> 1495 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1496 MIPS processor are based on a MIPS64 processor. If you know the
>> 1497 specific type of processor in your system, choose those that one
>> 1498 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1499 Release 2 of the MIPS64 architecture is available since several
>> 1500 years so chances are you even have a MIPS64 Release 2 processor
>> 1501 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1502 performance.
>> 1503
>> 1504 config CPU_MIPS64_R2
>> 1505 bool "MIPS64 Release 2"
>> 1506 depends on SYS_HAS_CPU_MIPS64_R2
>> 1507 select CPU_HAS_PREFETCH
>> 1508 select CPU_SUPPORTS_32BIT_KERNEL
>> 1509 select CPU_SUPPORTS_64BIT_KERNEL
>> 1510 select CPU_SUPPORTS_HIGHMEM
>> 1511 select CPU_SUPPORTS_HUGEPAGES
>> 1512 select CPU_SUPPORTS_MSA
>> 1513 select HAVE_KVM
>> 1514 help
>> 1515 Choose this option to build a kernel for release 2 or later of the
>> 1516 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1517 MIPS processor are based on a MIPS64 processor. If you know the
>> 1518 specific type of processor in your system, choose those that one
>> 1519 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1520
>> 1521 config CPU_MIPS64_R6
>> 1522 bool "MIPS64 Release 6"
>> 1523 depends on SYS_HAS_CPU_MIPS64_R6
>> 1524 select CPU_HAS_PREFETCH
>> 1525 select CPU_SUPPORTS_32BIT_KERNEL
>> 1526 select CPU_SUPPORTS_64BIT_KERNEL
>> 1527 select CPU_SUPPORTS_HIGHMEM
>> 1528 select CPU_SUPPORTS_MSA
>> 1529 select GENERIC_CSUM
>> 1530 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1531 select HAVE_KVM
>> 1532 help
>> 1533 Choose this option to build a kernel for release 6 or later of the
>> 1534 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1535 family, are based on a MIPS64r6 processor. If you own an older
>> 1536 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1537
>> 1538 config CPU_R3000
>> 1539 bool "R3000"
>> 1540 depends on SYS_HAS_CPU_R3000
>> 1541 select CPU_HAS_WB
>> 1542 select CPU_SUPPORTS_32BIT_KERNEL
>> 1543 select CPU_SUPPORTS_HIGHMEM
>> 1544 help
>> 1545 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1546 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1547 *not* work on R4000 machines and vice versa. However, since most
>> 1548 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1549 might be a safe bet. If the resulting kernel does not work,
>> 1550 try to recompile with R3000.
>> 1551
>> 1552 config CPU_TX39XX
>> 1553 bool "R39XX"
>> 1554 depends on SYS_HAS_CPU_TX39XX
>> 1555 select CPU_SUPPORTS_32BIT_KERNEL
>> 1556
>> 1557 config CPU_VR41XX
>> 1558 bool "R41xx"
>> 1559 depends on SYS_HAS_CPU_VR41XX
>> 1560 select CPU_SUPPORTS_32BIT_KERNEL
>> 1561 select CPU_SUPPORTS_64BIT_KERNEL
>> 1562 help
>> 1563 The options selects support for the NEC VR4100 series of processors.
>> 1564 Only choose this option if you have one of these processors as a
>> 1565 kernel built with this option will not run on any other type of
>> 1566 processor or vice versa.
>> 1567
>> 1568 config CPU_R4300
>> 1569 bool "R4300"
>> 1570 depends on SYS_HAS_CPU_R4300
>> 1571 select CPU_SUPPORTS_32BIT_KERNEL
>> 1572 select CPU_SUPPORTS_64BIT_KERNEL
>> 1573 help
>> 1574 MIPS Technologies R4300-series processors.
>> 1575
>> 1576 config CPU_R4X00
>> 1577 bool "R4x00"
>> 1578 depends on SYS_HAS_CPU_R4X00
>> 1579 select CPU_SUPPORTS_32BIT_KERNEL
>> 1580 select CPU_SUPPORTS_64BIT_KERNEL
>> 1581 select CPU_SUPPORTS_HUGEPAGES
>> 1582 help
>> 1583 MIPS Technologies R4000-series processors other than 4300, including
>> 1584 the R4000, R4400, R4600, and 4700.
>> 1585
>> 1586 config CPU_TX49XX
>> 1587 bool "R49XX"
>> 1588 depends on SYS_HAS_CPU_TX49XX
>> 1589 select CPU_HAS_PREFETCH
>> 1590 select CPU_SUPPORTS_32BIT_KERNEL
>> 1591 select CPU_SUPPORTS_64BIT_KERNEL
>> 1592 select CPU_SUPPORTS_HUGEPAGES
>> 1593
>> 1594 config CPU_R5000
>> 1595 bool "R5000"
>> 1596 depends on SYS_HAS_CPU_R5000
>> 1597 select CPU_SUPPORTS_32BIT_KERNEL
>> 1598 select CPU_SUPPORTS_64BIT_KERNEL
>> 1599 select CPU_SUPPORTS_HUGEPAGES
>> 1600 help
>> 1601 MIPS Technologies R5000-series processors other than the Nevada.
>> 1602
>> 1603 config CPU_R5432
>> 1604 bool "R5432"
>> 1605 depends on SYS_HAS_CPU_R5432
>> 1606 select CPU_SUPPORTS_32BIT_KERNEL
>> 1607 select CPU_SUPPORTS_64BIT_KERNEL
>> 1608 select CPU_SUPPORTS_HUGEPAGES
>> 1609
>> 1610 config CPU_R5500
>> 1611 bool "R5500"
>> 1612 depends on SYS_HAS_CPU_R5500
>> 1613 select CPU_SUPPORTS_32BIT_KERNEL
>> 1614 select CPU_SUPPORTS_64BIT_KERNEL
>> 1615 select CPU_SUPPORTS_HUGEPAGES
>> 1616 help
>> 1617 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1618 instruction set.
>> 1619
>> 1620 config CPU_R6000
>> 1621 bool "R6000"
>> 1622 depends on SYS_HAS_CPU_R6000
>> 1623 select CPU_SUPPORTS_32BIT_KERNEL
>> 1624 help
>> 1625 MIPS Technologies R6000 and R6000A series processors. Note these
>> 1626 processors are extremely rare and the support for them is incomplete.
>> 1627
>> 1628 config CPU_NEVADA
>> 1629 bool "RM52xx"
>> 1630 depends on SYS_HAS_CPU_NEVADA
>> 1631 select CPU_SUPPORTS_32BIT_KERNEL
>> 1632 select CPU_SUPPORTS_64BIT_KERNEL
>> 1633 select CPU_SUPPORTS_HUGEPAGES
>> 1634 help
>> 1635 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1636
>> 1637 config CPU_R8000
>> 1638 bool "R8000"
>> 1639 depends on SYS_HAS_CPU_R8000
>> 1640 select CPU_HAS_PREFETCH
>> 1641 select CPU_SUPPORTS_64BIT_KERNEL
>> 1642 help
>> 1643 MIPS Technologies R8000 processors. Note these processors are
>> 1644 uncommon and the support for them is incomplete.
>> 1645
>> 1646 config CPU_R10000
>> 1647 bool "R10000"
>> 1648 depends on SYS_HAS_CPU_R10000
>> 1649 select CPU_HAS_PREFETCH
>> 1650 select CPU_SUPPORTS_32BIT_KERNEL
>> 1651 select CPU_SUPPORTS_64BIT_KERNEL
>> 1652 select CPU_SUPPORTS_HIGHMEM
>> 1653 select CPU_SUPPORTS_HUGEPAGES
>> 1654 help
>> 1655 MIPS Technologies R10000-series processors.
>> 1656
>> 1657 config CPU_RM7000
>> 1658 bool "RM7000"
>> 1659 depends on SYS_HAS_CPU_RM7000
>> 1660 select CPU_HAS_PREFETCH
>> 1661 select CPU_SUPPORTS_32BIT_KERNEL
>> 1662 select CPU_SUPPORTS_64BIT_KERNEL
>> 1663 select CPU_SUPPORTS_HIGHMEM
>> 1664 select CPU_SUPPORTS_HUGEPAGES
>> 1665
>> 1666 config CPU_SB1
>> 1667 bool "SB1"
>> 1668 depends on SYS_HAS_CPU_SB1
>> 1669 select CPU_SUPPORTS_32BIT_KERNEL
>> 1670 select CPU_SUPPORTS_64BIT_KERNEL
>> 1671 select CPU_SUPPORTS_HIGHMEM
>> 1672 select CPU_SUPPORTS_HUGEPAGES
>> 1673 select WEAK_ORDERING
>> 1674
>> 1675 config CPU_CAVIUM_OCTEON
>> 1676 bool "Cavium Octeon processor"
>> 1677 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1678 select CPU_HAS_PREFETCH
>> 1679 select CPU_SUPPORTS_64BIT_KERNEL
>> 1680 select WEAK_ORDERING
>> 1681 select CPU_SUPPORTS_HIGHMEM
>> 1682 select CPU_SUPPORTS_HUGEPAGES
>> 1683 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1684 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1685 select MIPS_L1_CACHE_SHIFT_7
>> 1686 help
>> 1687 The Cavium Octeon processor is a highly integrated chip containing
>> 1688 many ethernet hardware widgets for networking tasks. The processor
>> 1689 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1690 Full details can be found at http://www.caviumnetworks.com.
>> 1691
>> 1692 config CPU_BMIPS
>> 1693 bool "Broadcom BMIPS"
>> 1694 depends on SYS_HAS_CPU_BMIPS
>> 1695 select CPU_MIPS32
>> 1696 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1697 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1698 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1699 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1700 select CPU_SUPPORTS_32BIT_KERNEL
>> 1701 select DMA_NONCOHERENT
>> 1702 select IRQ_MIPS_CPU
>> 1703 select SWAP_IO_SPACE
>> 1704 select WEAK_ORDERING
>> 1705 select CPU_SUPPORTS_HIGHMEM
>> 1706 select CPU_HAS_PREFETCH
>> 1707 help
>> 1708 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1709
>> 1710 config CPU_XLR
>> 1711 bool "Netlogic XLR SoC"
>> 1712 depends on SYS_HAS_CPU_XLR
>> 1713 select CPU_SUPPORTS_32BIT_KERNEL
>> 1714 select CPU_SUPPORTS_64BIT_KERNEL
>> 1715 select CPU_SUPPORTS_HIGHMEM
>> 1716 select CPU_SUPPORTS_HUGEPAGES
>> 1717 select WEAK_ORDERING
>> 1718 select WEAK_REORDERING_BEYOND_LLSC
>> 1719 help
>> 1720 Netlogic Microsystems XLR/XLS processors.
>> 1721
>> 1722 config CPU_XLP
>> 1723 bool "Netlogic XLP SoC"
>> 1724 depends on SYS_HAS_CPU_XLP
>> 1725 select CPU_SUPPORTS_32BIT_KERNEL
>> 1726 select CPU_SUPPORTS_64BIT_KERNEL
>> 1727 select CPU_SUPPORTS_HIGHMEM
>> 1728 select WEAK_ORDERING
>> 1729 select WEAK_REORDERING_BEYOND_LLSC
>> 1730 select CPU_HAS_PREFETCH
>> 1731 select CPU_MIPSR2
>> 1732 select CPU_SUPPORTS_HUGEPAGES
>> 1733 select MIPS_ASID_BITS_VARIABLE
173 help 1734 help
174 Enable if core variant has Performan !! 1735 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1736 endchoice
176 <<
177 If unsure, say N. <<
178 1737
179 config XTENSA_FAKE_NMI !! 1738 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1739 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1740 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1741 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1742 help
>> 1743 Choose this option to build a kernel for release 2 or later of the
>> 1744 MIPS32 architecture including features from the 3.5 release such as
>> 1745 support for Enhanced Virtual Addressing (EVA).
>> 1746
>> 1747 config CPU_MIPS32_3_5_EVA
>> 1748 bool "Enhanced Virtual Addressing (EVA)"
>> 1749 depends on CPU_MIPS32_3_5_FEATURES
>> 1750 select EVA
>> 1751 default y
>> 1752 help
>> 1753 Choose this option if you want to enable the Enhanced Virtual
>> 1754 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1755 One of its primary benefits is an increase in the maximum size
>> 1756 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1757
>> 1758 config CPU_MIPS32_R5_FEATURES
>> 1759 bool "MIPS32 Release 5 Features"
>> 1760 depends on SYS_HAS_CPU_MIPS32_R5
>> 1761 depends on CPU_MIPS32_R2
>> 1762 help
>> 1763 Choose this option to build a kernel for release 2 or later of the
>> 1764 MIPS32 architecture including features from release 5 such as
>> 1765 support for Extended Physical Addressing (XPA).
>> 1766
>> 1767 config CPU_MIPS32_R5_XPA
>> 1768 bool "Extended Physical Addressing (XPA)"
>> 1769 depends on CPU_MIPS32_R5_FEATURES
>> 1770 depends on !EVA
>> 1771 depends on !PAGE_SIZE_4KB
>> 1772 depends on SYS_SUPPORTS_HIGHMEM
>> 1773 select XPA
>> 1774 select HIGHMEM
>> 1775 select ARCH_PHYS_ADDR_T_64BIT
182 default n 1776 default n
183 help 1777 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1778 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1779 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1780 benefit is to increase physical addressing equal to or greater
>> 1781 than 40 bits. Note that this has the side effect of turning on
>> 1782 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1783 If unsure, say 'N' here.
186 1784
187 If there are other interrupts at or !! 1785 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1786 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1787 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1788
193 If unsure, say N. !! 1789 config CPU_JUMP_WORKAROUNDS
>> 1790 bool
194 1791
195 config PFAULT !! 1792 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1793 bool "Loongson 2F Workarounds"
197 default y 1794 default y
>> 1795 select CPU_NOP_WORKAROUNDS
>> 1796 select CPU_JUMP_WORKAROUNDS
198 help 1797 help
199 Handle protection faults. MMU config !! 1798 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1799 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1800 unexpectedly. For more information please refer to the gas
>> 1801 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1802
>> 1803 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1804 are needed. The workarounds have no significant side effect on them
>> 1805 but may decrease the performance of the system so this option should
>> 1806 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1807 systems.
202 1808
203 If unsure, say Y. !! 1809 If unsure, please say Y.
>> 1810 endif # CPU_LOONGSON2F
204 1811
205 config XTENSA_UNALIGNED_USER !! 1812 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1813 bool
207 help !! 1814 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1815 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1816 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1817 select HAVE_KERNEL_LZMA
>> 1818 select HAVE_KERNEL_LZO
>> 1819 select HAVE_KERNEL_XZ
211 1820
212 Say Y here to enable unaligned memor !! 1821 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1822 bool
>> 1823 select SYS_SUPPORTS_ZBOOT
213 1824
214 config XTENSA_LOAD_STORE !! 1825 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1826 bool
216 help !! 1827 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows !! 1828
218 instruction bus with l32r and l32i i !! 1829 config CPU_LOONGSON2
219 instructions raise an exception with !! 1830 bool
220 This makes it hard to use some confi !! 1831 select CPU_SUPPORTS_32BIT_KERNEL
221 literals in FLASH memory attached to !! 1832 select CPU_SUPPORTS_64BIT_KERNEL
>> 1833 select CPU_SUPPORTS_HIGHMEM
>> 1834 select CPU_SUPPORTS_HUGEPAGES
222 1835
223 Say Y here to enable exception handl !! 1836 config CPU_LOONGSON1
224 byte and 2-byte access to memory att !! 1837 bool
>> 1838 select CPU_MIPS32
>> 1839 select CPU_MIPSR2
>> 1840 select CPU_HAS_PREFETCH
>> 1841 select CPU_SUPPORTS_32BIT_KERNEL
>> 1842 select CPU_SUPPORTS_HIGHMEM
>> 1843 select CPU_SUPPORTS_CPUFREQ
225 1844
226 config HAVE_SMP !! 1845 config CPU_BMIPS32_3300
227 bool "System Supports SMP (MX)" !! 1846 select SMP_UP if SMP
228 depends on XTENSA_VARIANT_CUSTOM !! 1847 bool
229 select XTENSA_MX <<
230 help <<
231 This option is used to indicate that <<
232 supports Multiprocessing. Multiproce <<
233 the CPU core definition and currentl <<
234 1848
235 Multiprocessor support is implemente !! 1849 config CPU_BMIPS4350
236 interrupt controllers. !! 1850 bool
>> 1851 select SYS_SUPPORTS_SMP
>> 1852 select SYS_SUPPORTS_HOTPLUG_CPU
237 1853
238 The MX interrupt distributer adds In !! 1854 config CPU_BMIPS4380
239 and causes the IRQ numbers to be inc !! 1855 bool
240 like the open cores ethernet driver !! 1856 select MIPS_L1_CACHE_SHIFT_6
>> 1857 select SYS_SUPPORTS_SMP
>> 1858 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1859 select CPU_HAS_RIXI
241 1860
242 You still have to select "Enable SMP !! 1861 config CPU_BMIPS5000
>> 1862 bool
>> 1863 select MIPS_CPU_SCACHE
>> 1864 select MIPS_L1_CACHE_SHIFT_7
>> 1865 select SYS_SUPPORTS_SMP
>> 1866 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1867 select CPU_HAS_RIXI
243 1868
244 config SMP !! 1869 config SYS_HAS_CPU_LOONGSON3
245 bool "Enable Symmetric multi-processin !! 1870 bool
246 depends on HAVE_SMP !! 1871 select CPU_SUPPORTS_CPUFREQ
247 select GENERIC_SMP_IDLE_THREAD !! 1872 select CPU_HAS_RIXI
248 help <<
249 Enabled SMP Software; allows more th <<
250 to be activated during startup. <<
251 1873
252 config NR_CPUS !! 1874 config SYS_HAS_CPU_LOONGSON2E
253 depends on SMP !! 1875 bool
254 int "Maximum number of CPUs (2-32)" <<
255 range 2 32 <<
256 default "4" <<
257 1876
258 config HOTPLUG_CPU !! 1877 config SYS_HAS_CPU_LOONGSON2F
259 bool "Enable CPU hotplug support" !! 1878 bool
260 depends on SMP !! 1879 select CPU_SUPPORTS_CPUFREQ
261 help !! 1880 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
262 Say Y here to allow turning CPUs off !! 1881 select CPU_SUPPORTS_UNCACHED_ACCELERATED
263 controlled through /sys/devices/syst <<
264 1882
265 Say N if you want to disable CPU hot !! 1883 config SYS_HAS_CPU_LOONGSON1B
>> 1884 bool
>> 1885
>> 1886 config SYS_HAS_CPU_LOONGSON1C
>> 1887 bool
>> 1888
>> 1889 config SYS_HAS_CPU_MIPS32_R1
>> 1890 bool
>> 1891
>> 1892 config SYS_HAS_CPU_MIPS32_R2
>> 1893 bool
>> 1894
>> 1895 config SYS_HAS_CPU_MIPS32_R3_5
>> 1896 bool
>> 1897
>> 1898 config SYS_HAS_CPU_MIPS32_R5
>> 1899 bool
>> 1900
>> 1901 config SYS_HAS_CPU_MIPS32_R6
>> 1902 bool
>> 1903
>> 1904 config SYS_HAS_CPU_MIPS64_R1
>> 1905 bool
>> 1906
>> 1907 config SYS_HAS_CPU_MIPS64_R2
>> 1908 bool
>> 1909
>> 1910 config SYS_HAS_CPU_MIPS64_R6
>> 1911 bool
>> 1912
>> 1913 config SYS_HAS_CPU_R3000
>> 1914 bool
>> 1915
>> 1916 config SYS_HAS_CPU_TX39XX
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_VR41XX
>> 1920 bool
>> 1921
>> 1922 config SYS_HAS_CPU_R4300
>> 1923 bool
>> 1924
>> 1925 config SYS_HAS_CPU_R4X00
>> 1926 bool
>> 1927
>> 1928 config SYS_HAS_CPU_TX49XX
>> 1929 bool
>> 1930
>> 1931 config SYS_HAS_CPU_R5000
>> 1932 bool
>> 1933
>> 1934 config SYS_HAS_CPU_R5432
>> 1935 bool
>> 1936
>> 1937 config SYS_HAS_CPU_R5500
>> 1938 bool
>> 1939
>> 1940 config SYS_HAS_CPU_R6000
>> 1941 bool
>> 1942
>> 1943 config SYS_HAS_CPU_NEVADA
>> 1944 bool
>> 1945
>> 1946 config SYS_HAS_CPU_R8000
>> 1947 bool
>> 1948
>> 1949 config SYS_HAS_CPU_R10000
>> 1950 bool
>> 1951
>> 1952 config SYS_HAS_CPU_RM7000
>> 1953 bool
>> 1954
>> 1955 config SYS_HAS_CPU_SB1
>> 1956 bool
>> 1957
>> 1958 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1959 bool
>> 1960
>> 1961 config SYS_HAS_CPU_BMIPS
>> 1962 bool
>> 1963
>> 1964 config SYS_HAS_CPU_BMIPS32_3300
>> 1965 bool
>> 1966 select SYS_HAS_CPU_BMIPS
>> 1967
>> 1968 config SYS_HAS_CPU_BMIPS4350
>> 1969 bool
>> 1970 select SYS_HAS_CPU_BMIPS
>> 1971
>> 1972 config SYS_HAS_CPU_BMIPS4380
>> 1973 bool
>> 1974 select SYS_HAS_CPU_BMIPS
266 1975
267 config SECONDARY_RESET_VECTOR !! 1976 config SYS_HAS_CPU_BMIPS5000
268 bool "Secondary cores use alternative !! 1977 bool
>> 1978 select SYS_HAS_CPU_BMIPS
>> 1979
>> 1980 config SYS_HAS_CPU_XLR
>> 1981 bool
>> 1982
>> 1983 config SYS_HAS_CPU_XLP
>> 1984 bool
>> 1985
>> 1986 config MIPS_MALTA_PM
>> 1987 depends on MIPS_MALTA
>> 1988 depends on PCI
>> 1989 bool
269 default y 1990 default y
270 depends on HAVE_SMP <<
271 help <<
272 Secondary cores may be configured to <<
273 or all cores may use primary reset v <<
274 Say Y here to supply handler for the <<
275 1991
276 config FAST_SYSCALL_XTENSA !! 1992 #
277 bool "Enable fast atomic syscalls" !! 1993 # CPU may reorder R->R, R->W, W->R, W->W
278 default n !! 1994 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
279 help !! 1995 #
280 fast_syscall_xtensa is a syscall tha !! 1996 config WEAK_ORDERING
281 on UP kernel when processor has no s !! 1997 bool
282 1998
283 This syscall is deprecated. It may h !! 1999 #
284 invalid arguments. It is provided on !! 2000 # CPU may reorder reads and writes beyond LL/SC
285 Only enable it if your userspace sof !! 2001 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2002 #
>> 2003 config WEAK_REORDERING_BEYOND_LLSC
>> 2004 bool
>> 2005 endmenu
286 2006
287 If unsure, say N. !! 2007 #
>> 2008 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2009 #
>> 2010 config CPU_MIPS32
>> 2011 bool
>> 2012 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
288 2013
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2014 config CPU_MIPS64
290 bool "Enable spill registers syscall" !! 2015 bool
291 default n !! 2016 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2017
>> 2018 #
>> 2019 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2020 #
>> 2021 config CPU_MIPSR1
>> 2022 bool
>> 2023 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2024
>> 2025 config CPU_MIPSR2
>> 2026 bool
>> 2027 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2028 select CPU_HAS_RIXI
>> 2029 select MIPS_SPRAM
>> 2030
>> 2031 config CPU_MIPSR6
>> 2032 bool
>> 2033 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2034 select CPU_HAS_RIXI
>> 2035 select HAVE_ARCH_BITREVERSE
>> 2036 select MIPS_ASID_BITS_VARIABLE
>> 2037 select MIPS_SPRAM
>> 2038
>> 2039 config EVA
>> 2040 bool
>> 2041
>> 2042 config XPA
>> 2043 bool
>> 2044
>> 2045 config SYS_SUPPORTS_32BIT_KERNEL
>> 2046 bool
>> 2047 config SYS_SUPPORTS_64BIT_KERNEL
>> 2048 bool
>> 2049 config CPU_SUPPORTS_32BIT_KERNEL
>> 2050 bool
>> 2051 config CPU_SUPPORTS_64BIT_KERNEL
>> 2052 bool
>> 2053 config CPU_SUPPORTS_CPUFREQ
>> 2054 bool
>> 2055 config CPU_SUPPORTS_ADDRWINCFG
>> 2056 bool
>> 2057 config CPU_SUPPORTS_HUGEPAGES
>> 2058 bool
>> 2059 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2060 bool
>> 2061 config MIPS_PGD_C0_CONTEXT
>> 2062 bool
>> 2063 default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
>> 2064
>> 2065 #
>> 2066 # Set to y for ptrace access to watch registers.
>> 2067 #
>> 2068 config HARDWARE_WATCHPOINTS
>> 2069 bool
>> 2070 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2071
>> 2072 menu "Kernel type"
>> 2073
>> 2074 choice
>> 2075 prompt "Kernel code model"
292 help 2076 help
293 fast_syscall_spill_registers is a sy !! 2077 You should only select this option if you have a workload that
294 register windows of a calling usersp !! 2078 actually benefits from 64-bit processing or if your machine has
>> 2079 large memory. You will only be presented a single option in this
>> 2080 menu if your system does not support both 32-bit and 64-bit kernels.
295 2081
296 This syscall is deprecated. It may h !! 2082 config 32BIT
297 invalid arguments. It is provided on !! 2083 bool "32-bit kernel"
298 Only enable it if your userspace sof !! 2084 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2085 select TRAD_SIGNALS
>> 2086 help
>> 2087 Select this option if you want to build a 32-bit kernel.
>> 2088
>> 2089 config 64BIT
>> 2090 bool "64-bit kernel"
>> 2091 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2092 help
>> 2093 Select this option if you want to build a 64-bit kernel.
>> 2094
>> 2095 endchoice
299 2096
>> 2097 config KVM_GUEST
>> 2098 bool "KVM Guest Kernel"
>> 2099 depends on BROKEN_ON_SMP
>> 2100 help
>> 2101 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2102 mode.
>> 2103
>> 2104 config KVM_GUEST_TIMER_FREQ
>> 2105 int "Count/Compare Timer Frequency (MHz)"
>> 2106 depends on KVM_GUEST
>> 2107 default 100
>> 2108 help
>> 2109 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2110 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2111 timer frequency is specified directly.
>> 2112
>> 2113 config MIPS_VA_BITS_48
>> 2114 bool "48 bits virtual memory"
>> 2115 depends on 64BIT
>> 2116 help
>> 2117 Support a maximum at least 48 bits of application virtual memory.
>> 2118 Default is 40 bits or less, depending on the CPU.
>> 2119 This option result in a small memory overhead for page tables.
>> 2120 This option is only supported with 16k and 64k page sizes.
300 If unsure, say N. 2121 If unsure, say N.
301 2122
302 choice 2123 choice
303 prompt "Kernel ABI" !! 2124 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2125 default PAGE_SIZE_4KB
305 help !! 2126
306 Select ABI for the kernel code. This !! 2127 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2128 bool "4kB"
308 kernel/userspace ABI is possible and !! 2129 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2130 depends on !MIPS_VA_BITS_48
310 In case both kernel and userspace su !! 2131 help
311 all register windows support code wi !! 2132 This option select the standard 4kB Linux page size. On some
312 build. !! 2133 R3000-family processors this is the only available page size. Using
313 !! 2134 4kB page size will minimize memory consumption and is therefore
314 If unsure, choose the default ABI. !! 2135 recommended for low memory systems.
315 !! 2136
316 config KERNEL_ABI_DEFAULT !! 2137 config PAGE_SIZE_8KB
317 bool "Default ABI" !! 2138 bool "8kB"
318 help !! 2139 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
319 Select this option to compile kernel !! 2140 depends on !MIPS_VA_BITS_48
320 selected for the toolchain. !! 2141 help
321 Normally cores with windowed registe !! 2142 Using 8kB page size will result in higher performance kernel at
322 cores without it use call0 ABI. !! 2143 the price of higher memory consumption. This option is available
323 !! 2144 only on R8000 and cnMIPS processors. Note that you will need a
324 config KERNEL_ABI_CALL0 !! 2145 suitable Linux distribution to support this.
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2146
326 help !! 2147 config PAGE_SIZE_16KB
327 Select this option to compile kernel !! 2148 bool "16kB"
328 toolchain that defaults to windowed !! 2149 depends on !CPU_R3000 && !CPU_TX39XX
329 When this option is not selected the !! 2150 help
330 be used for the kernel code. !! 2151 Using 16kB page size will result in higher performance kernel at
>> 2152 the price of higher memory consumption. This option is available on
>> 2153 all non-R3000 family processors. Note that you will need a suitable
>> 2154 Linux distribution to support this.
>> 2155
>> 2156 config PAGE_SIZE_32KB
>> 2157 bool "32kB"
>> 2158 depends on CPU_CAVIUM_OCTEON
>> 2159 depends on !MIPS_VA_BITS_48
>> 2160 help
>> 2161 Using 32kB page size will result in higher performance kernel at
>> 2162 the price of higher memory consumption. This option is available
>> 2163 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2164 distribution to support this.
>> 2165
>> 2166 config PAGE_SIZE_64KB
>> 2167 bool "64kB"
>> 2168 depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
>> 2169 help
>> 2170 Using 64kB page size will result in higher performance kernel at
>> 2171 the price of higher memory consumption. This option is available on
>> 2172 all non-R3000 family processor. Not that at the time of this
>> 2173 writing this option is still high experimental.
331 2174
332 endchoice 2175 endchoice
333 2176
334 config USER_ABI_CALL0 !! 2177 config FORCE_MAX_ZONEORDER
>> 2178 int "Maximum zone order"
>> 2179 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2180 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2181 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2182 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2183 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2184 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2185 range 11 64
>> 2186 default "11"
>> 2187 help
>> 2188 The kernel memory allocator divides physically contiguous memory
>> 2189 blocks into "zones", where each zone is a power of two number of
>> 2190 pages. This option selects the largest power of two that the kernel
>> 2191 keeps in the memory allocator. If you need to allocate very large
>> 2192 blocks of physically contiguous memory, then you may need to
>> 2193 increase this value.
>> 2194
>> 2195 This config option is actually maximum order plus one. For example,
>> 2196 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2197
>> 2198 The page size is not necessarily 4KB. Keep this in mind
>> 2199 when choosing a value for this option.
>> 2200
>> 2201 config BOARD_SCACHE
335 bool 2202 bool
336 2203
337 choice !! 2204 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2205 bool
339 default USER_ABI_DEFAULT !! 2206 select BOARD_SCACHE
340 help <<
341 Select supported userspace ABI. <<
342 2207
343 If unsure, choose the default ABI. !! 2208 #
>> 2209 # Support for a MIPS32 / MIPS64 style S-caches
>> 2210 #
>> 2211 config MIPS_CPU_SCACHE
>> 2212 bool
>> 2213 select BOARD_SCACHE
>> 2214
>> 2215 config R5000_CPU_SCACHE
>> 2216 bool
>> 2217 select BOARD_SCACHE
>> 2218
>> 2219 config RM7000_CPU_SCACHE
>> 2220 bool
>> 2221 select BOARD_SCACHE
344 2222
345 config USER_ABI_DEFAULT !! 2223 config SIBYTE_DMA_PAGEOPS
346 bool "Default ABI only" !! 2224 bool "Use DMA to clear/copy pages"
>> 2225 depends on CPU_SB1
347 help 2226 help
348 Assume default userspace ABI. For XE !! 2227 Instead of using the CPU to zero and copy pages, use a Data Mover
349 call0 ABI binaries may be run on suc !! 2228 channel. These DMA channels are otherwise unused by the standard
350 will not work correctly for them. !! 2229 SiByte Linux port. Seems to give a small performance benefit.
351 2230
352 config USER_ABI_CALL0_ONLY !! 2231 config CPU_HAS_PREFETCH
353 bool "Call0 ABI only" !! 2232 bool
354 select USER_ABI_CALL0 !! 2233
>> 2234 config CPU_GENERIC_DUMP_TLB
>> 2235 bool
>> 2236 default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
>> 2237
>> 2238 config CPU_R4K_FPU
>> 2239 bool
>> 2240 default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2241
>> 2242 config CPU_R4K_CACHE_TLB
>> 2243 bool
>> 2244 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2245
>> 2246 config MIPS_MT_SMP
>> 2247 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2248 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
>> 2249 select CPU_MIPSR2_IRQ_VI
>> 2250 select CPU_MIPSR2_IRQ_EI
>> 2251 select SYNC_R4K
>> 2252 select MIPS_MT
>> 2253 select SMP
>> 2254 select SMP_UP
>> 2255 select SYS_SUPPORTS_SMP
>> 2256 select SYS_SUPPORTS_SCHED_SMT
>> 2257 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2258 help
>> 2259 This is a kernel model which is known as SMVP. This is supported
>> 2260 on cores with the MT ASE and uses the available VPEs to implement
>> 2261 virtual processors which supports SMP. This is equivalent to the
>> 2262 Intel Hyperthreading feature. For further information go to
>> 2263 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2264
>> 2265 config MIPS_MT
>> 2266 bool
>> 2267
>> 2268 config SCHED_SMT
>> 2269 bool "SMT (multithreading) scheduler support"
>> 2270 depends on SYS_SUPPORTS_SCHED_SMT
>> 2271 default n
355 help 2272 help
356 Select this option to support only c !! 2273 SMT scheduler support improves the CPU scheduler's decision making
357 Windowed ABI binaries will crash wit !! 2274 when dealing with MIPS MT enabled cores at a cost of slightly
358 an illegal instruction exception on !! 2275 increased overhead in some places. If unsure say N here.
>> 2276
>> 2277 config SYS_SUPPORTS_SCHED_SMT
>> 2278 bool
>> 2279
>> 2280 config SYS_SUPPORTS_MULTITHREADING
>> 2281 bool
359 2282
360 Choose this option if you're plannin !! 2283 config MIPS_MT_FPAFF
361 built with call0 ABI. !! 2284 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2285 default y
>> 2286 depends on MIPS_MT_SMP
362 2287
363 config USER_ABI_CALL0_PROBE !! 2288 config MIPSR2_TO_R6_EMULATOR
364 bool "Support both windowed and call0 !! 2289 bool "MIPS R2-to-R6 emulator"
365 select USER_ABI_CALL0 !! 2290 depends on CPU_MIPSR6 && !SMP
>> 2291 default y
366 help 2292 help
367 Select this option to support both w !! 2293 Choose this option if you want to run non-R6 MIPS userland code.
368 ABIs. When enabled all processes are !! 2294 Even if you say 'Y' here, the emulator will still be disabled by
369 and a fast user exception handler fo !! 2295 default. You can enable it using the 'mipsr2emu' kernel option.
370 used to turn on PS.WOE bit on the fi !! 2296 The only reason this is a build-time option is to save ~14K from the
371 the userspace. !! 2297 final kernel image.
>> 2298 comment "MIPS R2-to-R6 emulator is only available for UP kernels"
>> 2299 depends on SMP && CPU_MIPSR6
>> 2300
>> 2301 config MIPS_VPE_LOADER
>> 2302 bool "VPE loader support."
>> 2303 depends on SYS_SUPPORTS_MULTITHREADING && MODULES
>> 2304 select CPU_MIPSR2_IRQ_VI
>> 2305 select CPU_MIPSR2_IRQ_EI
>> 2306 select MIPS_MT
>> 2307 help
>> 2308 Includes a loader for loading an elf relocatable object
>> 2309 onto another VPE and running it.
372 2310
373 This option should be enabled for th !! 2311 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2312 bool
>> 2313 default "y"
>> 2314 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2315
376 Note that Xtensa ISA does not guaran !! 2316 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2317 bool
378 PS.WOE is disabled, check whether th !! 2318 default "y"
>> 2319 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2320
380 endchoice !! 2321 config MIPS_VPE_LOADER_TOM
>> 2322 bool "Load VPE program into memory hidden from linux"
>> 2323 depends on MIPS_VPE_LOADER
>> 2324 default y
>> 2325 help
>> 2326 The loader can use memory that is present but has been hidden from
>> 2327 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2328 you to ensure the amount you put in the option and the space your
>> 2329 program requires is less or equal to the amount physically present.
381 2330
382 endmenu !! 2331 config MIPS_VPE_APSP_API
>> 2332 bool "Enable support for AP/SP API (RTLX)"
>> 2333 depends on MIPS_VPE_LOADER
>> 2334 help
383 2335
384 config XTENSA_CALIBRATE_CCOUNT !! 2336 config MIPS_VPE_APSP_API_CMP
385 def_bool n !! 2337 bool
>> 2338 default "y"
>> 2339 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2340
>> 2341 config MIPS_VPE_APSP_API_MT
>> 2342 bool
>> 2343 default "y"
>> 2344 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2345
>> 2346 config MIPS_CMP
>> 2347 bool "MIPS CMP framework support (DEPRECATED)"
>> 2348 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2349 select SMP
>> 2350 select SYNC_R4K
>> 2351 select SYS_SUPPORTS_SMP
>> 2352 select WEAK_ORDERING
>> 2353 default n
386 help 2354 help
387 On some platforms (XT2000, for examp !! 2355 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2356 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2357 its ability to start secondary CPUs.
>> 2358
>> 2359 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2360 instead of this.
>> 2361
>> 2362 config MIPS_CPS
>> 2363 bool "MIPS Coherent Processing System support"
>> 2364 depends on SYS_SUPPORTS_MIPS_CPS
>> 2365 select MIPS_CM
>> 2366 select MIPS_CPC
>> 2367 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2368 select SMP
>> 2369 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2370 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2371 select SYS_SUPPORTS_SMP
>> 2372 select WEAK_ORDERING
>> 2373 help
>> 2374 Select this if you wish to run an SMP kernel across multiple cores
>> 2375 within a MIPS Coherent Processing System. When this option is
>> 2376 enabled the kernel will probe for other cores and boot them with
>> 2377 no external assistance. It is safe to enable this when hardware
>> 2378 support is unavailable.
>> 2379
>> 2380 config MIPS_CPS_PM
>> 2381 depends on MIPS_CPS
>> 2382 select MIPS_CPC
>> 2383 bool
390 2384
391 config SERIAL_CONSOLE !! 2385 config MIPS_CM
392 def_bool n !! 2386 bool
393 2387
394 config PLATFORM_HAVE_XIP !! 2388 config MIPS_CPC
395 def_bool n !! 2389 bool
>> 2390
>> 2391 config SB1_PASS_2_WORKAROUNDS
>> 2392 bool
>> 2393 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2394 default y
>> 2395
>> 2396 config SB1_PASS_2_1_WORKAROUNDS
>> 2397 bool
>> 2398 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2399 default y
396 2400
397 menu "Platform options" !! 2401
>> 2402 config ARCH_PHYS_ADDR_T_64BIT
>> 2403 bool
398 2404
399 choice 2405 choice
400 prompt "Xtensa System Type" !! 2406 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS !! 2407
>> 2408 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2409 bool "None"
>> 2410 help
>> 2411 Select this if you want neither microMIPS nor SmartMIPS support
402 2412
403 config XTENSA_PLATFORM_ISS !! 2413 config CPU_HAS_SMARTMIPS
404 bool "ISS" !! 2414 depends on SYS_SUPPORTS_SMARTMIPS
405 select XTENSA_CALIBRATE_CCOUNT !! 2415 bool "SmartMIPS"
406 select SERIAL_CONSOLE !! 2416 help
407 help !! 2417 SmartMIPS is a extension of the MIPS32 architecture aimed at
408 ISS is an acronym for Tensilica's In !! 2418 increased security at both hardware and software level for
409 !! 2419 smartcards. Enabling this option will allow proper use of the
410 config XTENSA_PLATFORM_XT2000 !! 2420 SmartMIPS instructions by Linux applications. However a kernel with
411 bool "XT2000" !! 2421 this option will not work on a MIPS core without SmartMIPS core. If
412 help !! 2422 you don't know you probably don't have SmartMIPS and should say N
413 XT2000 is the name of Tensilica's fe !! 2423 here.
414 This hardware is capable of running !! 2424
415 !! 2425 config CPU_MICROMIPS
416 config XTENSA_PLATFORM_XTFPGA !! 2426 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
417 bool "XTFPGA" !! 2427 bool "microMIPS"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2428 help
424 XTFPGA is the name of Tensilica boar !! 2429 When this option is enabled the kernel will be built using the
425 This hardware is capable of running !! 2430 microMIPS ISA
426 2431
427 endchoice 2432 endchoice
428 2433
429 config PLATFORM_NR_IRQS !! 2434 config CPU_HAS_MSA
>> 2435 bool "Support for the MIPS SIMD Architecture"
>> 2436 depends on CPU_SUPPORTS_MSA
>> 2437 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2438 help
>> 2439 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2440 and a set of SIMD instructions to operate on them. When this option
>> 2441 is enabled the kernel will support allocating & switching MSA
>> 2442 vector register contexts. If you know that your kernel will only be
>> 2443 running on CPUs which do not support MSA or that your userland will
>> 2444 not be making use of it then you may wish to say N here to reduce
>> 2445 the size & complexity of your kernel.
>> 2446
>> 2447 If unsure, say Y.
>> 2448
>> 2449 config CPU_HAS_WB
>> 2450 bool
>> 2451
>> 2452 config XKS01
>> 2453 bool
>> 2454
>> 2455 config CPU_HAS_RIXI
>> 2456 bool
>> 2457
>> 2458 #
>> 2459 # Vectored interrupt mode is an R2 feature
>> 2460 #
>> 2461 config CPU_MIPSR2_IRQ_VI
>> 2462 bool
>> 2463
>> 2464 #
>> 2465 # Extended interrupt mode is an R2 feature
>> 2466 #
>> 2467 config CPU_MIPSR2_IRQ_EI
>> 2468 bool
>> 2469
>> 2470 config CPU_HAS_SYNC
>> 2471 bool
>> 2472 depends on !CPU_R3000
>> 2473 default y
>> 2474
>> 2475 #
>> 2476 # CPU non-features
>> 2477 #
>> 2478 config CPU_DADDI_WORKAROUNDS
>> 2479 bool
>> 2480
>> 2481 config CPU_R4000_WORKAROUNDS
>> 2482 bool
>> 2483 select CPU_R4400_WORKAROUNDS
>> 2484
>> 2485 config CPU_R4400_WORKAROUNDS
>> 2486 bool
>> 2487
>> 2488 config MIPS_ASID_SHIFT
430 int 2489 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2490 default 6 if CPU_R3000 || CPU_TX39XX
>> 2491 default 4 if CPU_R8000
432 default 0 2492 default 0
433 2493
434 config XTENSA_CPU_CLOCK !! 2494 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2495 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2496 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2497 default 6 if CPU_R3000 || CPU_TX39XX
>> 2498 default 8
438 2499
439 config GENERIC_CALIBRATE_DELAY !! 2500 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2501 bool
>> 2502
>> 2503 #
>> 2504 # - Highmem only makes sense for the 32-bit kernel.
>> 2505 # - The current highmem code will only work properly on physically indexed
>> 2506 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2507 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2508 # moment we protect the user and offer the highmem option only on machines
>> 2509 # where it's known to be safe. This will not offer highmem on a few systems
>> 2510 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2511 # indexed CPUs but we're playing safe.
>> 2512 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2513 # know they might have memory configurations that could make use of highmem
>> 2514 # support.
>> 2515 #
>> 2516 config HIGHMEM
>> 2517 bool "High Memory Support"
>> 2518 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2519
>> 2520 config CPU_SUPPORTS_HIGHMEM
>> 2521 bool
>> 2522
>> 2523 config SYS_SUPPORTS_HIGHMEM
>> 2524 bool
>> 2525
>> 2526 config SYS_SUPPORTS_SMARTMIPS
>> 2527 bool
>> 2528
>> 2529 config SYS_SUPPORTS_MICROMIPS
>> 2530 bool
>> 2531
>> 2532 config SYS_SUPPORTS_MIPS16
>> 2533 bool
441 help 2534 help
442 The BogoMIPS value can easily be der !! 2535 This option must be set if a kernel might be executed on a MIPS16-
>> 2536 enabled CPU even if MIPS16 is not actually being used. In other
>> 2537 words, it makes the kernel MIPS16-tolerant.
443 2538
444 config CMDLINE_BOOL !! 2539 config CPU_SUPPORTS_MSA
445 bool "Default bootloader kernel argume !! 2540 bool
446 2541
447 config CMDLINE !! 2542 config ARCH_FLATMEM_ENABLE
448 string "Initial kernel command string" !! 2543 def_bool y
449 depends on CMDLINE_BOOL !! 2544 depends on !NUMA && !CPU_LOONGSON2
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2545
458 config USE_OF !! 2546 config ARCH_DISCONTIGMEM_ENABLE
459 bool "Flattened Device Tree support" !! 2547 bool
460 select OF !! 2548 default y if SGI_IP27
461 select OF_EARLY_FLATTREE <<
462 help 2549 help
463 Include support for flattened device !! 2550 Say Y to support efficient handling of discontiguous physical memory,
>> 2551 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2552 or have huge holes in the physical address space for other reasons.
>> 2553 See <file:Documentation/vm/numa> for more.
464 2554
465 config BUILTIN_DTB_SOURCE !! 2555 config ARCH_SPARSEMEM_ENABLE
466 string "DTB to build into the kernel i !! 2556 bool
467 depends on OF !! 2557 select SPARSEMEM_STATIC
>> 2558
>> 2559 config NUMA
>> 2560 bool "NUMA Support"
>> 2561 depends on SYS_SUPPORTS_NUMA
>> 2562 help
>> 2563 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2564 Access). This option improves performance on systems with more
>> 2565 than two nodes; on two node systems it is generally better to
>> 2566 leave it disabled; on single node systems disable this option
>> 2567 disabled.
>> 2568
>> 2569 config SYS_SUPPORTS_NUMA
>> 2570 bool
>> 2571
>> 2572 config RELOCATABLE
>> 2573 bool "Relocatable kernel"
>> 2574 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6)
>> 2575 help
>> 2576 This builds a kernel image that retains relocation information
>> 2577 so it can be loaded someplace besides the default 1MB.
>> 2578 The relocations make the kernel binary about 15% larger,
>> 2579 but are discarded at runtime
>> 2580
>> 2581 config RELOCATION_TABLE_SIZE
>> 2582 hex "Relocation table size"
>> 2583 depends on RELOCATABLE
>> 2584 range 0x0 0x01000000
>> 2585 default "0x00100000"
>> 2586 ---help---
>> 2587 A table of relocation data will be appended to the kernel binary
>> 2588 and parsed at boot to fix up the relocated kernel.
>> 2589
>> 2590 This option allows the amount of space reserved for the table to be
>> 2591 adjusted, although the default of 1Mb should be ok in most cases.
>> 2592
>> 2593 The build will fail and a valid size suggested if this is too small.
>> 2594
>> 2595 If unsure, leave at the default value.
>> 2596
>> 2597 config RANDOMIZE_BASE
>> 2598 bool "Randomize the address of the kernel image"
>> 2599 depends on RELOCATABLE
>> 2600 ---help---
>> 2601 Randomizes the physical and virtual address at which the
>> 2602 kernel image is loaded, as a security feature that
>> 2603 deters exploit attempts relying on knowledge of the location
>> 2604 of kernel internals.
>> 2605
>> 2606 Entropy is generated using any coprocessor 0 registers available.
>> 2607
>> 2608 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2609
>> 2610 If unsure, say N.
>> 2611
>> 2612 config RANDOMIZE_BASE_MAX_OFFSET
>> 2613 hex "Maximum kASLR offset" if EXPERT
>> 2614 depends on RANDOMIZE_BASE
>> 2615 range 0x0 0x40000000 if EVA || 64BIT
>> 2616 range 0x0 0x08000000
>> 2617 default "0x01000000"
>> 2618 ---help---
>> 2619 When kASLR is active, this provides the maximum offset that will
>> 2620 be applied to the kernel image. It should be set according to the
>> 2621 amount of physical RAM available in the target system minus
>> 2622 PHYSICAL_START and must be a power of 2.
468 2623
469 config PARSE_BOOTPARAM !! 2624 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
470 bool "Parse bootparam block" !! 2625 EVA or 64-bit. The default is 16Mb.
>> 2626
>> 2627 config NODES_SHIFT
>> 2628 int
>> 2629 default "6"
>> 2630 depends on NEED_MULTIPLE_NODES
>> 2631
>> 2632 config HW_PERF_EVENTS
>> 2633 bool "Enable hardware performance counter support for perf events"
>> 2634 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
471 default y 2635 default y
472 help 2636 help
473 Parse parameters passed to the kerne !! 2637 Enable hardware performance counter support for perf events. If
474 be disabled if the kernel is known t !! 2638 disabled, perf events will use software events only.
475 2639
476 If unsure, say Y. !! 2640 source "mm/Kconfig"
477 2641
478 choice !! 2642 config SMP
479 prompt "Semihosting interface" !! 2643 bool "Multi-Processing support"
480 default XTENSA_SIMCALL_ISS !! 2644 depends on SYS_SUPPORTS_SMP
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2645 help
483 Choose semihosting interface that wi !! 2646 This enables support for systems with more than one CPU. If you have
484 block device and networking. !! 2647 a system with only one CPU, say N. If you have a system with more
>> 2648 than one CPU, say Y.
>> 2649
>> 2650 If you say N here, the kernel will run on uni- and multiprocessor
>> 2651 machines, but will use only one CPU of a multiprocessor machine. If
>> 2652 you say Y here, the kernel will run on many, but not all,
>> 2653 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2654 will run faster if you say N here.
485 2655
486 config XTENSA_SIMCALL_ISS !! 2656 People using multiprocessor machines who say Y here should also say
487 bool "simcall" !! 2657 Y to "Enhanced Real Time Clock Support", below.
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2658
492 config XTENSA_SIMCALL_GDBIO !! 2659 See also the SMP-HOWTO available at
493 bool "GDBIO" !! 2660 <http://www.tldp.org/docs.html#howto>.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 2661
498 endchoice !! 2662 If you don't know what to do here, say N.
499 2663
500 config BLK_DEV_SIMDISK !! 2664 config HOTPLUG_CPU
501 tristate "Host file-based simulated bl !! 2665 bool "Support for hot-pluggable CPUs"
502 default n !! 2666 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2667 help
541 There's a 2x16 LCD on most of XTFPGA !! 2668 Say Y here to allow turning CPUs off and on. CPUs can be
542 progress messages there during bootu !! 2669 controlled through /sys/devices/system/cpu.
543 during board bringup. !! 2670 (Note: power management support will enable this option
>> 2671 automatically on SMP systems. )
>> 2672 Say N if you want to disable CPU hotplug.
544 2673
545 If unsure, say N. !! 2674 config SMP_UP
>> 2675 bool
546 2676
547 config XTFPGA_LCD_BASE_ADDR !! 2677 config SYS_SUPPORTS_MIPS_CMP
548 hex "XTFPGA LCD base address" !! 2678 bool
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2679
617 If unsure, say N. !! 2680 config SYS_SUPPORTS_MIPS_CPS
>> 2681 bool
618 2682
619 config MEMMAP_CACHEATTR !! 2683 config SYS_SUPPORTS_SMP
620 hex "Cache attributes for the memory a !! 2684 bool
621 depends on !MMU !! 2685
622 default 0x22222222 !! 2686 config NR_CPUS_DEFAULT_4
623 help !! 2687 bool
624 These cache attributes are set up fo !! 2688
625 specifies cache attributes for the c !! 2689 config NR_CPUS_DEFAULT_8
626 region: bits 0..3 -- for addresses 0 !! 2690 bool
627 bits 4..7 -- for addresses 0x2000000 !! 2691
628 !! 2692 config NR_CPUS_DEFAULT_16
629 Cache attribute values are specific !! 2693 bool
630 For region protection MMUs: !! 2694
631 1: WT cached, !! 2695 config NR_CPUS_DEFAULT_32
632 2: cache bypass, !! 2696 bool
633 4: WB cached, !! 2697
634 f: illegal. !! 2698 config NR_CPUS_DEFAULT_64
635 For full MMU: !! 2699 bool
636 bit 0: executable, !! 2700
637 bit 1: writable, !! 2701 config NR_CPUS
638 bits 2..3: !! 2702 int "Maximum number of CPUs (2-256)"
639 0: cache bypass, !! 2703 range 2 256
640 1: WB cache, !! 2704 depends on SMP
641 2: WT cache, !! 2705 default "4" if NR_CPUS_DEFAULT_4
642 3: special (c and e are illegal, !! 2706 default "8" if NR_CPUS_DEFAULT_8
643 For MPU: !! 2707 default "16" if NR_CPUS_DEFAULT_16
644 0: illegal, !! 2708 default "32" if NR_CPUS_DEFAULT_32
645 1: WB cache, !! 2709 default "64" if NR_CPUS_DEFAULT_64
646 2: WB, no-write-allocate cache, !! 2710 help
647 3: WT cache, !! 2711 This allows you to specify the maximum number of CPUs which this
648 4: cache bypass. !! 2712 kernel will support. The maximum supported value is 32 for 32-bit
649 !! 2713 kernel and 64 for 64-bit kernels; the minimum value which makes
650 config KSEG_PADDR !! 2714 sense is 1 for Qemu (useful only for kernel debugging purposes)
651 hex "Physical address of the KSEG mapp !! 2715 and 2 for all others.
652 depends on INITIALIZE_XTENSA_MMU_INSID !! 2716
653 default 0x00000000 !! 2717 This is purely to save memory - each supported CPU adds
654 help !! 2718 approximately eight kilobytes to the kernel image. For best
655 This is the physical address where K !! 2719 performance should round up your number of processors to the next
656 the chosen KSEG layout help for the !! 2720 power of two.
657 Unpacked kernel image (including vec !! 2721
658 within KSEG. !! 2722 config MIPS_PERF_SHARED_TC_COUNTERS
659 Physical memory below this address i !! 2723 bool
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2724
683 If unsure, leave the default value h !! 2725 #
>> 2726 # Timer Interrupt Frequency Configuration
>> 2727 #
684 2728
685 choice 2729 choice
686 prompt "Relocatable vectors location" !! 2730 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2731 default HZ_250
688 help 2732 help
689 Choose whether relocatable vectors a !! 2733 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2734
691 configurations without VECBASE regis !! 2735 config HZ_24
692 placed at their hardware-defined loc !! 2736 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2737
694 config XTENSA_VECTORS_IN_TEXT !! 2738 config HZ_48
695 bool "Merge relocatable vectors into k !! 2739 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2740
697 help !! 2741 config HZ_100
698 This option puts relocatable vectors !! 2742 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2743
700 This is a safe choice for most confi !! 2744 config HZ_128
701 !! 2745 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2746
703 bool "Put relocatable vectors at fixed !! 2747 config HZ_250
704 help !! 2748 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2749
706 Vectors are merged with the .init da !! 2750 config HZ_256
707 are copied into their designated loc !! 2751 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2752
709 XIP-aware MTD support. !! 2753 config HZ_1000
>> 2754 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2755
>> 2756 config HZ_1024
>> 2757 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2758
711 endchoice 2759 endchoice
712 2760
713 config VECTORS_ADDR !! 2761 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2762 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2763
729 config PLATFORM_WANT_DEFAULT_MEM !! 2764 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2765 bool
>> 2766
>> 2767 config SYS_SUPPORTS_100HZ
>> 2768 bool
>> 2769
>> 2770 config SYS_SUPPORTS_128HZ
>> 2771 bool
>> 2772
>> 2773 config SYS_SUPPORTS_250HZ
>> 2774 bool
>> 2775
>> 2776 config SYS_SUPPORTS_256HZ
>> 2777 bool
>> 2778
>> 2779 config SYS_SUPPORTS_1000HZ
>> 2780 bool
>> 2781
>> 2782 config SYS_SUPPORTS_1024HZ
>> 2783 bool
731 2784
732 config DEFAULT_MEM_START !! 2785 config SYS_SUPPORTS_ARBIT_HZ
733 hex !! 2786 bool
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2787 default y if !SYS_SUPPORTS_24HZ && \
735 default 0x60000000 if PLATFORM_WANT_DE !! 2788 !SYS_SUPPORTS_48HZ && \
736 default 0x00000000 !! 2789 !SYS_SUPPORTS_100HZ && \
>> 2790 !SYS_SUPPORTS_128HZ && \
>> 2791 !SYS_SUPPORTS_250HZ && \
>> 2792 !SYS_SUPPORTS_256HZ && \
>> 2793 !SYS_SUPPORTS_1000HZ && \
>> 2794 !SYS_SUPPORTS_1024HZ
>> 2795
>> 2796 config HZ
>> 2797 int
>> 2798 default 24 if HZ_24
>> 2799 default 48 if HZ_48
>> 2800 default 100 if HZ_100
>> 2801 default 128 if HZ_128
>> 2802 default 250 if HZ_250
>> 2803 default 256 if HZ_256
>> 2804 default 1000 if HZ_1000
>> 2805 default 1024 if HZ_1024
>> 2806
>> 2807 config SCHED_HRTICK
>> 2808 def_bool HIGH_RES_TIMERS
>> 2809
>> 2810 source "kernel/Kconfig.preempt"
>> 2811
>> 2812 config KEXEC
>> 2813 bool "Kexec system call"
>> 2814 select KEXEC_CORE
>> 2815 help
>> 2816 kexec is a system call that implements the ability to shutdown your
>> 2817 current kernel, and to start another kernel. It is like a reboot
>> 2818 but it is independent of the system firmware. And like a reboot
>> 2819 you can start any kernel with it, not just Linux.
>> 2820
>> 2821 The name comes from the similarity to the exec system call.
>> 2822
>> 2823 It is an ongoing process to be certain the hardware in a machine
>> 2824 is properly shutdown, so do not be surprised if this code does not
>> 2825 initially work for you. As of this writing the exact hardware
>> 2826 interface is strongly in flux, so no good recommendation can be
>> 2827 made.
>> 2828
>> 2829 config CRASH_DUMP
>> 2830 bool "Kernel crash dumps"
>> 2831 help
>> 2832 Generate crash dump after being started by kexec.
>> 2833 This should be normally only set in special crash dump kernels
>> 2834 which are loaded in the main kernel with kexec-tools into
>> 2835 a specially reserved region and then later executed after
>> 2836 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2837 to a memory address not used by the main kernel or firmware using
>> 2838 PHYSICAL_START.
>> 2839
>> 2840 config PHYSICAL_START
>> 2841 hex "Physical address where the kernel is loaded"
>> 2842 default "0xffffffff84000000" if 64BIT
>> 2843 default "0x84000000" if 32BIT
>> 2844 depends on CRASH_DUMP
>> 2845 help
>> 2846 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2847 If you plan to use kernel for capturing the crash dump change
>> 2848 this value to start of the reserved region (the "X" value as
>> 2849 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2850 passed to the panic-ed kernel).
>> 2851
>> 2852 config SECCOMP
>> 2853 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2854 depends on PROC_FS
>> 2855 default y
737 help 2856 help
738 This is the base address used for bo !! 2857 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2858 that may need to compute untrusted bytecode during their
>> 2859 execution. By using pipes or other transports made available to
>> 2860 the process as file descriptors supporting the read/write
>> 2861 syscalls, it's possible to isolate those applications in
>> 2862 their own address space using seccomp. Once seccomp is
>> 2863 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2864 and the task is only allowed to execute a few safe syscalls
>> 2865 defined by each seccomp mode.
>> 2866
>> 2867 If unsure, say Y. Only embedded should say N here.
>> 2868
>> 2869 config MIPS_O32_FP64_SUPPORT
>> 2870 bool "Support for O32 binaries using 64-bit FP"
>> 2871 depends on 32BIT || MIPS32_O32
>> 2872 help
>> 2873 When this is enabled, the kernel will support use of 64-bit floating
>> 2874 point registers with binaries using the O32 ABI along with the
>> 2875 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2876 32-bit MIPS systems this support is at the cost of increasing the
>> 2877 size and complexity of the compiled FPU emulator. Thus if you are
>> 2878 running a MIPS32 system and know that none of your userland binaries
>> 2879 will require 64-bit floating point, you may wish to reduce the size
>> 2880 of your kernel & potentially improve FP emulation performance by
>> 2881 saying N here.
>> 2882
>> 2883 Although binutils currently supports use of this flag the details
>> 2884 concerning its effect upon the O32 ABI in userland are still being
>> 2885 worked on. In order to avoid userland becoming dependant upon current
>> 2886 behaviour before the details have been finalised, this option should
>> 2887 be considered experimental and only enabled by those working upon
>> 2888 said details.
>> 2889
>> 2890 If unsure, say N.
>> 2891
>> 2892 config USE_OF
>> 2893 bool
>> 2894 select OF
>> 2895 select OF_EARLY_FLATTREE
>> 2896 select IRQ_DOMAIN
740 2897
741 If unsure, leave the default value h !! 2898 config BUILTIN_DTB
>> 2899 bool
742 2900
743 choice 2901 choice
744 prompt "KSEG layout" !! 2902 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2903 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2904
>> 2905 config MIPS_NO_APPENDED_DTB
>> 2906 bool "None"
>> 2907 help
>> 2908 Do not enable appended dtb support.
>> 2909
>> 2910 config MIPS_ELF_APPENDED_DTB
>> 2911 bool "vmlinux"
>> 2912 help
>> 2913 With this option, the boot code will look for a device tree binary
>> 2914 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2915 it is empty and the DTB can be appended using binutils command
>> 2916 objcopy:
>> 2917
>> 2918 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2919
>> 2920 This is meant as a backward compatiblity convenience for those
>> 2921 systems with a bootloader that can't be upgraded to accommodate
>> 2922 the documented boot protocol using a device tree.
>> 2923
>> 2924 config MIPS_RAW_APPENDED_DTB
>> 2925 bool "vmlinux.bin or vmlinuz.bin"
>> 2926 help
>> 2927 With this option, the boot code will look for a device tree binary
>> 2928 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2929 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2930
>> 2931 This is meant as a backward compatibility convenience for those
>> 2932 systems with a bootloader that can't be upgraded to accommodate
>> 2933 the documented boot protocol using a device tree.
>> 2934
>> 2935 Beware that there is very little in terms of protection against
>> 2936 this option being confused by leftover garbage in memory that might
>> 2937 look like a DTB header after a reboot if no actual DTB is appended
>> 2938 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2939 if you don't intend to always append a DTB.
772 endchoice 2940 endchoice
773 2941
774 config HIGHMEM !! 2942 choice
775 bool "High Memory Support" !! 2943 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2944 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2945 !MIPS_MALTA && \
>> 2946 !CAVIUM_OCTEON_SOC
>> 2947 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2948
>> 2949 config MIPS_CMDLINE_FROM_DTB
>> 2950 depends on USE_OF
>> 2951 bool "Dtb kernel arguments if available"
>> 2952
>> 2953 config MIPS_CMDLINE_DTB_EXTEND
>> 2954 depends on USE_OF
>> 2955 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2956
>> 2957 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2958 bool "Bootloader kernel arguments if available"
>> 2959
>> 2960 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2961 depends on CMDLINE_BOOL
>> 2962 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2963 endchoice
>> 2964
>> 2965 endmenu
>> 2966
>> 2967 config LOCKDEP_SUPPORT
>> 2968 bool
>> 2969 default y
>> 2970
>> 2971 config STACKTRACE_SUPPORT
>> 2972 bool
>> 2973 default y
>> 2974
>> 2975 config HAVE_LATENCYTOP_SUPPORT
>> 2976 bool
>> 2977 default y
>> 2978
>> 2979 config PGTABLE_LEVELS
>> 2980 int
>> 2981 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2982 default 2
>> 2983
>> 2984 source "init/Kconfig"
>> 2985
>> 2986 source "kernel/Kconfig.freezer"
>> 2987
>> 2988 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 2989
>> 2990 config HW_HAS_EISA
>> 2991 bool
>> 2992 config HW_HAS_PCI
>> 2993 bool
>> 2994
>> 2995 config PCI
>> 2996 bool "Support for PCI controller"
>> 2997 depends on HW_HAS_PCI
>> 2998 select PCI_DOMAINS
>> 2999 help
>> 3000 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3001 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3002 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3003 say Y, otherwise N.
>> 3004
>> 3005 config HT_PCI
>> 3006 bool "Support for HT-linked PCI"
>> 3007 default y
>> 3008 depends on CPU_LOONGSON3
>> 3009 select PCI
>> 3010 select PCI_DOMAINS
>> 3011 help
>> 3012 Loongson family machines use Hyper-Transport bus for inter-core
>> 3013 connection and device connection. The PCI bus is a subordinate
>> 3014 linked at HT. Choose Y for Loongson-3 based machines.
>> 3015
>> 3016 config PCI_DOMAINS
>> 3017 bool
>> 3018
>> 3019 config PCI_DOMAINS_GENERIC
>> 3020 bool
>> 3021
>> 3022 config PCI_DRIVERS_GENERIC
>> 3023 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3024 bool
>> 3025
>> 3026 config PCI_DRIVERS_LEGACY
>> 3027 def_bool !PCI_DRIVERS_GENERIC
>> 3028 select NO_GENERIC_PCI_IOPORT_MAP
>> 3029
>> 3030 source "drivers/pci/Kconfig"
>> 3031
>> 3032 #
>> 3033 # ISA support is now enabled via select. Too many systems still have the one
>> 3034 # or other ISA chip on the board that users don't know about so don't expect
>> 3035 # users to choose the right thing ...
>> 3036 #
>> 3037 config ISA
>> 3038 bool
>> 3039
>> 3040 config EISA
>> 3041 bool "EISA support"
>> 3042 depends on HW_HAS_EISA
>> 3043 select ISA
>> 3044 select GENERIC_ISA_DMA
>> 3045 ---help---
>> 3046 The Extended Industry Standard Architecture (EISA) bus was
>> 3047 developed as an open alternative to the IBM MicroChannel bus.
>> 3048
>> 3049 The EISA bus provided some of the features of the IBM MicroChannel
>> 3050 bus while maintaining backward compatibility with cards made for
>> 3051 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3052 1995 when it was made obsolete by the PCI bus.
>> 3053
>> 3054 Say Y here if you are building a kernel for an EISA-based machine.
>> 3055
>> 3056 Otherwise, say N.
>> 3057
>> 3058 source "drivers/eisa/Kconfig"
>> 3059
>> 3060 config TC
>> 3061 bool "TURBOchannel support"
>> 3062 depends on MACH_DECSTATION
>> 3063 help
>> 3064 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3065 processors. TURBOchannel programming specifications are available
>> 3066 at:
>> 3067 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3068 and:
>> 3069 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3070 Linux driver support status is documented at:
>> 3071 <http://www.linux-mips.org/wiki/DECstation>
>> 3072
>> 3073 config MMU
>> 3074 bool
>> 3075 default y
>> 3076
>> 3077 config I8253
>> 3078 bool
>> 3079 select CLKSRC_I8253
>> 3080 select CLKEVT_I8253
>> 3081 select MIPS_EXTERNAL_TIMER
>> 3082
>> 3083 config ZONE_DMA
>> 3084 bool
>> 3085
>> 3086 config ZONE_DMA32
>> 3087 bool
>> 3088
>> 3089 source "drivers/pcmcia/Kconfig"
>> 3090
>> 3091 config RAPIDIO
>> 3092 tristate "RapidIO support"
>> 3093 depends on PCI
>> 3094 default n
778 help 3095 help
779 Linux can use the full amount of RAM !! 3096 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3097 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3098
782 at 0xd0000000 (cached) and 0xd800000 !! 3099 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3100
784 all of it can be "permanently mapped !! 3101 endmenu
785 The physical memory that's not perma !! 3102
786 "high memory". !! 3103 menu "Executable file formats"
787 !! 3104
788 If you are compiling a kernel which !! 3105 source "fs/Kconfig.binfmt"
789 machine with more than 128 MB total !! 3106
790 N here. !! 3107 config TRAD_SIGNALS
>> 3108 bool
>> 3109
>> 3110 config MIPS32_COMPAT
>> 3111 bool
>> 3112
>> 3113 config COMPAT
>> 3114 bool
>> 3115
>> 3116 config SYSVIPC_COMPAT
>> 3117 bool
>> 3118
>> 3119 config MIPS32_O32
>> 3120 bool "Kernel support for o32 binaries"
>> 3121 depends on 64BIT
>> 3122 select ARCH_WANT_OLD_COMPAT_IPC
>> 3123 select COMPAT
>> 3124 select MIPS32_COMPAT
>> 3125 select SYSVIPC_COMPAT if SYSVIPC
>> 3126 help
>> 3127 Select this option if you want to run o32 binaries. These are pure
>> 3128 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3129 existing binaries are in this format.
791 3130
792 If unsure, say Y. 3131 If unsure, say Y.
793 3132
794 config ARCH_FORCE_MAX_ORDER !! 3133 config MIPS32_N32
795 int "Order of maximal physically conti !! 3134 bool "Kernel support for n32 binaries"
796 default "10" !! 3135 depends on 64BIT
797 help !! 3136 select COMPAT
798 The kernel page allocator limits the !! 3137 select MIPS32_COMPAT
799 contiguous allocations. The limit is !! 3138 select SYSVIPC_COMPAT if SYSVIPC
800 defines the maximal power of two of !! 3139 help
801 allocated as a single contiguous blo !! 3140 Select this option if you want to run n32 binaries. These are
802 overriding the default setting when !! 3141 64-bit binaries using 32-bit quantities for addressing and certain
803 large blocks of physically contiguou !! 3142 data that would normally be 64-bit. They are used in special
>> 3143 cases.
>> 3144
>> 3145 If unsure, say N.
804 3146
805 Don't change if unsure. !! 3147 config BINFMT_ELF32
>> 3148 bool
>> 3149 default y if MIPS32_O32 || MIPS32_N32
>> 3150 select ELFCORE
806 3151
807 endmenu 3152 endmenu
808 3153
809 menu "Power management options" 3154 menu "Power management options"
810 3155
811 config ARCH_HIBERNATION_POSSIBLE 3156 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3157 def_bool y
>> 3158 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3159
>> 3160 config ARCH_SUSPEND_POSSIBLE
>> 3161 def_bool y
>> 3162 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3163
814 source "kernel/power/Kconfig" 3164 source "kernel/power/Kconfig"
815 3165
816 endmenu 3166 endmenu
>> 3167
>> 3168 config MIPS_EXTERNAL_TIMER
>> 3169 bool
>> 3170
>> 3171 menu "CPU Power Management"
>> 3172
>> 3173 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3174 source "drivers/cpufreq/Kconfig"
>> 3175 endif
>> 3176
>> 3177 source "drivers/cpuidle/Kconfig"
>> 3178
>> 3179 endmenu
>> 3180
>> 3181 source "net/Kconfig"
>> 3182
>> 3183 source "drivers/Kconfig"
>> 3184
>> 3185 source "drivers/firmware/Kconfig"
>> 3186
>> 3187 source "fs/Kconfig"
>> 3188
>> 3189 source "arch/mips/Kconfig.debug"
>> 3190
>> 3191 source "security/Kconfig"
>> 3192
>> 3193 source "crypto/Kconfig"
>> 3194
>> 3195 source "lib/Kconfig"
>> 3196
>> 3197 source "arch/mips/kvm/Kconfig"
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