1 # SPDX-License-Identifier: GPL-2.0 !! 1 config MIPS
2 config XTENSA !! 2 bool
3 def_bool y !! 3 default y
4 select ARCH_32BIT_OFF_T !! 4 select ARCH_BINFMT_ELF_STATE
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_CLOCKSOURCE_DATA
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_DISCARD_MEMBLOCK
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_HAS_ELF_RANDOMIZE
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_MIGHT_HAVE_PC_PARPORT
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_MIGHT_HAVE_PC_SERIO
11 select ARCH_HAS_KCOV !! 11 select ARCH_SUPPORTS_UPROBES
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_USE_BUILTIN_BSWAP
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
14 select ARCH_HAS_DMA_SET_UNCACHED if MM <<
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 15 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 16 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 17 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 18 select CLONE_BACKWARDS
24 select COMMON_CLK !! 19 select CPU_PM if CPU_IDLE
25 select DMA_NONCOHERENT_MMAP if MMU !! 20 select GENERIC_ATOMIC64 if !64BIT
26 select GENERIC_ATOMIC64 !! 21 select GENERIC_CLOCKEVENTS
>> 22 select GENERIC_CMOS_UPDATE
>> 23 select GENERIC_CPU_AUTOPROBE
>> 24 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 25 select GENERIC_IRQ_SHOW
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP 26 select GENERIC_PCI_IOMAP
32 select GENERIC_SCHED_CLOCK !! 27 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
33 select GENERIC_IOREMAP if MMU !! 28 select GENERIC_SMP_IDLE_THREAD
34 select HAVE_ARCH_AUDITSYSCALL !! 29 select GENERIC_TIME_VSYSCALL
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 30 select HANDLE_DOMAIN_IRQ
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 31 select HAVE_ARCH_JUMP_LABEL
37 select HAVE_ARCH_KCSAN !! 32 select HAVE_ARCH_KGDB
>> 33 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 34 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 35 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 36 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 37 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 38 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 39 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 40 select HAVE_CC_STACKPROTECTOR
>> 41 select HAVE_CONTEXT_TRACKING
>> 42 select HAVE_COPY_THREAD_TLS
>> 43 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 44 select HAVE_DEBUG_KMEMLEAK
>> 45 select HAVE_DEBUG_STACKOVERFLOW
>> 46 select HAVE_DMA_API_DEBUG
43 select HAVE_DMA_CONTIGUOUS 47 select HAVE_DMA_CONTIGUOUS
>> 48 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 49 select HAVE_EXIT_THREAD
>> 50 select HAVE_FTRACE_MCOUNT_RECORD
>> 51 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 52 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 53 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 54 select HAVE_IDE
>> 55 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 56 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 57 select HAVE_KPROBES
50 select HAVE_PCI !! 58 select HAVE_KRETPROBES
>> 59 select HAVE_MEMBLOCK
>> 60 select HAVE_MEMBLOCK_NODE_MAP
>> 61 select HAVE_MOD_ARCH_SPECIFIC
>> 62 select HAVE_NMI
>> 63 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 64 select HAVE_PERF_EVENTS
52 select HAVE_STACKPROTECTOR !! 65 select HAVE_REGS_AND_STACK_ACCESS_API
53 select HAVE_SYSCALL_TRACEPOINTS 66 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN 67 select HAVE_VIRT_CPU_ACCOUNTING_GEN
55 select IRQ_DOMAIN !! 68 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 69 select MODULES_USE_ELF_RELA if MODULES && 64BIT
57 select MODULES_USE_ELF_RELA !! 70 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 71 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 72 select RTC_LIB if !MACH_LOONGSON64
>> 73 select SYSCTL_EXCEPTION_TRACE
>> 74 select VIRT_TO_BUS
>> 75
>> 76 menu "Machine selection"
>> 77
>> 78 choice
>> 79 prompt "System type"
>> 80 default SGI_IP22
>> 81
>> 82 config MIPS_GENERIC
>> 83 bool "Generic board-agnostic MIPS kernel"
>> 84 select BOOT_RAW
>> 85 select BUILTIN_DTB
>> 86 select CEVT_R4K
>> 87 select CLKSRC_MIPS_GIC
>> 88 select COMMON_CLK
>> 89 select CPU_MIPSR2_IRQ_VI
>> 90 select CPU_MIPSR2_IRQ_EI
>> 91 select CSRC_R4K
>> 92 select DMA_PERDEV_COHERENT
>> 93 select HW_HAS_PCI
>> 94 select IRQ_MIPS_CPU
>> 95 select LIBFDT
>> 96 select MIPS_CPU_SCACHE
>> 97 select MIPS_GIC
>> 98 select MIPS_L1_CACHE_SHIFT_7
>> 99 select NO_EXCEPT_FILL
>> 100 select PCI_DRIVERS_GENERIC
>> 101 select PINCTRL
>> 102 select SMP_UP if SMP
>> 103 select SWAP_IO_SPACE
>> 104 select SYS_HAS_CPU_MIPS32_R1
>> 105 select SYS_HAS_CPU_MIPS32_R2
>> 106 select SYS_HAS_CPU_MIPS32_R6
>> 107 select SYS_HAS_CPU_MIPS64_R1
>> 108 select SYS_HAS_CPU_MIPS64_R2
>> 109 select SYS_HAS_CPU_MIPS64_R6
>> 110 select SYS_SUPPORTS_32BIT_KERNEL
>> 111 select SYS_SUPPORTS_64BIT_KERNEL
>> 112 select SYS_SUPPORTS_BIG_ENDIAN
>> 113 select SYS_SUPPORTS_HIGHMEM
>> 114 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 115 select SYS_SUPPORTS_MICROMIPS
>> 116 select SYS_SUPPORTS_MIPS_CPS
>> 117 select SYS_SUPPORTS_MIPS16
>> 118 select SYS_SUPPORTS_MULTITHREADING
>> 119 select SYS_SUPPORTS_RELOCATABLE
>> 120 select SYS_SUPPORTS_SMARTMIPS
>> 121 select USB_EHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 122 select USB_EHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 123 select USB_OHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 124 select USB_OHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 125 select USB_UHCI_BIG_ENDIAN_DESC if BIG_ENDIAN
>> 126 select USB_UHCI_BIG_ENDIAN_MMIO if BIG_ENDIAN
>> 127 select USE_OF
>> 128 help
>> 129 Select this to build a kernel which aims to support multiple boards,
>> 130 generally using a flattened device tree passed from the bootloader
>> 131 using the boot protocol defined in the UHI (Unified Hosting
>> 132 Interface) specification.
>> 133
>> 134 config MIPS_ALCHEMY
>> 135 bool "Alchemy processor based machines"
>> 136 select ARCH_PHYS_ADDR_T_64BIT
>> 137 select CEVT_R4K
>> 138 select CSRC_R4K
>> 139 select IRQ_MIPS_CPU
>> 140 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 141 select SYS_HAS_CPU_MIPS32_R1
>> 142 select SYS_SUPPORTS_32BIT_KERNEL
>> 143 select SYS_SUPPORTS_APM_EMULATION
>> 144 select GPIOLIB
>> 145 select SYS_SUPPORTS_ZBOOT
>> 146 select COMMON_CLK
>> 147
>> 148 config AR7
>> 149 bool "Texas Instruments AR7"
>> 150 select BOOT_ELF32
>> 151 select DMA_NONCOHERENT
>> 152 select CEVT_R4K
>> 153 select CSRC_R4K
>> 154 select IRQ_MIPS_CPU
>> 155 select NO_EXCEPT_FILL
>> 156 select SWAP_IO_SPACE
>> 157 select SYS_HAS_CPU_MIPS32_R1
>> 158 select SYS_HAS_EARLY_PRINTK
>> 159 select SYS_SUPPORTS_32BIT_KERNEL
>> 160 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 161 select SYS_SUPPORTS_MIPS16
>> 162 select SYS_SUPPORTS_ZBOOT_UART16550
>> 163 select GPIOLIB
>> 164 select VLYNQ
>> 165 select HAVE_CLK
>> 166 help
>> 167 Support for the Texas Instruments AR7 System-on-a-Chip
>> 168 family: TNETD7100, 7200 and 7300.
>> 169
>> 170 config ATH25
>> 171 bool "Atheros AR231x/AR531x SoC support"
>> 172 select CEVT_R4K
>> 173 select CSRC_R4K
>> 174 select DMA_NONCOHERENT
>> 175 select IRQ_MIPS_CPU
>> 176 select IRQ_DOMAIN
>> 177 select SYS_HAS_CPU_MIPS32_R1
>> 178 select SYS_SUPPORTS_BIG_ENDIAN
>> 179 select SYS_SUPPORTS_32BIT_KERNEL
>> 180 select SYS_HAS_EARLY_PRINTK
>> 181 help
>> 182 Support for Atheros AR231x and Atheros AR531x based boards
>> 183
>> 184 config ATH79
>> 185 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 186 select ARCH_HAS_RESET_CONTROLLER
>> 187 select BOOT_RAW
>> 188 select CEVT_R4K
>> 189 select CSRC_R4K
>> 190 select DMA_NONCOHERENT
>> 191 select GPIOLIB
>> 192 select HAVE_CLK
>> 193 select COMMON_CLK
>> 194 select CLKDEV_LOOKUP
>> 195 select IRQ_MIPS_CPU
>> 196 select MIPS_MACHINE
>> 197 select SYS_HAS_CPU_MIPS32_R2
>> 198 select SYS_HAS_EARLY_PRINTK
>> 199 select SYS_SUPPORTS_32BIT_KERNEL
>> 200 select SYS_SUPPORTS_BIG_ENDIAN
>> 201 select SYS_SUPPORTS_MIPS16
>> 202 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 203 select USE_OF
>> 204 help
>> 205 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 206
>> 207 config BMIPS_GENERIC
>> 208 bool "Broadcom Generic BMIPS kernel"
>> 209 select BOOT_RAW
>> 210 select NO_EXCEPT_FILL
>> 211 select USE_OF
>> 212 select CEVT_R4K
>> 213 select CSRC_R4K
>> 214 select SYNC_R4K
>> 215 select COMMON_CLK
>> 216 select BCM6345_L1_IRQ
>> 217 select BCM7038_L1_IRQ
>> 218 select BCM7120_L2_IRQ
>> 219 select BRCMSTB_L2_IRQ
>> 220 select IRQ_MIPS_CPU
>> 221 select DMA_NONCOHERENT
>> 222 select SYS_SUPPORTS_32BIT_KERNEL
>> 223 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 224 select SYS_SUPPORTS_BIG_ENDIAN
>> 225 select SYS_SUPPORTS_HIGHMEM
>> 226 select SYS_HAS_CPU_BMIPS32_3300
>> 227 select SYS_HAS_CPU_BMIPS4350
>> 228 select SYS_HAS_CPU_BMIPS4380
>> 229 select SYS_HAS_CPU_BMIPS5000
>> 230 select SWAP_IO_SPACE
>> 231 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 232 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 233 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 234 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 235 help
>> 236 Build a generic DT-based kernel image that boots on select
>> 237 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 238 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 239 must be set appropriately for your board.
>> 240
>> 241 config BCM47XX
>> 242 bool "Broadcom BCM47XX based boards"
>> 243 select BOOT_RAW
>> 244 select CEVT_R4K
>> 245 select CSRC_R4K
>> 246 select DMA_NONCOHERENT
>> 247 select HW_HAS_PCI
>> 248 select IRQ_MIPS_CPU
>> 249 select SYS_HAS_CPU_MIPS32_R1
>> 250 select NO_EXCEPT_FILL
>> 251 select SYS_SUPPORTS_32BIT_KERNEL
>> 252 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 253 select SYS_SUPPORTS_MIPS16
>> 254 select SYS_HAS_EARLY_PRINTK
>> 255 select USE_GENERIC_EARLY_PRINTK_8250
>> 256 select GPIOLIB
>> 257 select LEDS_GPIO_REGISTER
>> 258 select BCM47XX_NVRAM
>> 259 select BCM47XX_SPROM
>> 260 help
>> 261 Support for BCM47XX based boards
>> 262
>> 263 config BCM63XX
>> 264 bool "Broadcom BCM63XX based boards"
>> 265 select BOOT_RAW
>> 266 select CEVT_R4K
>> 267 select CSRC_R4K
>> 268 select SYNC_R4K
>> 269 select DMA_NONCOHERENT
>> 270 select IRQ_MIPS_CPU
>> 271 select SYS_SUPPORTS_32BIT_KERNEL
>> 272 select SYS_SUPPORTS_BIG_ENDIAN
>> 273 select SYS_HAS_EARLY_PRINTK
>> 274 select SWAP_IO_SPACE
>> 275 select GPIOLIB
>> 276 select HAVE_CLK
>> 277 select MIPS_L1_CACHE_SHIFT_4
>> 278 help
>> 279 Support for BCM63XX based boards
>> 280
>> 281 config MIPS_COBALT
>> 282 bool "Cobalt Server"
>> 283 select CEVT_R4K
>> 284 select CSRC_R4K
>> 285 select CEVT_GT641XX
>> 286 select DMA_NONCOHERENT
>> 287 select HW_HAS_PCI
>> 288 select I8253
>> 289 select I8259
>> 290 select IRQ_MIPS_CPU
>> 291 select IRQ_GT641XX
>> 292 select PCI_GT64XXX_PCI0
>> 293 select PCI
>> 294 select SYS_HAS_CPU_NEVADA
>> 295 select SYS_HAS_EARLY_PRINTK
>> 296 select SYS_SUPPORTS_32BIT_KERNEL
>> 297 select SYS_SUPPORTS_64BIT_KERNEL
>> 298 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 299 select USE_GENERIC_EARLY_PRINTK_8250
>> 300
>> 301 config MACH_DECSTATION
>> 302 bool "DECstations"
>> 303 select BOOT_ELF32
>> 304 select CEVT_DS1287
>> 305 select CEVT_R4K if CPU_R4X00
>> 306 select CSRC_IOASIC
>> 307 select CSRC_R4K if CPU_R4X00
>> 308 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 309 select CPU_R4000_WORKAROUNDS if 64BIT
>> 310 select CPU_R4400_WORKAROUNDS if 64BIT
>> 311 select DMA_NONCOHERENT
>> 312 select NO_IOPORT_MAP
>> 313 select IRQ_MIPS_CPU
>> 314 select SYS_HAS_CPU_R3000
>> 315 select SYS_HAS_CPU_R4X00
>> 316 select SYS_SUPPORTS_32BIT_KERNEL
>> 317 select SYS_SUPPORTS_64BIT_KERNEL
>> 318 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 319 select SYS_SUPPORTS_128HZ
>> 320 select SYS_SUPPORTS_256HZ
>> 321 select SYS_SUPPORTS_1024HZ
>> 322 select MIPS_L1_CACHE_SHIFT_4
>> 323 help
>> 324 This enables support for DEC's MIPS based workstations. For details
>> 325 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 326 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 327
>> 328 If you have one of the following DECstation Models you definitely
>> 329 want to choose R4xx0 for the CPU Type:
>> 330
>> 331 DECstation 5000/50
>> 332 DECstation 5000/150
>> 333 DECstation 5000/260
>> 334 DECsystem 5900/260
>> 335
>> 336 otherwise choose R3000.
>> 337
>> 338 config MACH_JAZZ
>> 339 bool "Jazz family of machines"
>> 340 select FW_ARC
>> 341 select FW_ARC32
>> 342 select ARCH_MAY_HAVE_PC_FDC
>> 343 select CEVT_R4K
>> 344 select CSRC_R4K
>> 345 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 346 select GENERIC_ISA_DMA
>> 347 select HAVE_PCSPKR_PLATFORM
>> 348 select IRQ_MIPS_CPU
>> 349 select I8253
>> 350 select I8259
>> 351 select ISA
>> 352 select SYS_HAS_CPU_R4X00
>> 353 select SYS_SUPPORTS_32BIT_KERNEL
>> 354 select SYS_SUPPORTS_64BIT_KERNEL
>> 355 select SYS_SUPPORTS_100HZ
>> 356 help
>> 357 This a family of machines based on the MIPS R4030 chipset which was
>> 358 used by several vendors to build RISC/os and Windows NT workstations.
>> 359 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 360 Olivetti M700-10 workstations.
>> 361
>> 362 config MACH_INGENIC
>> 363 bool "Ingenic SoC based machines"
>> 364 select SYS_SUPPORTS_32BIT_KERNEL
>> 365 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 366 select SYS_SUPPORTS_ZBOOT_UART16550
>> 367 select DMA_NONCOHERENT
>> 368 select IRQ_MIPS_CPU
>> 369 select PINCTRL
>> 370 select GPIOLIB
>> 371 select COMMON_CLK
>> 372 select GENERIC_IRQ_CHIP
>> 373 select BUILTIN_DTB
>> 374 select USE_OF
>> 375 select LIBFDT
>> 376
>> 377 config LANTIQ
>> 378 bool "Lantiq based platforms"
>> 379 select DMA_NONCOHERENT
>> 380 select IRQ_MIPS_CPU
>> 381 select CEVT_R4K
>> 382 select CSRC_R4K
>> 383 select SYS_HAS_CPU_MIPS32_R1
>> 384 select SYS_HAS_CPU_MIPS32_R2
>> 385 select SYS_SUPPORTS_BIG_ENDIAN
>> 386 select SYS_SUPPORTS_32BIT_KERNEL
>> 387 select SYS_SUPPORTS_MIPS16
>> 388 select SYS_SUPPORTS_MULTITHREADING
>> 389 select SYS_HAS_EARLY_PRINTK
>> 390 select GPIOLIB
>> 391 select SWAP_IO_SPACE
>> 392 select BOOT_RAW
>> 393 select CLKDEV_LOOKUP
>> 394 select USE_OF
>> 395 select PINCTRL
>> 396 select PINCTRL_LANTIQ
>> 397 select ARCH_HAS_RESET_CONTROLLER
>> 398 select RESET_CONTROLLER
>> 399
>> 400 config LASAT
>> 401 bool "LASAT Networks platforms"
>> 402 select CEVT_R4K
>> 403 select CRC32
>> 404 select CSRC_R4K
>> 405 select DMA_NONCOHERENT
>> 406 select SYS_HAS_EARLY_PRINTK
>> 407 select HW_HAS_PCI
>> 408 select IRQ_MIPS_CPU
>> 409 select PCI_GT64XXX_PCI0
>> 410 select MIPS_NILE4
>> 411 select R5000_CPU_SCACHE
>> 412 select SYS_HAS_CPU_R5000
>> 413 select SYS_SUPPORTS_32BIT_KERNEL
>> 414 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 415 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 416
>> 417 config MACH_LOONGSON32
>> 418 bool "Loongson-1 family of machines"
>> 419 select SYS_SUPPORTS_ZBOOT
>> 420 help
>> 421 This enables support for the Loongson-1 family of machines.
>> 422
>> 423 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 424 the Institute of Computing Technology (ICT), Chinese Academy of
>> 425 Sciences (CAS).
>> 426
>> 427 config MACH_LOONGSON64
>> 428 bool "Loongson-2/3 family of machines"
>> 429 select SYS_SUPPORTS_ZBOOT
>> 430 help
>> 431 This enables the support of Loongson-2/3 family of machines.
>> 432
>> 433 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 434 family of multi-core CPUs. They are both 64-bit general-purpose
>> 435 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 436 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 437 in the People's Republic of China. The chief architect is Professor
>> 438 Weiwu Hu.
>> 439
>> 440 config MACH_PISTACHIO
>> 441 bool "IMG Pistachio SoC based boards"
>> 442 select BOOT_ELF32
>> 443 select BOOT_RAW
>> 444 select CEVT_R4K
>> 445 select CLKSRC_MIPS_GIC
>> 446 select COMMON_CLK
>> 447 select CSRC_R4K
>> 448 select DMA_NONCOHERENT
>> 449 select GPIOLIB
>> 450 select IRQ_MIPS_CPU
>> 451 select LIBFDT
>> 452 select MFD_SYSCON
>> 453 select MIPS_CPU_SCACHE
>> 454 select MIPS_GIC
>> 455 select PINCTRL
>> 456 select REGULATOR
>> 457 select SYS_HAS_CPU_MIPS32_R2
>> 458 select SYS_SUPPORTS_32BIT_KERNEL
>> 459 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 460 select SYS_SUPPORTS_MIPS_CPS
>> 461 select SYS_SUPPORTS_MULTITHREADING
>> 462 select SYS_SUPPORTS_RELOCATABLE
>> 463 select SYS_SUPPORTS_ZBOOT
>> 464 select SYS_HAS_EARLY_PRINTK
>> 465 select USE_GENERIC_EARLY_PRINTK_8250
>> 466 select USE_OF
>> 467 help
>> 468 This enables support for the IMG Pistachio SoC platform.
>> 469
>> 470 config MACH_XILFPGA
>> 471 bool "MIPSfpga Xilinx based boards"
>> 472 select BOOT_ELF32
>> 473 select BOOT_RAW
>> 474 select BUILTIN_DTB
>> 475 select CEVT_R4K
>> 476 select COMMON_CLK
>> 477 select CSRC_R4K
>> 478 select GPIOLIB
>> 479 select IRQ_MIPS_CPU
>> 480 select LIBFDT
>> 481 select MIPS_CPU_SCACHE
>> 482 select SYS_HAS_EARLY_PRINTK
>> 483 select SYS_HAS_CPU_MIPS32_R2
>> 484 select SYS_SUPPORTS_32BIT_KERNEL
>> 485 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 486 select SYS_SUPPORTS_ZBOOT_UART16550
>> 487 select USE_OF
>> 488 select USE_GENERIC_EARLY_PRINTK_8250
>> 489 select XILINX_INTC
>> 490 help
>> 491 This enables support for the IMG University Program MIPSfpga platform.
>> 492
>> 493 config MIPS_MALTA
>> 494 bool "MIPS Malta board"
>> 495 select ARCH_MAY_HAVE_PC_FDC
>> 496 select BOOT_ELF32
>> 497 select BOOT_RAW
>> 498 select BUILTIN_DTB
>> 499 select CEVT_R4K
>> 500 select CSRC_R4K
>> 501 select CLKSRC_MIPS_GIC
>> 502 select COMMON_CLK
>> 503 select DMA_MAYBE_COHERENT
>> 504 select GENERIC_ISA_DMA
>> 505 select HAVE_PCSPKR_PLATFORM
>> 506 select IRQ_MIPS_CPU
>> 507 select MIPS_GIC
>> 508 select HW_HAS_PCI
>> 509 select I8253
>> 510 select I8259
>> 511 select MIPS_BONITO64
>> 512 select MIPS_CPU_SCACHE
>> 513 select MIPS_L1_CACHE_SHIFT_6
>> 514 select PCI_GT64XXX_PCI0
>> 515 select MIPS_MSC
>> 516 select SMP_UP if SMP
>> 517 select SWAP_IO_SPACE
>> 518 select SYS_HAS_CPU_MIPS32_R1
>> 519 select SYS_HAS_CPU_MIPS32_R2
>> 520 select SYS_HAS_CPU_MIPS32_R3_5
>> 521 select SYS_HAS_CPU_MIPS32_R5
>> 522 select SYS_HAS_CPU_MIPS32_R6
>> 523 select SYS_HAS_CPU_MIPS64_R1
>> 524 select SYS_HAS_CPU_MIPS64_R2
>> 525 select SYS_HAS_CPU_MIPS64_R6
>> 526 select SYS_HAS_CPU_NEVADA
>> 527 select SYS_HAS_CPU_RM7000
>> 528 select SYS_SUPPORTS_32BIT_KERNEL
>> 529 select SYS_SUPPORTS_64BIT_KERNEL
>> 530 select SYS_SUPPORTS_BIG_ENDIAN
>> 531 select SYS_SUPPORTS_HIGHMEM
>> 532 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 533 select SYS_SUPPORTS_MICROMIPS
>> 534 select SYS_SUPPORTS_MIPS_CMP
>> 535 select SYS_SUPPORTS_MIPS_CPS
>> 536 select SYS_SUPPORTS_MIPS16
>> 537 select SYS_SUPPORTS_MULTITHREADING
>> 538 select SYS_SUPPORTS_SMARTMIPS
>> 539 select SYS_SUPPORTS_ZBOOT
>> 540 select SYS_SUPPORTS_RELOCATABLE
>> 541 select USE_OF
>> 542 select LIBFDT
>> 543 select ZONE_DMA32 if 64BIT
>> 544 select BUILTIN_DTB
>> 545 select LIBFDT
>> 546 help
>> 547 This enables support for the MIPS Technologies Malta evaluation
>> 548 board.
>> 549
>> 550 config MACH_PIC32
>> 551 bool "Microchip PIC32 Family"
>> 552 help
>> 553 This enables support for the Microchip PIC32 family of platforms.
>> 554
>> 555 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 556 microcontrollers.
>> 557
>> 558 config NEC_MARKEINS
>> 559 bool "NEC EMMA2RH Mark-eins board"
>> 560 select SOC_EMMA2RH
>> 561 select HW_HAS_PCI
>> 562 help
>> 563 This enables support for the NEC Electronics Mark-eins boards.
>> 564
>> 565 config MACH_VR41XX
>> 566 bool "NEC VR4100 series based machines"
>> 567 select CEVT_R4K
>> 568 select CSRC_R4K
>> 569 select SYS_HAS_CPU_VR41XX
>> 570 select SYS_SUPPORTS_MIPS16
>> 571 select GPIOLIB
>> 572
>> 573 config NXP_STB220
>> 574 bool "NXP STB220 board"
>> 575 select SOC_PNX833X
>> 576 help
>> 577 Support for NXP Semiconductors STB220 Development Board.
>> 578
>> 579 config NXP_STB225
>> 580 bool "NXP 225 board"
>> 581 select SOC_PNX833X
>> 582 select SOC_PNX8335
>> 583 help
>> 584 Support for NXP Semiconductors STB225 Development Board.
>> 585
>> 586 config PMC_MSP
>> 587 bool "PMC-Sierra MSP chipsets"
>> 588 select CEVT_R4K
>> 589 select CSRC_R4K
>> 590 select DMA_NONCOHERENT
>> 591 select SWAP_IO_SPACE
>> 592 select NO_EXCEPT_FILL
>> 593 select BOOT_RAW
>> 594 select SYS_HAS_CPU_MIPS32_R1
>> 595 select SYS_HAS_CPU_MIPS32_R2
>> 596 select SYS_SUPPORTS_32BIT_KERNEL
>> 597 select SYS_SUPPORTS_BIG_ENDIAN
>> 598 select SYS_SUPPORTS_MIPS16
>> 599 select IRQ_MIPS_CPU
>> 600 select SERIAL_8250
>> 601 select SERIAL_8250_CONSOLE
>> 602 select USB_EHCI_BIG_ENDIAN_MMIO
>> 603 select USB_EHCI_BIG_ENDIAN_DESC
>> 604 help
>> 605 This adds support for the PMC-Sierra family of Multi-Service
>> 606 Processor System-On-A-Chips. These parts include a number
>> 607 of integrated peripherals, interfaces and DSPs in addition to
>> 608 a variety of MIPS cores.
>> 609
>> 610 config RALINK
>> 611 bool "Ralink based machines"
>> 612 select CEVT_R4K
>> 613 select CSRC_R4K
>> 614 select BOOT_RAW
>> 615 select DMA_NONCOHERENT
>> 616 select IRQ_MIPS_CPU
>> 617 select USE_OF
>> 618 select SYS_HAS_CPU_MIPS32_R1
>> 619 select SYS_HAS_CPU_MIPS32_R2
>> 620 select SYS_SUPPORTS_32BIT_KERNEL
>> 621 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 622 select SYS_SUPPORTS_MIPS16
>> 623 select SYS_HAS_EARLY_PRINTK
>> 624 select CLKDEV_LOOKUP
>> 625 select ARCH_HAS_RESET_CONTROLLER
>> 626 select RESET_CONTROLLER
>> 627
>> 628 config SGI_IP22
>> 629 bool "SGI IP22 (Indy/Indigo2)"
>> 630 select FW_ARC
>> 631 select FW_ARC32
>> 632 select BOOT_ELF32
>> 633 select CEVT_R4K
>> 634 select CSRC_R4K
>> 635 select DEFAULT_SGI_PARTITION
>> 636 select DMA_NONCOHERENT
>> 637 select HW_HAS_EISA
>> 638 select I8253
>> 639 select I8259
>> 640 select IP22_CPU_SCACHE
>> 641 select IRQ_MIPS_CPU
>> 642 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 643 select SGI_HAS_I8042
>> 644 select SGI_HAS_INDYDOG
>> 645 select SGI_HAS_HAL2
>> 646 select SGI_HAS_SEEQ
>> 647 select SGI_HAS_WD93
>> 648 select SGI_HAS_ZILOG
>> 649 select SWAP_IO_SPACE
>> 650 select SYS_HAS_CPU_R4X00
>> 651 select SYS_HAS_CPU_R5000
>> 652 #
>> 653 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 654 # memory during early boot on some machines.
>> 655 #
>> 656 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 657 # for a more details discussion
>> 658 #
>> 659 # select SYS_HAS_EARLY_PRINTK
>> 660 select SYS_SUPPORTS_32BIT_KERNEL
>> 661 select SYS_SUPPORTS_64BIT_KERNEL
>> 662 select SYS_SUPPORTS_BIG_ENDIAN
>> 663 select MIPS_L1_CACHE_SHIFT_7
>> 664 help
>> 665 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 666 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 667 that runs on these, say Y here.
>> 668
>> 669 config SGI_IP27
>> 670 bool "SGI IP27 (Origin200/2000)"
>> 671 select FW_ARC
>> 672 select FW_ARC64
>> 673 select BOOT_ELF64
>> 674 select DEFAULT_SGI_PARTITION
>> 675 select DMA_COHERENT
>> 676 select SYS_HAS_EARLY_PRINTK
>> 677 select HW_HAS_PCI
>> 678 select NR_CPUS_DEFAULT_64
>> 679 select SYS_HAS_CPU_R10000
>> 680 select SYS_SUPPORTS_64BIT_KERNEL
>> 681 select SYS_SUPPORTS_BIG_ENDIAN
>> 682 select SYS_SUPPORTS_NUMA
>> 683 select SYS_SUPPORTS_SMP
>> 684 select MIPS_L1_CACHE_SHIFT_7
>> 685 help
>> 686 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 687 workstations. To compile a Linux kernel that runs on these, say Y
>> 688 here.
>> 689
>> 690 config SGI_IP28
>> 691 bool "SGI IP28 (Indigo2 R10k)"
>> 692 select FW_ARC
>> 693 select FW_ARC64
>> 694 select BOOT_ELF64
>> 695 select CEVT_R4K
>> 696 select CSRC_R4K
>> 697 select DEFAULT_SGI_PARTITION
>> 698 select DMA_NONCOHERENT
>> 699 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 700 select IRQ_MIPS_CPU
>> 701 select HW_HAS_EISA
>> 702 select I8253
>> 703 select I8259
>> 704 select SGI_HAS_I8042
>> 705 select SGI_HAS_INDYDOG
>> 706 select SGI_HAS_HAL2
>> 707 select SGI_HAS_SEEQ
>> 708 select SGI_HAS_WD93
>> 709 select SGI_HAS_ZILOG
>> 710 select SWAP_IO_SPACE
>> 711 select SYS_HAS_CPU_R10000
>> 712 #
>> 713 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 714 # memory during early boot on some machines.
>> 715 #
>> 716 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 717 # for a more details discussion
>> 718 #
>> 719 # select SYS_HAS_EARLY_PRINTK
>> 720 select SYS_SUPPORTS_64BIT_KERNEL
>> 721 select SYS_SUPPORTS_BIG_ENDIAN
>> 722 select MIPS_L1_CACHE_SHIFT_7
>> 723 help
>> 724 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 725 kernel that runs on these, say Y here.
>> 726
>> 727 config SGI_IP32
>> 728 bool "SGI IP32 (O2)"
>> 729 select FW_ARC
>> 730 select FW_ARC32
>> 731 select BOOT_ELF32
>> 732 select CEVT_R4K
>> 733 select CSRC_R4K
>> 734 select DMA_NONCOHERENT
>> 735 select HW_HAS_PCI
>> 736 select IRQ_MIPS_CPU
>> 737 select R5000_CPU_SCACHE
>> 738 select RM7000_CPU_SCACHE
>> 739 select SYS_HAS_CPU_R5000
>> 740 select SYS_HAS_CPU_R10000 if BROKEN
>> 741 select SYS_HAS_CPU_RM7000
>> 742 select SYS_HAS_CPU_NEVADA
>> 743 select SYS_SUPPORTS_64BIT_KERNEL
>> 744 select SYS_SUPPORTS_BIG_ENDIAN
>> 745 help
>> 746 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 747
>> 748 config SIBYTE_CRHINE
>> 749 bool "Sibyte BCM91120C-CRhine"
>> 750 select BOOT_ELF32
>> 751 select DMA_COHERENT
>> 752 select SIBYTE_BCM1120
>> 753 select SWAP_IO_SPACE
>> 754 select SYS_HAS_CPU_SB1
>> 755 select SYS_SUPPORTS_BIG_ENDIAN
>> 756 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 757
>> 758 config SIBYTE_CARMEL
>> 759 bool "Sibyte BCM91120x-Carmel"
>> 760 select BOOT_ELF32
>> 761 select DMA_COHERENT
>> 762 select SIBYTE_BCM1120
>> 763 select SWAP_IO_SPACE
>> 764 select SYS_HAS_CPU_SB1
>> 765 select SYS_SUPPORTS_BIG_ENDIAN
>> 766 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 767
>> 768 config SIBYTE_CRHONE
>> 769 bool "Sibyte BCM91125C-CRhone"
>> 770 select BOOT_ELF32
>> 771 select DMA_COHERENT
>> 772 select SIBYTE_BCM1125
>> 773 select SWAP_IO_SPACE
>> 774 select SYS_HAS_CPU_SB1
>> 775 select SYS_SUPPORTS_BIG_ENDIAN
>> 776 select SYS_SUPPORTS_HIGHMEM
>> 777 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 778
>> 779 config SIBYTE_RHONE
>> 780 bool "Sibyte BCM91125E-Rhone"
>> 781 select BOOT_ELF32
>> 782 select DMA_COHERENT
>> 783 select SIBYTE_BCM1125H
>> 784 select SWAP_IO_SPACE
>> 785 select SYS_HAS_CPU_SB1
>> 786 select SYS_SUPPORTS_BIG_ENDIAN
>> 787 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 788
>> 789 config SIBYTE_SWARM
>> 790 bool "Sibyte BCM91250A-SWARM"
>> 791 select BOOT_ELF32
>> 792 select DMA_COHERENT
>> 793 select HAVE_PATA_PLATFORM
>> 794 select SIBYTE_SB1250
>> 795 select SWAP_IO_SPACE
>> 796 select SYS_HAS_CPU_SB1
>> 797 select SYS_SUPPORTS_BIG_ENDIAN
>> 798 select SYS_SUPPORTS_HIGHMEM
>> 799 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 800 select ZONE_DMA32 if 64BIT
>> 801
>> 802 config SIBYTE_LITTLESUR
>> 803 bool "Sibyte BCM91250C2-LittleSur"
>> 804 select BOOT_ELF32
>> 805 select DMA_COHERENT
>> 806 select HAVE_PATA_PLATFORM
>> 807 select SIBYTE_SB1250
>> 808 select SWAP_IO_SPACE
>> 809 select SYS_HAS_CPU_SB1
>> 810 select SYS_SUPPORTS_BIG_ENDIAN
>> 811 select SYS_SUPPORTS_HIGHMEM
>> 812 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 813
>> 814 config SIBYTE_SENTOSA
>> 815 bool "Sibyte BCM91250E-Sentosa"
>> 816 select BOOT_ELF32
>> 817 select DMA_COHERENT
>> 818 select SIBYTE_SB1250
>> 819 select SWAP_IO_SPACE
>> 820 select SYS_HAS_CPU_SB1
>> 821 select SYS_SUPPORTS_BIG_ENDIAN
>> 822 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 823
>> 824 config SIBYTE_BIGSUR
>> 825 bool "Sibyte BCM91480B-BigSur"
>> 826 select BOOT_ELF32
>> 827 select DMA_COHERENT
>> 828 select NR_CPUS_DEFAULT_4
>> 829 select SIBYTE_BCM1x80
>> 830 select SWAP_IO_SPACE
>> 831 select SYS_HAS_CPU_SB1
>> 832 select SYS_SUPPORTS_BIG_ENDIAN
>> 833 select SYS_SUPPORTS_HIGHMEM
>> 834 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 835 select ZONE_DMA32 if 64BIT
>> 836
>> 837 config SNI_RM
>> 838 bool "SNI RM200/300/400"
>> 839 select FW_ARC if CPU_LITTLE_ENDIAN
>> 840 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 841 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 842 select ARCH_MAY_HAVE_PC_FDC
>> 843 select BOOT_ELF32
>> 844 select CEVT_R4K
>> 845 select CSRC_R4K
>> 846 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 847 select DMA_NONCOHERENT
>> 848 select GENERIC_ISA_DMA
>> 849 select HAVE_PCSPKR_PLATFORM
>> 850 select HW_HAS_EISA
>> 851 select HW_HAS_PCI
>> 852 select IRQ_MIPS_CPU
>> 853 select I8253
>> 854 select I8259
>> 855 select ISA
>> 856 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 857 select SYS_HAS_CPU_R4X00
>> 858 select SYS_HAS_CPU_R5000
>> 859 select SYS_HAS_CPU_R10000
>> 860 select R5000_CPU_SCACHE
>> 861 select SYS_HAS_EARLY_PRINTK
>> 862 select SYS_SUPPORTS_32BIT_KERNEL
>> 863 select SYS_SUPPORTS_64BIT_KERNEL
>> 864 select SYS_SUPPORTS_BIG_ENDIAN
>> 865 select SYS_SUPPORTS_HIGHMEM
>> 866 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 867 help
>> 868 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 869 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 870 Technology and now in turn merged with Fujitsu. Say Y here to
>> 871 support this machine type.
>> 872
>> 873 config MACH_TX39XX
>> 874 bool "Toshiba TX39 series based machines"
>> 875
>> 876 config MACH_TX49XX
>> 877 bool "Toshiba TX49 series based machines"
>> 878
>> 879 config MIKROTIK_RB532
>> 880 bool "Mikrotik RB532 boards"
>> 881 select CEVT_R4K
>> 882 select CSRC_R4K
>> 883 select DMA_NONCOHERENT
>> 884 select HW_HAS_PCI
>> 885 select IRQ_MIPS_CPU
>> 886 select SYS_HAS_CPU_MIPS32_R1
>> 887 select SYS_SUPPORTS_32BIT_KERNEL
>> 888 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 889 select SWAP_IO_SPACE
>> 890 select BOOT_RAW
>> 891 select GPIOLIB
>> 892 select MIPS_L1_CACHE_SHIFT_4
>> 893 help
>> 894 Support the Mikrotik(tm) RouterBoard 532 series,
>> 895 based on the IDT RC32434 SoC.
>> 896
>> 897 config CAVIUM_OCTEON_SOC
>> 898 bool "Cavium Networks Octeon SoC based boards"
>> 899 select CEVT_R4K
>> 900 select ARCH_PHYS_ADDR_T_64BIT
>> 901 select DMA_COHERENT
>> 902 select SYS_SUPPORTS_64BIT_KERNEL
>> 903 select SYS_SUPPORTS_BIG_ENDIAN
>> 904 select EDAC_SUPPORT
>> 905 select EDAC_ATOMIC_SCRUB
>> 906 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 907 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 908 select SYS_HAS_EARLY_PRINTK
>> 909 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 910 select HW_HAS_PCI
>> 911 select ZONE_DMA32
>> 912 select HOLES_IN_ZONE
>> 913 select GPIOLIB
>> 914 select LIBFDT
>> 915 select USE_OF
>> 916 select ARCH_SPARSEMEM_ENABLE
>> 917 select SYS_SUPPORTS_SMP
>> 918 select NR_CPUS_DEFAULT_16
>> 919 select BUILTIN_DTB
>> 920 select MTD_COMPLEX_MAPPINGS
>> 921 select SYS_SUPPORTS_RELOCATABLE
>> 922 help
>> 923 This option supports all of the Octeon reference boards from Cavium
>> 924 Networks. It builds a kernel that dynamically determines the Octeon
>> 925 CPU type and supports all known board reference implementations.
>> 926 Some of the supported boards are:
>> 927 EBT3000
>> 928 EBH3000
>> 929 EBH3100
>> 930 Thunder
>> 931 Kodama
>> 932 Hikari
>> 933 Say Y here for most Octeon reference boards.
>> 934
>> 935 config NLM_XLR_BOARD
>> 936 bool "Netlogic XLR/XLS based systems"
>> 937 select BOOT_ELF32
>> 938 select NLM_COMMON
>> 939 select SYS_HAS_CPU_XLR
>> 940 select SYS_SUPPORTS_SMP
>> 941 select HW_HAS_PCI
>> 942 select SWAP_IO_SPACE
>> 943 select SYS_SUPPORTS_32BIT_KERNEL
>> 944 select SYS_SUPPORTS_64BIT_KERNEL
>> 945 select ARCH_PHYS_ADDR_T_64BIT
>> 946 select SYS_SUPPORTS_BIG_ENDIAN
>> 947 select SYS_SUPPORTS_HIGHMEM
>> 948 select DMA_COHERENT
>> 949 select NR_CPUS_DEFAULT_32
>> 950 select CEVT_R4K
>> 951 select CSRC_R4K
>> 952 select IRQ_MIPS_CPU
>> 953 select ZONE_DMA32 if 64BIT
>> 954 select SYNC_R4K
>> 955 select SYS_HAS_EARLY_PRINTK
>> 956 select SYS_SUPPORTS_ZBOOT
>> 957 select SYS_SUPPORTS_ZBOOT_UART16550
>> 958 help
>> 959 Support for systems based on Netlogic XLR and XLS processors.
>> 960 Say Y here if you have a XLR or XLS based board.
>> 961
>> 962 config NLM_XLP_BOARD
>> 963 bool "Netlogic XLP based systems"
>> 964 select BOOT_ELF32
>> 965 select NLM_COMMON
>> 966 select SYS_HAS_CPU_XLP
>> 967 select SYS_SUPPORTS_SMP
>> 968 select HW_HAS_PCI
>> 969 select SYS_SUPPORTS_32BIT_KERNEL
>> 970 select SYS_SUPPORTS_64BIT_KERNEL
>> 971 select ARCH_PHYS_ADDR_T_64BIT
>> 972 select GPIOLIB
>> 973 select SYS_SUPPORTS_BIG_ENDIAN
>> 974 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 975 select SYS_SUPPORTS_HIGHMEM
>> 976 select DMA_COHERENT
>> 977 select NR_CPUS_DEFAULT_32
>> 978 select CEVT_R4K
>> 979 select CSRC_R4K
>> 980 select IRQ_MIPS_CPU
>> 981 select ZONE_DMA32 if 64BIT
>> 982 select SYNC_R4K
>> 983 select SYS_HAS_EARLY_PRINTK
>> 984 select USE_OF
>> 985 select SYS_SUPPORTS_ZBOOT
>> 986 select SYS_SUPPORTS_ZBOOT_UART16550
>> 987 help
>> 988 This board is based on Netlogic XLP Processor.
>> 989 Say Y here if you have a XLP based board.
>> 990
>> 991 config MIPS_PARAVIRT
>> 992 bool "Para-Virtualized guest system"
>> 993 select CEVT_R4K
>> 994 select CSRC_R4K
>> 995 select DMA_COHERENT
>> 996 select SYS_SUPPORTS_64BIT_KERNEL
>> 997 select SYS_SUPPORTS_32BIT_KERNEL
>> 998 select SYS_SUPPORTS_BIG_ENDIAN
>> 999 select SYS_SUPPORTS_SMP
>> 1000 select NR_CPUS_DEFAULT_4
>> 1001 select SYS_HAS_EARLY_PRINTK
>> 1002 select SYS_HAS_CPU_MIPS32_R2
>> 1003 select SYS_HAS_CPU_MIPS64_R2
>> 1004 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1005 select HW_HAS_PCI
>> 1006 select SWAP_IO_SPACE
60 help 1007 help
61 Xtensa processors are 32-bit RISC ma !! 1008 This option supports guest running under ????
62 primarily for embedded systems. The !! 1009
63 configurable and extensible. The Li !! 1010 endchoice
64 architecture supports all processor !! 1011
65 with reasonable minimum requirements !! 1012 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 1013 source "arch/mips/ath25/Kconfig"
>> 1014 source "arch/mips/ath79/Kconfig"
>> 1015 source "arch/mips/bcm47xx/Kconfig"
>> 1016 source "arch/mips/bcm63xx/Kconfig"
>> 1017 source "arch/mips/bmips/Kconfig"
>> 1018 source "arch/mips/generic/Kconfig"
>> 1019 source "arch/mips/jazz/Kconfig"
>> 1020 source "arch/mips/jz4740/Kconfig"
>> 1021 source "arch/mips/lantiq/Kconfig"
>> 1022 source "arch/mips/lasat/Kconfig"
>> 1023 source "arch/mips/pic32/Kconfig"
>> 1024 source "arch/mips/pistachio/Kconfig"
>> 1025 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1026 source "arch/mips/ralink/Kconfig"
>> 1027 source "arch/mips/sgi-ip27/Kconfig"
>> 1028 source "arch/mips/sibyte/Kconfig"
>> 1029 source "arch/mips/txx9/Kconfig"
>> 1030 source "arch/mips/vr41xx/Kconfig"
>> 1031 source "arch/mips/cavium-octeon/Kconfig"
>> 1032 source "arch/mips/loongson32/Kconfig"
>> 1033 source "arch/mips/loongson64/Kconfig"
>> 1034 source "arch/mips/netlogic/Kconfig"
>> 1035 source "arch/mips/paravirt/Kconfig"
>> 1036 source "arch/mips/xilfpga/Kconfig"
>> 1037
>> 1038 endmenu
>> 1039
>> 1040 config RWSEM_GENERIC_SPINLOCK
>> 1041 bool
>> 1042 default y
>> 1043
>> 1044 config RWSEM_XCHGADD_ALGORITHM
>> 1045 bool
67 1046
68 config GENERIC_HWEIGHT 1047 config GENERIC_HWEIGHT
69 def_bool y !! 1048 bool
>> 1049 default y
70 1050
71 config ARCH_HAS_ILOG2_U32 !! 1051 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1052 bool
>> 1053 default y
73 1054
74 config ARCH_HAS_ILOG2_U64 !! 1055 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1056 bool
>> 1057 default y
76 1058
77 config ARCH_MTD_XIP !! 1059 #
78 def_bool y !! 1060 # Select some configuration options automatically based on user selections.
>> 1061 #
>> 1062 config FW_ARC
>> 1063 bool
>> 1064
>> 1065 config ARCH_MAY_HAVE_PC_FDC
>> 1066 bool
>> 1067
>> 1068 config BOOT_RAW
>> 1069 bool
>> 1070
>> 1071 config CEVT_BCM1480
>> 1072 bool
>> 1073
>> 1074 config CEVT_DS1287
>> 1075 bool
>> 1076
>> 1077 config CEVT_GT641XX
>> 1078 bool
>> 1079
>> 1080 config CEVT_R4K
>> 1081 bool
>> 1082
>> 1083 config CEVT_SB1250
>> 1084 bool
>> 1085
>> 1086 config CEVT_TXX9
>> 1087 bool
>> 1088
>> 1089 config CSRC_BCM1480
>> 1090 bool
>> 1091
>> 1092 config CSRC_IOASIC
>> 1093 bool
>> 1094
>> 1095 config CSRC_R4K
>> 1096 bool
>> 1097
>> 1098 config CSRC_SB1250
>> 1099 bool
>> 1100
>> 1101 config MIPS_CLOCK_VSYSCALL
>> 1102 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1103
>> 1104 config GPIO_TXX9
>> 1105 select GPIOLIB
>> 1106 bool
>> 1107
>> 1108 config FW_CFE
>> 1109 bool
>> 1110
>> 1111 config ARCH_DMA_ADDR_T_64BIT
>> 1112 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
>> 1113
>> 1114 config ARCH_SUPPORTS_UPROBES
>> 1115 bool
>> 1116
>> 1117 config DMA_MAYBE_COHERENT
>> 1118 select DMA_NONCOHERENT
>> 1119 bool
>> 1120
>> 1121 config DMA_PERDEV_COHERENT
>> 1122 bool
>> 1123 select DMA_MAYBE_COHERENT
>> 1124
>> 1125 config DMA_COHERENT
>> 1126 bool
>> 1127
>> 1128 config DMA_NONCOHERENT
>> 1129 bool
>> 1130 select NEED_DMA_MAP_STATE
>> 1131
>> 1132 config NEED_DMA_MAP_STATE
>> 1133 bool
>> 1134
>> 1135 config SYS_HAS_EARLY_PRINTK
>> 1136 bool
>> 1137
>> 1138 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1139 bool
>> 1140
>> 1141 config MIPS_BONITO64
>> 1142 bool
>> 1143
>> 1144 config MIPS_MSC
>> 1145 bool
>> 1146
>> 1147 config MIPS_NILE4
>> 1148 bool
>> 1149
>> 1150 config SYNC_R4K
>> 1151 bool
>> 1152
>> 1153 config MIPS_MACHINE
>> 1154 def_bool n
79 1155
80 config NO_IOPORT_MAP 1156 config NO_IOPORT_MAP
81 def_bool n 1157 def_bool n
82 1158
83 config HZ !! 1159 config GENERIC_CSUM
84 int !! 1160 bool
85 default 100 <<
86 1161
87 config LOCKDEP_SUPPORT !! 1162 config GENERIC_ISA_DMA
88 def_bool y !! 1163 bool
>> 1164 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1165 select ISA_DMA_API
89 1166
90 config STACKTRACE_SUPPORT !! 1167 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1168 bool
>> 1169 select GENERIC_ISA_DMA
>> 1170
>> 1171 config ISA_DMA_API
>> 1172 bool
>> 1173
>> 1174 config HOLES_IN_ZONE
>> 1175 bool
>> 1176
>> 1177 config SYS_SUPPORTS_RELOCATABLE
>> 1178 bool
>> 1179 help
>> 1180 Selected if the platform supports relocating the kernel.
>> 1181 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1182 to allow access to command line and entropy sources.
>> 1183
>> 1184 config MIPS_CBPF_JIT
91 def_bool y 1185 def_bool y
>> 1186 depends on BPF_JIT && HAVE_CBPF_JIT
92 1187
93 config MMU !! 1188 config MIPS_EBPF_JIT
94 def_bool n !! 1189 def_bool y
95 select PFAULT !! 1190 depends on BPF_JIT && HAVE_EBPF_JIT
96 1191
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1192
100 config KASAN_SHADOW_OFFSET !! 1193 #
101 hex !! 1194 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1195 # answer,so we try hard to limit the available choices. Also the use of a
>> 1196 # choice statement should be more obvious to the user.
>> 1197 #
>> 1198 choice
>> 1199 prompt "Endianness selection"
>> 1200 help
>> 1201 Some MIPS machines can be configured for either little or big endian
>> 1202 byte order. These modes require different kernels and a different
>> 1203 Linux distribution. In general there is one preferred byteorder for a
>> 1204 particular system but some systems are just as commonly used in the
>> 1205 one or the other endianness.
103 1206
104 config CPU_BIG_ENDIAN 1207 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1208 bool "Big endian"
>> 1209 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1210
107 config CPU_LITTLE_ENDIAN 1211 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1212 bool "Little endian"
>> 1213 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1214
110 config CC_HAVE_CALL0_ABI !! 1215 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1216
113 menu "Processor type and features" !! 1217 config EXPORT_UASM
>> 1218 bool
114 1219
115 choice !! 1220 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1221 bool
117 default XTENSA_VARIANT_FSF <<
118 1222
119 config XTENSA_VARIANT_FSF !! 1223 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1224 bool
121 select MMU <<
122 1225
123 config XTENSA_VARIANT_DC232B !! 1226 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1227 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1228
130 config XTENSA_VARIANT_DC233C !! 1229 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1230 bool
132 select MMU !! 1231 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1232 default y
134 help !! 1233
135 This variant refers to Tensilica's D !! 1234 config MIPS_HUGE_TLB_SUPPORT
>> 1235 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1236
>> 1237 config IRQ_CPU_RM7K
>> 1238 bool
>> 1239
>> 1240 config IRQ_MSP_SLP
>> 1241 bool
>> 1242
>> 1243 config IRQ_MSP_CIC
>> 1244 bool
>> 1245
>> 1246 config IRQ_TXX9
>> 1247 bool
>> 1248
>> 1249 config IRQ_GT641XX
>> 1250 bool
>> 1251
>> 1252 config PCI_GT64XXX_PCI0
>> 1253 bool
>> 1254
>> 1255 config NO_EXCEPT_FILL
>> 1256 bool
>> 1257
>> 1258 config SOC_EMMA2RH
>> 1259 bool
>> 1260 select CEVT_R4K
>> 1261 select CSRC_R4K
>> 1262 select DMA_NONCOHERENT
>> 1263 select IRQ_MIPS_CPU
>> 1264 select SWAP_IO_SPACE
>> 1265 select SYS_HAS_CPU_R5500
>> 1266 select SYS_SUPPORTS_32BIT_KERNEL
>> 1267 select SYS_SUPPORTS_64BIT_KERNEL
>> 1268 select SYS_SUPPORTS_BIG_ENDIAN
>> 1269
>> 1270 config SOC_PNX833X
>> 1271 bool
>> 1272 select CEVT_R4K
>> 1273 select CSRC_R4K
>> 1274 select IRQ_MIPS_CPU
>> 1275 select DMA_NONCOHERENT
>> 1276 select SYS_HAS_CPU_MIPS32_R2
>> 1277 select SYS_SUPPORTS_32BIT_KERNEL
>> 1278 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1279 select SYS_SUPPORTS_BIG_ENDIAN
>> 1280 select SYS_SUPPORTS_MIPS16
>> 1281 select CPU_MIPSR2_IRQ_VI
>> 1282
>> 1283 config SOC_PNX8335
>> 1284 bool
>> 1285 select SOC_PNX833X
>> 1286
>> 1287 config MIPS_SPRAM
>> 1288 bool
>> 1289
>> 1290 config SWAP_IO_SPACE
>> 1291 bool
136 1292
137 config XTENSA_VARIANT_CUSTOM !! 1293 config SGI_HAS_INDYDOG
138 bool "Custom Xtensa processor configur !! 1294 bool
139 select HAVE_XTENSA_GPIO32 !! 1295
>> 1296 config SGI_HAS_HAL2
>> 1297 bool
>> 1298
>> 1299 config SGI_HAS_SEEQ
>> 1300 bool
>> 1301
>> 1302 config SGI_HAS_WD93
>> 1303 bool
>> 1304
>> 1305 config SGI_HAS_ZILOG
>> 1306 bool
>> 1307
>> 1308 config SGI_HAS_I8042
>> 1309 bool
>> 1310
>> 1311 config DEFAULT_SGI_PARTITION
>> 1312 bool
>> 1313
>> 1314 config FW_ARC32
>> 1315 bool
>> 1316
>> 1317 config FW_SNIPROM
>> 1318 bool
>> 1319
>> 1320 config BOOT_ELF32
>> 1321 bool
>> 1322
>> 1323 config MIPS_L1_CACHE_SHIFT_4
>> 1324 bool
>> 1325
>> 1326 config MIPS_L1_CACHE_SHIFT_5
>> 1327 bool
>> 1328
>> 1329 config MIPS_L1_CACHE_SHIFT_6
>> 1330 bool
>> 1331
>> 1332 config MIPS_L1_CACHE_SHIFT_7
>> 1333 bool
>> 1334
>> 1335 config MIPS_L1_CACHE_SHIFT
>> 1336 int
>> 1337 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1338 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1339 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1340 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1341 default "5"
>> 1342
>> 1343 config HAVE_STD_PC_SERIAL_PORT
>> 1344 bool
>> 1345
>> 1346 config ARC_CONSOLE
>> 1347 bool "ARC console support"
>> 1348 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1349
>> 1350 config ARC_MEMORY
>> 1351 bool
>> 1352 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1353 default y
>> 1354
>> 1355 config ARC_PROMLIB
>> 1356 bool
>> 1357 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1358 default y
>> 1359
>> 1360 config FW_ARC64
>> 1361 bool
>> 1362
>> 1363 config BOOT_ELF64
>> 1364 bool
>> 1365
>> 1366 menu "CPU selection"
>> 1367
>> 1368 choice
>> 1369 prompt "CPU type"
>> 1370 default CPU_R4X00
>> 1371
>> 1372 config CPU_LOONGSON3
>> 1373 bool "Loongson 3 CPU"
>> 1374 depends on SYS_HAS_CPU_LOONGSON3
>> 1375 select CPU_SUPPORTS_64BIT_KERNEL
>> 1376 select CPU_SUPPORTS_HIGHMEM
>> 1377 select CPU_SUPPORTS_HUGEPAGES
>> 1378 select WEAK_ORDERING
>> 1379 select WEAK_REORDERING_BEYOND_LLSC
>> 1380 select MIPS_PGD_C0_CONTEXT
>> 1381 select MIPS_L1_CACHE_SHIFT_6
>> 1382 select GPIOLIB
140 help 1383 help
141 Select this variant to use a custom !! 1384 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1385 set with many extensions.
143 endchoice <<
144 1386
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1387 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1388 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1389 default n
>> 1390 select CPU_MIPSR2
>> 1391 select CPU_HAS_PREFETCH
>> 1392 depends on CPU_LOONGSON3
>> 1393 help
>> 1394 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1395 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1396 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1397 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1398 Fast TLB refill support, etc.
>> 1399
>> 1400 This option enable those enhancements which are not probed at run
>> 1401 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1402 please say 'N' here. If you want a high-performance kernel to run on
>> 1403 new Loongson 3 machines only, please say 'Y' here.
>> 1404
>> 1405 config CPU_LOONGSON2E
>> 1406 bool "Loongson 2E"
>> 1407 depends on SYS_HAS_CPU_LOONGSON2E
>> 1408 select CPU_LOONGSON2
>> 1409 help
>> 1410 The Loongson 2E processor implements the MIPS III instruction set
>> 1411 with many extensions.
>> 1412
>> 1413 It has an internal FPGA northbridge, which is compatible to
>> 1414 bonito64.
>> 1415
>> 1416 config CPU_LOONGSON2F
>> 1417 bool "Loongson 2F"
>> 1418 depends on SYS_HAS_CPU_LOONGSON2F
>> 1419 select CPU_LOONGSON2
>> 1420 select GPIOLIB
>> 1421 help
>> 1422 The Loongson 2F processor implements the MIPS III instruction set
>> 1423 with many extensions.
>> 1424
>> 1425 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1426 have a similar programming interface with FPGA northbridge used in
>> 1427 Loongson2E.
>> 1428
>> 1429 config CPU_LOONGSON1B
>> 1430 bool "Loongson 1B"
>> 1431 depends on SYS_HAS_CPU_LOONGSON1B
>> 1432 select CPU_LOONGSON1
>> 1433 select LEDS_GPIO_REGISTER
>> 1434 help
>> 1435 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1436 release 2 instruction set.
>> 1437
>> 1438 config CPU_LOONGSON1C
>> 1439 bool "Loongson 1C"
>> 1440 depends on SYS_HAS_CPU_LOONGSON1C
>> 1441 select CPU_LOONGSON1
>> 1442 select LEDS_GPIO_REGISTER
>> 1443 help
>> 1444 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1445 release 2 instruction set.
>> 1446
>> 1447 config CPU_MIPS32_R1
>> 1448 bool "MIPS32 Release 1"
>> 1449 depends on SYS_HAS_CPU_MIPS32_R1
>> 1450 select CPU_HAS_PREFETCH
>> 1451 select CPU_SUPPORTS_32BIT_KERNEL
>> 1452 select CPU_SUPPORTS_HIGHMEM
>> 1453 help
>> 1454 Choose this option to build a kernel for release 1 or later of the
>> 1455 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1456 MIPS processor are based on a MIPS32 processor. If you know the
>> 1457 specific type of processor in your system, choose those that one
>> 1458 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1459 Release 2 of the MIPS32 architecture is available since several
>> 1460 years so chances are you even have a MIPS32 Release 2 processor
>> 1461 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1462 performance.
>> 1463
>> 1464 config CPU_MIPS32_R2
>> 1465 bool "MIPS32 Release 2"
>> 1466 depends on SYS_HAS_CPU_MIPS32_R2
>> 1467 select CPU_HAS_PREFETCH
>> 1468 select CPU_SUPPORTS_32BIT_KERNEL
>> 1469 select CPU_SUPPORTS_HIGHMEM
>> 1470 select CPU_SUPPORTS_MSA
>> 1471 select HAVE_KVM
>> 1472 help
>> 1473 Choose this option to build a kernel for release 2 or later of the
>> 1474 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1475 MIPS processor are based on a MIPS32 processor. If you know the
>> 1476 specific type of processor in your system, choose those that one
>> 1477 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1478
>> 1479 config CPU_MIPS32_R6
>> 1480 bool "MIPS32 Release 6"
>> 1481 depends on SYS_HAS_CPU_MIPS32_R6
>> 1482 select CPU_HAS_PREFETCH
>> 1483 select CPU_SUPPORTS_32BIT_KERNEL
>> 1484 select CPU_SUPPORTS_HIGHMEM
>> 1485 select CPU_SUPPORTS_MSA
>> 1486 select GENERIC_CSUM
>> 1487 select HAVE_KVM
>> 1488 select MIPS_O32_FP64_SUPPORT
>> 1489 help
>> 1490 Choose this option to build a kernel for release 6 or later of the
>> 1491 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1492 family, are based on a MIPS32r6 processor. If you own an older
>> 1493 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1494
>> 1495 config CPU_MIPS64_R1
>> 1496 bool "MIPS64 Release 1"
>> 1497 depends on SYS_HAS_CPU_MIPS64_R1
>> 1498 select CPU_HAS_PREFETCH
>> 1499 select CPU_SUPPORTS_32BIT_KERNEL
>> 1500 select CPU_SUPPORTS_64BIT_KERNEL
>> 1501 select CPU_SUPPORTS_HIGHMEM
>> 1502 select CPU_SUPPORTS_HUGEPAGES
>> 1503 help
>> 1504 Choose this option to build a kernel for release 1 or later of the
>> 1505 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1506 MIPS processor are based on a MIPS64 processor. If you know the
>> 1507 specific type of processor in your system, choose those that one
>> 1508 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1509 Release 2 of the MIPS64 architecture is available since several
>> 1510 years so chances are you even have a MIPS64 Release 2 processor
>> 1511 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1512 performance.
>> 1513
>> 1514 config CPU_MIPS64_R2
>> 1515 bool "MIPS64 Release 2"
>> 1516 depends on SYS_HAS_CPU_MIPS64_R2
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_SUPPORTS_32BIT_KERNEL
>> 1519 select CPU_SUPPORTS_64BIT_KERNEL
>> 1520 select CPU_SUPPORTS_HIGHMEM
>> 1521 select CPU_SUPPORTS_HUGEPAGES
>> 1522 select CPU_SUPPORTS_MSA
>> 1523 select HAVE_KVM
>> 1524 help
>> 1525 Choose this option to build a kernel for release 2 or later of the
>> 1526 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1527 MIPS processor are based on a MIPS64 processor. If you know the
>> 1528 specific type of processor in your system, choose those that one
>> 1529 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1530
>> 1531 config CPU_MIPS64_R6
>> 1532 bool "MIPS64 Release 6"
>> 1533 depends on SYS_HAS_CPU_MIPS64_R6
>> 1534 select CPU_HAS_PREFETCH
>> 1535 select CPU_SUPPORTS_32BIT_KERNEL
>> 1536 select CPU_SUPPORTS_64BIT_KERNEL
>> 1537 select CPU_SUPPORTS_HIGHMEM
>> 1538 select CPU_SUPPORTS_MSA
>> 1539 select GENERIC_CSUM
>> 1540 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1541 select HAVE_KVM
>> 1542 help
>> 1543 Choose this option to build a kernel for release 6 or later of the
>> 1544 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1545 family, are based on a MIPS64r6 processor. If you own an older
>> 1546 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1547
>> 1548 config CPU_R3000
>> 1549 bool "R3000"
>> 1550 depends on SYS_HAS_CPU_R3000
>> 1551 select CPU_HAS_WB
>> 1552 select CPU_SUPPORTS_32BIT_KERNEL
>> 1553 select CPU_SUPPORTS_HIGHMEM
>> 1554 help
>> 1555 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1556 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1557 *not* work on R4000 machines and vice versa. However, since most
>> 1558 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1559 might be a safe bet. If the resulting kernel does not work,
>> 1560 try to recompile with R3000.
>> 1561
>> 1562 config CPU_TX39XX
>> 1563 bool "R39XX"
>> 1564 depends on SYS_HAS_CPU_TX39XX
>> 1565 select CPU_SUPPORTS_32BIT_KERNEL
>> 1566
>> 1567 config CPU_VR41XX
>> 1568 bool "R41xx"
>> 1569 depends on SYS_HAS_CPU_VR41XX
>> 1570 select CPU_SUPPORTS_32BIT_KERNEL
>> 1571 select CPU_SUPPORTS_64BIT_KERNEL
>> 1572 help
>> 1573 The options selects support for the NEC VR4100 series of processors.
>> 1574 Only choose this option if you have one of these processors as a
>> 1575 kernel built with this option will not run on any other type of
>> 1576 processor or vice versa.
>> 1577
>> 1578 config CPU_R4300
>> 1579 bool "R4300"
>> 1580 depends on SYS_HAS_CPU_R4300
>> 1581 select CPU_SUPPORTS_32BIT_KERNEL
>> 1582 select CPU_SUPPORTS_64BIT_KERNEL
>> 1583 help
>> 1584 MIPS Technologies R4300-series processors.
>> 1585
>> 1586 config CPU_R4X00
>> 1587 bool "R4x00"
>> 1588 depends on SYS_HAS_CPU_R4X00
>> 1589 select CPU_SUPPORTS_32BIT_KERNEL
>> 1590 select CPU_SUPPORTS_64BIT_KERNEL
>> 1591 select CPU_SUPPORTS_HUGEPAGES
>> 1592 help
>> 1593 MIPS Technologies R4000-series processors other than 4300, including
>> 1594 the R4000, R4400, R4600, and 4700.
>> 1595
>> 1596 config CPU_TX49XX
>> 1597 bool "R49XX"
>> 1598 depends on SYS_HAS_CPU_TX49XX
>> 1599 select CPU_HAS_PREFETCH
>> 1600 select CPU_SUPPORTS_32BIT_KERNEL
>> 1601 select CPU_SUPPORTS_64BIT_KERNEL
>> 1602 select CPU_SUPPORTS_HUGEPAGES
>> 1603
>> 1604 config CPU_R5000
>> 1605 bool "R5000"
>> 1606 depends on SYS_HAS_CPU_R5000
>> 1607 select CPU_SUPPORTS_32BIT_KERNEL
>> 1608 select CPU_SUPPORTS_64BIT_KERNEL
>> 1609 select CPU_SUPPORTS_HUGEPAGES
>> 1610 help
>> 1611 MIPS Technologies R5000-series processors other than the Nevada.
>> 1612
>> 1613 config CPU_R5432
>> 1614 bool "R5432"
>> 1615 depends on SYS_HAS_CPU_R5432
>> 1616 select CPU_SUPPORTS_32BIT_KERNEL
>> 1617 select CPU_SUPPORTS_64BIT_KERNEL
>> 1618 select CPU_SUPPORTS_HUGEPAGES
>> 1619
>> 1620 config CPU_R5500
>> 1621 bool "R5500"
>> 1622 depends on SYS_HAS_CPU_R5500
>> 1623 select CPU_SUPPORTS_32BIT_KERNEL
>> 1624 select CPU_SUPPORTS_64BIT_KERNEL
>> 1625 select CPU_SUPPORTS_HUGEPAGES
>> 1626 help
>> 1627 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1628 instruction set.
>> 1629
>> 1630 config CPU_R6000
>> 1631 bool "R6000"
>> 1632 depends on SYS_HAS_CPU_R6000
>> 1633 select CPU_SUPPORTS_32BIT_KERNEL
>> 1634 help
>> 1635 MIPS Technologies R6000 and R6000A series processors. Note these
>> 1636 processors are extremely rare and the support for them is incomplete.
>> 1637
>> 1638 config CPU_NEVADA
>> 1639 bool "RM52xx"
>> 1640 depends on SYS_HAS_CPU_NEVADA
>> 1641 select CPU_SUPPORTS_32BIT_KERNEL
>> 1642 select CPU_SUPPORTS_64BIT_KERNEL
>> 1643 select CPU_SUPPORTS_HUGEPAGES
>> 1644 help
>> 1645 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1646
>> 1647 config CPU_R8000
>> 1648 bool "R8000"
>> 1649 depends on SYS_HAS_CPU_R8000
>> 1650 select CPU_HAS_PREFETCH
>> 1651 select CPU_SUPPORTS_64BIT_KERNEL
>> 1652 help
>> 1653 MIPS Technologies R8000 processors. Note these processors are
>> 1654 uncommon and the support for them is incomplete.
>> 1655
>> 1656 config CPU_R10000
>> 1657 bool "R10000"
>> 1658 depends on SYS_HAS_CPU_R10000
>> 1659 select CPU_HAS_PREFETCH
>> 1660 select CPU_SUPPORTS_32BIT_KERNEL
>> 1661 select CPU_SUPPORTS_64BIT_KERNEL
>> 1662 select CPU_SUPPORTS_HIGHMEM
>> 1663 select CPU_SUPPORTS_HUGEPAGES
>> 1664 help
>> 1665 MIPS Technologies R10000-series processors.
>> 1666
>> 1667 config CPU_RM7000
>> 1668 bool "RM7000"
>> 1669 depends on SYS_HAS_CPU_RM7000
>> 1670 select CPU_HAS_PREFETCH
>> 1671 select CPU_SUPPORTS_32BIT_KERNEL
>> 1672 select CPU_SUPPORTS_64BIT_KERNEL
>> 1673 select CPU_SUPPORTS_HIGHMEM
>> 1674 select CPU_SUPPORTS_HUGEPAGES
>> 1675
>> 1676 config CPU_SB1
>> 1677 bool "SB1"
>> 1678 depends on SYS_HAS_CPU_SB1
>> 1679 select CPU_SUPPORTS_32BIT_KERNEL
>> 1680 select CPU_SUPPORTS_64BIT_KERNEL
>> 1681 select CPU_SUPPORTS_HIGHMEM
>> 1682 select CPU_SUPPORTS_HUGEPAGES
>> 1683 select WEAK_ORDERING
>> 1684
>> 1685 config CPU_CAVIUM_OCTEON
>> 1686 bool "Cavium Octeon processor"
>> 1687 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1688 select CPU_HAS_PREFETCH
>> 1689 select CPU_SUPPORTS_64BIT_KERNEL
>> 1690 select WEAK_ORDERING
>> 1691 select CPU_SUPPORTS_HIGHMEM
>> 1692 select CPU_SUPPORTS_HUGEPAGES
>> 1693 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1694 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1695 select MIPS_L1_CACHE_SHIFT_7
>> 1696 select HAVE_KVM
>> 1697 help
>> 1698 The Cavium Octeon processor is a highly integrated chip containing
>> 1699 many ethernet hardware widgets for networking tasks. The processor
>> 1700 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1701 Full details can be found at http://www.caviumnetworks.com.
>> 1702
>> 1703 config CPU_BMIPS
>> 1704 bool "Broadcom BMIPS"
>> 1705 depends on SYS_HAS_CPU_BMIPS
>> 1706 select CPU_MIPS32
>> 1707 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1708 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1709 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1710 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1711 select CPU_SUPPORTS_32BIT_KERNEL
>> 1712 select DMA_NONCOHERENT
>> 1713 select IRQ_MIPS_CPU
>> 1714 select SWAP_IO_SPACE
>> 1715 select WEAK_ORDERING
>> 1716 select CPU_SUPPORTS_HIGHMEM
>> 1717 select CPU_HAS_PREFETCH
>> 1718 select CPU_SUPPORTS_CPUFREQ
>> 1719 select MIPS_EXTERNAL_TIMER
>> 1720 help
>> 1721 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1722
>> 1723 config CPU_XLR
>> 1724 bool "Netlogic XLR SoC"
>> 1725 depends on SYS_HAS_CPU_XLR
>> 1726 select CPU_SUPPORTS_32BIT_KERNEL
>> 1727 select CPU_SUPPORTS_64BIT_KERNEL
>> 1728 select CPU_SUPPORTS_HIGHMEM
>> 1729 select CPU_SUPPORTS_HUGEPAGES
>> 1730 select WEAK_ORDERING
>> 1731 select WEAK_REORDERING_BEYOND_LLSC
>> 1732 help
>> 1733 Netlogic Microsystems XLR/XLS processors.
>> 1734
>> 1735 config CPU_XLP
>> 1736 bool "Netlogic XLP SoC"
>> 1737 depends on SYS_HAS_CPU_XLP
>> 1738 select CPU_SUPPORTS_32BIT_KERNEL
>> 1739 select CPU_SUPPORTS_64BIT_KERNEL
>> 1740 select CPU_SUPPORTS_HIGHMEM
>> 1741 select WEAK_ORDERING
>> 1742 select WEAK_REORDERING_BEYOND_LLSC
>> 1743 select CPU_HAS_PREFETCH
>> 1744 select CPU_MIPSR2
>> 1745 select CPU_SUPPORTS_HUGEPAGES
>> 1746 select MIPS_ASID_BITS_VARIABLE
173 help 1747 help
174 Enable if core variant has Performan !! 1748 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1749 endchoice
176 <<
177 If unsure, say N. <<
178 1750
179 config XTENSA_FAKE_NMI !! 1751 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1752 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1753 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1754 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1755 help
>> 1756 Choose this option to build a kernel for release 2 or later of the
>> 1757 MIPS32 architecture including features from the 3.5 release such as
>> 1758 support for Enhanced Virtual Addressing (EVA).
>> 1759
>> 1760 config CPU_MIPS32_3_5_EVA
>> 1761 bool "Enhanced Virtual Addressing (EVA)"
>> 1762 depends on CPU_MIPS32_3_5_FEATURES
>> 1763 select EVA
>> 1764 default y
>> 1765 help
>> 1766 Choose this option if you want to enable the Enhanced Virtual
>> 1767 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1768 One of its primary benefits is an increase in the maximum size
>> 1769 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1770
>> 1771 config CPU_MIPS32_R5_FEATURES
>> 1772 bool "MIPS32 Release 5 Features"
>> 1773 depends on SYS_HAS_CPU_MIPS32_R5
>> 1774 depends on CPU_MIPS32_R2
>> 1775 help
>> 1776 Choose this option to build a kernel for release 2 or later of the
>> 1777 MIPS32 architecture including features from release 5 such as
>> 1778 support for Extended Physical Addressing (XPA).
>> 1779
>> 1780 config CPU_MIPS32_R5_XPA
>> 1781 bool "Extended Physical Addressing (XPA)"
>> 1782 depends on CPU_MIPS32_R5_FEATURES
>> 1783 depends on !EVA
>> 1784 depends on !PAGE_SIZE_4KB
>> 1785 depends on SYS_SUPPORTS_HIGHMEM
>> 1786 select XPA
>> 1787 select HIGHMEM
>> 1788 select ARCH_PHYS_ADDR_T_64BIT
182 default n 1789 default n
183 help 1790 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1791 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1792 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1793 benefit is to increase physical addressing equal to or greater
>> 1794 than 40 bits. Note that this has the side effect of turning on
>> 1795 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1796 If unsure, say 'N' here.
186 1797
187 If there are other interrupts at or !! 1798 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1799 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1800 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1801
193 If unsure, say N. !! 1802 config CPU_JUMP_WORKAROUNDS
>> 1803 bool
194 1804
195 config PFAULT !! 1805 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1806 bool "Loongson 2F Workarounds"
197 default y 1807 default y
>> 1808 select CPU_NOP_WORKAROUNDS
>> 1809 select CPU_JUMP_WORKAROUNDS
198 help 1810 help
199 Handle protection faults. MMU config !! 1811 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1812 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1813 unexpectedly. For more information please refer to the gas
>> 1814 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1815
>> 1816 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1817 are needed. The workarounds have no significant side effect on them
>> 1818 but may decrease the performance of the system so this option should
>> 1819 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1820 systems.
202 1821
203 If unsure, say Y. !! 1822 If unsure, please say Y.
>> 1823 endif # CPU_LOONGSON2F
204 1824
205 config XTENSA_UNALIGNED_USER !! 1825 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1826 bool
207 help !! 1827 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1828 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1829 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1830 select HAVE_KERNEL_LZMA
>> 1831 select HAVE_KERNEL_LZO
>> 1832 select HAVE_KERNEL_XZ
211 1833
212 Say Y here to enable unaligned memor !! 1834 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1835 bool
>> 1836 select SYS_SUPPORTS_ZBOOT
213 1837
214 config XTENSA_LOAD_STORE !! 1838 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1839 bool
216 help !! 1840 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1841
223 Say Y here to enable exception handl !! 1842 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1843 bool
>> 1844 select CPU_SUPPORTS_32BIT_KERNEL
>> 1845 select CPU_SUPPORTS_64BIT_KERNEL
>> 1846 select CPU_SUPPORTS_HIGHMEM
>> 1847 select CPU_SUPPORTS_HUGEPAGES
225 1848
226 config HAVE_SMP !! 1849 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1850 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1851 select CPU_MIPS32
229 select XTENSA_MX !! 1852 select CPU_MIPSR2
230 help !! 1853 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1854 select CPU_SUPPORTS_32BIT_KERNEL
232 supports Multiprocessing. Multiproce !! 1855 select CPU_SUPPORTS_HIGHMEM
233 the CPU core definition and currentl !! 1856 select CPU_SUPPORTS_CPUFREQ
234 1857
235 Multiprocessor support is implemente !! 1858 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1859 select SMP_UP if SMP
>> 1860 bool
237 1861
238 The MX interrupt distributer adds In !! 1862 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1863 bool
240 like the open cores ethernet driver !! 1864 select SYS_SUPPORTS_SMP
>> 1865 select SYS_SUPPORTS_HOTPLUG_CPU
241 1866
242 You still have to select "Enable SMP !! 1867 config CPU_BMIPS4380
>> 1868 bool
>> 1869 select MIPS_L1_CACHE_SHIFT_6
>> 1870 select SYS_SUPPORTS_SMP
>> 1871 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1872 select CPU_HAS_RIXI
243 1873
244 config SMP !! 1874 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1875 bool
246 depends on HAVE_SMP !! 1876 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1877 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1878 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1879 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1880 select CPU_HAS_RIXI
251 1881
252 config NR_CPUS !! 1882 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1883 bool
254 int "Maximum number of CPUs (2-32)" !! 1884 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1885 select CPU_HAS_RIXI
256 default "4" <<
257 1886
258 config HOTPLUG_CPU !! 1887 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1888 bool
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 1889
265 Say N if you want to disable CPU hot !! 1890 config SYS_HAS_CPU_LOONGSON2F
>> 1891 bool
>> 1892 select CPU_SUPPORTS_CPUFREQ
>> 1893 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1894 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1895
>> 1896 config SYS_HAS_CPU_LOONGSON1B
>> 1897 bool
>> 1898
>> 1899 config SYS_HAS_CPU_LOONGSON1C
>> 1900 bool
>> 1901
>> 1902 config SYS_HAS_CPU_MIPS32_R1
>> 1903 bool
>> 1904
>> 1905 config SYS_HAS_CPU_MIPS32_R2
>> 1906 bool
>> 1907
>> 1908 config SYS_HAS_CPU_MIPS32_R3_5
>> 1909 bool
>> 1910
>> 1911 config SYS_HAS_CPU_MIPS32_R5
>> 1912 bool
>> 1913
>> 1914 config SYS_HAS_CPU_MIPS32_R6
>> 1915 bool
>> 1916
>> 1917 config SYS_HAS_CPU_MIPS64_R1
>> 1918 bool
266 1919
267 config SECONDARY_RESET_VECTOR !! 1920 config SYS_HAS_CPU_MIPS64_R2
268 bool "Secondary cores use alternative !! 1921 bool
>> 1922
>> 1923 config SYS_HAS_CPU_MIPS64_R6
>> 1924 bool
>> 1925
>> 1926 config SYS_HAS_CPU_R3000
>> 1927 bool
>> 1928
>> 1929 config SYS_HAS_CPU_TX39XX
>> 1930 bool
>> 1931
>> 1932 config SYS_HAS_CPU_VR41XX
>> 1933 bool
>> 1934
>> 1935 config SYS_HAS_CPU_R4300
>> 1936 bool
>> 1937
>> 1938 config SYS_HAS_CPU_R4X00
>> 1939 bool
>> 1940
>> 1941 config SYS_HAS_CPU_TX49XX
>> 1942 bool
>> 1943
>> 1944 config SYS_HAS_CPU_R5000
>> 1945 bool
>> 1946
>> 1947 config SYS_HAS_CPU_R5432
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_R5500
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_R6000
>> 1954 bool
>> 1955
>> 1956 config SYS_HAS_CPU_NEVADA
>> 1957 bool
>> 1958
>> 1959 config SYS_HAS_CPU_R8000
>> 1960 bool
>> 1961
>> 1962 config SYS_HAS_CPU_R10000
>> 1963 bool
>> 1964
>> 1965 config SYS_HAS_CPU_RM7000
>> 1966 bool
>> 1967
>> 1968 config SYS_HAS_CPU_SB1
>> 1969 bool
>> 1970
>> 1971 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1972 bool
>> 1973
>> 1974 config SYS_HAS_CPU_BMIPS
>> 1975 bool
>> 1976
>> 1977 config SYS_HAS_CPU_BMIPS32_3300
>> 1978 bool
>> 1979 select SYS_HAS_CPU_BMIPS
>> 1980
>> 1981 config SYS_HAS_CPU_BMIPS4350
>> 1982 bool
>> 1983 select SYS_HAS_CPU_BMIPS
>> 1984
>> 1985 config SYS_HAS_CPU_BMIPS4380
>> 1986 bool
>> 1987 select SYS_HAS_CPU_BMIPS
>> 1988
>> 1989 config SYS_HAS_CPU_BMIPS5000
>> 1990 bool
>> 1991 select SYS_HAS_CPU_BMIPS
>> 1992
>> 1993 config SYS_HAS_CPU_XLR
>> 1994 bool
>> 1995
>> 1996 config SYS_HAS_CPU_XLP
>> 1997 bool
>> 1998
>> 1999 config MIPS_MALTA_PM
>> 2000 depends on MIPS_MALTA
>> 2001 depends on PCI
>> 2002 bool
269 default y 2003 default y
270 depends on HAVE_SMP !! 2004
>> 2005 #
>> 2006 # CPU may reorder R->R, R->W, W->R, W->W
>> 2007 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2008 #
>> 2009 config WEAK_ORDERING
>> 2010 bool
>> 2011
>> 2012 #
>> 2013 # CPU may reorder reads and writes beyond LL/SC
>> 2014 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2015 #
>> 2016 config WEAK_REORDERING_BEYOND_LLSC
>> 2017 bool
>> 2018 endmenu
>> 2019
>> 2020 #
>> 2021 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2022 #
>> 2023 config CPU_MIPS32
>> 2024 bool
>> 2025 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2026
>> 2027 config CPU_MIPS64
>> 2028 bool
>> 2029 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2030
>> 2031 #
>> 2032 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2033 #
>> 2034 config CPU_MIPSR1
>> 2035 bool
>> 2036 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2037
>> 2038 config CPU_MIPSR2
>> 2039 bool
>> 2040 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2041 select CPU_HAS_RIXI
>> 2042 select MIPS_SPRAM
>> 2043
>> 2044 config CPU_MIPSR6
>> 2045 bool
>> 2046 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2047 select CPU_HAS_RIXI
>> 2048 select HAVE_ARCH_BITREVERSE
>> 2049 select MIPS_ASID_BITS_VARIABLE
>> 2050 select MIPS_SPRAM
>> 2051
>> 2052 config EVA
>> 2053 bool
>> 2054
>> 2055 config XPA
>> 2056 bool
>> 2057
>> 2058 config SYS_SUPPORTS_32BIT_KERNEL
>> 2059 bool
>> 2060 config SYS_SUPPORTS_64BIT_KERNEL
>> 2061 bool
>> 2062 config CPU_SUPPORTS_32BIT_KERNEL
>> 2063 bool
>> 2064 config CPU_SUPPORTS_64BIT_KERNEL
>> 2065 bool
>> 2066 config CPU_SUPPORTS_CPUFREQ
>> 2067 bool
>> 2068 config CPU_SUPPORTS_ADDRWINCFG
>> 2069 bool
>> 2070 config CPU_SUPPORTS_HUGEPAGES
>> 2071 bool
>> 2072 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2073 bool
>> 2074 config MIPS_PGD_C0_CONTEXT
>> 2075 bool
>> 2076 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2077
>> 2078 #
>> 2079 # Set to y for ptrace access to watch registers.
>> 2080 #
>> 2081 config HARDWARE_WATCHPOINTS
>> 2082 bool
>> 2083 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2084
>> 2085 menu "Kernel type"
>> 2086
>> 2087 choice
>> 2088 prompt "Kernel code model"
271 help 2089 help
272 Secondary cores may be configured to !! 2090 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2091 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2092 large memory. You will only be presented a single option in this
>> 2093 menu if your system does not support both 32-bit and 64-bit kernels.
275 2094
276 config FAST_SYSCALL_XTENSA !! 2095 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2096 bool "32-bit kernel"
278 default n !! 2097 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2098 select TRAD_SIGNALS
279 help 2099 help
280 fast_syscall_xtensa is a syscall tha !! 2100 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2101
283 This syscall is deprecated. It may h !! 2102 config 64BIT
284 invalid arguments. It is provided on !! 2103 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2104 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2105 help
>> 2106 Select this option if you want to build a 64-bit kernel.
286 2107
287 If unsure, say N. !! 2108 endchoice
288 2109
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2110 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2111 bool "KVM Guest Kernel"
291 default n !! 2112 depends on BROKEN_ON_SMP
>> 2113 help
>> 2114 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2115 mode.
>> 2116
>> 2117 config KVM_GUEST_TIMER_FREQ
>> 2118 int "Count/Compare Timer Frequency (MHz)"
>> 2119 depends on KVM_GUEST
>> 2120 default 100
292 help 2121 help
293 fast_syscall_spill_registers is a sy !! 2122 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2123 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2124 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2125
297 invalid arguments. It is provided on !! 2126 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2127 bool "48 bits virtual memory"
>> 2128 depends on 64BIT
>> 2129 help
>> 2130 Support a maximum at least 48 bits of application virtual
>> 2131 memory. Default is 40 bits or less, depending on the CPU.
>> 2132 For page sizes 16k and above, this option results in a small
>> 2133 memory overhead for page tables. For 4k page size, a fourth
>> 2134 level of page tables is added which imposes both a memory
>> 2135 overhead as well as slower TLB fault handling.
299 2136
300 If unsure, say N. 2137 If unsure, say N.
301 2138
302 choice 2139 choice
303 prompt "Kernel ABI" !! 2140 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2141 default PAGE_SIZE_4KB
305 help !! 2142
306 Select ABI for the kernel code. This !! 2143 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2144 bool "4kB"
308 kernel/userspace ABI is possible and !! 2145 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2146 help
310 In case both kernel and userspace su !! 2147 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2148 R3000-family processors this is the only available page size. Using
312 build. !! 2149 4kB page size will minimize memory consumption and is therefore
313 !! 2150 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2151
315 !! 2152 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2153 bool "8kB"
317 bool "Default ABI" !! 2154 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2155 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2156 help
320 selected for the toolchain. !! 2157 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2158 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2159 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2160 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2161
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2162 config PAGE_SIZE_16KB
326 help !! 2163 bool "16kB"
327 Select this option to compile kernel !! 2164 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2165 help
329 When this option is not selected the !! 2166 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2167 the price of higher memory consumption. This option is available on
>> 2168 all non-R3000 family processors. Note that you will need a suitable
>> 2169 Linux distribution to support this.
>> 2170
>> 2171 config PAGE_SIZE_32KB
>> 2172 bool "32kB"
>> 2173 depends on CPU_CAVIUM_OCTEON
>> 2174 depends on !MIPS_VA_BITS_48
>> 2175 help
>> 2176 Using 32kB page size will result in higher performance kernel at
>> 2177 the price of higher memory consumption. This option is available
>> 2178 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2179 distribution to support this.
>> 2180
>> 2181 config PAGE_SIZE_64KB
>> 2182 bool "64kB"
>> 2183 depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
>> 2184 help
>> 2185 Using 64kB page size will result in higher performance kernel at
>> 2186 the price of higher memory consumption. This option is available on
>> 2187 all non-R3000 family processor. Not that at the time of this
>> 2188 writing this option is still high experimental.
331 2189
332 endchoice 2190 endchoice
333 2191
334 config USER_ABI_CALL0 !! 2192 config FORCE_MAX_ZONEORDER
>> 2193 int "Maximum zone order"
>> 2194 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2195 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2196 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2197 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2198 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2199 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2200 range 11 64
>> 2201 default "11"
>> 2202 help
>> 2203 The kernel memory allocator divides physically contiguous memory
>> 2204 blocks into "zones", where each zone is a power of two number of
>> 2205 pages. This option selects the largest power of two that the kernel
>> 2206 keeps in the memory allocator. If you need to allocate very large
>> 2207 blocks of physically contiguous memory, then you may need to
>> 2208 increase this value.
>> 2209
>> 2210 This config option is actually maximum order plus one. For example,
>> 2211 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2212
>> 2213 The page size is not necessarily 4KB. Keep this in mind
>> 2214 when choosing a value for this option.
>> 2215
>> 2216 config BOARD_SCACHE
335 bool 2217 bool
336 2218
337 choice !! 2219 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2220 bool
339 default USER_ABI_DEFAULT !! 2221 select BOARD_SCACHE
340 help !! 2222
341 Select supported userspace ABI. !! 2223 #
>> 2224 # Support for a MIPS32 / MIPS64 style S-caches
>> 2225 #
>> 2226 config MIPS_CPU_SCACHE
>> 2227 bool
>> 2228 select BOARD_SCACHE
342 2229
343 If unsure, choose the default ABI. !! 2230 config R5000_CPU_SCACHE
>> 2231 bool
>> 2232 select BOARD_SCACHE
>> 2233
>> 2234 config RM7000_CPU_SCACHE
>> 2235 bool
>> 2236 select BOARD_SCACHE
344 2237
345 config USER_ABI_DEFAULT !! 2238 config SIBYTE_DMA_PAGEOPS
346 bool "Default ABI only" !! 2239 bool "Use DMA to clear/copy pages"
>> 2240 depends on CPU_SB1
347 help 2241 help
348 Assume default userspace ABI. For XE !! 2242 Instead of using the CPU to zero and copy pages, use a Data Mover
349 call0 ABI binaries may be run on suc !! 2243 channel. These DMA channels are otherwise unused by the standard
350 will not work correctly for them. !! 2244 SiByte Linux port. Seems to give a small performance benefit.
>> 2245
>> 2246 config CPU_HAS_PREFETCH
>> 2247 bool
351 2248
352 config USER_ABI_CALL0_ONLY !! 2249 config CPU_GENERIC_DUMP_TLB
353 bool "Call0 ABI only" !! 2250 bool
354 select USER_ABI_CALL0 !! 2251 default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
>> 2252
>> 2253 config CPU_R4K_FPU
>> 2254 bool
>> 2255 default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2256
>> 2257 config CPU_R4K_CACHE_TLB
>> 2258 bool
>> 2259 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2260
>> 2261 config MIPS_MT_SMP
>> 2262 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2263 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2264 select CPU_MIPSR2_IRQ_VI
>> 2265 select CPU_MIPSR2_IRQ_EI
>> 2266 select SYNC_R4K
>> 2267 select MIPS_MT
>> 2268 select SMP
>> 2269 select SMP_UP
>> 2270 select SYS_SUPPORTS_SMP
>> 2271 select SYS_SUPPORTS_SCHED_SMT
>> 2272 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2273 help
>> 2274 This is a kernel model which is known as SMVP. This is supported
>> 2275 on cores with the MT ASE and uses the available VPEs to implement
>> 2276 virtual processors which supports SMP. This is equivalent to the
>> 2277 Intel Hyperthreading feature. For further information go to
>> 2278 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2279
>> 2280 config MIPS_MT
>> 2281 bool
>> 2282
>> 2283 config SCHED_SMT
>> 2284 bool "SMT (multithreading) scheduler support"
>> 2285 depends on SYS_SUPPORTS_SCHED_SMT
>> 2286 default n
355 help 2287 help
356 Select this option to support only c !! 2288 SMT scheduler support improves the CPU scheduler's decision making
357 Windowed ABI binaries will crash wit !! 2289 when dealing with MIPS MT enabled cores at a cost of slightly
358 an illegal instruction exception on !! 2290 increased overhead in some places. If unsure say N here.
359 2291
360 Choose this option if you're plannin !! 2292 config SYS_SUPPORTS_SCHED_SMT
361 built with call0 ABI. !! 2293 bool
>> 2294
>> 2295 config SYS_SUPPORTS_MULTITHREADING
>> 2296 bool
>> 2297
>> 2298 config MIPS_MT_FPAFF
>> 2299 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2300 default y
>> 2301 depends on MIPS_MT_SMP
362 2302
363 config USER_ABI_CALL0_PROBE !! 2303 config MIPSR2_TO_R6_EMULATOR
364 bool "Support both windowed and call0 !! 2304 bool "MIPS R2-to-R6 emulator"
365 select USER_ABI_CALL0 !! 2305 depends on CPU_MIPSR6
>> 2306 default y
>> 2307 help
>> 2308 Choose this option if you want to run non-R6 MIPS userland code.
>> 2309 Even if you say 'Y' here, the emulator will still be disabled by
>> 2310 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2311 The only reason this is a build-time option is to save ~14K from the
>> 2312 final kernel image.
>> 2313
>> 2314 config MIPS_VPE_LOADER
>> 2315 bool "VPE loader support."
>> 2316 depends on SYS_SUPPORTS_MULTITHREADING && MODULES
>> 2317 select CPU_MIPSR2_IRQ_VI
>> 2318 select CPU_MIPSR2_IRQ_EI
>> 2319 select MIPS_MT
366 help 2320 help
367 Select this option to support both w !! 2321 Includes a loader for loading an elf relocatable object
368 ABIs. When enabled all processes are !! 2322 onto another VPE and running it.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 2323
373 This option should be enabled for th !! 2324 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2325 bool
>> 2326 default "y"
>> 2327 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2328
376 Note that Xtensa ISA does not guaran !! 2329 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2330 bool
378 PS.WOE is disabled, check whether th !! 2331 default "y"
>> 2332 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2333
380 endchoice !! 2334 config MIPS_VPE_LOADER_TOM
>> 2335 bool "Load VPE program into memory hidden from linux"
>> 2336 depends on MIPS_VPE_LOADER
>> 2337 default y
>> 2338 help
>> 2339 The loader can use memory that is present but has been hidden from
>> 2340 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2341 you to ensure the amount you put in the option and the space your
>> 2342 program requires is less or equal to the amount physically present.
381 2343
382 endmenu !! 2344 config MIPS_VPE_APSP_API
>> 2345 bool "Enable support for AP/SP API (RTLX)"
>> 2346 depends on MIPS_VPE_LOADER
>> 2347 help
383 2348
384 config XTENSA_CALIBRATE_CCOUNT !! 2349 config MIPS_VPE_APSP_API_CMP
385 def_bool n !! 2350 bool
>> 2351 default "y"
>> 2352 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2353
>> 2354 config MIPS_VPE_APSP_API_MT
>> 2355 bool
>> 2356 default "y"
>> 2357 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2358
>> 2359 config MIPS_CMP
>> 2360 bool "MIPS CMP framework support (DEPRECATED)"
>> 2361 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2362 select SMP
>> 2363 select SYNC_R4K
>> 2364 select SYS_SUPPORTS_SMP
>> 2365 select WEAK_ORDERING
>> 2366 default n
386 help 2367 help
387 On some platforms (XT2000, for examp !! 2368 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2369 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2370 its ability to start secondary CPUs.
>> 2371
>> 2372 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2373 instead of this.
>> 2374
>> 2375 config MIPS_CPS
>> 2376 bool "MIPS Coherent Processing System support"
>> 2377 depends on SYS_SUPPORTS_MIPS_CPS
>> 2378 select MIPS_CM
>> 2379 select MIPS_CPC
>> 2380 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2381 select SMP
>> 2382 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2383 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2384 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2385 select SYS_SUPPORTS_SMP
>> 2386 select WEAK_ORDERING
>> 2387 help
>> 2388 Select this if you wish to run an SMP kernel across multiple cores
>> 2389 within a MIPS Coherent Processing System. When this option is
>> 2390 enabled the kernel will probe for other cores and boot them with
>> 2391 no external assistance. It is safe to enable this when hardware
>> 2392 support is unavailable.
>> 2393
>> 2394 config MIPS_CPS_PM
>> 2395 depends on MIPS_CPS
>> 2396 select MIPS_CPC
>> 2397 bool
390 2398
391 config SERIAL_CONSOLE !! 2399 config MIPS_CM
392 def_bool n !! 2400 bool
>> 2401
>> 2402 config MIPS_CPC
>> 2403 bool
>> 2404
>> 2405 config SB1_PASS_2_WORKAROUNDS
>> 2406 bool
>> 2407 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2408 default y
>> 2409
>> 2410 config SB1_PASS_2_1_WORKAROUNDS
>> 2411 bool
>> 2412 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2413 default y
393 2414
394 config PLATFORM_HAVE_XIP <<
395 def_bool n <<
396 2415
397 menu "Platform options" !! 2416 config ARCH_PHYS_ADDR_T_64BIT
>> 2417 bool
398 2418
399 choice 2419 choice
400 prompt "Xtensa System Type" !! 2420 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS !! 2421
>> 2422 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2423 bool "None"
>> 2424 help
>> 2425 Select this if you want neither microMIPS nor SmartMIPS support
402 2426
403 config XTENSA_PLATFORM_ISS !! 2427 config CPU_HAS_SMARTMIPS
404 bool "ISS" !! 2428 depends on SYS_SUPPORTS_SMARTMIPS
405 select XTENSA_CALIBRATE_CCOUNT !! 2429 bool "SmartMIPS"
406 select SERIAL_CONSOLE !! 2430 help
407 help !! 2431 SmartMIPS is a extension of the MIPS32 architecture aimed at
408 ISS is an acronym for Tensilica's In !! 2432 increased security at both hardware and software level for
409 !! 2433 smartcards. Enabling this option will allow proper use of the
410 config XTENSA_PLATFORM_XT2000 !! 2434 SmartMIPS instructions by Linux applications. However a kernel with
411 bool "XT2000" !! 2435 this option will not work on a MIPS core without SmartMIPS core. If
412 help !! 2436 you don't know you probably don't have SmartMIPS and should say N
413 XT2000 is the name of Tensilica's fe !! 2437 here.
414 This hardware is capable of running !! 2438
415 !! 2439 config CPU_MICROMIPS
416 config XTENSA_PLATFORM_XTFPGA !! 2440 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
417 bool "XTFPGA" !! 2441 bool "microMIPS"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2442 help
424 XTFPGA is the name of Tensilica boar !! 2443 When this option is enabled the kernel will be built using the
425 This hardware is capable of running !! 2444 microMIPS ISA
426 2445
427 endchoice 2446 endchoice
428 2447
429 config PLATFORM_NR_IRQS !! 2448 config CPU_HAS_MSA
>> 2449 bool "Support for the MIPS SIMD Architecture"
>> 2450 depends on CPU_SUPPORTS_MSA
>> 2451 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2452 help
>> 2453 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2454 and a set of SIMD instructions to operate on them. When this option
>> 2455 is enabled the kernel will support allocating & switching MSA
>> 2456 vector register contexts. If you know that your kernel will only be
>> 2457 running on CPUs which do not support MSA or that your userland will
>> 2458 not be making use of it then you may wish to say N here to reduce
>> 2459 the size & complexity of your kernel.
>> 2460
>> 2461 If unsure, say Y.
>> 2462
>> 2463 config CPU_HAS_WB
>> 2464 bool
>> 2465
>> 2466 config XKS01
>> 2467 bool
>> 2468
>> 2469 config CPU_HAS_RIXI
>> 2470 bool
>> 2471
>> 2472 #
>> 2473 # Vectored interrupt mode is an R2 feature
>> 2474 #
>> 2475 config CPU_MIPSR2_IRQ_VI
>> 2476 bool
>> 2477
>> 2478 #
>> 2479 # Extended interrupt mode is an R2 feature
>> 2480 #
>> 2481 config CPU_MIPSR2_IRQ_EI
>> 2482 bool
>> 2483
>> 2484 config CPU_HAS_SYNC
>> 2485 bool
>> 2486 depends on !CPU_R3000
>> 2487 default y
>> 2488
>> 2489 #
>> 2490 # CPU non-features
>> 2491 #
>> 2492 config CPU_DADDI_WORKAROUNDS
>> 2493 bool
>> 2494
>> 2495 config CPU_R4000_WORKAROUNDS
>> 2496 bool
>> 2497 select CPU_R4400_WORKAROUNDS
>> 2498
>> 2499 config CPU_R4400_WORKAROUNDS
>> 2500 bool
>> 2501
>> 2502 config MIPS_ASID_SHIFT
430 int 2503 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2504 default 6 if CPU_R3000 || CPU_TX39XX
>> 2505 default 4 if CPU_R8000
432 default 0 2506 default 0
433 2507
434 config XTENSA_CPU_CLOCK !! 2508 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2509 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2510 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2511 default 6 if CPU_R3000 || CPU_TX39XX
>> 2512 default 8
438 2513
439 config GENERIC_CALIBRATE_DELAY !! 2514 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2515 bool
>> 2516
>> 2517 #
>> 2518 # - Highmem only makes sense for the 32-bit kernel.
>> 2519 # - The current highmem code will only work properly on physically indexed
>> 2520 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2521 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2522 # moment we protect the user and offer the highmem option only on machines
>> 2523 # where it's known to be safe. This will not offer highmem on a few systems
>> 2524 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2525 # indexed CPUs but we're playing safe.
>> 2526 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2527 # know they might have memory configurations that could make use of highmem
>> 2528 # support.
>> 2529 #
>> 2530 config HIGHMEM
>> 2531 bool "High Memory Support"
>> 2532 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2533
>> 2534 config CPU_SUPPORTS_HIGHMEM
>> 2535 bool
>> 2536
>> 2537 config SYS_SUPPORTS_HIGHMEM
>> 2538 bool
>> 2539
>> 2540 config SYS_SUPPORTS_SMARTMIPS
>> 2541 bool
>> 2542
>> 2543 config SYS_SUPPORTS_MICROMIPS
>> 2544 bool
>> 2545
>> 2546 config SYS_SUPPORTS_MIPS16
>> 2547 bool
441 help 2548 help
442 The BogoMIPS value can easily be der !! 2549 This option must be set if a kernel might be executed on a MIPS16-
>> 2550 enabled CPU even if MIPS16 is not actually being used. In other
>> 2551 words, it makes the kernel MIPS16-tolerant.
443 2552
444 config CMDLINE_BOOL !! 2553 config CPU_SUPPORTS_MSA
445 bool "Default bootloader kernel argume !! 2554 bool
446 2555
447 config CMDLINE !! 2556 config ARCH_FLATMEM_ENABLE
448 string "Initial kernel command string" !! 2557 def_bool y
449 depends on CMDLINE_BOOL !! 2558 depends on !NUMA && !CPU_LOONGSON2
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2559
458 config USE_OF !! 2560 config ARCH_DISCONTIGMEM_ENABLE
459 bool "Flattened Device Tree support" !! 2561 bool
460 select OF !! 2562 default y if SGI_IP27
461 select OF_EARLY_FLATTREE <<
462 help 2563 help
463 Include support for flattened device !! 2564 Say Y to support efficient handling of discontiguous physical memory,
>> 2565 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2566 or have huge holes in the physical address space for other reasons.
>> 2567 See <file:Documentation/vm/numa> for more.
464 2568
465 config BUILTIN_DTB_SOURCE !! 2569 config ARCH_SPARSEMEM_ENABLE
466 string "DTB to build into the kernel i !! 2570 bool
467 depends on OF !! 2571 select SPARSEMEM_STATIC
>> 2572
>> 2573 config NUMA
>> 2574 bool "NUMA Support"
>> 2575 depends on SYS_SUPPORTS_NUMA
>> 2576 help
>> 2577 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2578 Access). This option improves performance on systems with more
>> 2579 than two nodes; on two node systems it is generally better to
>> 2580 leave it disabled; on single node systems disable this option
>> 2581 disabled.
>> 2582
>> 2583 config SYS_SUPPORTS_NUMA
>> 2584 bool
>> 2585
>> 2586 config RELOCATABLE
>> 2587 bool "Relocatable kernel"
>> 2588 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2589 help
>> 2590 This builds a kernel image that retains relocation information
>> 2591 so it can be loaded someplace besides the default 1MB.
>> 2592 The relocations make the kernel binary about 15% larger,
>> 2593 but are discarded at runtime
>> 2594
>> 2595 config RELOCATION_TABLE_SIZE
>> 2596 hex "Relocation table size"
>> 2597 depends on RELOCATABLE
>> 2598 range 0x0 0x01000000
>> 2599 default "0x00100000"
>> 2600 ---help---
>> 2601 A table of relocation data will be appended to the kernel binary
>> 2602 and parsed at boot to fix up the relocated kernel.
>> 2603
>> 2604 This option allows the amount of space reserved for the table to be
>> 2605 adjusted, although the default of 1Mb should be ok in most cases.
>> 2606
>> 2607 The build will fail and a valid size suggested if this is too small.
>> 2608
>> 2609 If unsure, leave at the default value.
>> 2610
>> 2611 config RANDOMIZE_BASE
>> 2612 bool "Randomize the address of the kernel image"
>> 2613 depends on RELOCATABLE
>> 2614 ---help---
>> 2615 Randomizes the physical and virtual address at which the
>> 2616 kernel image is loaded, as a security feature that
>> 2617 deters exploit attempts relying on knowledge of the location
>> 2618 of kernel internals.
>> 2619
>> 2620 Entropy is generated using any coprocessor 0 registers available.
>> 2621
>> 2622 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2623
>> 2624 If unsure, say N.
>> 2625
>> 2626 config RANDOMIZE_BASE_MAX_OFFSET
>> 2627 hex "Maximum kASLR offset" if EXPERT
>> 2628 depends on RANDOMIZE_BASE
>> 2629 range 0x0 0x40000000 if EVA || 64BIT
>> 2630 range 0x0 0x08000000
>> 2631 default "0x01000000"
>> 2632 ---help---
>> 2633 When kASLR is active, this provides the maximum offset that will
>> 2634 be applied to the kernel image. It should be set according to the
>> 2635 amount of physical RAM available in the target system minus
>> 2636 PHYSICAL_START and must be a power of 2.
468 2637
469 config PARSE_BOOTPARAM !! 2638 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
470 bool "Parse bootparam block" !! 2639 EVA or 64-bit. The default is 16Mb.
>> 2640
>> 2641 config NODES_SHIFT
>> 2642 int
>> 2643 default "6"
>> 2644 depends on NEED_MULTIPLE_NODES
>> 2645
>> 2646 config HW_PERF_EVENTS
>> 2647 bool "Enable hardware performance counter support for perf events"
>> 2648 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
471 default y 2649 default y
472 help 2650 help
473 Parse parameters passed to the kerne !! 2651 Enable hardware performance counter support for perf events. If
474 be disabled if the kernel is known t !! 2652 disabled, perf events will use software events only.
475 2653
476 If unsure, say Y. !! 2654 source "mm/Kconfig"
477 2655
478 choice !! 2656 config SMP
479 prompt "Semihosting interface" !! 2657 bool "Multi-Processing support"
480 default XTENSA_SIMCALL_ISS !! 2658 depends on SYS_SUPPORTS_SMP
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2659 help
483 Choose semihosting interface that wi !! 2660 This enables support for systems with more than one CPU. If you have
484 block device and networking. !! 2661 a system with only one CPU, say N. If you have a system with more
>> 2662 than one CPU, say Y.
>> 2663
>> 2664 If you say N here, the kernel will run on uni- and multiprocessor
>> 2665 machines, but will use only one CPU of a multiprocessor machine. If
>> 2666 you say Y here, the kernel will run on many, but not all,
>> 2667 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2668 will run faster if you say N here.
485 2669
486 config XTENSA_SIMCALL_ISS !! 2670 People using multiprocessor machines who say Y here should also say
487 bool "simcall" !! 2671 Y to "Enhanced Real Time Clock Support", below.
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2672
492 config XTENSA_SIMCALL_GDBIO !! 2673 See also the SMP-HOWTO available at
493 bool "GDBIO" !! 2674 <http://www.tldp.org/docs.html#howto>.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 2675
498 endchoice !! 2676 If you don't know what to do here, say N.
499 2677
500 config BLK_DEV_SIMDISK !! 2678 config HOTPLUG_CPU
501 tristate "Host file-based simulated bl !! 2679 bool "Support for hot-pluggable CPUs"
502 default n !! 2680 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2681 help
541 There's a 2x16 LCD on most of XTFPGA !! 2682 Say Y here to allow turning CPUs off and on. CPUs can be
542 progress messages there during bootu !! 2683 controlled through /sys/devices/system/cpu.
543 during board bringup. !! 2684 (Note: power management support will enable this option
>> 2685 automatically on SMP systems. )
>> 2686 Say N if you want to disable CPU hotplug.
544 2687
545 If unsure, say N. !! 2688 config SMP_UP
>> 2689 bool
546 2690
547 config XTFPGA_LCD_BASE_ADDR !! 2691 config SYS_SUPPORTS_MIPS_CMP
548 hex "XTFPGA LCD base address" !! 2692 bool
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2693
617 If unsure, say N. !! 2694 config SYS_SUPPORTS_MIPS_CPS
>> 2695 bool
>> 2696
>> 2697 config SYS_SUPPORTS_SMP
>> 2698 bool
>> 2699
>> 2700 config NR_CPUS_DEFAULT_4
>> 2701 bool
618 2702
619 config MEMMAP_CACHEATTR !! 2703 config NR_CPUS_DEFAULT_8
620 hex "Cache attributes for the memory a !! 2704 bool
621 depends on !MMU <<
622 default 0x22222222 <<
623 help <<
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2705
683 If unsure, leave the default value h !! 2706 config NR_CPUS_DEFAULT_16
>> 2707 bool
>> 2708
>> 2709 config NR_CPUS_DEFAULT_32
>> 2710 bool
>> 2711
>> 2712 config NR_CPUS_DEFAULT_64
>> 2713 bool
>> 2714
>> 2715 config NR_CPUS
>> 2716 int "Maximum number of CPUs (2-256)"
>> 2717 range 2 256
>> 2718 depends on SMP
>> 2719 default "4" if NR_CPUS_DEFAULT_4
>> 2720 default "8" if NR_CPUS_DEFAULT_8
>> 2721 default "16" if NR_CPUS_DEFAULT_16
>> 2722 default "32" if NR_CPUS_DEFAULT_32
>> 2723 default "64" if NR_CPUS_DEFAULT_64
>> 2724 help
>> 2725 This allows you to specify the maximum number of CPUs which this
>> 2726 kernel will support. The maximum supported value is 32 for 32-bit
>> 2727 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2728 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2729 and 2 for all others.
>> 2730
>> 2731 This is purely to save memory - each supported CPU adds
>> 2732 approximately eight kilobytes to the kernel image. For best
>> 2733 performance should round up your number of processors to the next
>> 2734 power of two.
>> 2735
>> 2736 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2737 bool
>> 2738
>> 2739 #
>> 2740 # Timer Interrupt Frequency Configuration
>> 2741 #
684 2742
685 choice 2743 choice
686 prompt "Relocatable vectors location" !! 2744 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2745 default HZ_250
688 help 2746 help
689 Choose whether relocatable vectors a !! 2747 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2748
691 configurations without VECBASE regis !! 2749 config HZ_24
692 placed at their hardware-defined loc !! 2750 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2751
694 config XTENSA_VECTORS_IN_TEXT !! 2752 config HZ_48
695 bool "Merge relocatable vectors into k !! 2753 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2754
697 help !! 2755 config HZ_100
698 This option puts relocatable vectors !! 2756 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2757
700 This is a safe choice for most confi !! 2758 config HZ_128
701 !! 2759 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2760
703 bool "Put relocatable vectors at fixed !! 2761 config HZ_250
704 help !! 2762 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2763
706 Vectors are merged with the .init da !! 2764 config HZ_256
707 are copied into their designated loc !! 2765 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2766
709 XIP-aware MTD support. !! 2767 config HZ_1000
>> 2768 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2769
>> 2770 config HZ_1024
>> 2771 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2772
711 endchoice 2773 endchoice
712 2774
713 config VECTORS_ADDR !! 2775 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2776 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2777
729 config PLATFORM_WANT_DEFAULT_MEM !! 2778 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2779 bool
731 2780
732 config DEFAULT_MEM_START !! 2781 config SYS_SUPPORTS_100HZ
733 hex !! 2782 bool
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2783
735 default 0x60000000 if PLATFORM_WANT_DE !! 2784 config SYS_SUPPORTS_128HZ
736 default 0x00000000 !! 2785 bool
>> 2786
>> 2787 config SYS_SUPPORTS_250HZ
>> 2788 bool
>> 2789
>> 2790 config SYS_SUPPORTS_256HZ
>> 2791 bool
>> 2792
>> 2793 config SYS_SUPPORTS_1000HZ
>> 2794 bool
>> 2795
>> 2796 config SYS_SUPPORTS_1024HZ
>> 2797 bool
>> 2798
>> 2799 config SYS_SUPPORTS_ARBIT_HZ
>> 2800 bool
>> 2801 default y if !SYS_SUPPORTS_24HZ && \
>> 2802 !SYS_SUPPORTS_48HZ && \
>> 2803 !SYS_SUPPORTS_100HZ && \
>> 2804 !SYS_SUPPORTS_128HZ && \
>> 2805 !SYS_SUPPORTS_250HZ && \
>> 2806 !SYS_SUPPORTS_256HZ && \
>> 2807 !SYS_SUPPORTS_1000HZ && \
>> 2808 !SYS_SUPPORTS_1024HZ
>> 2809
>> 2810 config HZ
>> 2811 int
>> 2812 default 24 if HZ_24
>> 2813 default 48 if HZ_48
>> 2814 default 100 if HZ_100
>> 2815 default 128 if HZ_128
>> 2816 default 250 if HZ_250
>> 2817 default 256 if HZ_256
>> 2818 default 1000 if HZ_1000
>> 2819 default 1024 if HZ_1024
>> 2820
>> 2821 config SCHED_HRTICK
>> 2822 def_bool HIGH_RES_TIMERS
>> 2823
>> 2824 source "kernel/Kconfig.preempt"
>> 2825
>> 2826 config KEXEC
>> 2827 bool "Kexec system call"
>> 2828 select KEXEC_CORE
>> 2829 help
>> 2830 kexec is a system call that implements the ability to shutdown your
>> 2831 current kernel, and to start another kernel. It is like a reboot
>> 2832 but it is independent of the system firmware. And like a reboot
>> 2833 you can start any kernel with it, not just Linux.
>> 2834
>> 2835 The name comes from the similarity to the exec system call.
>> 2836
>> 2837 It is an ongoing process to be certain the hardware in a machine
>> 2838 is properly shutdown, so do not be surprised if this code does not
>> 2839 initially work for you. As of this writing the exact hardware
>> 2840 interface is strongly in flux, so no good recommendation can be
>> 2841 made.
>> 2842
>> 2843 config CRASH_DUMP
>> 2844 bool "Kernel crash dumps"
>> 2845 help
>> 2846 Generate crash dump after being started by kexec.
>> 2847 This should be normally only set in special crash dump kernels
>> 2848 which are loaded in the main kernel with kexec-tools into
>> 2849 a specially reserved region and then later executed after
>> 2850 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2851 to a memory address not used by the main kernel or firmware using
>> 2852 PHYSICAL_START.
>> 2853
>> 2854 config PHYSICAL_START
>> 2855 hex "Physical address where the kernel is loaded"
>> 2856 default "0xffffffff84000000" if 64BIT
>> 2857 default "0x84000000" if 32BIT
>> 2858 depends on CRASH_DUMP
>> 2859 help
>> 2860 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2861 If you plan to use kernel for capturing the crash dump change
>> 2862 this value to start of the reserved region (the "X" value as
>> 2863 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2864 passed to the panic-ed kernel).
>> 2865
>> 2866 config SECCOMP
>> 2867 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2868 depends on PROC_FS
>> 2869 default y
737 help 2870 help
738 This is the base address used for bo !! 2871 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2872 that may need to compute untrusted bytecode during their
>> 2873 execution. By using pipes or other transports made available to
>> 2874 the process as file descriptors supporting the read/write
>> 2875 syscalls, it's possible to isolate those applications in
>> 2876 their own address space using seccomp. Once seccomp is
>> 2877 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2878 and the task is only allowed to execute a few safe syscalls
>> 2879 defined by each seccomp mode.
>> 2880
>> 2881 If unsure, say Y. Only embedded should say N here.
>> 2882
>> 2883 config MIPS_O32_FP64_SUPPORT
>> 2884 bool "Support for O32 binaries using 64-bit FP"
>> 2885 depends on 32BIT || MIPS32_O32
>> 2886 help
>> 2887 When this is enabled, the kernel will support use of 64-bit floating
>> 2888 point registers with binaries using the O32 ABI along with the
>> 2889 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2890 32-bit MIPS systems this support is at the cost of increasing the
>> 2891 size and complexity of the compiled FPU emulator. Thus if you are
>> 2892 running a MIPS32 system and know that none of your userland binaries
>> 2893 will require 64-bit floating point, you may wish to reduce the size
>> 2894 of your kernel & potentially improve FP emulation performance by
>> 2895 saying N here.
>> 2896
>> 2897 Although binutils currently supports use of this flag the details
>> 2898 concerning its effect upon the O32 ABI in userland are still being
>> 2899 worked on. In order to avoid userland becoming dependant upon current
>> 2900 behaviour before the details have been finalised, this option should
>> 2901 be considered experimental and only enabled by those working upon
>> 2902 said details.
740 2903
741 If unsure, leave the default value h !! 2904 If unsure, say N.
>> 2905
>> 2906 config USE_OF
>> 2907 bool
>> 2908 select OF
>> 2909 select OF_EARLY_FLATTREE
>> 2910 select IRQ_DOMAIN
>> 2911
>> 2912 config BUILTIN_DTB
>> 2913 bool
742 2914
743 choice 2915 choice
744 prompt "KSEG layout" !! 2916 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2917 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2918
>> 2919 config MIPS_NO_APPENDED_DTB
>> 2920 bool "None"
>> 2921 help
>> 2922 Do not enable appended dtb support.
>> 2923
>> 2924 config MIPS_ELF_APPENDED_DTB
>> 2925 bool "vmlinux"
>> 2926 help
>> 2927 With this option, the boot code will look for a device tree binary
>> 2928 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2929 it is empty and the DTB can be appended using binutils command
>> 2930 objcopy:
>> 2931
>> 2932 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2933
>> 2934 This is meant as a backward compatiblity convenience for those
>> 2935 systems with a bootloader that can't be upgraded to accommodate
>> 2936 the documented boot protocol using a device tree.
>> 2937
>> 2938 config MIPS_RAW_APPENDED_DTB
>> 2939 bool "vmlinux.bin or vmlinuz.bin"
>> 2940 help
>> 2941 With this option, the boot code will look for a device tree binary
>> 2942 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2943 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2944
>> 2945 This is meant as a backward compatibility convenience for those
>> 2946 systems with a bootloader that can't be upgraded to accommodate
>> 2947 the documented boot protocol using a device tree.
>> 2948
>> 2949 Beware that there is very little in terms of protection against
>> 2950 this option being confused by leftover garbage in memory that might
>> 2951 look like a DTB header after a reboot if no actual DTB is appended
>> 2952 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2953 if you don't intend to always append a DTB.
772 endchoice 2954 endchoice
773 2955
774 config HIGHMEM !! 2956 choice
775 bool "High Memory Support" !! 2957 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2958 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2959 !MIPS_MALTA && \
>> 2960 !CAVIUM_OCTEON_SOC
>> 2961 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2962
>> 2963 config MIPS_CMDLINE_FROM_DTB
>> 2964 depends on USE_OF
>> 2965 bool "Dtb kernel arguments if available"
>> 2966
>> 2967 config MIPS_CMDLINE_DTB_EXTEND
>> 2968 depends on USE_OF
>> 2969 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2970
>> 2971 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2972 bool "Bootloader kernel arguments if available"
>> 2973
>> 2974 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2975 depends on CMDLINE_BOOL
>> 2976 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2977 endchoice
>> 2978
>> 2979 endmenu
>> 2980
>> 2981 config LOCKDEP_SUPPORT
>> 2982 bool
>> 2983 default y
>> 2984
>> 2985 config STACKTRACE_SUPPORT
>> 2986 bool
>> 2987 default y
>> 2988
>> 2989 config HAVE_LATENCYTOP_SUPPORT
>> 2990 bool
>> 2991 default y
>> 2992
>> 2993 config PGTABLE_LEVELS
>> 2994 int
>> 2995 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2996 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2997 default 2
>> 2998
>> 2999 source "init/Kconfig"
>> 3000
>> 3001 source "kernel/Kconfig.freezer"
>> 3002
>> 3003 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3004
>> 3005 config HW_HAS_EISA
>> 3006 bool
>> 3007 config HW_HAS_PCI
>> 3008 bool
>> 3009
>> 3010 config PCI
>> 3011 bool "Support for PCI controller"
>> 3012 depends on HW_HAS_PCI
>> 3013 select PCI_DOMAINS
>> 3014 help
>> 3015 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3016 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3017 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3018 say Y, otherwise N.
>> 3019
>> 3020 config HT_PCI
>> 3021 bool "Support for HT-linked PCI"
>> 3022 default y
>> 3023 depends on CPU_LOONGSON3
>> 3024 select PCI
>> 3025 select PCI_DOMAINS
>> 3026 help
>> 3027 Loongson family machines use Hyper-Transport bus for inter-core
>> 3028 connection and device connection. The PCI bus is a subordinate
>> 3029 linked at HT. Choose Y for Loongson-3 based machines.
>> 3030
>> 3031 config PCI_DOMAINS
>> 3032 bool
>> 3033
>> 3034 config PCI_DOMAINS_GENERIC
>> 3035 bool
>> 3036
>> 3037 config PCI_DRIVERS_GENERIC
>> 3038 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3039 bool
>> 3040
>> 3041 config PCI_DRIVERS_LEGACY
>> 3042 def_bool !PCI_DRIVERS_GENERIC
>> 3043 select NO_GENERIC_PCI_IOPORT_MAP
>> 3044
>> 3045 source "drivers/pci/Kconfig"
>> 3046
>> 3047 #
>> 3048 # ISA support is now enabled via select. Too many systems still have the one
>> 3049 # or other ISA chip on the board that users don't know about so don't expect
>> 3050 # users to choose the right thing ...
>> 3051 #
>> 3052 config ISA
>> 3053 bool
>> 3054
>> 3055 config EISA
>> 3056 bool "EISA support"
>> 3057 depends on HW_HAS_EISA
>> 3058 select ISA
>> 3059 select GENERIC_ISA_DMA
>> 3060 ---help---
>> 3061 The Extended Industry Standard Architecture (EISA) bus was
>> 3062 developed as an open alternative to the IBM MicroChannel bus.
>> 3063
>> 3064 The EISA bus provided some of the features of the IBM MicroChannel
>> 3065 bus while maintaining backward compatibility with cards made for
>> 3066 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3067 1995 when it was made obsolete by the PCI bus.
>> 3068
>> 3069 Say Y here if you are building a kernel for an EISA-based machine.
>> 3070
>> 3071 Otherwise, say N.
>> 3072
>> 3073 source "drivers/eisa/Kconfig"
>> 3074
>> 3075 config TC
>> 3076 bool "TURBOchannel support"
>> 3077 depends on MACH_DECSTATION
>> 3078 help
>> 3079 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3080 processors. TURBOchannel programming specifications are available
>> 3081 at:
>> 3082 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3083 and:
>> 3084 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3085 Linux driver support status is documented at:
>> 3086 <http://www.linux-mips.org/wiki/DECstation>
>> 3087
>> 3088 config MMU
>> 3089 bool
>> 3090 default y
>> 3091
>> 3092 config ARCH_MMAP_RND_BITS_MIN
>> 3093 default 12 if 64BIT
>> 3094 default 8
>> 3095
>> 3096 config ARCH_MMAP_RND_BITS_MAX
>> 3097 default 18 if 64BIT
>> 3098 default 15
>> 3099
>> 3100 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3101 default 8
>> 3102
>> 3103 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3104 default 15
>> 3105
>> 3106 config I8253
>> 3107 bool
>> 3108 select CLKSRC_I8253
>> 3109 select CLKEVT_I8253
>> 3110 select MIPS_EXTERNAL_TIMER
>> 3111
>> 3112 config ZONE_DMA
>> 3113 bool
>> 3114
>> 3115 config ZONE_DMA32
>> 3116 bool
>> 3117
>> 3118 source "drivers/pcmcia/Kconfig"
>> 3119
>> 3120 config RAPIDIO
>> 3121 tristate "RapidIO support"
>> 3122 depends on PCI
>> 3123 default n
778 help 3124 help
779 Linux can use the full amount of RAM !! 3125 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3126 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3127
782 at 0xd0000000 (cached) and 0xd800000 !! 3128 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3129
784 all of it can be "permanently mapped !! 3130 endmenu
785 The physical memory that's not perma !! 3131
786 "high memory". !! 3132 menu "Executable file formats"
787 !! 3133
788 If you are compiling a kernel which !! 3134 source "fs/Kconfig.binfmt"
789 machine with more than 128 MB total !! 3135
790 N here. !! 3136 config TRAD_SIGNALS
>> 3137 bool
>> 3138
>> 3139 config MIPS32_COMPAT
>> 3140 bool
>> 3141
>> 3142 config COMPAT
>> 3143 bool
>> 3144
>> 3145 config SYSVIPC_COMPAT
>> 3146 bool
>> 3147
>> 3148 config MIPS32_O32
>> 3149 bool "Kernel support for o32 binaries"
>> 3150 depends on 64BIT
>> 3151 select ARCH_WANT_OLD_COMPAT_IPC
>> 3152 select COMPAT
>> 3153 select MIPS32_COMPAT
>> 3154 select SYSVIPC_COMPAT if SYSVIPC
>> 3155 help
>> 3156 Select this option if you want to run o32 binaries. These are pure
>> 3157 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3158 existing binaries are in this format.
791 3159
792 If unsure, say Y. 3160 If unsure, say Y.
793 3161
794 config ARCH_FORCE_MAX_ORDER !! 3162 config MIPS32_N32
795 int "Order of maximal physically conti !! 3163 bool "Kernel support for n32 binaries"
796 default "10" !! 3164 depends on 64BIT
797 help !! 3165 select COMPAT
798 The kernel page allocator limits the !! 3166 select MIPS32_COMPAT
799 contiguous allocations. The limit is !! 3167 select SYSVIPC_COMPAT if SYSVIPC
800 defines the maximal power of two of !! 3168 help
801 allocated as a single contiguous blo !! 3169 Select this option if you want to run n32 binaries. These are
802 overriding the default setting when !! 3170 64-bit binaries using 32-bit quantities for addressing and certain
803 large blocks of physically contiguou !! 3171 data that would normally be 64-bit. They are used in special
>> 3172 cases.
>> 3173
>> 3174 If unsure, say N.
804 3175
805 Don't change if unsure. !! 3176 config BINFMT_ELF32
>> 3177 bool
>> 3178 default y if MIPS32_O32 || MIPS32_N32
>> 3179 select ELFCORE
806 3180
807 endmenu 3181 endmenu
808 3182
809 menu "Power management options" 3183 menu "Power management options"
810 3184
811 config ARCH_HIBERNATION_POSSIBLE 3185 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3186 def_bool y
>> 3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3188
>> 3189 config ARCH_SUSPEND_POSSIBLE
>> 3190 def_bool y
>> 3191 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3192
814 source "kernel/power/Kconfig" 3193 source "kernel/power/Kconfig"
815 3194
816 endmenu 3195 endmenu
>> 3196
>> 3197 config MIPS_EXTERNAL_TIMER
>> 3198 bool
>> 3199
>> 3200 menu "CPU Power Management"
>> 3201
>> 3202 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3203 source "drivers/cpufreq/Kconfig"
>> 3204 endif
>> 3205
>> 3206 source "drivers/cpuidle/Kconfig"
>> 3207
>> 3208 endmenu
>> 3209
>> 3210 source "net/Kconfig"
>> 3211
>> 3212 source "drivers/Kconfig"
>> 3213
>> 3214 source "drivers/firmware/Kconfig"
>> 3215
>> 3216 source "fs/Kconfig"
>> 3217
>> 3218 source "arch/mips/Kconfig.debug"
>> 3219
>> 3220 source "security/Kconfig"
>> 3221
>> 3222 source "crypto/Kconfig"
>> 3223
>> 3224 source "lib/Kconfig"
>> 3225
>> 3226 source "arch/mips/kvm/Kconfig"
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