1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_BINFMT_ELF_STATE
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_DISCARD_MEMBLOCK
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_HAS_ELF_RANDOMIZE
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_MIGHT_HAVE_PC_PARPORT
11 select ARCH_HAS_KCOV !! 11 select ARCH_MIGHT_HAVE_PC_SERIO
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_SUPPORTS_UPROBES
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 select ARCH_USE_BUILTIN_BSWAP
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 14 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 15 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 16 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 17 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 18 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 19 select CLONE_BACKWARDS
24 select COMMON_CLK !! 20 select CPU_PM if CPU_IDLE
25 select DMA_NONCOHERENT_MMAP if MMU !! 21 select GENERIC_ATOMIC64 if !64BIT
26 select GENERIC_ATOMIC64 !! 22 select GENERIC_CLOCKEVENTS
>> 23 select GENERIC_CMOS_UPDATE
>> 24 select GENERIC_CPU_AUTOPROBE
>> 25 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 26 select GENERIC_IRQ_SHOW
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP 27 select GENERIC_PCI_IOMAP
32 select GENERIC_SCHED_CLOCK !! 28 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
33 select GENERIC_IOREMAP if MMU !! 29 select GENERIC_SMP_IDLE_THREAD
34 select HAVE_ARCH_AUDITSYSCALL !! 30 select GENERIC_TIME_VSYSCALL
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 31 select HANDLE_DOMAIN_IRQ
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 32 select HAVE_ARCH_JUMP_LABEL
37 select HAVE_ARCH_KCSAN !! 33 select HAVE_ARCH_KGDB
>> 34 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 35 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 36 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 37 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 38 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 39 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 40 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 41 select HAVE_CC_STACKPROTECTOR
>> 42 select HAVE_CONTEXT_TRACKING
>> 43 select HAVE_COPY_THREAD_TLS
>> 44 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 45 select HAVE_DEBUG_KMEMLEAK
>> 46 select HAVE_DEBUG_STACKOVERFLOW
>> 47 select HAVE_DMA_API_DEBUG
43 select HAVE_DMA_CONTIGUOUS 48 select HAVE_DMA_CONTIGUOUS
>> 49 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 50 select HAVE_EXIT_THREAD
>> 51 select HAVE_FTRACE_MCOUNT_RECORD
>> 52 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 53 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 54 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 55 select HAVE_IDE
>> 56 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 57 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 58 select HAVE_KPROBES
50 select HAVE_PCI !! 59 select HAVE_KRETPROBES
>> 60 select HAVE_MEMBLOCK
>> 61 select HAVE_MEMBLOCK_NODE_MAP
>> 62 select HAVE_MOD_ARCH_SPECIFIC
>> 63 select HAVE_NMI
>> 64 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 65 select HAVE_PERF_EVENTS
52 select HAVE_STACKPROTECTOR !! 66 select HAVE_REGS_AND_STACK_ACCESS_API
53 select HAVE_SYSCALL_TRACEPOINTS 67 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 68 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
55 select IRQ_DOMAIN !! 69 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 70 select MODULES_USE_ELF_RELA if MODULES && 64BIT
57 select MODULES_USE_ELF_RELA !! 71 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 72 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 73 select RTC_LIB if !MACH_LOONGSON64
>> 74 select SYSCTL_EXCEPTION_TRACE
>> 75 select VIRT_TO_BUS
>> 76
>> 77 menu "Machine selection"
>> 78
>> 79 choice
>> 80 prompt "System type"
>> 81 default MIPS_GENERIC
>> 82
>> 83 config MIPS_GENERIC
>> 84 bool "Generic board-agnostic MIPS kernel"
>> 85 select BOOT_RAW
>> 86 select BUILTIN_DTB
>> 87 select CEVT_R4K
>> 88 select CLKSRC_MIPS_GIC
>> 89 select COMMON_CLK
>> 90 select CPU_MIPSR2_IRQ_VI
>> 91 select CPU_MIPSR2_IRQ_EI
>> 92 select CSRC_R4K
>> 93 select DMA_PERDEV_COHERENT
>> 94 select HW_HAS_PCI
>> 95 select IRQ_MIPS_CPU
>> 96 select LIBFDT
>> 97 select MIPS_CPU_SCACHE
>> 98 select MIPS_GIC
>> 99 select MIPS_L1_CACHE_SHIFT_7
>> 100 select NO_EXCEPT_FILL
>> 101 select PCI_DRIVERS_GENERIC
>> 102 select PINCTRL
>> 103 select SMP_UP if SMP
>> 104 select SWAP_IO_SPACE
>> 105 select SYS_HAS_CPU_MIPS32_R1
>> 106 select SYS_HAS_CPU_MIPS32_R2
>> 107 select SYS_HAS_CPU_MIPS32_R6
>> 108 select SYS_HAS_CPU_MIPS64_R1
>> 109 select SYS_HAS_CPU_MIPS64_R2
>> 110 select SYS_HAS_CPU_MIPS64_R6
>> 111 select SYS_SUPPORTS_32BIT_KERNEL
>> 112 select SYS_SUPPORTS_64BIT_KERNEL
>> 113 select SYS_SUPPORTS_BIG_ENDIAN
>> 114 select SYS_SUPPORTS_HIGHMEM
>> 115 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 116 select SYS_SUPPORTS_MICROMIPS
>> 117 select SYS_SUPPORTS_MIPS_CPS
>> 118 select SYS_SUPPORTS_MIPS16
>> 119 select SYS_SUPPORTS_MULTITHREADING
>> 120 select SYS_SUPPORTS_RELOCATABLE
>> 121 select SYS_SUPPORTS_SMARTMIPS
>> 122 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 123 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 124 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 125 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 126 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 127 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 128 select USE_OF
>> 129 help
>> 130 Select this to build a kernel which aims to support multiple boards,
>> 131 generally using a flattened device tree passed from the bootloader
>> 132 using the boot protocol defined in the UHI (Unified Hosting
>> 133 Interface) specification.
>> 134
>> 135 config MIPS_ALCHEMY
>> 136 bool "Alchemy processor based machines"
>> 137 select ARCH_PHYS_ADDR_T_64BIT
>> 138 select CEVT_R4K
>> 139 select CSRC_R4K
>> 140 select IRQ_MIPS_CPU
>> 141 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 142 select SYS_HAS_CPU_MIPS32_R1
>> 143 select SYS_SUPPORTS_32BIT_KERNEL
>> 144 select SYS_SUPPORTS_APM_EMULATION
>> 145 select GPIOLIB
>> 146 select SYS_SUPPORTS_ZBOOT
>> 147 select COMMON_CLK
>> 148
>> 149 config AR7
>> 150 bool "Texas Instruments AR7"
>> 151 select BOOT_ELF32
>> 152 select DMA_NONCOHERENT
>> 153 select CEVT_R4K
>> 154 select CSRC_R4K
>> 155 select IRQ_MIPS_CPU
>> 156 select NO_EXCEPT_FILL
>> 157 select SWAP_IO_SPACE
>> 158 select SYS_HAS_CPU_MIPS32_R1
>> 159 select SYS_HAS_EARLY_PRINTK
>> 160 select SYS_SUPPORTS_32BIT_KERNEL
>> 161 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 162 select SYS_SUPPORTS_MIPS16
>> 163 select SYS_SUPPORTS_ZBOOT_UART16550
>> 164 select GPIOLIB
>> 165 select VLYNQ
>> 166 select HAVE_CLK
>> 167 help
>> 168 Support for the Texas Instruments AR7 System-on-a-Chip
>> 169 family: TNETD7100, 7200 and 7300.
>> 170
>> 171 config ATH25
>> 172 bool "Atheros AR231x/AR531x SoC support"
>> 173 select CEVT_R4K
>> 174 select CSRC_R4K
>> 175 select DMA_NONCOHERENT
>> 176 select IRQ_MIPS_CPU
>> 177 select IRQ_DOMAIN
>> 178 select SYS_HAS_CPU_MIPS32_R1
>> 179 select SYS_SUPPORTS_BIG_ENDIAN
>> 180 select SYS_SUPPORTS_32BIT_KERNEL
>> 181 select SYS_HAS_EARLY_PRINTK
>> 182 help
>> 183 Support for Atheros AR231x and Atheros AR531x based boards
>> 184
>> 185 config ATH79
>> 186 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 187 select ARCH_HAS_RESET_CONTROLLER
>> 188 select BOOT_RAW
>> 189 select CEVT_R4K
>> 190 select CSRC_R4K
>> 191 select DMA_NONCOHERENT
>> 192 select GPIOLIB
>> 193 select HAVE_CLK
>> 194 select COMMON_CLK
>> 195 select CLKDEV_LOOKUP
>> 196 select IRQ_MIPS_CPU
>> 197 select MIPS_MACHINE
>> 198 select SYS_HAS_CPU_MIPS32_R2
>> 199 select SYS_HAS_EARLY_PRINTK
>> 200 select SYS_SUPPORTS_32BIT_KERNEL
>> 201 select SYS_SUPPORTS_BIG_ENDIAN
>> 202 select SYS_SUPPORTS_MIPS16
>> 203 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 204 select USE_OF
>> 205 help
>> 206 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 207
>> 208 config BMIPS_GENERIC
>> 209 bool "Broadcom Generic BMIPS kernel"
>> 210 select BOOT_RAW
>> 211 select NO_EXCEPT_FILL
>> 212 select USE_OF
>> 213 select CEVT_R4K
>> 214 select CSRC_R4K
>> 215 select SYNC_R4K
>> 216 select COMMON_CLK
>> 217 select BCM6345_L1_IRQ
>> 218 select BCM7038_L1_IRQ
>> 219 select BCM7120_L2_IRQ
>> 220 select BRCMSTB_L2_IRQ
>> 221 select IRQ_MIPS_CPU
>> 222 select DMA_NONCOHERENT
>> 223 select SYS_SUPPORTS_32BIT_KERNEL
>> 224 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 225 select SYS_SUPPORTS_BIG_ENDIAN
>> 226 select SYS_SUPPORTS_HIGHMEM
>> 227 select SYS_HAS_CPU_BMIPS32_3300
>> 228 select SYS_HAS_CPU_BMIPS4350
>> 229 select SYS_HAS_CPU_BMIPS4380
>> 230 select SYS_HAS_CPU_BMIPS5000
>> 231 select SWAP_IO_SPACE
>> 232 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 233 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 234 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 235 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 236 select HARDIRQS_SW_RESEND
>> 237 help
>> 238 Build a generic DT-based kernel image that boots on select
>> 239 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 240 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 241 must be set appropriately for your board.
>> 242
>> 243 config BCM47XX
>> 244 bool "Broadcom BCM47XX based boards"
>> 245 select BOOT_RAW
>> 246 select CEVT_R4K
>> 247 select CSRC_R4K
>> 248 select DMA_NONCOHERENT
>> 249 select HW_HAS_PCI
>> 250 select IRQ_MIPS_CPU
>> 251 select SYS_HAS_CPU_MIPS32_R1
>> 252 select NO_EXCEPT_FILL
>> 253 select SYS_SUPPORTS_32BIT_KERNEL
>> 254 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 255 select SYS_SUPPORTS_MIPS16
>> 256 select SYS_HAS_EARLY_PRINTK
>> 257 select USE_GENERIC_EARLY_PRINTK_8250
>> 258 select GPIOLIB
>> 259 select LEDS_GPIO_REGISTER
>> 260 select BCM47XX_NVRAM
>> 261 select BCM47XX_SPROM
>> 262 select BCM47XX_SSB if !BCM47XX_BCMA
>> 263 help
>> 264 Support for BCM47XX based boards
>> 265
>> 266 config BCM63XX
>> 267 bool "Broadcom BCM63XX based boards"
>> 268 select BOOT_RAW
>> 269 select CEVT_R4K
>> 270 select CSRC_R4K
>> 271 select SYNC_R4K
>> 272 select DMA_NONCOHERENT
>> 273 select IRQ_MIPS_CPU
>> 274 select SYS_SUPPORTS_32BIT_KERNEL
>> 275 select SYS_SUPPORTS_BIG_ENDIAN
>> 276 select SYS_HAS_EARLY_PRINTK
>> 277 select SWAP_IO_SPACE
>> 278 select GPIOLIB
>> 279 select HAVE_CLK
>> 280 select MIPS_L1_CACHE_SHIFT_4
>> 281 select CLKDEV_LOOKUP
>> 282 help
>> 283 Support for BCM63XX based boards
>> 284
>> 285 config MIPS_COBALT
>> 286 bool "Cobalt Server"
>> 287 select CEVT_R4K
>> 288 select CSRC_R4K
>> 289 select CEVT_GT641XX
>> 290 select DMA_NONCOHERENT
>> 291 select HW_HAS_PCI
>> 292 select I8253
>> 293 select I8259
>> 294 select IRQ_MIPS_CPU
>> 295 select IRQ_GT641XX
>> 296 select PCI_GT64XXX_PCI0
>> 297 select PCI
>> 298 select SYS_HAS_CPU_NEVADA
>> 299 select SYS_HAS_EARLY_PRINTK
>> 300 select SYS_SUPPORTS_32BIT_KERNEL
>> 301 select SYS_SUPPORTS_64BIT_KERNEL
>> 302 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 303 select USE_GENERIC_EARLY_PRINTK_8250
>> 304
>> 305 config MACH_DECSTATION
>> 306 bool "DECstations"
>> 307 select BOOT_ELF32
>> 308 select CEVT_DS1287
>> 309 select CEVT_R4K if CPU_R4X00
>> 310 select CSRC_IOASIC
>> 311 select CSRC_R4K if CPU_R4X00
>> 312 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 313 select CPU_R4000_WORKAROUNDS if 64BIT
>> 314 select CPU_R4400_WORKAROUNDS if 64BIT
>> 315 select DMA_NONCOHERENT
>> 316 select NO_IOPORT_MAP
>> 317 select IRQ_MIPS_CPU
>> 318 select SYS_HAS_CPU_R3000
>> 319 select SYS_HAS_CPU_R4X00
>> 320 select SYS_SUPPORTS_32BIT_KERNEL
>> 321 select SYS_SUPPORTS_64BIT_KERNEL
>> 322 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 323 select SYS_SUPPORTS_128HZ
>> 324 select SYS_SUPPORTS_256HZ
>> 325 select SYS_SUPPORTS_1024HZ
>> 326 select MIPS_L1_CACHE_SHIFT_4
>> 327 help
>> 328 This enables support for DEC's MIPS based workstations. For details
>> 329 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 330 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 331
>> 332 If you have one of the following DECstation Models you definitely
>> 333 want to choose R4xx0 for the CPU Type:
>> 334
>> 335 DECstation 5000/50
>> 336 DECstation 5000/150
>> 337 DECstation 5000/260
>> 338 DECsystem 5900/260
>> 339
>> 340 otherwise choose R3000.
>> 341
>> 342 config MACH_JAZZ
>> 343 bool "Jazz family of machines"
>> 344 select FW_ARC
>> 345 select FW_ARC32
>> 346 select ARCH_MAY_HAVE_PC_FDC
>> 347 select CEVT_R4K
>> 348 select CSRC_R4K
>> 349 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 350 select GENERIC_ISA_DMA
>> 351 select HAVE_PCSPKR_PLATFORM
>> 352 select IRQ_MIPS_CPU
>> 353 select I8253
>> 354 select I8259
>> 355 select ISA
>> 356 select SYS_HAS_CPU_R4X00
>> 357 select SYS_SUPPORTS_32BIT_KERNEL
>> 358 select SYS_SUPPORTS_64BIT_KERNEL
>> 359 select SYS_SUPPORTS_100HZ
>> 360 help
>> 361 This a family of machines based on the MIPS R4030 chipset which was
>> 362 used by several vendors to build RISC/os and Windows NT workstations.
>> 363 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 364 Olivetti M700-10 workstations.
>> 365
>> 366 config MACH_INGENIC
>> 367 bool "Ingenic SoC based machines"
>> 368 select SYS_SUPPORTS_32BIT_KERNEL
>> 369 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 370 select SYS_SUPPORTS_ZBOOT_UART16550
>> 371 select DMA_NONCOHERENT
>> 372 select IRQ_MIPS_CPU
>> 373 select PINCTRL
>> 374 select GPIOLIB
>> 375 select COMMON_CLK
>> 376 select GENERIC_IRQ_CHIP
>> 377 select BUILTIN_DTB
>> 378 select USE_OF
>> 379 select LIBFDT
>> 380
>> 381 config LANTIQ
>> 382 bool "Lantiq based platforms"
>> 383 select DMA_NONCOHERENT
>> 384 select IRQ_MIPS_CPU
>> 385 select CEVT_R4K
>> 386 select CSRC_R4K
>> 387 select SYS_HAS_CPU_MIPS32_R1
>> 388 select SYS_HAS_CPU_MIPS32_R2
>> 389 select SYS_SUPPORTS_BIG_ENDIAN
>> 390 select SYS_SUPPORTS_32BIT_KERNEL
>> 391 select SYS_SUPPORTS_MIPS16
>> 392 select SYS_SUPPORTS_MULTITHREADING
>> 393 select SYS_SUPPORTS_VPE_LOADER
>> 394 select SYS_HAS_EARLY_PRINTK
>> 395 select GPIOLIB
>> 396 select SWAP_IO_SPACE
>> 397 select BOOT_RAW
>> 398 select CLKDEV_LOOKUP
>> 399 select USE_OF
>> 400 select PINCTRL
>> 401 select PINCTRL_LANTIQ
>> 402 select ARCH_HAS_RESET_CONTROLLER
>> 403 select RESET_CONTROLLER
>> 404
>> 405 config LASAT
>> 406 bool "LASAT Networks platforms"
>> 407 select CEVT_R4K
>> 408 select CRC32
>> 409 select CSRC_R4K
>> 410 select DMA_NONCOHERENT
>> 411 select SYS_HAS_EARLY_PRINTK
>> 412 select HW_HAS_PCI
>> 413 select IRQ_MIPS_CPU
>> 414 select PCI_GT64XXX_PCI0
>> 415 select MIPS_NILE4
>> 416 select R5000_CPU_SCACHE
>> 417 select SYS_HAS_CPU_R5000
>> 418 select SYS_SUPPORTS_32BIT_KERNEL
>> 419 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 420 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 421
>> 422 config MACH_LOONGSON32
>> 423 bool "Loongson-1 family of machines"
>> 424 select SYS_SUPPORTS_ZBOOT
>> 425 help
>> 426 This enables support for the Loongson-1 family of machines.
>> 427
>> 428 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 429 the Institute of Computing Technology (ICT), Chinese Academy of
>> 430 Sciences (CAS).
>> 431
>> 432 config MACH_LOONGSON64
>> 433 bool "Loongson-2/3 family of machines"
>> 434 select SYS_SUPPORTS_ZBOOT
>> 435 help
>> 436 This enables the support of Loongson-2/3 family of machines.
>> 437
>> 438 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 439 family of multi-core CPUs. They are both 64-bit general-purpose
>> 440 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 441 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 442 in the People's Republic of China. The chief architect is Professor
>> 443 Weiwu Hu.
>> 444
>> 445 config MACH_PISTACHIO
>> 446 bool "IMG Pistachio SoC based boards"
>> 447 select BOOT_ELF32
>> 448 select BOOT_RAW
>> 449 select CEVT_R4K
>> 450 select CLKSRC_MIPS_GIC
>> 451 select COMMON_CLK
>> 452 select CSRC_R4K
>> 453 select DMA_NONCOHERENT
>> 454 select GPIOLIB
>> 455 select IRQ_MIPS_CPU
>> 456 select LIBFDT
>> 457 select MFD_SYSCON
>> 458 select MIPS_CPU_SCACHE
>> 459 select MIPS_GIC
>> 460 select PINCTRL
>> 461 select REGULATOR
>> 462 select SYS_HAS_CPU_MIPS32_R2
>> 463 select SYS_SUPPORTS_32BIT_KERNEL
>> 464 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 465 select SYS_SUPPORTS_MIPS_CPS
>> 466 select SYS_SUPPORTS_MULTITHREADING
>> 467 select SYS_SUPPORTS_RELOCATABLE
>> 468 select SYS_SUPPORTS_ZBOOT
>> 469 select SYS_HAS_EARLY_PRINTK
>> 470 select USE_GENERIC_EARLY_PRINTK_8250
>> 471 select USE_OF
>> 472 help
>> 473 This enables support for the IMG Pistachio SoC platform.
>> 474
>> 475 config MIPS_MALTA
>> 476 bool "MIPS Malta board"
>> 477 select ARCH_MAY_HAVE_PC_FDC
>> 478 select BOOT_ELF32
>> 479 select BOOT_RAW
>> 480 select BUILTIN_DTB
>> 481 select CEVT_R4K
>> 482 select CSRC_R4K
>> 483 select CLKSRC_MIPS_GIC
>> 484 select COMMON_CLK
>> 485 select DMA_MAYBE_COHERENT
>> 486 select GENERIC_ISA_DMA
>> 487 select HAVE_PCSPKR_PLATFORM
>> 488 select IRQ_MIPS_CPU
>> 489 select MIPS_GIC
>> 490 select HW_HAS_PCI
>> 491 select I8253
>> 492 select I8259
>> 493 select MIPS_BONITO64
>> 494 select MIPS_CPU_SCACHE
>> 495 select MIPS_L1_CACHE_SHIFT_6
>> 496 select PCI_GT64XXX_PCI0
>> 497 select MIPS_MSC
>> 498 select SMP_UP if SMP
>> 499 select SWAP_IO_SPACE
>> 500 select SYS_HAS_CPU_MIPS32_R1
>> 501 select SYS_HAS_CPU_MIPS32_R2
>> 502 select SYS_HAS_CPU_MIPS32_R3_5
>> 503 select SYS_HAS_CPU_MIPS32_R5
>> 504 select SYS_HAS_CPU_MIPS32_R6
>> 505 select SYS_HAS_CPU_MIPS64_R1
>> 506 select SYS_HAS_CPU_MIPS64_R2
>> 507 select SYS_HAS_CPU_MIPS64_R6
>> 508 select SYS_HAS_CPU_NEVADA
>> 509 select SYS_HAS_CPU_RM7000
>> 510 select SYS_SUPPORTS_32BIT_KERNEL
>> 511 select SYS_SUPPORTS_64BIT_KERNEL
>> 512 select SYS_SUPPORTS_BIG_ENDIAN
>> 513 select SYS_SUPPORTS_HIGHMEM
>> 514 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 515 select SYS_SUPPORTS_MICROMIPS
>> 516 select SYS_SUPPORTS_MIPS_CMP
>> 517 select SYS_SUPPORTS_MIPS_CPS
>> 518 select SYS_SUPPORTS_MIPS16
>> 519 select SYS_SUPPORTS_MULTITHREADING
>> 520 select SYS_SUPPORTS_SMARTMIPS
>> 521 select SYS_SUPPORTS_VPE_LOADER
>> 522 select SYS_SUPPORTS_ZBOOT
>> 523 select SYS_SUPPORTS_RELOCATABLE
>> 524 select USE_OF
>> 525 select LIBFDT
>> 526 select ZONE_DMA32 if 64BIT
>> 527 select BUILTIN_DTB
>> 528 select LIBFDT
>> 529 help
>> 530 This enables support for the MIPS Technologies Malta evaluation
>> 531 board.
>> 532
>> 533 config MACH_PIC32
>> 534 bool "Microchip PIC32 Family"
>> 535 help
>> 536 This enables support for the Microchip PIC32 family of platforms.
>> 537
>> 538 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 539 microcontrollers.
>> 540
>> 541 config NEC_MARKEINS
>> 542 bool "NEC EMMA2RH Mark-eins board"
>> 543 select SOC_EMMA2RH
>> 544 select HW_HAS_PCI
>> 545 help
>> 546 This enables support for the NEC Electronics Mark-eins boards.
>> 547
>> 548 config MACH_VR41XX
>> 549 bool "NEC VR4100 series based machines"
>> 550 select CEVT_R4K
>> 551 select CSRC_R4K
>> 552 select SYS_HAS_CPU_VR41XX
>> 553 select SYS_SUPPORTS_MIPS16
>> 554 select GPIOLIB
>> 555
>> 556 config NXP_STB220
>> 557 bool "NXP STB220 board"
>> 558 select SOC_PNX833X
>> 559 help
>> 560 Support for NXP Semiconductors STB220 Development Board.
>> 561
>> 562 config NXP_STB225
>> 563 bool "NXP 225 board"
>> 564 select SOC_PNX833X
>> 565 select SOC_PNX8335
>> 566 help
>> 567 Support for NXP Semiconductors STB225 Development Board.
>> 568
>> 569 config PMC_MSP
>> 570 bool "PMC-Sierra MSP chipsets"
>> 571 select CEVT_R4K
>> 572 select CSRC_R4K
>> 573 select DMA_NONCOHERENT
>> 574 select SWAP_IO_SPACE
>> 575 select NO_EXCEPT_FILL
>> 576 select BOOT_RAW
>> 577 select SYS_HAS_CPU_MIPS32_R1
>> 578 select SYS_HAS_CPU_MIPS32_R2
>> 579 select SYS_SUPPORTS_32BIT_KERNEL
>> 580 select SYS_SUPPORTS_BIG_ENDIAN
>> 581 select SYS_SUPPORTS_MIPS16
>> 582 select IRQ_MIPS_CPU
>> 583 select SERIAL_8250
>> 584 select SERIAL_8250_CONSOLE
>> 585 select USB_EHCI_BIG_ENDIAN_MMIO
>> 586 select USB_EHCI_BIG_ENDIAN_DESC
>> 587 help
>> 588 This adds support for the PMC-Sierra family of Multi-Service
>> 589 Processor System-On-A-Chips. These parts include a number
>> 590 of integrated peripherals, interfaces and DSPs in addition to
>> 591 a variety of MIPS cores.
>> 592
>> 593 config RALINK
>> 594 bool "Ralink based machines"
>> 595 select CEVT_R4K
>> 596 select CSRC_R4K
>> 597 select BOOT_RAW
>> 598 select DMA_NONCOHERENT
>> 599 select IRQ_MIPS_CPU
>> 600 select USE_OF
>> 601 select SYS_HAS_CPU_MIPS32_R1
>> 602 select SYS_HAS_CPU_MIPS32_R2
>> 603 select SYS_SUPPORTS_32BIT_KERNEL
>> 604 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 605 select SYS_SUPPORTS_MIPS16
>> 606 select SYS_HAS_EARLY_PRINTK
>> 607 select CLKDEV_LOOKUP
>> 608 select ARCH_HAS_RESET_CONTROLLER
>> 609 select RESET_CONTROLLER
>> 610
>> 611 config SGI_IP22
>> 612 bool "SGI IP22 (Indy/Indigo2)"
>> 613 select FW_ARC
>> 614 select FW_ARC32
>> 615 select BOOT_ELF32
>> 616 select CEVT_R4K
>> 617 select CSRC_R4K
>> 618 select DEFAULT_SGI_PARTITION
>> 619 select DMA_NONCOHERENT
>> 620 select HW_HAS_EISA
>> 621 select I8253
>> 622 select I8259
>> 623 select IP22_CPU_SCACHE
>> 624 select IRQ_MIPS_CPU
>> 625 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 626 select SGI_HAS_I8042
>> 627 select SGI_HAS_INDYDOG
>> 628 select SGI_HAS_HAL2
>> 629 select SGI_HAS_SEEQ
>> 630 select SGI_HAS_WD93
>> 631 select SGI_HAS_ZILOG
>> 632 select SWAP_IO_SPACE
>> 633 select SYS_HAS_CPU_R4X00
>> 634 select SYS_HAS_CPU_R5000
>> 635 #
>> 636 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 637 # memory during early boot on some machines.
>> 638 #
>> 639 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 640 # for a more details discussion
>> 641 #
>> 642 # select SYS_HAS_EARLY_PRINTK
>> 643 select SYS_SUPPORTS_32BIT_KERNEL
>> 644 select SYS_SUPPORTS_64BIT_KERNEL
>> 645 select SYS_SUPPORTS_BIG_ENDIAN
>> 646 select MIPS_L1_CACHE_SHIFT_7
>> 647 help
>> 648 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 649 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 650 that runs on these, say Y here.
>> 651
>> 652 config SGI_IP27
>> 653 bool "SGI IP27 (Origin200/2000)"
>> 654 select FW_ARC
>> 655 select FW_ARC64
>> 656 select BOOT_ELF64
>> 657 select DEFAULT_SGI_PARTITION
>> 658 select DMA_COHERENT
>> 659 select SYS_HAS_EARLY_PRINTK
>> 660 select HW_HAS_PCI
>> 661 select NR_CPUS_DEFAULT_64
>> 662 select SYS_HAS_CPU_R10000
>> 663 select SYS_SUPPORTS_64BIT_KERNEL
>> 664 select SYS_SUPPORTS_BIG_ENDIAN
>> 665 select SYS_SUPPORTS_NUMA
>> 666 select SYS_SUPPORTS_SMP
>> 667 select MIPS_L1_CACHE_SHIFT_7
>> 668 help
>> 669 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 670 workstations. To compile a Linux kernel that runs on these, say Y
>> 671 here.
>> 672
>> 673 config SGI_IP28
>> 674 bool "SGI IP28 (Indigo2 R10k)"
>> 675 select FW_ARC
>> 676 select FW_ARC64
>> 677 select BOOT_ELF64
>> 678 select CEVT_R4K
>> 679 select CSRC_R4K
>> 680 select DEFAULT_SGI_PARTITION
>> 681 select DMA_NONCOHERENT
>> 682 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 683 select IRQ_MIPS_CPU
>> 684 select HW_HAS_EISA
>> 685 select I8253
>> 686 select I8259
>> 687 select SGI_HAS_I8042
>> 688 select SGI_HAS_INDYDOG
>> 689 select SGI_HAS_HAL2
>> 690 select SGI_HAS_SEEQ
>> 691 select SGI_HAS_WD93
>> 692 select SGI_HAS_ZILOG
>> 693 select SWAP_IO_SPACE
>> 694 select SYS_HAS_CPU_R10000
>> 695 #
>> 696 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 697 # memory during early boot on some machines.
>> 698 #
>> 699 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 700 # for a more details discussion
>> 701 #
>> 702 # select SYS_HAS_EARLY_PRINTK
>> 703 select SYS_SUPPORTS_64BIT_KERNEL
>> 704 select SYS_SUPPORTS_BIG_ENDIAN
>> 705 select MIPS_L1_CACHE_SHIFT_7
>> 706 help
>> 707 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 708 kernel that runs on these, say Y here.
>> 709
>> 710 config SGI_IP32
>> 711 bool "SGI IP32 (O2)"
>> 712 select FW_ARC
>> 713 select FW_ARC32
>> 714 select BOOT_ELF32
>> 715 select CEVT_R4K
>> 716 select CSRC_R4K
>> 717 select DMA_NONCOHERENT
>> 718 select HW_HAS_PCI
>> 719 select IRQ_MIPS_CPU
>> 720 select R5000_CPU_SCACHE
>> 721 select RM7000_CPU_SCACHE
>> 722 select SYS_HAS_CPU_R5000
>> 723 select SYS_HAS_CPU_R10000 if BROKEN
>> 724 select SYS_HAS_CPU_RM7000
>> 725 select SYS_HAS_CPU_NEVADA
>> 726 select SYS_SUPPORTS_64BIT_KERNEL
>> 727 select SYS_SUPPORTS_BIG_ENDIAN
>> 728 help
>> 729 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 730
>> 731 config SIBYTE_CRHINE
>> 732 bool "Sibyte BCM91120C-CRhine"
>> 733 select BOOT_ELF32
>> 734 select DMA_COHERENT
>> 735 select SIBYTE_BCM1120
>> 736 select SWAP_IO_SPACE
>> 737 select SYS_HAS_CPU_SB1
>> 738 select SYS_SUPPORTS_BIG_ENDIAN
>> 739 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 740
>> 741 config SIBYTE_CARMEL
>> 742 bool "Sibyte BCM91120x-Carmel"
>> 743 select BOOT_ELF32
>> 744 select DMA_COHERENT
>> 745 select SIBYTE_BCM1120
>> 746 select SWAP_IO_SPACE
>> 747 select SYS_HAS_CPU_SB1
>> 748 select SYS_SUPPORTS_BIG_ENDIAN
>> 749 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 750
>> 751 config SIBYTE_CRHONE
>> 752 bool "Sibyte BCM91125C-CRhone"
>> 753 select BOOT_ELF32
>> 754 select DMA_COHERENT
>> 755 select SIBYTE_BCM1125
>> 756 select SWAP_IO_SPACE
>> 757 select SYS_HAS_CPU_SB1
>> 758 select SYS_SUPPORTS_BIG_ENDIAN
>> 759 select SYS_SUPPORTS_HIGHMEM
>> 760 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 761
>> 762 config SIBYTE_RHONE
>> 763 bool "Sibyte BCM91125E-Rhone"
>> 764 select BOOT_ELF32
>> 765 select DMA_COHERENT
>> 766 select SIBYTE_BCM1125H
>> 767 select SWAP_IO_SPACE
>> 768 select SYS_HAS_CPU_SB1
>> 769 select SYS_SUPPORTS_BIG_ENDIAN
>> 770 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 771
>> 772 config SIBYTE_SWARM
>> 773 bool "Sibyte BCM91250A-SWARM"
>> 774 select BOOT_ELF32
>> 775 select DMA_COHERENT
>> 776 select HAVE_PATA_PLATFORM
>> 777 select SIBYTE_SB1250
>> 778 select SWAP_IO_SPACE
>> 779 select SYS_HAS_CPU_SB1
>> 780 select SYS_SUPPORTS_BIG_ENDIAN
>> 781 select SYS_SUPPORTS_HIGHMEM
>> 782 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 783 select ZONE_DMA32 if 64BIT
>> 784
>> 785 config SIBYTE_LITTLESUR
>> 786 bool "Sibyte BCM91250C2-LittleSur"
>> 787 select BOOT_ELF32
>> 788 select DMA_COHERENT
>> 789 select HAVE_PATA_PLATFORM
>> 790 select SIBYTE_SB1250
>> 791 select SWAP_IO_SPACE
>> 792 select SYS_HAS_CPU_SB1
>> 793 select SYS_SUPPORTS_BIG_ENDIAN
>> 794 select SYS_SUPPORTS_HIGHMEM
>> 795 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 796
>> 797 config SIBYTE_SENTOSA
>> 798 bool "Sibyte BCM91250E-Sentosa"
>> 799 select BOOT_ELF32
>> 800 select DMA_COHERENT
>> 801 select SIBYTE_SB1250
>> 802 select SWAP_IO_SPACE
>> 803 select SYS_HAS_CPU_SB1
>> 804 select SYS_SUPPORTS_BIG_ENDIAN
>> 805 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 806
>> 807 config SIBYTE_BIGSUR
>> 808 bool "Sibyte BCM91480B-BigSur"
>> 809 select BOOT_ELF32
>> 810 select DMA_COHERENT
>> 811 select NR_CPUS_DEFAULT_4
>> 812 select SIBYTE_BCM1x80
>> 813 select SWAP_IO_SPACE
>> 814 select SYS_HAS_CPU_SB1
>> 815 select SYS_SUPPORTS_BIG_ENDIAN
>> 816 select SYS_SUPPORTS_HIGHMEM
>> 817 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 818 select ZONE_DMA32 if 64BIT
>> 819
>> 820 config SNI_RM
>> 821 bool "SNI RM200/300/400"
>> 822 select FW_ARC if CPU_LITTLE_ENDIAN
>> 823 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 824 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 825 select ARCH_MAY_HAVE_PC_FDC
>> 826 select BOOT_ELF32
>> 827 select CEVT_R4K
>> 828 select CSRC_R4K
>> 829 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 830 select DMA_NONCOHERENT
>> 831 select GENERIC_ISA_DMA
>> 832 select HAVE_PCSPKR_PLATFORM
>> 833 select HW_HAS_EISA
>> 834 select HW_HAS_PCI
>> 835 select IRQ_MIPS_CPU
>> 836 select I8253
>> 837 select I8259
>> 838 select ISA
>> 839 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 840 select SYS_HAS_CPU_R4X00
>> 841 select SYS_HAS_CPU_R5000
>> 842 select SYS_HAS_CPU_R10000
>> 843 select R5000_CPU_SCACHE
>> 844 select SYS_HAS_EARLY_PRINTK
>> 845 select SYS_SUPPORTS_32BIT_KERNEL
>> 846 select SYS_SUPPORTS_64BIT_KERNEL
>> 847 select SYS_SUPPORTS_BIG_ENDIAN
>> 848 select SYS_SUPPORTS_HIGHMEM
>> 849 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 850 help
>> 851 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 852 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 853 Technology and now in turn merged with Fujitsu. Say Y here to
>> 854 support this machine type.
>> 855
>> 856 config MACH_TX39XX
>> 857 bool "Toshiba TX39 series based machines"
>> 858
>> 859 config MACH_TX49XX
>> 860 bool "Toshiba TX49 series based machines"
>> 861
>> 862 config MIKROTIK_RB532
>> 863 bool "Mikrotik RB532 boards"
>> 864 select CEVT_R4K
>> 865 select CSRC_R4K
>> 866 select DMA_NONCOHERENT
>> 867 select HW_HAS_PCI
>> 868 select IRQ_MIPS_CPU
>> 869 select SYS_HAS_CPU_MIPS32_R1
>> 870 select SYS_SUPPORTS_32BIT_KERNEL
>> 871 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 872 select SWAP_IO_SPACE
>> 873 select BOOT_RAW
>> 874 select GPIOLIB
>> 875 select MIPS_L1_CACHE_SHIFT_4
>> 876 help
>> 877 Support the Mikrotik(tm) RouterBoard 532 series,
>> 878 based on the IDT RC32434 SoC.
>> 879
>> 880 config CAVIUM_OCTEON_SOC
>> 881 bool "Cavium Networks Octeon SoC based boards"
>> 882 select CEVT_R4K
>> 883 select ARCH_PHYS_ADDR_T_64BIT
>> 884 select DMA_COHERENT
>> 885 select SYS_SUPPORTS_64BIT_KERNEL
>> 886 select SYS_SUPPORTS_BIG_ENDIAN
>> 887 select EDAC_SUPPORT
>> 888 select EDAC_ATOMIC_SCRUB
>> 889 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 890 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 891 select SYS_HAS_EARLY_PRINTK
>> 892 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 893 select HW_HAS_PCI
>> 894 select ZONE_DMA32
>> 895 select HOLES_IN_ZONE
>> 896 select GPIOLIB
>> 897 select LIBFDT
>> 898 select USE_OF
>> 899 select ARCH_SPARSEMEM_ENABLE
>> 900 select SYS_SUPPORTS_SMP
>> 901 select NR_CPUS_DEFAULT_64
>> 902 select MIPS_NR_CPU_NR_MAP_1024
>> 903 select BUILTIN_DTB
>> 904 select MTD_COMPLEX_MAPPINGS
>> 905 select SYS_SUPPORTS_RELOCATABLE
>> 906 help
>> 907 This option supports all of the Octeon reference boards from Cavium
>> 908 Networks. It builds a kernel that dynamically determines the Octeon
>> 909 CPU type and supports all known board reference implementations.
>> 910 Some of the supported boards are:
>> 911 EBT3000
>> 912 EBH3000
>> 913 EBH3100
>> 914 Thunder
>> 915 Kodama
>> 916 Hikari
>> 917 Say Y here for most Octeon reference boards.
>> 918
>> 919 config NLM_XLR_BOARD
>> 920 bool "Netlogic XLR/XLS based systems"
>> 921 select BOOT_ELF32
>> 922 select NLM_COMMON
>> 923 select SYS_HAS_CPU_XLR
>> 924 select SYS_SUPPORTS_SMP
>> 925 select HW_HAS_PCI
>> 926 select SWAP_IO_SPACE
>> 927 select SYS_SUPPORTS_32BIT_KERNEL
>> 928 select SYS_SUPPORTS_64BIT_KERNEL
>> 929 select ARCH_PHYS_ADDR_T_64BIT
>> 930 select SYS_SUPPORTS_BIG_ENDIAN
>> 931 select SYS_SUPPORTS_HIGHMEM
>> 932 select DMA_COHERENT
>> 933 select NR_CPUS_DEFAULT_32
>> 934 select CEVT_R4K
>> 935 select CSRC_R4K
>> 936 select IRQ_MIPS_CPU
>> 937 select ZONE_DMA32 if 64BIT
>> 938 select SYNC_R4K
>> 939 select SYS_HAS_EARLY_PRINTK
>> 940 select SYS_SUPPORTS_ZBOOT
>> 941 select SYS_SUPPORTS_ZBOOT_UART16550
>> 942 help
>> 943 Support for systems based on Netlogic XLR and XLS processors.
>> 944 Say Y here if you have a XLR or XLS based board.
>> 945
>> 946 config NLM_XLP_BOARD
>> 947 bool "Netlogic XLP based systems"
>> 948 select BOOT_ELF32
>> 949 select NLM_COMMON
>> 950 select SYS_HAS_CPU_XLP
>> 951 select SYS_SUPPORTS_SMP
>> 952 select HW_HAS_PCI
>> 953 select SYS_SUPPORTS_32BIT_KERNEL
>> 954 select SYS_SUPPORTS_64BIT_KERNEL
>> 955 select ARCH_PHYS_ADDR_T_64BIT
>> 956 select GPIOLIB
>> 957 select SYS_SUPPORTS_BIG_ENDIAN
>> 958 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 959 select SYS_SUPPORTS_HIGHMEM
>> 960 select DMA_COHERENT
>> 961 select NR_CPUS_DEFAULT_32
>> 962 select CEVT_R4K
>> 963 select CSRC_R4K
>> 964 select IRQ_MIPS_CPU
>> 965 select ZONE_DMA32 if 64BIT
>> 966 select SYNC_R4K
>> 967 select SYS_HAS_EARLY_PRINTK
>> 968 select USE_OF
>> 969 select SYS_SUPPORTS_ZBOOT
>> 970 select SYS_SUPPORTS_ZBOOT_UART16550
>> 971 help
>> 972 This board is based on Netlogic XLP Processor.
>> 973 Say Y here if you have a XLP based board.
>> 974
>> 975 config MIPS_PARAVIRT
>> 976 bool "Para-Virtualized guest system"
>> 977 select CEVT_R4K
>> 978 select CSRC_R4K
>> 979 select DMA_COHERENT
>> 980 select SYS_SUPPORTS_64BIT_KERNEL
>> 981 select SYS_SUPPORTS_32BIT_KERNEL
>> 982 select SYS_SUPPORTS_BIG_ENDIAN
>> 983 select SYS_SUPPORTS_SMP
>> 984 select NR_CPUS_DEFAULT_4
>> 985 select SYS_HAS_EARLY_PRINTK
>> 986 select SYS_HAS_CPU_MIPS32_R2
>> 987 select SYS_HAS_CPU_MIPS64_R2
>> 988 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 989 select HW_HAS_PCI
>> 990 select SWAP_IO_SPACE
60 help 991 help
61 Xtensa processors are 32-bit RISC ma !! 992 This option supports guest running under ????
62 primarily for embedded systems. The !! 993
63 configurable and extensible. The Li !! 994 endchoice
64 architecture supports all processor !! 995
65 with reasonable minimum requirements !! 996 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 997 source "arch/mips/ath25/Kconfig"
>> 998 source "arch/mips/ath79/Kconfig"
>> 999 source "arch/mips/bcm47xx/Kconfig"
>> 1000 source "arch/mips/bcm63xx/Kconfig"
>> 1001 source "arch/mips/bmips/Kconfig"
>> 1002 source "arch/mips/generic/Kconfig"
>> 1003 source "arch/mips/jazz/Kconfig"
>> 1004 source "arch/mips/jz4740/Kconfig"
>> 1005 source "arch/mips/lantiq/Kconfig"
>> 1006 source "arch/mips/lasat/Kconfig"
>> 1007 source "arch/mips/pic32/Kconfig"
>> 1008 source "arch/mips/pistachio/Kconfig"
>> 1009 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1010 source "arch/mips/ralink/Kconfig"
>> 1011 source "arch/mips/sgi-ip27/Kconfig"
>> 1012 source "arch/mips/sibyte/Kconfig"
>> 1013 source "arch/mips/txx9/Kconfig"
>> 1014 source "arch/mips/vr41xx/Kconfig"
>> 1015 source "arch/mips/cavium-octeon/Kconfig"
>> 1016 source "arch/mips/loongson32/Kconfig"
>> 1017 source "arch/mips/loongson64/Kconfig"
>> 1018 source "arch/mips/netlogic/Kconfig"
>> 1019 source "arch/mips/paravirt/Kconfig"
>> 1020
>> 1021 endmenu
>> 1022
>> 1023 config RWSEM_GENERIC_SPINLOCK
>> 1024 bool
>> 1025 default y
>> 1026
>> 1027 config RWSEM_XCHGADD_ALGORITHM
>> 1028 bool
67 1029
68 config GENERIC_HWEIGHT 1030 config GENERIC_HWEIGHT
69 def_bool y !! 1031 bool
>> 1032 default y
70 1033
71 config ARCH_HAS_ILOG2_U32 !! 1034 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1035 bool
>> 1036 default y
73 1037
74 config ARCH_HAS_ILOG2_U64 !! 1038 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1039 bool
>> 1040 default y
76 1041
77 config ARCH_MTD_XIP !! 1042 #
78 def_bool y !! 1043 # Select some configuration options automatically based on user selections.
>> 1044 #
>> 1045 config FW_ARC
>> 1046 bool
>> 1047
>> 1048 config ARCH_MAY_HAVE_PC_FDC
>> 1049 bool
>> 1050
>> 1051 config BOOT_RAW
>> 1052 bool
>> 1053
>> 1054 config CEVT_BCM1480
>> 1055 bool
>> 1056
>> 1057 config CEVT_DS1287
>> 1058 bool
>> 1059
>> 1060 config CEVT_GT641XX
>> 1061 bool
>> 1062
>> 1063 config CEVT_R4K
>> 1064 bool
>> 1065
>> 1066 config CEVT_SB1250
>> 1067 bool
>> 1068
>> 1069 config CEVT_TXX9
>> 1070 bool
>> 1071
>> 1072 config CSRC_BCM1480
>> 1073 bool
>> 1074
>> 1075 config CSRC_IOASIC
>> 1076 bool
>> 1077
>> 1078 config CSRC_R4K
>> 1079 bool
>> 1080
>> 1081 config CSRC_SB1250
>> 1082 bool
>> 1083
>> 1084 config MIPS_CLOCK_VSYSCALL
>> 1085 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1086
>> 1087 config GPIO_TXX9
>> 1088 select GPIOLIB
>> 1089 bool
>> 1090
>> 1091 config FW_CFE
>> 1092 bool
>> 1093
>> 1094 config ARCH_DMA_ADDR_T_64BIT
>> 1095 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
>> 1096
>> 1097 config ARCH_SUPPORTS_UPROBES
>> 1098 bool
>> 1099
>> 1100 config DMA_MAYBE_COHERENT
>> 1101 select DMA_NONCOHERENT
>> 1102 bool
>> 1103
>> 1104 config DMA_PERDEV_COHERENT
>> 1105 bool
>> 1106 select DMA_MAYBE_COHERENT
>> 1107
>> 1108 config DMA_COHERENT
>> 1109 bool
>> 1110
>> 1111 config DMA_NONCOHERENT
>> 1112 bool
>> 1113 select NEED_DMA_MAP_STATE
>> 1114
>> 1115 config NEED_DMA_MAP_STATE
>> 1116 bool
>> 1117
>> 1118 config SYS_HAS_EARLY_PRINTK
>> 1119 bool
>> 1120
>> 1121 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1122 bool
>> 1123
>> 1124 config MIPS_BONITO64
>> 1125 bool
>> 1126
>> 1127 config MIPS_MSC
>> 1128 bool
>> 1129
>> 1130 config MIPS_NILE4
>> 1131 bool
>> 1132
>> 1133 config SYNC_R4K
>> 1134 bool
>> 1135
>> 1136 config MIPS_MACHINE
>> 1137 def_bool n
79 1138
80 config NO_IOPORT_MAP 1139 config NO_IOPORT_MAP
81 def_bool n 1140 def_bool n
82 1141
83 config HZ !! 1142 config GENERIC_CSUM
84 int !! 1143 bool
85 default 100 <<
86 1144
87 config LOCKDEP_SUPPORT !! 1145 config GENERIC_ISA_DMA
88 def_bool y !! 1146 bool
>> 1147 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1148 select ISA_DMA_API
89 1149
90 config STACKTRACE_SUPPORT !! 1150 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1151 bool
>> 1152 select GENERIC_ISA_DMA
>> 1153
>> 1154 config ISA_DMA_API
>> 1155 bool
>> 1156
>> 1157 config HOLES_IN_ZONE
>> 1158 bool
>> 1159
>> 1160 config SYS_SUPPORTS_RELOCATABLE
>> 1161 bool
>> 1162 help
>> 1163 Selected if the platform supports relocating the kernel.
>> 1164 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1165 to allow access to command line and entropy sources.
>> 1166
>> 1167 config MIPS_CBPF_JIT
91 def_bool y 1168 def_bool y
>> 1169 depends on BPF_JIT && HAVE_CBPF_JIT
92 1170
93 config MMU !! 1171 config MIPS_EBPF_JIT
94 def_bool n !! 1172 def_bool y
95 select PFAULT !! 1173 depends on BPF_JIT && HAVE_EBPF_JIT
96 1174
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1175
100 config KASAN_SHADOW_OFFSET !! 1176 #
101 hex !! 1177 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1178 # answer,so we try hard to limit the available choices. Also the use of a
>> 1179 # choice statement should be more obvious to the user.
>> 1180 #
>> 1181 choice
>> 1182 prompt "Endianness selection"
>> 1183 help
>> 1184 Some MIPS machines can be configured for either little or big endian
>> 1185 byte order. These modes require different kernels and a different
>> 1186 Linux distribution. In general there is one preferred byteorder for a
>> 1187 particular system but some systems are just as commonly used in the
>> 1188 one or the other endianness.
103 1189
104 config CPU_BIG_ENDIAN 1190 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1191 bool "Big endian"
>> 1192 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1193
107 config CPU_LITTLE_ENDIAN 1194 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1195 bool "Little endian"
>> 1196 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1197
110 config CC_HAVE_CALL0_ABI !! 1198 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1199
113 menu "Processor type and features" !! 1200 config EXPORT_UASM
>> 1201 bool
114 1202
115 choice !! 1203 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1204 bool
117 default XTENSA_VARIANT_FSF <<
118 1205
119 config XTENSA_VARIANT_FSF !! 1206 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1207 bool
121 select MMU <<
122 1208
123 config XTENSA_VARIANT_DC232B !! 1209 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1210 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1211
130 config XTENSA_VARIANT_DC233C !! 1212 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1213 bool
132 select MMU !! 1214 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1215 default y
134 help !! 1216
135 This variant refers to Tensilica's D !! 1217 config MIPS_HUGE_TLB_SUPPORT
>> 1218 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1219
>> 1220 config IRQ_CPU_RM7K
>> 1221 bool
>> 1222
>> 1223 config IRQ_MSP_SLP
>> 1224 bool
>> 1225
>> 1226 config IRQ_MSP_CIC
>> 1227 bool
>> 1228
>> 1229 config IRQ_TXX9
>> 1230 bool
>> 1231
>> 1232 config IRQ_GT641XX
>> 1233 bool
>> 1234
>> 1235 config PCI_GT64XXX_PCI0
>> 1236 bool
>> 1237
>> 1238 config NO_EXCEPT_FILL
>> 1239 bool
>> 1240
>> 1241 config SOC_EMMA2RH
>> 1242 bool
>> 1243 select CEVT_R4K
>> 1244 select CSRC_R4K
>> 1245 select DMA_NONCOHERENT
>> 1246 select IRQ_MIPS_CPU
>> 1247 select SWAP_IO_SPACE
>> 1248 select SYS_HAS_CPU_R5500
>> 1249 select SYS_SUPPORTS_32BIT_KERNEL
>> 1250 select SYS_SUPPORTS_64BIT_KERNEL
>> 1251 select SYS_SUPPORTS_BIG_ENDIAN
>> 1252
>> 1253 config SOC_PNX833X
>> 1254 bool
>> 1255 select CEVT_R4K
>> 1256 select CSRC_R4K
>> 1257 select IRQ_MIPS_CPU
>> 1258 select DMA_NONCOHERENT
>> 1259 select SYS_HAS_CPU_MIPS32_R2
>> 1260 select SYS_SUPPORTS_32BIT_KERNEL
>> 1261 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1262 select SYS_SUPPORTS_BIG_ENDIAN
>> 1263 select SYS_SUPPORTS_MIPS16
>> 1264 select CPU_MIPSR2_IRQ_VI
>> 1265
>> 1266 config SOC_PNX8335
>> 1267 bool
>> 1268 select SOC_PNX833X
>> 1269
>> 1270 config MIPS_SPRAM
>> 1271 bool
>> 1272
>> 1273 config SWAP_IO_SPACE
>> 1274 bool
>> 1275
>> 1276 config SGI_HAS_INDYDOG
>> 1277 bool
136 1278
137 config XTENSA_VARIANT_CUSTOM !! 1279 config SGI_HAS_HAL2
138 bool "Custom Xtensa processor configur !! 1280 bool
139 select HAVE_XTENSA_GPIO32 !! 1281
>> 1282 config SGI_HAS_SEEQ
>> 1283 bool
>> 1284
>> 1285 config SGI_HAS_WD93
>> 1286 bool
>> 1287
>> 1288 config SGI_HAS_ZILOG
>> 1289 bool
>> 1290
>> 1291 config SGI_HAS_I8042
>> 1292 bool
>> 1293
>> 1294 config DEFAULT_SGI_PARTITION
>> 1295 bool
>> 1296
>> 1297 config FW_ARC32
>> 1298 bool
>> 1299
>> 1300 config FW_SNIPROM
>> 1301 bool
>> 1302
>> 1303 config BOOT_ELF32
>> 1304 bool
>> 1305
>> 1306 config MIPS_L1_CACHE_SHIFT_4
>> 1307 bool
>> 1308
>> 1309 config MIPS_L1_CACHE_SHIFT_5
>> 1310 bool
>> 1311
>> 1312 config MIPS_L1_CACHE_SHIFT_6
>> 1313 bool
>> 1314
>> 1315 config MIPS_L1_CACHE_SHIFT_7
>> 1316 bool
>> 1317
>> 1318 config MIPS_L1_CACHE_SHIFT
>> 1319 int
>> 1320 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1321 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1322 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1323 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1324 default "5"
>> 1325
>> 1326 config HAVE_STD_PC_SERIAL_PORT
>> 1327 bool
>> 1328
>> 1329 config ARC_CONSOLE
>> 1330 bool "ARC console support"
>> 1331 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1332
>> 1333 config ARC_MEMORY
>> 1334 bool
>> 1335 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1336 default y
>> 1337
>> 1338 config ARC_PROMLIB
>> 1339 bool
>> 1340 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1341 default y
>> 1342
>> 1343 config FW_ARC64
>> 1344 bool
>> 1345
>> 1346 config BOOT_ELF64
>> 1347 bool
>> 1348
>> 1349 menu "CPU selection"
>> 1350
>> 1351 choice
>> 1352 prompt "CPU type"
>> 1353 default CPU_R4X00
>> 1354
>> 1355 config CPU_LOONGSON3
>> 1356 bool "Loongson 3 CPU"
>> 1357 depends on SYS_HAS_CPU_LOONGSON3
>> 1358 select CPU_SUPPORTS_64BIT_KERNEL
>> 1359 select CPU_SUPPORTS_HIGHMEM
>> 1360 select CPU_SUPPORTS_HUGEPAGES
>> 1361 select WEAK_ORDERING
>> 1362 select WEAK_REORDERING_BEYOND_LLSC
>> 1363 select MIPS_PGD_C0_CONTEXT
>> 1364 select MIPS_L1_CACHE_SHIFT_6
>> 1365 select GPIOLIB
140 help 1366 help
141 Select this variant to use a custom !! 1367 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1368 set with many extensions.
143 endchoice <<
144 1369
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1370 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1371 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1372 default n
>> 1373 select CPU_MIPSR2
>> 1374 select CPU_HAS_PREFETCH
>> 1375 depends on CPU_LOONGSON3
>> 1376 help
>> 1377 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1378 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1379 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1380 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1381 Fast TLB refill support, etc.
>> 1382
>> 1383 This option enable those enhancements which are not probed at run
>> 1384 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1385 please say 'N' here. If you want a high-performance kernel to run on
>> 1386 new Loongson 3 machines only, please say 'Y' here.
>> 1387
>> 1388 config CPU_LOONGSON2E
>> 1389 bool "Loongson 2E"
>> 1390 depends on SYS_HAS_CPU_LOONGSON2E
>> 1391 select CPU_LOONGSON2
>> 1392 help
>> 1393 The Loongson 2E processor implements the MIPS III instruction set
>> 1394 with many extensions.
>> 1395
>> 1396 It has an internal FPGA northbridge, which is compatible to
>> 1397 bonito64.
>> 1398
>> 1399 config CPU_LOONGSON2F
>> 1400 bool "Loongson 2F"
>> 1401 depends on SYS_HAS_CPU_LOONGSON2F
>> 1402 select CPU_LOONGSON2
>> 1403 select GPIOLIB
>> 1404 help
>> 1405 The Loongson 2F processor implements the MIPS III instruction set
>> 1406 with many extensions.
>> 1407
>> 1408 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1409 have a similar programming interface with FPGA northbridge used in
>> 1410 Loongson2E.
>> 1411
>> 1412 config CPU_LOONGSON1B
>> 1413 bool "Loongson 1B"
>> 1414 depends on SYS_HAS_CPU_LOONGSON1B
>> 1415 select CPU_LOONGSON1
>> 1416 select LEDS_GPIO_REGISTER
>> 1417 help
>> 1418 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1419 release 2 instruction set.
>> 1420
>> 1421 config CPU_LOONGSON1C
>> 1422 bool "Loongson 1C"
>> 1423 depends on SYS_HAS_CPU_LOONGSON1C
>> 1424 select CPU_LOONGSON1
>> 1425 select LEDS_GPIO_REGISTER
>> 1426 help
>> 1427 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1428 release 2 instruction set.
>> 1429
>> 1430 config CPU_MIPS32_R1
>> 1431 bool "MIPS32 Release 1"
>> 1432 depends on SYS_HAS_CPU_MIPS32_R1
>> 1433 select CPU_HAS_PREFETCH
>> 1434 select CPU_SUPPORTS_32BIT_KERNEL
>> 1435 select CPU_SUPPORTS_HIGHMEM
>> 1436 help
>> 1437 Choose this option to build a kernel for release 1 or later of the
>> 1438 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1439 MIPS processor are based on a MIPS32 processor. If you know the
>> 1440 specific type of processor in your system, choose those that one
>> 1441 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1442 Release 2 of the MIPS32 architecture is available since several
>> 1443 years so chances are you even have a MIPS32 Release 2 processor
>> 1444 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1445 performance.
>> 1446
>> 1447 config CPU_MIPS32_R2
>> 1448 bool "MIPS32 Release 2"
>> 1449 depends on SYS_HAS_CPU_MIPS32_R2
>> 1450 select CPU_HAS_PREFETCH
>> 1451 select CPU_SUPPORTS_32BIT_KERNEL
>> 1452 select CPU_SUPPORTS_HIGHMEM
>> 1453 select CPU_SUPPORTS_MSA
>> 1454 select HAVE_KVM
>> 1455 help
>> 1456 Choose this option to build a kernel for release 2 or later of the
>> 1457 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1458 MIPS processor are based on a MIPS32 processor. If you know the
>> 1459 specific type of processor in your system, choose those that one
>> 1460 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1461
>> 1462 config CPU_MIPS32_R6
>> 1463 bool "MIPS32 Release 6"
>> 1464 depends on SYS_HAS_CPU_MIPS32_R6
>> 1465 select CPU_HAS_PREFETCH
>> 1466 select CPU_SUPPORTS_32BIT_KERNEL
>> 1467 select CPU_SUPPORTS_HIGHMEM
>> 1468 select CPU_SUPPORTS_MSA
>> 1469 select GENERIC_CSUM
>> 1470 select HAVE_KVM
>> 1471 select MIPS_O32_FP64_SUPPORT
>> 1472 help
>> 1473 Choose this option to build a kernel for release 6 or later of the
>> 1474 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1475 family, are based on a MIPS32r6 processor. If you own an older
>> 1476 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1477
>> 1478 config CPU_MIPS64_R1
>> 1479 bool "MIPS64 Release 1"
>> 1480 depends on SYS_HAS_CPU_MIPS64_R1
>> 1481 select CPU_HAS_PREFETCH
>> 1482 select CPU_SUPPORTS_32BIT_KERNEL
>> 1483 select CPU_SUPPORTS_64BIT_KERNEL
>> 1484 select CPU_SUPPORTS_HIGHMEM
>> 1485 select CPU_SUPPORTS_HUGEPAGES
>> 1486 help
>> 1487 Choose this option to build a kernel for release 1 or later of the
>> 1488 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1489 MIPS processor are based on a MIPS64 processor. If you know the
>> 1490 specific type of processor in your system, choose those that one
>> 1491 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1492 Release 2 of the MIPS64 architecture is available since several
>> 1493 years so chances are you even have a MIPS64 Release 2 processor
>> 1494 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1495 performance.
>> 1496
>> 1497 config CPU_MIPS64_R2
>> 1498 bool "MIPS64 Release 2"
>> 1499 depends on SYS_HAS_CPU_MIPS64_R2
>> 1500 select CPU_HAS_PREFETCH
>> 1501 select CPU_SUPPORTS_32BIT_KERNEL
>> 1502 select CPU_SUPPORTS_64BIT_KERNEL
>> 1503 select CPU_SUPPORTS_HIGHMEM
>> 1504 select CPU_SUPPORTS_HUGEPAGES
>> 1505 select CPU_SUPPORTS_MSA
>> 1506 select HAVE_KVM
>> 1507 help
>> 1508 Choose this option to build a kernel for release 2 or later of the
>> 1509 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1510 MIPS processor are based on a MIPS64 processor. If you know the
>> 1511 specific type of processor in your system, choose those that one
>> 1512 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1513
>> 1514 config CPU_MIPS64_R6
>> 1515 bool "MIPS64 Release 6"
>> 1516 depends on SYS_HAS_CPU_MIPS64_R6
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_SUPPORTS_32BIT_KERNEL
>> 1519 select CPU_SUPPORTS_64BIT_KERNEL
>> 1520 select CPU_SUPPORTS_HIGHMEM
>> 1521 select CPU_SUPPORTS_MSA
>> 1522 select GENERIC_CSUM
>> 1523 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1524 select HAVE_KVM
>> 1525 help
>> 1526 Choose this option to build a kernel for release 6 or later of the
>> 1527 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1528 family, are based on a MIPS64r6 processor. If you own an older
>> 1529 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1530
>> 1531 config CPU_R3000
>> 1532 bool "R3000"
>> 1533 depends on SYS_HAS_CPU_R3000
>> 1534 select CPU_HAS_WB
>> 1535 select CPU_SUPPORTS_32BIT_KERNEL
>> 1536 select CPU_SUPPORTS_HIGHMEM
>> 1537 help
>> 1538 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1539 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1540 *not* work on R4000 machines and vice versa. However, since most
>> 1541 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1542 might be a safe bet. If the resulting kernel does not work,
>> 1543 try to recompile with R3000.
>> 1544
>> 1545 config CPU_TX39XX
>> 1546 bool "R39XX"
>> 1547 depends on SYS_HAS_CPU_TX39XX
>> 1548 select CPU_SUPPORTS_32BIT_KERNEL
>> 1549
>> 1550 config CPU_VR41XX
>> 1551 bool "R41xx"
>> 1552 depends on SYS_HAS_CPU_VR41XX
>> 1553 select CPU_SUPPORTS_32BIT_KERNEL
>> 1554 select CPU_SUPPORTS_64BIT_KERNEL
>> 1555 help
>> 1556 The options selects support for the NEC VR4100 series of processors.
>> 1557 Only choose this option if you have one of these processors as a
>> 1558 kernel built with this option will not run on any other type of
>> 1559 processor or vice versa.
>> 1560
>> 1561 config CPU_R4300
>> 1562 bool "R4300"
>> 1563 depends on SYS_HAS_CPU_R4300
>> 1564 select CPU_SUPPORTS_32BIT_KERNEL
>> 1565 select CPU_SUPPORTS_64BIT_KERNEL
>> 1566 help
>> 1567 MIPS Technologies R4300-series processors.
>> 1568
>> 1569 config CPU_R4X00
>> 1570 bool "R4x00"
>> 1571 depends on SYS_HAS_CPU_R4X00
>> 1572 select CPU_SUPPORTS_32BIT_KERNEL
>> 1573 select CPU_SUPPORTS_64BIT_KERNEL
>> 1574 select CPU_SUPPORTS_HUGEPAGES
>> 1575 help
>> 1576 MIPS Technologies R4000-series processors other than 4300, including
>> 1577 the R4000, R4400, R4600, and 4700.
>> 1578
>> 1579 config CPU_TX49XX
>> 1580 bool "R49XX"
>> 1581 depends on SYS_HAS_CPU_TX49XX
>> 1582 select CPU_HAS_PREFETCH
>> 1583 select CPU_SUPPORTS_32BIT_KERNEL
>> 1584 select CPU_SUPPORTS_64BIT_KERNEL
>> 1585 select CPU_SUPPORTS_HUGEPAGES
>> 1586
>> 1587 config CPU_R5000
>> 1588 bool "R5000"
>> 1589 depends on SYS_HAS_CPU_R5000
>> 1590 select CPU_SUPPORTS_32BIT_KERNEL
>> 1591 select CPU_SUPPORTS_64BIT_KERNEL
>> 1592 select CPU_SUPPORTS_HUGEPAGES
>> 1593 help
>> 1594 MIPS Technologies R5000-series processors other than the Nevada.
>> 1595
>> 1596 config CPU_R5432
>> 1597 bool "R5432"
>> 1598 depends on SYS_HAS_CPU_R5432
>> 1599 select CPU_SUPPORTS_32BIT_KERNEL
>> 1600 select CPU_SUPPORTS_64BIT_KERNEL
>> 1601 select CPU_SUPPORTS_HUGEPAGES
>> 1602
>> 1603 config CPU_R5500
>> 1604 bool "R5500"
>> 1605 depends on SYS_HAS_CPU_R5500
>> 1606 select CPU_SUPPORTS_32BIT_KERNEL
>> 1607 select CPU_SUPPORTS_64BIT_KERNEL
>> 1608 select CPU_SUPPORTS_HUGEPAGES
>> 1609 help
>> 1610 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1611 instruction set.
>> 1612
>> 1613 config CPU_NEVADA
>> 1614 bool "RM52xx"
>> 1615 depends on SYS_HAS_CPU_NEVADA
>> 1616 select CPU_SUPPORTS_32BIT_KERNEL
>> 1617 select CPU_SUPPORTS_64BIT_KERNEL
>> 1618 select CPU_SUPPORTS_HUGEPAGES
>> 1619 help
>> 1620 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1621
>> 1622 config CPU_R8000
>> 1623 bool "R8000"
>> 1624 depends on SYS_HAS_CPU_R8000
>> 1625 select CPU_HAS_PREFETCH
>> 1626 select CPU_SUPPORTS_64BIT_KERNEL
>> 1627 help
>> 1628 MIPS Technologies R8000 processors. Note these processors are
>> 1629 uncommon and the support for them is incomplete.
>> 1630
>> 1631 config CPU_R10000
>> 1632 bool "R10000"
>> 1633 depends on SYS_HAS_CPU_R10000
>> 1634 select CPU_HAS_PREFETCH
>> 1635 select CPU_SUPPORTS_32BIT_KERNEL
>> 1636 select CPU_SUPPORTS_64BIT_KERNEL
>> 1637 select CPU_SUPPORTS_HIGHMEM
>> 1638 select CPU_SUPPORTS_HUGEPAGES
>> 1639 help
>> 1640 MIPS Technologies R10000-series processors.
>> 1641
>> 1642 config CPU_RM7000
>> 1643 bool "RM7000"
>> 1644 depends on SYS_HAS_CPU_RM7000
>> 1645 select CPU_HAS_PREFETCH
>> 1646 select CPU_SUPPORTS_32BIT_KERNEL
>> 1647 select CPU_SUPPORTS_64BIT_KERNEL
>> 1648 select CPU_SUPPORTS_HIGHMEM
>> 1649 select CPU_SUPPORTS_HUGEPAGES
>> 1650
>> 1651 config CPU_SB1
>> 1652 bool "SB1"
>> 1653 depends on SYS_HAS_CPU_SB1
>> 1654 select CPU_SUPPORTS_32BIT_KERNEL
>> 1655 select CPU_SUPPORTS_64BIT_KERNEL
>> 1656 select CPU_SUPPORTS_HIGHMEM
>> 1657 select CPU_SUPPORTS_HUGEPAGES
>> 1658 select WEAK_ORDERING
>> 1659
>> 1660 config CPU_CAVIUM_OCTEON
>> 1661 bool "Cavium Octeon processor"
>> 1662 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1663 select CPU_HAS_PREFETCH
>> 1664 select CPU_SUPPORTS_64BIT_KERNEL
>> 1665 select WEAK_ORDERING
>> 1666 select CPU_SUPPORTS_HIGHMEM
>> 1667 select CPU_SUPPORTS_HUGEPAGES
>> 1668 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1669 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1670 select MIPS_L1_CACHE_SHIFT_7
>> 1671 select HAVE_KVM
>> 1672 help
>> 1673 The Cavium Octeon processor is a highly integrated chip containing
>> 1674 many ethernet hardware widgets for networking tasks. The processor
>> 1675 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1676 Full details can be found at http://www.caviumnetworks.com.
>> 1677
>> 1678 config CPU_BMIPS
>> 1679 bool "Broadcom BMIPS"
>> 1680 depends on SYS_HAS_CPU_BMIPS
>> 1681 select CPU_MIPS32
>> 1682 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1683 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1684 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1685 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1686 select CPU_SUPPORTS_32BIT_KERNEL
>> 1687 select DMA_NONCOHERENT
>> 1688 select IRQ_MIPS_CPU
>> 1689 select SWAP_IO_SPACE
>> 1690 select WEAK_ORDERING
>> 1691 select CPU_SUPPORTS_HIGHMEM
>> 1692 select CPU_HAS_PREFETCH
>> 1693 select CPU_SUPPORTS_CPUFREQ
>> 1694 select MIPS_EXTERNAL_TIMER
>> 1695 help
>> 1696 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1697
>> 1698 config CPU_XLR
>> 1699 bool "Netlogic XLR SoC"
>> 1700 depends on SYS_HAS_CPU_XLR
>> 1701 select CPU_SUPPORTS_32BIT_KERNEL
>> 1702 select CPU_SUPPORTS_64BIT_KERNEL
>> 1703 select CPU_SUPPORTS_HIGHMEM
>> 1704 select CPU_SUPPORTS_HUGEPAGES
>> 1705 select WEAK_ORDERING
>> 1706 select WEAK_REORDERING_BEYOND_LLSC
>> 1707 help
>> 1708 Netlogic Microsystems XLR/XLS processors.
>> 1709
>> 1710 config CPU_XLP
>> 1711 bool "Netlogic XLP SoC"
>> 1712 depends on SYS_HAS_CPU_XLP
>> 1713 select CPU_SUPPORTS_32BIT_KERNEL
>> 1714 select CPU_SUPPORTS_64BIT_KERNEL
>> 1715 select CPU_SUPPORTS_HIGHMEM
>> 1716 select WEAK_ORDERING
>> 1717 select WEAK_REORDERING_BEYOND_LLSC
>> 1718 select CPU_HAS_PREFETCH
>> 1719 select CPU_MIPSR2
>> 1720 select CPU_SUPPORTS_HUGEPAGES
>> 1721 select MIPS_ASID_BITS_VARIABLE
173 help 1722 help
174 Enable if core variant has Performan !! 1723 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1724 endchoice
176 <<
177 If unsure, say N. <<
178 1725
179 config XTENSA_FAKE_NMI !! 1726 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1727 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1728 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1729 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1730 help
>> 1731 Choose this option to build a kernel for release 2 or later of the
>> 1732 MIPS32 architecture including features from the 3.5 release such as
>> 1733 support for Enhanced Virtual Addressing (EVA).
>> 1734
>> 1735 config CPU_MIPS32_3_5_EVA
>> 1736 bool "Enhanced Virtual Addressing (EVA)"
>> 1737 depends on CPU_MIPS32_3_5_FEATURES
>> 1738 select EVA
>> 1739 default y
>> 1740 help
>> 1741 Choose this option if you want to enable the Enhanced Virtual
>> 1742 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1743 One of its primary benefits is an increase in the maximum size
>> 1744 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1745
>> 1746 config CPU_MIPS32_R5_FEATURES
>> 1747 bool "MIPS32 Release 5 Features"
>> 1748 depends on SYS_HAS_CPU_MIPS32_R5
>> 1749 depends on CPU_MIPS32_R2
>> 1750 help
>> 1751 Choose this option to build a kernel for release 2 or later of the
>> 1752 MIPS32 architecture including features from release 5 such as
>> 1753 support for Extended Physical Addressing (XPA).
>> 1754
>> 1755 config CPU_MIPS32_R5_XPA
>> 1756 bool "Extended Physical Addressing (XPA)"
>> 1757 depends on CPU_MIPS32_R5_FEATURES
>> 1758 depends on !EVA
>> 1759 depends on !PAGE_SIZE_4KB
>> 1760 depends on SYS_SUPPORTS_HIGHMEM
>> 1761 select XPA
>> 1762 select HIGHMEM
>> 1763 select ARCH_PHYS_ADDR_T_64BIT
182 default n 1764 default n
183 help 1765 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1766 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1767 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1768 benefit is to increase physical addressing equal to or greater
>> 1769 than 40 bits. Note that this has the side effect of turning on
>> 1770 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1771 If unsure, say 'N' here.
186 1772
187 If there are other interrupts at or !! 1773 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1774 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1775 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1776
193 If unsure, say N. !! 1777 config CPU_JUMP_WORKAROUNDS
>> 1778 bool
194 1779
195 config PFAULT !! 1780 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1781 bool "Loongson 2F Workarounds"
197 default y 1782 default y
>> 1783 select CPU_NOP_WORKAROUNDS
>> 1784 select CPU_JUMP_WORKAROUNDS
198 help 1785 help
199 Handle protection faults. MMU config !! 1786 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1787 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1788 unexpectedly. For more information please refer to the gas
>> 1789 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1790
>> 1791 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1792 are needed. The workarounds have no significant side effect on them
>> 1793 but may decrease the performance of the system so this option should
>> 1794 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1795 systems.
202 1796
203 If unsure, say Y. !! 1797 If unsure, please say Y.
>> 1798 endif # CPU_LOONGSON2F
204 1799
205 config XTENSA_UNALIGNED_USER !! 1800 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1801 bool
207 help !! 1802 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1803 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1804 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1805 select HAVE_KERNEL_LZMA
>> 1806 select HAVE_KERNEL_LZO
>> 1807 select HAVE_KERNEL_XZ
211 1808
212 Say Y here to enable unaligned memor !! 1809 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1810 bool
>> 1811 select SYS_SUPPORTS_ZBOOT
213 1812
214 config XTENSA_LOAD_STORE !! 1813 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1814 bool
216 help !! 1815 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1816
223 Say Y here to enable exception handl !! 1817 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1818 bool
>> 1819 select CPU_SUPPORTS_32BIT_KERNEL
>> 1820 select CPU_SUPPORTS_64BIT_KERNEL
>> 1821 select CPU_SUPPORTS_HIGHMEM
>> 1822 select CPU_SUPPORTS_HUGEPAGES
225 1823
226 config HAVE_SMP !! 1824 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1825 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1826 select CPU_MIPS32
229 select XTENSA_MX !! 1827 select CPU_MIPSR2
230 help !! 1828 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1829 select CPU_SUPPORTS_32BIT_KERNEL
232 supports Multiprocessing. Multiproce !! 1830 select CPU_SUPPORTS_HIGHMEM
233 the CPU core definition and currentl !! 1831 select CPU_SUPPORTS_CPUFREQ
234 1832
235 Multiprocessor support is implemente !! 1833 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1834 select SMP_UP if SMP
>> 1835 bool
237 1836
238 The MX interrupt distributer adds In !! 1837 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1838 bool
240 like the open cores ethernet driver !! 1839 select SYS_SUPPORTS_SMP
>> 1840 select SYS_SUPPORTS_HOTPLUG_CPU
241 1841
242 You still have to select "Enable SMP !! 1842 config CPU_BMIPS4380
>> 1843 bool
>> 1844 select MIPS_L1_CACHE_SHIFT_6
>> 1845 select SYS_SUPPORTS_SMP
>> 1846 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1847 select CPU_HAS_RIXI
243 1848
244 config SMP !! 1849 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1850 bool
246 depends on HAVE_SMP !! 1851 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1852 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1853 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1854 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1855 select CPU_HAS_RIXI
251 1856
252 config NR_CPUS !! 1857 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1858 bool
254 int "Maximum number of CPUs (2-32)" !! 1859 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1860 select CPU_HAS_RIXI
256 default "4" <<
257 1861
258 config HOTPLUG_CPU !! 1862 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1863 bool
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 1864
265 Say N if you want to disable CPU hot !! 1865 config SYS_HAS_CPU_LOONGSON2F
>> 1866 bool
>> 1867 select CPU_SUPPORTS_CPUFREQ
>> 1868 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1869 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1870
>> 1871 config SYS_HAS_CPU_LOONGSON1B
>> 1872 bool
>> 1873
>> 1874 config SYS_HAS_CPU_LOONGSON1C
>> 1875 bool
>> 1876
>> 1877 config SYS_HAS_CPU_MIPS32_R1
>> 1878 bool
>> 1879
>> 1880 config SYS_HAS_CPU_MIPS32_R2
>> 1881 bool
>> 1882
>> 1883 config SYS_HAS_CPU_MIPS32_R3_5
>> 1884 bool
>> 1885
>> 1886 config SYS_HAS_CPU_MIPS32_R5
>> 1887 bool
>> 1888
>> 1889 config SYS_HAS_CPU_MIPS32_R6
>> 1890 bool
>> 1891
>> 1892 config SYS_HAS_CPU_MIPS64_R1
>> 1893 bool
>> 1894
>> 1895 config SYS_HAS_CPU_MIPS64_R2
>> 1896 bool
>> 1897
>> 1898 config SYS_HAS_CPU_MIPS64_R6
>> 1899 bool
>> 1900
>> 1901 config SYS_HAS_CPU_R3000
>> 1902 bool
>> 1903
>> 1904 config SYS_HAS_CPU_TX39XX
>> 1905 bool
>> 1906
>> 1907 config SYS_HAS_CPU_VR41XX
>> 1908 bool
>> 1909
>> 1910 config SYS_HAS_CPU_R4300
>> 1911 bool
>> 1912
>> 1913 config SYS_HAS_CPU_R4X00
>> 1914 bool
>> 1915
>> 1916 config SYS_HAS_CPU_TX49XX
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_R5000
>> 1920 bool
>> 1921
>> 1922 config SYS_HAS_CPU_R5432
>> 1923 bool
>> 1924
>> 1925 config SYS_HAS_CPU_R5500
>> 1926 bool
266 1927
267 config SECONDARY_RESET_VECTOR !! 1928 config SYS_HAS_CPU_NEVADA
268 bool "Secondary cores use alternative !! 1929 bool
>> 1930
>> 1931 config SYS_HAS_CPU_R8000
>> 1932 bool
>> 1933
>> 1934 config SYS_HAS_CPU_R10000
>> 1935 bool
>> 1936
>> 1937 config SYS_HAS_CPU_RM7000
>> 1938 bool
>> 1939
>> 1940 config SYS_HAS_CPU_SB1
>> 1941 bool
>> 1942
>> 1943 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1944 bool
>> 1945
>> 1946 config SYS_HAS_CPU_BMIPS
>> 1947 bool
>> 1948
>> 1949 config SYS_HAS_CPU_BMIPS32_3300
>> 1950 bool
>> 1951 select SYS_HAS_CPU_BMIPS
>> 1952
>> 1953 config SYS_HAS_CPU_BMIPS4350
>> 1954 bool
>> 1955 select SYS_HAS_CPU_BMIPS
>> 1956
>> 1957 config SYS_HAS_CPU_BMIPS4380
>> 1958 bool
>> 1959 select SYS_HAS_CPU_BMIPS
>> 1960
>> 1961 config SYS_HAS_CPU_BMIPS5000
>> 1962 bool
>> 1963 select SYS_HAS_CPU_BMIPS
>> 1964
>> 1965 config SYS_HAS_CPU_XLR
>> 1966 bool
>> 1967
>> 1968 config SYS_HAS_CPU_XLP
>> 1969 bool
>> 1970
>> 1971 config MIPS_MALTA_PM
>> 1972 depends on MIPS_MALTA
>> 1973 depends on PCI
>> 1974 bool
269 default y 1975 default y
270 depends on HAVE_SMP !! 1976
>> 1977 #
>> 1978 # CPU may reorder R->R, R->W, W->R, W->W
>> 1979 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1980 #
>> 1981 config WEAK_ORDERING
>> 1982 bool
>> 1983
>> 1984 #
>> 1985 # CPU may reorder reads and writes beyond LL/SC
>> 1986 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1987 #
>> 1988 config WEAK_REORDERING_BEYOND_LLSC
>> 1989 bool
>> 1990 endmenu
>> 1991
>> 1992 #
>> 1993 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 1994 #
>> 1995 config CPU_MIPS32
>> 1996 bool
>> 1997 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1998
>> 1999 config CPU_MIPS64
>> 2000 bool
>> 2001 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2002
>> 2003 #
>> 2004 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2005 #
>> 2006 config CPU_MIPSR1
>> 2007 bool
>> 2008 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2009
>> 2010 config CPU_MIPSR2
>> 2011 bool
>> 2012 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2013 select CPU_HAS_RIXI
>> 2014 select MIPS_SPRAM
>> 2015
>> 2016 config CPU_MIPSR6
>> 2017 bool
>> 2018 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2019 select CPU_HAS_RIXI
>> 2020 select HAVE_ARCH_BITREVERSE
>> 2021 select MIPS_ASID_BITS_VARIABLE
>> 2022 select MIPS_SPRAM
>> 2023
>> 2024 config EVA
>> 2025 bool
>> 2026
>> 2027 config XPA
>> 2028 bool
>> 2029
>> 2030 config SYS_SUPPORTS_32BIT_KERNEL
>> 2031 bool
>> 2032 config SYS_SUPPORTS_64BIT_KERNEL
>> 2033 bool
>> 2034 config CPU_SUPPORTS_32BIT_KERNEL
>> 2035 bool
>> 2036 config CPU_SUPPORTS_64BIT_KERNEL
>> 2037 bool
>> 2038 config CPU_SUPPORTS_CPUFREQ
>> 2039 bool
>> 2040 config CPU_SUPPORTS_ADDRWINCFG
>> 2041 bool
>> 2042 config CPU_SUPPORTS_HUGEPAGES
>> 2043 bool
>> 2044 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2045 bool
>> 2046 config MIPS_PGD_C0_CONTEXT
>> 2047 bool
>> 2048 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2049
>> 2050 #
>> 2051 # Set to y for ptrace access to watch registers.
>> 2052 #
>> 2053 config HARDWARE_WATCHPOINTS
>> 2054 bool
>> 2055 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2056
>> 2057 menu "Kernel type"
>> 2058
>> 2059 choice
>> 2060 prompt "Kernel code model"
271 help 2061 help
272 Secondary cores may be configured to !! 2062 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2063 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2064 large memory. You will only be presented a single option in this
>> 2065 menu if your system does not support both 32-bit and 64-bit kernels.
275 2066
276 config FAST_SYSCALL_XTENSA !! 2067 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2068 bool "32-bit kernel"
278 default n !! 2069 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2070 select TRAD_SIGNALS
279 help 2071 help
280 fast_syscall_xtensa is a syscall tha !! 2072 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2073
283 This syscall is deprecated. It may h !! 2074 config 64BIT
284 invalid arguments. It is provided on !! 2075 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2076 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2077 help
>> 2078 Select this option if you want to build a 64-bit kernel.
286 2079
287 If unsure, say N. !! 2080 endchoice
288 2081
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2082 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2083 bool "KVM Guest Kernel"
291 default n !! 2084 depends on BROKEN_ON_SMP
>> 2085 help
>> 2086 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2087 mode.
>> 2088
>> 2089 config KVM_GUEST_TIMER_FREQ
>> 2090 int "Count/Compare Timer Frequency (MHz)"
>> 2091 depends on KVM_GUEST
>> 2092 default 100
292 help 2093 help
293 fast_syscall_spill_registers is a sy !! 2094 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2095 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2096 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2097
297 invalid arguments. It is provided on !! 2098 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2099 bool "48 bits virtual memory"
>> 2100 depends on 64BIT
>> 2101 help
>> 2102 Support a maximum at least 48 bits of application virtual
>> 2103 memory. Default is 40 bits or less, depending on the CPU.
>> 2104 For page sizes 16k and above, this option results in a small
>> 2105 memory overhead for page tables. For 4k page size, a fourth
>> 2106 level of page tables is added which imposes both a memory
>> 2107 overhead as well as slower TLB fault handling.
299 2108
300 If unsure, say N. 2109 If unsure, say N.
301 2110
302 choice 2111 choice
303 prompt "Kernel ABI" !! 2112 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2113 default PAGE_SIZE_4KB
305 help !! 2114
306 Select ABI for the kernel code. This !! 2115 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2116 bool "4kB"
308 kernel/userspace ABI is possible and !! 2117 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2118 help
310 In case both kernel and userspace su !! 2119 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2120 R3000-family processors this is the only available page size. Using
312 build. !! 2121 4kB page size will minimize memory consumption and is therefore
313 !! 2122 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2123
315 !! 2124 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2125 bool "8kB"
317 bool "Default ABI" !! 2126 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2127 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2128 help
320 selected for the toolchain. !! 2129 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2130 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2131 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2132 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2133
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2134 config PAGE_SIZE_16KB
326 help !! 2135 bool "16kB"
327 Select this option to compile kernel !! 2136 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2137 help
329 When this option is not selected the !! 2138 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2139 the price of higher memory consumption. This option is available on
>> 2140 all non-R3000 family processors. Note that you will need a suitable
>> 2141 Linux distribution to support this.
>> 2142
>> 2143 config PAGE_SIZE_32KB
>> 2144 bool "32kB"
>> 2145 depends on CPU_CAVIUM_OCTEON
>> 2146 depends on !MIPS_VA_BITS_48
>> 2147 help
>> 2148 Using 32kB page size will result in higher performance kernel at
>> 2149 the price of higher memory consumption. This option is available
>> 2150 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2151 distribution to support this.
>> 2152
>> 2153 config PAGE_SIZE_64KB
>> 2154 bool "64kB"
>> 2155 depends on !CPU_R3000 && !CPU_TX39XX
>> 2156 help
>> 2157 Using 64kB page size will result in higher performance kernel at
>> 2158 the price of higher memory consumption. This option is available on
>> 2159 all non-R3000 family processor. Not that at the time of this
>> 2160 writing this option is still high experimental.
331 2161
332 endchoice 2162 endchoice
333 2163
334 config USER_ABI_CALL0 !! 2164 config FORCE_MAX_ZONEORDER
>> 2165 int "Maximum zone order"
>> 2166 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2167 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2168 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2169 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2170 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2171 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2172 range 11 64
>> 2173 default "11"
>> 2174 help
>> 2175 The kernel memory allocator divides physically contiguous memory
>> 2176 blocks into "zones", where each zone is a power of two number of
>> 2177 pages. This option selects the largest power of two that the kernel
>> 2178 keeps in the memory allocator. If you need to allocate very large
>> 2179 blocks of physically contiguous memory, then you may need to
>> 2180 increase this value.
>> 2181
>> 2182 This config option is actually maximum order plus one. For example,
>> 2183 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2184
>> 2185 The page size is not necessarily 4KB. Keep this in mind
>> 2186 when choosing a value for this option.
>> 2187
>> 2188 config BOARD_SCACHE
335 bool 2189 bool
336 2190
337 choice !! 2191 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2192 bool
339 default USER_ABI_DEFAULT !! 2193 select BOARD_SCACHE
>> 2194
>> 2195 #
>> 2196 # Support for a MIPS32 / MIPS64 style S-caches
>> 2197 #
>> 2198 config MIPS_CPU_SCACHE
>> 2199 bool
>> 2200 select BOARD_SCACHE
>> 2201
>> 2202 config R5000_CPU_SCACHE
>> 2203 bool
>> 2204 select BOARD_SCACHE
>> 2205
>> 2206 config RM7000_CPU_SCACHE
>> 2207 bool
>> 2208 select BOARD_SCACHE
>> 2209
>> 2210 config SIBYTE_DMA_PAGEOPS
>> 2211 bool "Use DMA to clear/copy pages"
>> 2212 depends on CPU_SB1
340 help 2213 help
341 Select supported userspace ABI. !! 2214 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2215 channel. These DMA channels are otherwise unused by the standard
>> 2216 SiByte Linux port. Seems to give a small performance benefit.
>> 2217
>> 2218 config CPU_HAS_PREFETCH
>> 2219 bool
>> 2220
>> 2221 config CPU_GENERIC_DUMP_TLB
>> 2222 bool
>> 2223 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
>> 2224
>> 2225 config CPU_R4K_FPU
>> 2226 bool
>> 2227 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2228
>> 2229 config CPU_R4K_CACHE_TLB
>> 2230 bool
>> 2231 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
342 2232
343 If unsure, choose the default ABI. !! 2233 config MIPS_MT_SMP
>> 2234 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2235 default y
>> 2236 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2237 select CPU_MIPSR2_IRQ_VI
>> 2238 select CPU_MIPSR2_IRQ_EI
>> 2239 select SYNC_R4K
>> 2240 select MIPS_MT
>> 2241 select SMP
>> 2242 select SMP_UP
>> 2243 select SYS_SUPPORTS_SMP
>> 2244 select SYS_SUPPORTS_SCHED_SMT
>> 2245 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2246 help
>> 2247 This is a kernel model which is known as SMVP. This is supported
>> 2248 on cores with the MT ASE and uses the available VPEs to implement
>> 2249 virtual processors which supports SMP. This is equivalent to the
>> 2250 Intel Hyperthreading feature. For further information go to
>> 2251 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2252
>> 2253 config MIPS_MT
>> 2254 bool
344 2255
345 config USER_ABI_DEFAULT !! 2256 config SCHED_SMT
346 bool "Default ABI only" !! 2257 bool "SMT (multithreading) scheduler support"
>> 2258 depends on SYS_SUPPORTS_SCHED_SMT
>> 2259 default n
347 help 2260 help
348 Assume default userspace ABI. For XE !! 2261 SMT scheduler support improves the CPU scheduler's decision making
349 call0 ABI binaries may be run on suc !! 2262 when dealing with MIPS MT enabled cores at a cost of slightly
350 will not work correctly for them. !! 2263 increased overhead in some places. If unsure say N here.
>> 2264
>> 2265 config SYS_SUPPORTS_SCHED_SMT
>> 2266 bool
>> 2267
>> 2268 config SYS_SUPPORTS_MULTITHREADING
>> 2269 bool
>> 2270
>> 2271 config MIPS_MT_FPAFF
>> 2272 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2273 default y
>> 2274 depends on MIPS_MT_SMP
351 2275
352 config USER_ABI_CALL0_ONLY !! 2276 config MIPSR2_TO_R6_EMULATOR
353 bool "Call0 ABI only" !! 2277 bool "MIPS R2-to-R6 emulator"
354 select USER_ABI_CALL0 !! 2278 depends on CPU_MIPSR6
>> 2279 default y
355 help 2280 help
356 Select this option to support only c !! 2281 Choose this option if you want to run non-R6 MIPS userland code.
357 Windowed ABI binaries will crash wit !! 2282 Even if you say 'Y' here, the emulator will still be disabled by
358 an illegal instruction exception on !! 2283 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2284 The only reason this is a build-time option is to save ~14K from the
>> 2285 final kernel image.
359 2286
360 Choose this option if you're plannin !! 2287 config SYS_SUPPORTS_VPE_LOADER
361 built with call0 ABI. !! 2288 bool
>> 2289 depends on SYS_SUPPORTS_MULTITHREADING
>> 2290 help
>> 2291 Indicates that the platform supports the VPE loader, and provides
>> 2292 physical_memsize.
362 2293
363 config USER_ABI_CALL0_PROBE !! 2294 config MIPS_VPE_LOADER
364 bool "Support both windowed and call0 !! 2295 bool "VPE loader support."
365 select USER_ABI_CALL0 !! 2296 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2297 select CPU_MIPSR2_IRQ_VI
>> 2298 select CPU_MIPSR2_IRQ_EI
>> 2299 select MIPS_MT
366 help 2300 help
367 Select this option to support both w !! 2301 Includes a loader for loading an elf relocatable object
368 ABIs. When enabled all processes are !! 2302 onto another VPE and running it.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 2303
373 This option should be enabled for th !! 2304 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2305 bool
>> 2306 default "y"
>> 2307 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2308
376 Note that Xtensa ISA does not guaran !! 2309 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2310 bool
378 PS.WOE is disabled, check whether th !! 2311 default "y"
>> 2312 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2313
380 endchoice !! 2314 config MIPS_VPE_LOADER_TOM
>> 2315 bool "Load VPE program into memory hidden from linux"
>> 2316 depends on MIPS_VPE_LOADER
>> 2317 default y
>> 2318 help
>> 2319 The loader can use memory that is present but has been hidden from
>> 2320 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2321 you to ensure the amount you put in the option and the space your
>> 2322 program requires is less or equal to the amount physically present.
381 2323
382 endmenu !! 2324 config MIPS_VPE_APSP_API
>> 2325 bool "Enable support for AP/SP API (RTLX)"
>> 2326 depends on MIPS_VPE_LOADER
>> 2327 help
383 2328
384 config XTENSA_CALIBRATE_CCOUNT !! 2329 config MIPS_VPE_APSP_API_CMP
385 def_bool n !! 2330 bool
>> 2331 default "y"
>> 2332 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2333
>> 2334 config MIPS_VPE_APSP_API_MT
>> 2335 bool
>> 2336 default "y"
>> 2337 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2338
>> 2339 config MIPS_CMP
>> 2340 bool "MIPS CMP framework support (DEPRECATED)"
>> 2341 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2342 select SMP
>> 2343 select SYNC_R4K
>> 2344 select SYS_SUPPORTS_SMP
>> 2345 select WEAK_ORDERING
>> 2346 default n
386 help 2347 help
387 On some platforms (XT2000, for examp !! 2348 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2349 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2350 its ability to start secondary CPUs.
>> 2351
>> 2352 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2353 instead of this.
>> 2354
>> 2355 config MIPS_CPS
>> 2356 bool "MIPS Coherent Processing System support"
>> 2357 depends on SYS_SUPPORTS_MIPS_CPS
>> 2358 select MIPS_CM
>> 2359 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2360 select SMP
>> 2361 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2362 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2363 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2364 select SYS_SUPPORTS_SMP
>> 2365 select WEAK_ORDERING
>> 2366 help
>> 2367 Select this if you wish to run an SMP kernel across multiple cores
>> 2368 within a MIPS Coherent Processing System. When this option is
>> 2369 enabled the kernel will probe for other cores and boot them with
>> 2370 no external assistance. It is safe to enable this when hardware
>> 2371 support is unavailable.
390 2372
391 config SERIAL_CONSOLE !! 2373 config MIPS_CPS_PM
392 def_bool n !! 2374 depends on MIPS_CPS
>> 2375 bool
>> 2376
>> 2377 config MIPS_CM
>> 2378 bool
>> 2379 select MIPS_CPC
>> 2380
>> 2381 config MIPS_CPC
>> 2382 bool
>> 2383
>> 2384 config SB1_PASS_2_WORKAROUNDS
>> 2385 bool
>> 2386 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2387 default y
>> 2388
>> 2389 config SB1_PASS_2_1_WORKAROUNDS
>> 2390 bool
>> 2391 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2392 default y
393 2393
394 config PLATFORM_HAVE_XIP <<
395 def_bool n <<
396 2394
397 menu "Platform options" !! 2395 config ARCH_PHYS_ADDR_T_64BIT
>> 2396 bool
398 2397
399 choice 2398 choice
400 prompt "Xtensa System Type" !! 2399 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS <<
402 2400
403 config XTENSA_PLATFORM_ISS !! 2401 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
404 bool "ISS" !! 2402 bool "None"
405 select XTENSA_CALIBRATE_CCOUNT <<
406 select SERIAL_CONSOLE <<
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 <<
410 config XTENSA_PLATFORM_XT2000 <<
411 bool "XT2000" <<
412 help <<
413 XT2000 is the name of Tensilica's fe <<
414 This hardware is capable of running <<
415 <<
416 config XTENSA_PLATFORM_XTFPGA <<
417 bool "XTFPGA" <<
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2403 help
424 XTFPGA is the name of Tensilica boar !! 2404 Select this if you want neither microMIPS nor SmartMIPS support
425 This hardware is capable of running !! 2405
>> 2406 config CPU_HAS_SMARTMIPS
>> 2407 depends on SYS_SUPPORTS_SMARTMIPS
>> 2408 bool "SmartMIPS"
>> 2409 help
>> 2410 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2411 increased security at both hardware and software level for
>> 2412 smartcards. Enabling this option will allow proper use of the
>> 2413 SmartMIPS instructions by Linux applications. However a kernel with
>> 2414 this option will not work on a MIPS core without SmartMIPS core. If
>> 2415 you don't know you probably don't have SmartMIPS and should say N
>> 2416 here.
>> 2417
>> 2418 config CPU_MICROMIPS
>> 2419 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2420 bool "microMIPS"
>> 2421 help
>> 2422 When this option is enabled the kernel will be built using the
>> 2423 microMIPS ISA
426 2424
427 endchoice 2425 endchoice
428 2426
429 config PLATFORM_NR_IRQS !! 2427 config CPU_HAS_MSA
>> 2428 bool "Support for the MIPS SIMD Architecture"
>> 2429 depends on CPU_SUPPORTS_MSA
>> 2430 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2431 help
>> 2432 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2433 and a set of SIMD instructions to operate on them. When this option
>> 2434 is enabled the kernel will support allocating & switching MSA
>> 2435 vector register contexts. If you know that your kernel will only be
>> 2436 running on CPUs which do not support MSA or that your userland will
>> 2437 not be making use of it then you may wish to say N here to reduce
>> 2438 the size & complexity of your kernel.
>> 2439
>> 2440 If unsure, say Y.
>> 2441
>> 2442 config CPU_HAS_WB
>> 2443 bool
>> 2444
>> 2445 config XKS01
>> 2446 bool
>> 2447
>> 2448 config CPU_HAS_RIXI
>> 2449 bool
>> 2450
>> 2451 #
>> 2452 # Vectored interrupt mode is an R2 feature
>> 2453 #
>> 2454 config CPU_MIPSR2_IRQ_VI
>> 2455 bool
>> 2456
>> 2457 #
>> 2458 # Extended interrupt mode is an R2 feature
>> 2459 #
>> 2460 config CPU_MIPSR2_IRQ_EI
>> 2461 bool
>> 2462
>> 2463 config CPU_HAS_SYNC
>> 2464 bool
>> 2465 depends on !CPU_R3000
>> 2466 default y
>> 2467
>> 2468 #
>> 2469 # CPU non-features
>> 2470 #
>> 2471 config CPU_DADDI_WORKAROUNDS
>> 2472 bool
>> 2473
>> 2474 config CPU_R4000_WORKAROUNDS
>> 2475 bool
>> 2476 select CPU_R4400_WORKAROUNDS
>> 2477
>> 2478 config CPU_R4400_WORKAROUNDS
>> 2479 bool
>> 2480
>> 2481 config MIPS_ASID_SHIFT
430 int 2482 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2483 default 6 if CPU_R3000 || CPU_TX39XX
>> 2484 default 4 if CPU_R8000
432 default 0 2485 default 0
433 2486
434 config XTENSA_CPU_CLOCK !! 2487 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2488 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2489 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2490 default 6 if CPU_R3000 || CPU_TX39XX
>> 2491 default 8
438 2492
439 config GENERIC_CALIBRATE_DELAY !! 2493 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2494 bool
>> 2495
>> 2496 #
>> 2497 # - Highmem only makes sense for the 32-bit kernel.
>> 2498 # - The current highmem code will only work properly on physically indexed
>> 2499 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2500 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2501 # moment we protect the user and offer the highmem option only on machines
>> 2502 # where it's known to be safe. This will not offer highmem on a few systems
>> 2503 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2504 # indexed CPUs but we're playing safe.
>> 2505 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2506 # know they might have memory configurations that could make use of highmem
>> 2507 # support.
>> 2508 #
>> 2509 config HIGHMEM
>> 2510 bool "High Memory Support"
>> 2511 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2512
>> 2513 config CPU_SUPPORTS_HIGHMEM
>> 2514 bool
>> 2515
>> 2516 config SYS_SUPPORTS_HIGHMEM
>> 2517 bool
>> 2518
>> 2519 config SYS_SUPPORTS_SMARTMIPS
>> 2520 bool
>> 2521
>> 2522 config SYS_SUPPORTS_MICROMIPS
>> 2523 bool
>> 2524
>> 2525 config SYS_SUPPORTS_MIPS16
>> 2526 bool
441 help 2527 help
442 The BogoMIPS value can easily be der !! 2528 This option must be set if a kernel might be executed on a MIPS16-
>> 2529 enabled CPU even if MIPS16 is not actually being used. In other
>> 2530 words, it makes the kernel MIPS16-tolerant.
443 2531
444 config CMDLINE_BOOL !! 2532 config CPU_SUPPORTS_MSA
445 bool "Default bootloader kernel argume !! 2533 bool
446 2534
447 config CMDLINE !! 2535 config ARCH_FLATMEM_ENABLE
448 string "Initial kernel command string" !! 2536 def_bool y
449 depends on CMDLINE_BOOL !! 2537 depends on !NUMA && !CPU_LOONGSON2
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2538
458 config USE_OF !! 2539 config ARCH_DISCONTIGMEM_ENABLE
459 bool "Flattened Device Tree support" !! 2540 bool
460 select OF !! 2541 default y if SGI_IP27
461 select OF_EARLY_FLATTREE <<
462 help 2542 help
463 Include support for flattened device !! 2543 Say Y to support efficient handling of discontiguous physical memory,
>> 2544 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2545 or have huge holes in the physical address space for other reasons.
>> 2546 See <file:Documentation/vm/numa> for more.
464 2547
465 config BUILTIN_DTB_SOURCE !! 2548 config ARCH_SPARSEMEM_ENABLE
466 string "DTB to build into the kernel i !! 2549 bool
467 depends on OF !! 2550 select SPARSEMEM_STATIC
468 2551
469 config PARSE_BOOTPARAM !! 2552 config NUMA
470 bool "Parse bootparam block" !! 2553 bool "NUMA Support"
>> 2554 depends on SYS_SUPPORTS_NUMA
>> 2555 help
>> 2556 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2557 Access). This option improves performance on systems with more
>> 2558 than two nodes; on two node systems it is generally better to
>> 2559 leave it disabled; on single node systems disable this option
>> 2560 disabled.
>> 2561
>> 2562 config SYS_SUPPORTS_NUMA
>> 2563 bool
>> 2564
>> 2565 config RELOCATABLE
>> 2566 bool "Relocatable kernel"
>> 2567 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2568 help
>> 2569 This builds a kernel image that retains relocation information
>> 2570 so it can be loaded someplace besides the default 1MB.
>> 2571 The relocations make the kernel binary about 15% larger,
>> 2572 but are discarded at runtime
>> 2573
>> 2574 config RELOCATION_TABLE_SIZE
>> 2575 hex "Relocation table size"
>> 2576 depends on RELOCATABLE
>> 2577 range 0x0 0x01000000
>> 2578 default "0x00100000"
>> 2579 ---help---
>> 2580 A table of relocation data will be appended to the kernel binary
>> 2581 and parsed at boot to fix up the relocated kernel.
>> 2582
>> 2583 This option allows the amount of space reserved for the table to be
>> 2584 adjusted, although the default of 1Mb should be ok in most cases.
>> 2585
>> 2586 The build will fail and a valid size suggested if this is too small.
>> 2587
>> 2588 If unsure, leave at the default value.
>> 2589
>> 2590 config RANDOMIZE_BASE
>> 2591 bool "Randomize the address of the kernel image"
>> 2592 depends on RELOCATABLE
>> 2593 ---help---
>> 2594 Randomizes the physical and virtual address at which the
>> 2595 kernel image is loaded, as a security feature that
>> 2596 deters exploit attempts relying on knowledge of the location
>> 2597 of kernel internals.
>> 2598
>> 2599 Entropy is generated using any coprocessor 0 registers available.
>> 2600
>> 2601 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2602
>> 2603 If unsure, say N.
>> 2604
>> 2605 config RANDOMIZE_BASE_MAX_OFFSET
>> 2606 hex "Maximum kASLR offset" if EXPERT
>> 2607 depends on RANDOMIZE_BASE
>> 2608 range 0x0 0x40000000 if EVA || 64BIT
>> 2609 range 0x0 0x08000000
>> 2610 default "0x01000000"
>> 2611 ---help---
>> 2612 When kASLR is active, this provides the maximum offset that will
>> 2613 be applied to the kernel image. It should be set according to the
>> 2614 amount of physical RAM available in the target system minus
>> 2615 PHYSICAL_START and must be a power of 2.
>> 2616
>> 2617 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2618 EVA or 64-bit. The default is 16Mb.
>> 2619
>> 2620 config NODES_SHIFT
>> 2621 int
>> 2622 default "6"
>> 2623 depends on NEED_MULTIPLE_NODES
>> 2624
>> 2625 config HW_PERF_EVENTS
>> 2626 bool "Enable hardware performance counter support for perf events"
>> 2627 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
471 default y 2628 default y
472 help 2629 help
473 Parse parameters passed to the kerne !! 2630 Enable hardware performance counter support for perf events. If
474 be disabled if the kernel is known t !! 2631 disabled, perf events will use software events only.
475 2632
476 If unsure, say Y. !! 2633 source "mm/Kconfig"
477 2634
478 choice !! 2635 config SMP
479 prompt "Semihosting interface" !! 2636 bool "Multi-Processing support"
480 default XTENSA_SIMCALL_ISS !! 2637 depends on SYS_SUPPORTS_SMP
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2638 help
483 Choose semihosting interface that wi !! 2639 This enables support for systems with more than one CPU. If you have
484 block device and networking. !! 2640 a system with only one CPU, say N. If you have a system with more
>> 2641 than one CPU, say Y.
>> 2642
>> 2643 If you say N here, the kernel will run on uni- and multiprocessor
>> 2644 machines, but will use only one CPU of a multiprocessor machine. If
>> 2645 you say Y here, the kernel will run on many, but not all,
>> 2646 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2647 will run faster if you say N here.
485 2648
486 config XTENSA_SIMCALL_ISS !! 2649 People using multiprocessor machines who say Y here should also say
487 bool "simcall" !! 2650 Y to "Enhanced Real Time Clock Support", below.
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2651
492 config XTENSA_SIMCALL_GDBIO !! 2652 See also the SMP-HOWTO available at
493 bool "GDBIO" !! 2653 <http://www.tldp.org/docs.html#howto>.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 2654
498 endchoice !! 2655 If you don't know what to do here, say N.
499 2656
500 config BLK_DEV_SIMDISK !! 2657 config HOTPLUG_CPU
501 tristate "Host file-based simulated bl !! 2658 bool "Support for hot-pluggable CPUs"
502 default n !! 2659 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2660 help
541 There's a 2x16 LCD on most of XTFPGA !! 2661 Say Y here to allow turning CPUs off and on. CPUs can be
542 progress messages there during bootu !! 2662 controlled through /sys/devices/system/cpu.
543 during board bringup. !! 2663 (Note: power management support will enable this option
>> 2664 automatically on SMP systems. )
>> 2665 Say N if you want to disable CPU hotplug.
544 2666
545 If unsure, say N. !! 2667 config SMP_UP
>> 2668 bool
546 2669
547 config XTFPGA_LCD_BASE_ADDR !! 2670 config SYS_SUPPORTS_MIPS_CMP
548 hex "XTFPGA LCD base address" !! 2671 bool
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2672
617 If unsure, say N. !! 2673 config SYS_SUPPORTS_MIPS_CPS
>> 2674 bool
>> 2675
>> 2676 config SYS_SUPPORTS_SMP
>> 2677 bool
>> 2678
>> 2679 config NR_CPUS_DEFAULT_4
>> 2680 bool
>> 2681
>> 2682 config NR_CPUS_DEFAULT_8
>> 2683 bool
>> 2684
>> 2685 config NR_CPUS_DEFAULT_16
>> 2686 bool
>> 2687
>> 2688 config NR_CPUS_DEFAULT_32
>> 2689 bool
>> 2690
>> 2691 config NR_CPUS_DEFAULT_64
>> 2692 bool
618 2693
619 config MEMMAP_CACHEATTR !! 2694 config NR_CPUS
620 hex "Cache attributes for the memory a !! 2695 int "Maximum number of CPUs (2-256)"
621 depends on !MMU !! 2696 range 2 256
622 default 0x22222222 !! 2697 depends on SMP
623 help !! 2698 default "4" if NR_CPUS_DEFAULT_4
624 These cache attributes are set up fo !! 2699 default "8" if NR_CPUS_DEFAULT_8
625 specifies cache attributes for the c !! 2700 default "16" if NR_CPUS_DEFAULT_16
626 region: bits 0..3 -- for addresses 0 !! 2701 default "32" if NR_CPUS_DEFAULT_32
627 bits 4..7 -- for addresses 0x2000000 !! 2702 default "64" if NR_CPUS_DEFAULT_64
628 !! 2703 help
629 Cache attribute values are specific !! 2704 This allows you to specify the maximum number of CPUs which this
630 For region protection MMUs: !! 2705 kernel will support. The maximum supported value is 32 for 32-bit
631 1: WT cached, !! 2706 kernel and 64 for 64-bit kernels; the minimum value which makes
632 2: cache bypass, !! 2707 sense is 1 for Qemu (useful only for kernel debugging purposes)
633 4: WB cached, !! 2708 and 2 for all others.
634 f: illegal. !! 2709
635 For full MMU: !! 2710 This is purely to save memory - each supported CPU adds
636 bit 0: executable, !! 2711 approximately eight kilobytes to the kernel image. For best
637 bit 1: writable, !! 2712 performance should round up your number of processors to the next
638 bits 2..3: !! 2713 power of two.
639 0: cache bypass, !! 2714
640 1: WB cache, !! 2715 config MIPS_PERF_SHARED_TC_COUNTERS
641 2: WT cache, !! 2716 bool
642 3: special (c and e are illegal, !! 2717
643 For MPU: !! 2718 config MIPS_NR_CPU_NR_MAP_1024
644 0: illegal, !! 2719 bool
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2720
683 If unsure, leave the default value h !! 2721 config MIPS_NR_CPU_NR_MAP
>> 2722 int
>> 2723 depends on SMP
>> 2724 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2725 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2726
>> 2727 #
>> 2728 # Timer Interrupt Frequency Configuration
>> 2729 #
684 2730
685 choice 2731 choice
686 prompt "Relocatable vectors location" !! 2732 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2733 default HZ_250
688 help 2734 help
689 Choose whether relocatable vectors a !! 2735 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2736
691 configurations without VECBASE regis !! 2737 config HZ_24
692 placed at their hardware-defined loc !! 2738 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2739
694 config XTENSA_VECTORS_IN_TEXT !! 2740 config HZ_48
695 bool "Merge relocatable vectors into k !! 2741 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2742
697 help !! 2743 config HZ_100
698 This option puts relocatable vectors !! 2744 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2745
700 This is a safe choice for most confi !! 2746 config HZ_128
701 !! 2747 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2748
703 bool "Put relocatable vectors at fixed !! 2749 config HZ_250
704 help !! 2750 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2751
706 Vectors are merged with the .init da !! 2752 config HZ_256
707 are copied into their designated loc !! 2753 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2754
709 XIP-aware MTD support. !! 2755 config HZ_1000
>> 2756 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2757
>> 2758 config HZ_1024
>> 2759 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2760
711 endchoice 2761 endchoice
712 2762
713 config VECTORS_ADDR !! 2763 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2764 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2765
729 config PLATFORM_WANT_DEFAULT_MEM !! 2766 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2767 bool
>> 2768
>> 2769 config SYS_SUPPORTS_100HZ
>> 2770 bool
>> 2771
>> 2772 config SYS_SUPPORTS_128HZ
>> 2773 bool
>> 2774
>> 2775 config SYS_SUPPORTS_250HZ
>> 2776 bool
>> 2777
>> 2778 config SYS_SUPPORTS_256HZ
>> 2779 bool
>> 2780
>> 2781 config SYS_SUPPORTS_1000HZ
>> 2782 bool
>> 2783
>> 2784 config SYS_SUPPORTS_1024HZ
>> 2785 bool
>> 2786
>> 2787 config SYS_SUPPORTS_ARBIT_HZ
>> 2788 bool
>> 2789 default y if !SYS_SUPPORTS_24HZ && \
>> 2790 !SYS_SUPPORTS_48HZ && \
>> 2791 !SYS_SUPPORTS_100HZ && \
>> 2792 !SYS_SUPPORTS_128HZ && \
>> 2793 !SYS_SUPPORTS_250HZ && \
>> 2794 !SYS_SUPPORTS_256HZ && \
>> 2795 !SYS_SUPPORTS_1000HZ && \
>> 2796 !SYS_SUPPORTS_1024HZ
731 2797
732 config DEFAULT_MEM_START !! 2798 config HZ
733 hex !! 2799 int
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2800 default 24 if HZ_24
735 default 0x60000000 if PLATFORM_WANT_DE !! 2801 default 48 if HZ_48
736 default 0x00000000 !! 2802 default 100 if HZ_100
>> 2803 default 128 if HZ_128
>> 2804 default 250 if HZ_250
>> 2805 default 256 if HZ_256
>> 2806 default 1000 if HZ_1000
>> 2807 default 1024 if HZ_1024
>> 2808
>> 2809 config SCHED_HRTICK
>> 2810 def_bool HIGH_RES_TIMERS
>> 2811
>> 2812 source "kernel/Kconfig.preempt"
>> 2813
>> 2814 config KEXEC
>> 2815 bool "Kexec system call"
>> 2816 select KEXEC_CORE
>> 2817 help
>> 2818 kexec is a system call that implements the ability to shutdown your
>> 2819 current kernel, and to start another kernel. It is like a reboot
>> 2820 but it is independent of the system firmware. And like a reboot
>> 2821 you can start any kernel with it, not just Linux.
>> 2822
>> 2823 The name comes from the similarity to the exec system call.
>> 2824
>> 2825 It is an ongoing process to be certain the hardware in a machine
>> 2826 is properly shutdown, so do not be surprised if this code does not
>> 2827 initially work for you. As of this writing the exact hardware
>> 2828 interface is strongly in flux, so no good recommendation can be
>> 2829 made.
>> 2830
>> 2831 config CRASH_DUMP
>> 2832 bool "Kernel crash dumps"
>> 2833 help
>> 2834 Generate crash dump after being started by kexec.
>> 2835 This should be normally only set in special crash dump kernels
>> 2836 which are loaded in the main kernel with kexec-tools into
>> 2837 a specially reserved region and then later executed after
>> 2838 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2839 to a memory address not used by the main kernel or firmware using
>> 2840 PHYSICAL_START.
>> 2841
>> 2842 config PHYSICAL_START
>> 2843 hex "Physical address where the kernel is loaded"
>> 2844 default "0xffffffff84000000" if 64BIT
>> 2845 default "0x84000000" if 32BIT
>> 2846 depends on CRASH_DUMP
>> 2847 help
>> 2848 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2849 If you plan to use kernel for capturing the crash dump change
>> 2850 this value to start of the reserved region (the "X" value as
>> 2851 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2852 passed to the panic-ed kernel).
>> 2853
>> 2854 config SECCOMP
>> 2855 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2856 depends on PROC_FS
>> 2857 default y
737 help 2858 help
738 This is the base address used for bo !! 2859 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2860 that may need to compute untrusted bytecode during their
>> 2861 execution. By using pipes or other transports made available to
>> 2862 the process as file descriptors supporting the read/write
>> 2863 syscalls, it's possible to isolate those applications in
>> 2864 their own address space using seccomp. Once seccomp is
>> 2865 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2866 and the task is only allowed to execute a few safe syscalls
>> 2867 defined by each seccomp mode.
>> 2868
>> 2869 If unsure, say Y. Only embedded should say N here.
>> 2870
>> 2871 config MIPS_O32_FP64_SUPPORT
>> 2872 bool "Support for O32 binaries using 64-bit FP"
>> 2873 depends on 32BIT || MIPS32_O32
>> 2874 help
>> 2875 When this is enabled, the kernel will support use of 64-bit floating
>> 2876 point registers with binaries using the O32 ABI along with the
>> 2877 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2878 32-bit MIPS systems this support is at the cost of increasing the
>> 2879 size and complexity of the compiled FPU emulator. Thus if you are
>> 2880 running a MIPS32 system and know that none of your userland binaries
>> 2881 will require 64-bit floating point, you may wish to reduce the size
>> 2882 of your kernel & potentially improve FP emulation performance by
>> 2883 saying N here.
>> 2884
>> 2885 Although binutils currently supports use of this flag the details
>> 2886 concerning its effect upon the O32 ABI in userland are still being
>> 2887 worked on. In order to avoid userland becoming dependant upon current
>> 2888 behaviour before the details have been finalised, this option should
>> 2889 be considered experimental and only enabled by those working upon
>> 2890 said details.
740 2891
741 If unsure, leave the default value h !! 2892 If unsure, say N.
>> 2893
>> 2894 config USE_OF
>> 2895 bool
>> 2896 select OF
>> 2897 select OF_EARLY_FLATTREE
>> 2898 select IRQ_DOMAIN
>> 2899
>> 2900 config BUILTIN_DTB
>> 2901 bool
742 2902
743 choice 2903 choice
744 prompt "KSEG layout" !! 2904 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2905 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2906
>> 2907 config MIPS_NO_APPENDED_DTB
>> 2908 bool "None"
>> 2909 help
>> 2910 Do not enable appended dtb support.
>> 2911
>> 2912 config MIPS_ELF_APPENDED_DTB
>> 2913 bool "vmlinux"
>> 2914 help
>> 2915 With this option, the boot code will look for a device tree binary
>> 2916 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2917 it is empty and the DTB can be appended using binutils command
>> 2918 objcopy:
>> 2919
>> 2920 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2921
>> 2922 This is meant as a backward compatiblity convenience for those
>> 2923 systems with a bootloader that can't be upgraded to accommodate
>> 2924 the documented boot protocol using a device tree.
>> 2925
>> 2926 config MIPS_RAW_APPENDED_DTB
>> 2927 bool "vmlinux.bin or vmlinuz.bin"
>> 2928 help
>> 2929 With this option, the boot code will look for a device tree binary
>> 2930 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2931 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2932
>> 2933 This is meant as a backward compatibility convenience for those
>> 2934 systems with a bootloader that can't be upgraded to accommodate
>> 2935 the documented boot protocol using a device tree.
>> 2936
>> 2937 Beware that there is very little in terms of protection against
>> 2938 this option being confused by leftover garbage in memory that might
>> 2939 look like a DTB header after a reboot if no actual DTB is appended
>> 2940 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2941 if you don't intend to always append a DTB.
772 endchoice 2942 endchoice
773 2943
774 config HIGHMEM !! 2944 choice
775 bool "High Memory Support" !! 2945 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2946 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2947 !MIPS_MALTA && \
>> 2948 !CAVIUM_OCTEON_SOC
>> 2949 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2950
>> 2951 config MIPS_CMDLINE_FROM_DTB
>> 2952 depends on USE_OF
>> 2953 bool "Dtb kernel arguments if available"
>> 2954
>> 2955 config MIPS_CMDLINE_DTB_EXTEND
>> 2956 depends on USE_OF
>> 2957 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2958
>> 2959 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2960 bool "Bootloader kernel arguments if available"
>> 2961
>> 2962 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2963 depends on CMDLINE_BOOL
>> 2964 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2965 endchoice
>> 2966
>> 2967 endmenu
>> 2968
>> 2969 config LOCKDEP_SUPPORT
>> 2970 bool
>> 2971 default y
>> 2972
>> 2973 config STACKTRACE_SUPPORT
>> 2974 bool
>> 2975 default y
>> 2976
>> 2977 config HAVE_LATENCYTOP_SUPPORT
>> 2978 bool
>> 2979 default y
>> 2980
>> 2981 config PGTABLE_LEVELS
>> 2982 int
>> 2983 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2984 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2985 default 2
>> 2986
>> 2987 source "init/Kconfig"
>> 2988
>> 2989 source "kernel/Kconfig.freezer"
>> 2990
>> 2991 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 2992
>> 2993 config HW_HAS_EISA
>> 2994 bool
>> 2995 config HW_HAS_PCI
>> 2996 bool
>> 2997
>> 2998 config PCI
>> 2999 bool "Support for PCI controller"
>> 3000 depends on HW_HAS_PCI
>> 3001 select PCI_DOMAINS
>> 3002 help
>> 3003 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3004 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3005 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3006 say Y, otherwise N.
>> 3007
>> 3008 config HT_PCI
>> 3009 bool "Support for HT-linked PCI"
>> 3010 default y
>> 3011 depends on CPU_LOONGSON3
>> 3012 select PCI
>> 3013 select PCI_DOMAINS
>> 3014 help
>> 3015 Loongson family machines use Hyper-Transport bus for inter-core
>> 3016 connection and device connection. The PCI bus is a subordinate
>> 3017 linked at HT. Choose Y for Loongson-3 based machines.
>> 3018
>> 3019 config PCI_DOMAINS
>> 3020 bool
>> 3021
>> 3022 config PCI_DOMAINS_GENERIC
>> 3023 bool
>> 3024
>> 3025 config PCI_DRIVERS_GENERIC
>> 3026 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3027 bool
>> 3028
>> 3029 config PCI_DRIVERS_LEGACY
>> 3030 def_bool !PCI_DRIVERS_GENERIC
>> 3031 select NO_GENERIC_PCI_IOPORT_MAP
>> 3032
>> 3033 source "drivers/pci/Kconfig"
>> 3034
>> 3035 #
>> 3036 # ISA support is now enabled via select. Too many systems still have the one
>> 3037 # or other ISA chip on the board that users don't know about so don't expect
>> 3038 # users to choose the right thing ...
>> 3039 #
>> 3040 config ISA
>> 3041 bool
>> 3042
>> 3043 config EISA
>> 3044 bool "EISA support"
>> 3045 depends on HW_HAS_EISA
>> 3046 select ISA
>> 3047 select GENERIC_ISA_DMA
>> 3048 ---help---
>> 3049 The Extended Industry Standard Architecture (EISA) bus was
>> 3050 developed as an open alternative to the IBM MicroChannel bus.
>> 3051
>> 3052 The EISA bus provided some of the features of the IBM MicroChannel
>> 3053 bus while maintaining backward compatibility with cards made for
>> 3054 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3055 1995 when it was made obsolete by the PCI bus.
>> 3056
>> 3057 Say Y here if you are building a kernel for an EISA-based machine.
>> 3058
>> 3059 Otherwise, say N.
>> 3060
>> 3061 source "drivers/eisa/Kconfig"
>> 3062
>> 3063 config TC
>> 3064 bool "TURBOchannel support"
>> 3065 depends on MACH_DECSTATION
>> 3066 help
>> 3067 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3068 processors. TURBOchannel programming specifications are available
>> 3069 at:
>> 3070 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3071 and:
>> 3072 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3073 Linux driver support status is documented at:
>> 3074 <http://www.linux-mips.org/wiki/DECstation>
>> 3075
>> 3076 config MMU
>> 3077 bool
>> 3078 default y
>> 3079
>> 3080 config ARCH_MMAP_RND_BITS_MIN
>> 3081 default 12 if 64BIT
>> 3082 default 8
>> 3083
>> 3084 config ARCH_MMAP_RND_BITS_MAX
>> 3085 default 18 if 64BIT
>> 3086 default 15
>> 3087
>> 3088 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3089 default 8
>> 3090
>> 3091 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3092 default 15
>> 3093
>> 3094 config I8253
>> 3095 bool
>> 3096 select CLKSRC_I8253
>> 3097 select CLKEVT_I8253
>> 3098 select MIPS_EXTERNAL_TIMER
>> 3099
>> 3100 config ZONE_DMA
>> 3101 bool
>> 3102
>> 3103 config ZONE_DMA32
>> 3104 bool
>> 3105
>> 3106 source "drivers/pcmcia/Kconfig"
>> 3107
>> 3108 config RAPIDIO
>> 3109 tristate "RapidIO support"
>> 3110 depends on PCI
>> 3111 default n
778 help 3112 help
779 Linux can use the full amount of RAM !! 3113 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3114 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3115
782 at 0xd0000000 (cached) and 0xd800000 !! 3116 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3117
784 all of it can be "permanently mapped !! 3118 endmenu
785 The physical memory that's not perma !! 3119
786 "high memory". !! 3120 menu "Executable file formats"
787 !! 3121
788 If you are compiling a kernel which !! 3122 source "fs/Kconfig.binfmt"
789 machine with more than 128 MB total !! 3123
790 N here. !! 3124 config TRAD_SIGNALS
>> 3125 bool
>> 3126
>> 3127 config MIPS32_COMPAT
>> 3128 bool
>> 3129
>> 3130 config COMPAT
>> 3131 bool
>> 3132
>> 3133 config SYSVIPC_COMPAT
>> 3134 bool
>> 3135
>> 3136 config MIPS32_O32
>> 3137 bool "Kernel support for o32 binaries"
>> 3138 depends on 64BIT
>> 3139 select ARCH_WANT_OLD_COMPAT_IPC
>> 3140 select COMPAT
>> 3141 select MIPS32_COMPAT
>> 3142 select SYSVIPC_COMPAT if SYSVIPC
>> 3143 help
>> 3144 Select this option if you want to run o32 binaries. These are pure
>> 3145 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3146 existing binaries are in this format.
791 3147
792 If unsure, say Y. 3148 If unsure, say Y.
793 3149
794 config ARCH_FORCE_MAX_ORDER !! 3150 config MIPS32_N32
795 int "Order of maximal physically conti !! 3151 bool "Kernel support for n32 binaries"
796 default "10" !! 3152 depends on 64BIT
797 help !! 3153 select COMPAT
798 The kernel page allocator limits the !! 3154 select MIPS32_COMPAT
799 contiguous allocations. The limit is !! 3155 select SYSVIPC_COMPAT if SYSVIPC
800 defines the maximal power of two of !! 3156 help
801 allocated as a single contiguous blo !! 3157 Select this option if you want to run n32 binaries. These are
802 overriding the default setting when !! 3158 64-bit binaries using 32-bit quantities for addressing and certain
803 large blocks of physically contiguou !! 3159 data that would normally be 64-bit. They are used in special
>> 3160 cases.
804 3161
805 Don't change if unsure. !! 3162 If unsure, say N.
>> 3163
>> 3164 config BINFMT_ELF32
>> 3165 bool
>> 3166 default y if MIPS32_O32 || MIPS32_N32
>> 3167 select ELFCORE
806 3168
807 endmenu 3169 endmenu
808 3170
809 menu "Power management options" 3171 menu "Power management options"
810 3172
811 config ARCH_HIBERNATION_POSSIBLE 3173 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3174 def_bool y
>> 3175 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3176
>> 3177 config ARCH_SUSPEND_POSSIBLE
>> 3178 def_bool y
>> 3179 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3180
814 source "kernel/power/Kconfig" 3181 source "kernel/power/Kconfig"
815 3182
816 endmenu 3183 endmenu
>> 3184
>> 3185 config MIPS_EXTERNAL_TIMER
>> 3186 bool
>> 3187
>> 3188 menu "CPU Power Management"
>> 3189
>> 3190 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3191 source "drivers/cpufreq/Kconfig"
>> 3192 endif
>> 3193
>> 3194 source "drivers/cpuidle/Kconfig"
>> 3195
>> 3196 endmenu
>> 3197
>> 3198 source "net/Kconfig"
>> 3199
>> 3200 source "drivers/Kconfig"
>> 3201
>> 3202 source "drivers/firmware/Kconfig"
>> 3203
>> 3204 source "fs/Kconfig"
>> 3205
>> 3206 source "arch/mips/Kconfig.debug"
>> 3207
>> 3208 source "security/Kconfig"
>> 3209
>> 3210 source "crypto/Kconfig"
>> 3211
>> 3212 source "lib/Kconfig"
>> 3213
>> 3214 source "arch/mips/kvm/Kconfig"
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.