1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_BINFMT_ELF_STATE
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_DISCARD_MEMBLOCK
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_HAS_ELF_RANDOMIZE
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_SUPPORTS_UPROBES
11 select ARCH_HAS_KCOV !! 11 select ARCH_USE_BUILTIN_BSWAP
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if <<
14 select ARCH_HAS_DMA_SET_UNCACHED if MM <<
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 13 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 14 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 15 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 16 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 17 select CLONE_BACKWARDS
24 select COMMON_CLK !! 18 select CPU_PM if CPU_IDLE
25 select DMA_NONCOHERENT_MMAP if MMU !! 19 select GENERIC_ATOMIC64 if !64BIT
26 select GENERIC_ATOMIC64 !! 20 select GENERIC_CLOCKEVENTS
>> 21 select GENERIC_CMOS_UPDATE
>> 22 select GENERIC_CPU_AUTOPROBE
>> 23 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 24 select GENERIC_IRQ_SHOW
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP 25 select GENERIC_PCI_IOMAP
32 select GENERIC_SCHED_CLOCK !! 26 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
33 select GENERIC_IOREMAP if MMU !! 27 select GENERIC_SMP_IDLE_THREAD
34 select HAVE_ARCH_AUDITSYSCALL !! 28 select GENERIC_TIME_VSYSCALL
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 29 select HANDLE_DOMAIN_IRQ
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 30 select HAVE_ARCH_JUMP_LABEL
37 select HAVE_ARCH_KCSAN !! 31 select HAVE_ARCH_KGDB
>> 32 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 33 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 34 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 35 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 36 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 37 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 38 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 39 select HAVE_CC_STACKPROTECTOR
>> 40 select HAVE_CONTEXT_TRACKING
>> 41 select HAVE_COPY_THREAD_TLS
>> 42 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 43 select HAVE_DEBUG_KMEMLEAK
>> 44 select HAVE_DEBUG_STACKOVERFLOW
>> 45 select HAVE_DMA_API_DEBUG
43 select HAVE_DMA_CONTIGUOUS 46 select HAVE_DMA_CONTIGUOUS
>> 47 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 48 select HAVE_EXIT_THREAD
>> 49 select HAVE_FTRACE_MCOUNT_RECORD
>> 50 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 51 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 52 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 53 select HAVE_IDE
>> 54 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 55 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 56 select HAVE_KPROBES
50 select HAVE_PCI !! 57 select HAVE_KRETPROBES
>> 58 select HAVE_MEMBLOCK
>> 59 select HAVE_MEMBLOCK_NODE_MAP
>> 60 select HAVE_MOD_ARCH_SPECIFIC
>> 61 select HAVE_NMI
>> 62 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 63 select HAVE_PERF_EVENTS
52 select HAVE_STACKPROTECTOR !! 64 select HAVE_REGS_AND_STACK_ACCESS_API
53 select HAVE_SYSCALL_TRACEPOINTS 65 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 66 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
55 select IRQ_DOMAIN !! 67 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 68 select MODULES_USE_ELF_RELA if MODULES && 64BIT
57 select MODULES_USE_ELF_RELA !! 69 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 70 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 71 select RTC_LIB if !MACH_LOONGSON64
>> 72 select SYSCTL_EXCEPTION_TRACE
>> 73 select VIRT_TO_BUS
>> 74
>> 75 menu "Machine selection"
>> 76
>> 77 choice
>> 78 prompt "System type"
>> 79 default MIPS_GENERIC
>> 80
>> 81 config MIPS_GENERIC
>> 82 bool "Generic board-agnostic MIPS kernel"
>> 83 select BOOT_RAW
>> 84 select BUILTIN_DTB
>> 85 select CEVT_R4K
>> 86 select CLKSRC_MIPS_GIC
>> 87 select COMMON_CLK
>> 88 select CPU_MIPSR2_IRQ_VI
>> 89 select CPU_MIPSR2_IRQ_EI
>> 90 select CSRC_R4K
>> 91 select DMA_PERDEV_COHERENT
>> 92 select HW_HAS_PCI
>> 93 select IRQ_MIPS_CPU
>> 94 select LIBFDT
>> 95 select MIPS_CPU_SCACHE
>> 96 select MIPS_GIC
>> 97 select MIPS_L1_CACHE_SHIFT_7
>> 98 select NO_EXCEPT_FILL
>> 99 select PCI_DRIVERS_GENERIC
>> 100 select PINCTRL
>> 101 select SMP_UP if SMP
>> 102 select SWAP_IO_SPACE
>> 103 select SYS_HAS_CPU_MIPS32_R1
>> 104 select SYS_HAS_CPU_MIPS32_R2
>> 105 select SYS_HAS_CPU_MIPS32_R6
>> 106 select SYS_HAS_CPU_MIPS64_R1
>> 107 select SYS_HAS_CPU_MIPS64_R2
>> 108 select SYS_HAS_CPU_MIPS64_R6
>> 109 select SYS_SUPPORTS_32BIT_KERNEL
>> 110 select SYS_SUPPORTS_64BIT_KERNEL
>> 111 select SYS_SUPPORTS_BIG_ENDIAN
>> 112 select SYS_SUPPORTS_HIGHMEM
>> 113 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 114 select SYS_SUPPORTS_MICROMIPS
>> 115 select SYS_SUPPORTS_MIPS_CPS
>> 116 select SYS_SUPPORTS_MIPS16
>> 117 select SYS_SUPPORTS_MULTITHREADING
>> 118 select SYS_SUPPORTS_RELOCATABLE
>> 119 select SYS_SUPPORTS_SMARTMIPS
>> 120 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 121 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 122 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 123 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 124 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 125 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 126 select USE_OF
>> 127 help
>> 128 Select this to build a kernel which aims to support multiple boards,
>> 129 generally using a flattened device tree passed from the bootloader
>> 130 using the boot protocol defined in the UHI (Unified Hosting
>> 131 Interface) specification.
>> 132
>> 133 config MIPS_ALCHEMY
>> 134 bool "Alchemy processor based machines"
>> 135 select ARCH_PHYS_ADDR_T_64BIT
>> 136 select CEVT_R4K
>> 137 select CSRC_R4K
>> 138 select IRQ_MIPS_CPU
>> 139 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 140 select SYS_HAS_CPU_MIPS32_R1
>> 141 select SYS_SUPPORTS_32BIT_KERNEL
>> 142 select SYS_SUPPORTS_APM_EMULATION
>> 143 select GPIOLIB
>> 144 select SYS_SUPPORTS_ZBOOT
>> 145 select COMMON_CLK
>> 146
>> 147 config AR7
>> 148 bool "Texas Instruments AR7"
>> 149 select BOOT_ELF32
>> 150 select DMA_NONCOHERENT
>> 151 select CEVT_R4K
>> 152 select CSRC_R4K
>> 153 select IRQ_MIPS_CPU
>> 154 select NO_EXCEPT_FILL
>> 155 select SWAP_IO_SPACE
>> 156 select SYS_HAS_CPU_MIPS32_R1
>> 157 select SYS_HAS_EARLY_PRINTK
>> 158 select SYS_SUPPORTS_32BIT_KERNEL
>> 159 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 160 select SYS_SUPPORTS_MIPS16
>> 161 select SYS_SUPPORTS_ZBOOT_UART16550
>> 162 select GPIOLIB
>> 163 select VLYNQ
>> 164 select HAVE_CLK
>> 165 help
>> 166 Support for the Texas Instruments AR7 System-on-a-Chip
>> 167 family: TNETD7100, 7200 and 7300.
>> 168
>> 169 config ATH25
>> 170 bool "Atheros AR231x/AR531x SoC support"
>> 171 select CEVT_R4K
>> 172 select CSRC_R4K
>> 173 select DMA_NONCOHERENT
>> 174 select IRQ_MIPS_CPU
>> 175 select IRQ_DOMAIN
>> 176 select SYS_HAS_CPU_MIPS32_R1
>> 177 select SYS_SUPPORTS_BIG_ENDIAN
>> 178 select SYS_SUPPORTS_32BIT_KERNEL
>> 179 select SYS_HAS_EARLY_PRINTK
>> 180 help
>> 181 Support for Atheros AR231x and Atheros AR531x based boards
>> 182
>> 183 config ATH79
>> 184 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 185 select ARCH_HAS_RESET_CONTROLLER
>> 186 select BOOT_RAW
>> 187 select CEVT_R4K
>> 188 select CSRC_R4K
>> 189 select DMA_NONCOHERENT
>> 190 select GPIOLIB
>> 191 select HAVE_CLK
>> 192 select COMMON_CLK
>> 193 select CLKDEV_LOOKUP
>> 194 select IRQ_MIPS_CPU
>> 195 select MIPS_MACHINE
>> 196 select SYS_HAS_CPU_MIPS32_R2
>> 197 select SYS_HAS_EARLY_PRINTK
>> 198 select SYS_SUPPORTS_32BIT_KERNEL
>> 199 select SYS_SUPPORTS_BIG_ENDIAN
>> 200 select SYS_SUPPORTS_MIPS16
>> 201 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 202 select USE_OF
>> 203 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 204 help
>> 205 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 206
>> 207 config BMIPS_GENERIC
>> 208 bool "Broadcom Generic BMIPS kernel"
>> 209 select BOOT_RAW
>> 210 select NO_EXCEPT_FILL
>> 211 select USE_OF
>> 212 select CEVT_R4K
>> 213 select CSRC_R4K
>> 214 select SYNC_R4K
>> 215 select COMMON_CLK
>> 216 select BCM6345_L1_IRQ
>> 217 select BCM7038_L1_IRQ
>> 218 select BCM7120_L2_IRQ
>> 219 select BRCMSTB_L2_IRQ
>> 220 select IRQ_MIPS_CPU
>> 221 select DMA_NONCOHERENT
>> 222 select SYS_SUPPORTS_32BIT_KERNEL
>> 223 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 224 select SYS_SUPPORTS_BIG_ENDIAN
>> 225 select SYS_SUPPORTS_HIGHMEM
>> 226 select SYS_HAS_CPU_BMIPS32_3300
>> 227 select SYS_HAS_CPU_BMIPS4350
>> 228 select SYS_HAS_CPU_BMIPS4380
>> 229 select SYS_HAS_CPU_BMIPS5000
>> 230 select SWAP_IO_SPACE
>> 231 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 232 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 233 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 234 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 235 select HARDIRQS_SW_RESEND
>> 236 help
>> 237 Build a generic DT-based kernel image that boots on select
>> 238 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 239 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 240 must be set appropriately for your board.
>> 241
>> 242 config BCM47XX
>> 243 bool "Broadcom BCM47XX based boards"
>> 244 select BOOT_RAW
>> 245 select CEVT_R4K
>> 246 select CSRC_R4K
>> 247 select DMA_NONCOHERENT
>> 248 select HW_HAS_PCI
>> 249 select IRQ_MIPS_CPU
>> 250 select SYS_HAS_CPU_MIPS32_R1
>> 251 select NO_EXCEPT_FILL
>> 252 select SYS_SUPPORTS_32BIT_KERNEL
>> 253 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 254 select SYS_SUPPORTS_MIPS16
>> 255 select SYS_SUPPORTS_ZBOOT
>> 256 select SYS_HAS_EARLY_PRINTK
>> 257 select USE_GENERIC_EARLY_PRINTK_8250
>> 258 select GPIOLIB
>> 259 select LEDS_GPIO_REGISTER
>> 260 select BCM47XX_NVRAM
>> 261 select BCM47XX_SPROM
>> 262 select BCM47XX_SSB if !BCM47XX_BCMA
>> 263 help
>> 264 Support for BCM47XX based boards
>> 265
>> 266 config BCM63XX
>> 267 bool "Broadcom BCM63XX based boards"
>> 268 select BOOT_RAW
>> 269 select CEVT_R4K
>> 270 select CSRC_R4K
>> 271 select SYNC_R4K
>> 272 select DMA_NONCOHERENT
>> 273 select IRQ_MIPS_CPU
>> 274 select SYS_SUPPORTS_32BIT_KERNEL
>> 275 select SYS_SUPPORTS_BIG_ENDIAN
>> 276 select SYS_HAS_EARLY_PRINTK
>> 277 select SWAP_IO_SPACE
>> 278 select GPIOLIB
>> 279 select HAVE_CLK
>> 280 select MIPS_L1_CACHE_SHIFT_4
>> 281 select CLKDEV_LOOKUP
>> 282 help
>> 283 Support for BCM63XX based boards
>> 284
>> 285 config MIPS_COBALT
>> 286 bool "Cobalt Server"
>> 287 select CEVT_R4K
>> 288 select CSRC_R4K
>> 289 select CEVT_GT641XX
>> 290 select DMA_NONCOHERENT
>> 291 select HW_HAS_PCI
>> 292 select I8253
>> 293 select I8259
>> 294 select IRQ_MIPS_CPU
>> 295 select IRQ_GT641XX
>> 296 select PCI_GT64XXX_PCI0
>> 297 select PCI
>> 298 select SYS_HAS_CPU_NEVADA
>> 299 select SYS_HAS_EARLY_PRINTK
>> 300 select SYS_SUPPORTS_32BIT_KERNEL
>> 301 select SYS_SUPPORTS_64BIT_KERNEL
>> 302 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 303 select USE_GENERIC_EARLY_PRINTK_8250
>> 304
>> 305 config MACH_DECSTATION
>> 306 bool "DECstations"
>> 307 select BOOT_ELF32
>> 308 select CEVT_DS1287
>> 309 select CEVT_R4K if CPU_R4X00
>> 310 select CSRC_IOASIC
>> 311 select CSRC_R4K if CPU_R4X00
>> 312 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 313 select CPU_R4000_WORKAROUNDS if 64BIT
>> 314 select CPU_R4400_WORKAROUNDS if 64BIT
>> 315 select DMA_NONCOHERENT
>> 316 select NO_IOPORT_MAP
>> 317 select IRQ_MIPS_CPU
>> 318 select SYS_HAS_CPU_R3000
>> 319 select SYS_HAS_CPU_R4X00
>> 320 select SYS_SUPPORTS_32BIT_KERNEL
>> 321 select SYS_SUPPORTS_64BIT_KERNEL
>> 322 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 323 select SYS_SUPPORTS_128HZ
>> 324 select SYS_SUPPORTS_256HZ
>> 325 select SYS_SUPPORTS_1024HZ
>> 326 select MIPS_L1_CACHE_SHIFT_4
>> 327 help
>> 328 This enables support for DEC's MIPS based workstations. For details
>> 329 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 330 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 331
>> 332 If you have one of the following DECstation Models you definitely
>> 333 want to choose R4xx0 for the CPU Type:
>> 334
>> 335 DECstation 5000/50
>> 336 DECstation 5000/150
>> 337 DECstation 5000/260
>> 338 DECsystem 5900/260
>> 339
>> 340 otherwise choose R3000.
>> 341
>> 342 config MACH_JAZZ
>> 343 bool "Jazz family of machines"
>> 344 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 345 select ARCH_MIGHT_HAVE_PC_SERIO
>> 346 select FW_ARC
>> 347 select FW_ARC32
>> 348 select ARCH_MAY_HAVE_PC_FDC
>> 349 select CEVT_R4K
>> 350 select CSRC_R4K
>> 351 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 352 select GENERIC_ISA_DMA
>> 353 select HAVE_PCSPKR_PLATFORM
>> 354 select IRQ_MIPS_CPU
>> 355 select I8253
>> 356 select I8259
>> 357 select ISA
>> 358 select SYS_HAS_CPU_R4X00
>> 359 select SYS_SUPPORTS_32BIT_KERNEL
>> 360 select SYS_SUPPORTS_64BIT_KERNEL
>> 361 select SYS_SUPPORTS_100HZ
>> 362 help
>> 363 This a family of machines based on the MIPS R4030 chipset which was
>> 364 used by several vendors to build RISC/os and Windows NT workstations.
>> 365 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 366 Olivetti M700-10 workstations.
>> 367
>> 368 config MACH_INGENIC
>> 369 bool "Ingenic SoC based machines"
>> 370 select SYS_SUPPORTS_32BIT_KERNEL
>> 371 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 372 select SYS_SUPPORTS_ZBOOT_UART16550
>> 373 select DMA_NONCOHERENT
>> 374 select IRQ_MIPS_CPU
>> 375 select PINCTRL
>> 376 select GPIOLIB
>> 377 select COMMON_CLK
>> 378 select GENERIC_IRQ_CHIP
>> 379 select BUILTIN_DTB
>> 380 select USE_OF
>> 381 select LIBFDT
>> 382
>> 383 config LANTIQ
>> 384 bool "Lantiq based platforms"
>> 385 select DMA_NONCOHERENT
>> 386 select IRQ_MIPS_CPU
>> 387 select CEVT_R4K
>> 388 select CSRC_R4K
>> 389 select SYS_HAS_CPU_MIPS32_R1
>> 390 select SYS_HAS_CPU_MIPS32_R2
>> 391 select SYS_SUPPORTS_BIG_ENDIAN
>> 392 select SYS_SUPPORTS_32BIT_KERNEL
>> 393 select SYS_SUPPORTS_MIPS16
>> 394 select SYS_SUPPORTS_MULTITHREADING
>> 395 select SYS_SUPPORTS_VPE_LOADER
>> 396 select SYS_HAS_EARLY_PRINTK
>> 397 select GPIOLIB
>> 398 select SWAP_IO_SPACE
>> 399 select BOOT_RAW
>> 400 select CLKDEV_LOOKUP
>> 401 select USE_OF
>> 402 select PINCTRL
>> 403 select PINCTRL_LANTIQ
>> 404 select ARCH_HAS_RESET_CONTROLLER
>> 405 select RESET_CONTROLLER
>> 406
>> 407 config LASAT
>> 408 bool "LASAT Networks platforms"
>> 409 select CEVT_R4K
>> 410 select CRC32
>> 411 select CSRC_R4K
>> 412 select DMA_NONCOHERENT
>> 413 select SYS_HAS_EARLY_PRINTK
>> 414 select HW_HAS_PCI
>> 415 select IRQ_MIPS_CPU
>> 416 select PCI_GT64XXX_PCI0
>> 417 select MIPS_NILE4
>> 418 select R5000_CPU_SCACHE
>> 419 select SYS_HAS_CPU_R5000
>> 420 select SYS_SUPPORTS_32BIT_KERNEL
>> 421 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 422 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 423
>> 424 config MACH_LOONGSON32
>> 425 bool "Loongson-1 family of machines"
>> 426 select SYS_SUPPORTS_ZBOOT
>> 427 help
>> 428 This enables support for the Loongson-1 family of machines.
>> 429
>> 430 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 431 the Institute of Computing Technology (ICT), Chinese Academy of
>> 432 Sciences (CAS).
>> 433
>> 434 config MACH_LOONGSON64
>> 435 bool "Loongson-2/3 family of machines"
>> 436 select ARCH_HAS_PHYS_TO_DMA
>> 437 select SYS_SUPPORTS_ZBOOT
>> 438 help
>> 439 This enables the support of Loongson-2/3 family of machines.
>> 440
>> 441 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 442 family of multi-core CPUs. They are both 64-bit general-purpose
>> 443 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 444 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 445 in the People's Republic of China. The chief architect is Professor
>> 446 Weiwu Hu.
>> 447
>> 448 config MACH_PISTACHIO
>> 449 bool "IMG Pistachio SoC based boards"
>> 450 select BOOT_ELF32
>> 451 select BOOT_RAW
>> 452 select CEVT_R4K
>> 453 select CLKSRC_MIPS_GIC
>> 454 select COMMON_CLK
>> 455 select CSRC_R4K
>> 456 select DMA_NONCOHERENT
>> 457 select GPIOLIB
>> 458 select IRQ_MIPS_CPU
>> 459 select LIBFDT
>> 460 select MFD_SYSCON
>> 461 select MIPS_CPU_SCACHE
>> 462 select MIPS_GIC
>> 463 select PINCTRL
>> 464 select REGULATOR
>> 465 select SYS_HAS_CPU_MIPS32_R2
>> 466 select SYS_SUPPORTS_32BIT_KERNEL
>> 467 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 468 select SYS_SUPPORTS_MIPS_CPS
>> 469 select SYS_SUPPORTS_MULTITHREADING
>> 470 select SYS_SUPPORTS_RELOCATABLE
>> 471 select SYS_SUPPORTS_ZBOOT
>> 472 select SYS_HAS_EARLY_PRINTK
>> 473 select USE_GENERIC_EARLY_PRINTK_8250
>> 474 select USE_OF
>> 475 help
>> 476 This enables support for the IMG Pistachio SoC platform.
>> 477
>> 478 config MIPS_MALTA
>> 479 bool "MIPS Malta board"
>> 480 select ARCH_MAY_HAVE_PC_FDC
>> 481 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 482 select ARCH_MIGHT_HAVE_PC_SERIO
>> 483 select BOOT_ELF32
>> 484 select BOOT_RAW
>> 485 select BUILTIN_DTB
>> 486 select CEVT_R4K
>> 487 select CSRC_R4K
>> 488 select CLKSRC_MIPS_GIC
>> 489 select COMMON_CLK
>> 490 select DMA_MAYBE_COHERENT
>> 491 select GENERIC_ISA_DMA
>> 492 select HAVE_PCSPKR_PLATFORM
>> 493 select IRQ_MIPS_CPU
>> 494 select MIPS_GIC
>> 495 select HW_HAS_PCI
>> 496 select I8253
>> 497 select I8259
>> 498 select MIPS_BONITO64
>> 499 select MIPS_CPU_SCACHE
>> 500 select MIPS_L1_CACHE_SHIFT_6
>> 501 select PCI_GT64XXX_PCI0
>> 502 select MIPS_MSC
>> 503 select SMP_UP if SMP
>> 504 select SWAP_IO_SPACE
>> 505 select SYS_HAS_CPU_MIPS32_R1
>> 506 select SYS_HAS_CPU_MIPS32_R2
>> 507 select SYS_HAS_CPU_MIPS32_R3_5
>> 508 select SYS_HAS_CPU_MIPS32_R5
>> 509 select SYS_HAS_CPU_MIPS32_R6
>> 510 select SYS_HAS_CPU_MIPS64_R1
>> 511 select SYS_HAS_CPU_MIPS64_R2
>> 512 select SYS_HAS_CPU_MIPS64_R6
>> 513 select SYS_HAS_CPU_NEVADA
>> 514 select SYS_HAS_CPU_RM7000
>> 515 select SYS_SUPPORTS_32BIT_KERNEL
>> 516 select SYS_SUPPORTS_64BIT_KERNEL
>> 517 select SYS_SUPPORTS_BIG_ENDIAN
>> 518 select SYS_SUPPORTS_HIGHMEM
>> 519 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 520 select SYS_SUPPORTS_MICROMIPS
>> 521 select SYS_SUPPORTS_MIPS_CMP
>> 522 select SYS_SUPPORTS_MIPS_CPS
>> 523 select SYS_SUPPORTS_MIPS16
>> 524 select SYS_SUPPORTS_MULTITHREADING
>> 525 select SYS_SUPPORTS_SMARTMIPS
>> 526 select SYS_SUPPORTS_VPE_LOADER
>> 527 select SYS_SUPPORTS_ZBOOT
>> 528 select SYS_SUPPORTS_RELOCATABLE
>> 529 select USE_OF
>> 530 select LIBFDT
>> 531 select ZONE_DMA32 if 64BIT
>> 532 select BUILTIN_DTB
>> 533 select LIBFDT
>> 534 help
>> 535 This enables support for the MIPS Technologies Malta evaluation
>> 536 board.
>> 537
>> 538 config MACH_PIC32
>> 539 bool "Microchip PIC32 Family"
>> 540 help
>> 541 This enables support for the Microchip PIC32 family of platforms.
>> 542
>> 543 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 544 microcontrollers.
>> 545
>> 546 config NEC_MARKEINS
>> 547 bool "NEC EMMA2RH Mark-eins board"
>> 548 select SOC_EMMA2RH
>> 549 select HW_HAS_PCI
>> 550 help
>> 551 This enables support for the NEC Electronics Mark-eins boards.
>> 552
>> 553 config MACH_VR41XX
>> 554 bool "NEC VR4100 series based machines"
>> 555 select CEVT_R4K
>> 556 select CSRC_R4K
>> 557 select SYS_HAS_CPU_VR41XX
>> 558 select SYS_SUPPORTS_MIPS16
>> 559 select GPIOLIB
>> 560
>> 561 config NXP_STB220
>> 562 bool "NXP STB220 board"
>> 563 select SOC_PNX833X
>> 564 help
>> 565 Support for NXP Semiconductors STB220 Development Board.
>> 566
>> 567 config NXP_STB225
>> 568 bool "NXP 225 board"
>> 569 select SOC_PNX833X
>> 570 select SOC_PNX8335
>> 571 help
>> 572 Support for NXP Semiconductors STB225 Development Board.
>> 573
>> 574 config PMC_MSP
>> 575 bool "PMC-Sierra MSP chipsets"
>> 576 select CEVT_R4K
>> 577 select CSRC_R4K
>> 578 select DMA_NONCOHERENT
>> 579 select SWAP_IO_SPACE
>> 580 select NO_EXCEPT_FILL
>> 581 select BOOT_RAW
>> 582 select SYS_HAS_CPU_MIPS32_R1
>> 583 select SYS_HAS_CPU_MIPS32_R2
>> 584 select SYS_SUPPORTS_32BIT_KERNEL
>> 585 select SYS_SUPPORTS_BIG_ENDIAN
>> 586 select SYS_SUPPORTS_MIPS16
>> 587 select IRQ_MIPS_CPU
>> 588 select SERIAL_8250
>> 589 select SERIAL_8250_CONSOLE
>> 590 select USB_EHCI_BIG_ENDIAN_MMIO
>> 591 select USB_EHCI_BIG_ENDIAN_DESC
>> 592 help
>> 593 This adds support for the PMC-Sierra family of Multi-Service
>> 594 Processor System-On-A-Chips. These parts include a number
>> 595 of integrated peripherals, interfaces and DSPs in addition to
>> 596 a variety of MIPS cores.
>> 597
>> 598 config RALINK
>> 599 bool "Ralink based machines"
>> 600 select CEVT_R4K
>> 601 select CSRC_R4K
>> 602 select BOOT_RAW
>> 603 select DMA_NONCOHERENT
>> 604 select IRQ_MIPS_CPU
>> 605 select USE_OF
>> 606 select SYS_HAS_CPU_MIPS32_R1
>> 607 select SYS_HAS_CPU_MIPS32_R2
>> 608 select SYS_SUPPORTS_32BIT_KERNEL
>> 609 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 610 select SYS_SUPPORTS_MIPS16
>> 611 select SYS_HAS_EARLY_PRINTK
>> 612 select CLKDEV_LOOKUP
>> 613 select ARCH_HAS_RESET_CONTROLLER
>> 614 select RESET_CONTROLLER
>> 615
>> 616 config SGI_IP22
>> 617 bool "SGI IP22 (Indy/Indigo2)"
>> 618 select FW_ARC
>> 619 select FW_ARC32
>> 620 select ARCH_MIGHT_HAVE_PC_SERIO
>> 621 select BOOT_ELF32
>> 622 select CEVT_R4K
>> 623 select CSRC_R4K
>> 624 select DEFAULT_SGI_PARTITION
>> 625 select DMA_NONCOHERENT
>> 626 select HW_HAS_EISA
>> 627 select I8253
>> 628 select I8259
>> 629 select IP22_CPU_SCACHE
>> 630 select IRQ_MIPS_CPU
>> 631 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 632 select SGI_HAS_I8042
>> 633 select SGI_HAS_INDYDOG
>> 634 select SGI_HAS_HAL2
>> 635 select SGI_HAS_SEEQ
>> 636 select SGI_HAS_WD93
>> 637 select SGI_HAS_ZILOG
>> 638 select SWAP_IO_SPACE
>> 639 select SYS_HAS_CPU_R4X00
>> 640 select SYS_HAS_CPU_R5000
>> 641 #
>> 642 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 643 # memory during early boot on some machines.
>> 644 #
>> 645 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 646 # for a more details discussion
>> 647 #
>> 648 # select SYS_HAS_EARLY_PRINTK
>> 649 select SYS_SUPPORTS_32BIT_KERNEL
>> 650 select SYS_SUPPORTS_64BIT_KERNEL
>> 651 select SYS_SUPPORTS_BIG_ENDIAN
>> 652 select MIPS_L1_CACHE_SHIFT_7
>> 653 help
>> 654 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 655 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 656 that runs on these, say Y here.
>> 657
>> 658 config SGI_IP27
>> 659 bool "SGI IP27 (Origin200/2000)"
>> 660 select FW_ARC
>> 661 select FW_ARC64
>> 662 select BOOT_ELF64
>> 663 select DEFAULT_SGI_PARTITION
>> 664 select DMA_COHERENT
>> 665 select SYS_HAS_EARLY_PRINTK
>> 666 select HW_HAS_PCI
>> 667 select NR_CPUS_DEFAULT_64
>> 668 select SYS_HAS_CPU_R10000
>> 669 select SYS_SUPPORTS_64BIT_KERNEL
>> 670 select SYS_SUPPORTS_BIG_ENDIAN
>> 671 select SYS_SUPPORTS_NUMA
>> 672 select SYS_SUPPORTS_SMP
>> 673 select MIPS_L1_CACHE_SHIFT_7
>> 674 help
>> 675 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 676 workstations. To compile a Linux kernel that runs on these, say Y
>> 677 here.
>> 678
>> 679 config SGI_IP28
>> 680 bool "SGI IP28 (Indigo2 R10k)"
>> 681 select FW_ARC
>> 682 select FW_ARC64
>> 683 select ARCH_MIGHT_HAVE_PC_SERIO
>> 684 select BOOT_ELF64
>> 685 select CEVT_R4K
>> 686 select CSRC_R4K
>> 687 select DEFAULT_SGI_PARTITION
>> 688 select DMA_NONCOHERENT
>> 689 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 690 select IRQ_MIPS_CPU
>> 691 select HW_HAS_EISA
>> 692 select I8253
>> 693 select I8259
>> 694 select SGI_HAS_I8042
>> 695 select SGI_HAS_INDYDOG
>> 696 select SGI_HAS_HAL2
>> 697 select SGI_HAS_SEEQ
>> 698 select SGI_HAS_WD93
>> 699 select SGI_HAS_ZILOG
>> 700 select SWAP_IO_SPACE
>> 701 select SYS_HAS_CPU_R10000
>> 702 #
>> 703 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 704 # memory during early boot on some machines.
>> 705 #
>> 706 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 707 # for a more details discussion
>> 708 #
>> 709 # select SYS_HAS_EARLY_PRINTK
>> 710 select SYS_SUPPORTS_64BIT_KERNEL
>> 711 select SYS_SUPPORTS_BIG_ENDIAN
>> 712 select MIPS_L1_CACHE_SHIFT_7
>> 713 help
>> 714 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 715 kernel that runs on these, say Y here.
>> 716
>> 717 config SGI_IP32
>> 718 bool "SGI IP32 (O2)"
>> 719 select FW_ARC
>> 720 select FW_ARC32
>> 721 select BOOT_ELF32
>> 722 select CEVT_R4K
>> 723 select CSRC_R4K
>> 724 select DMA_NONCOHERENT
>> 725 select HW_HAS_PCI
>> 726 select IRQ_MIPS_CPU
>> 727 select R5000_CPU_SCACHE
>> 728 select RM7000_CPU_SCACHE
>> 729 select SYS_HAS_CPU_R5000
>> 730 select SYS_HAS_CPU_R10000 if BROKEN
>> 731 select SYS_HAS_CPU_RM7000
>> 732 select SYS_HAS_CPU_NEVADA
>> 733 select SYS_SUPPORTS_64BIT_KERNEL
>> 734 select SYS_SUPPORTS_BIG_ENDIAN
>> 735 help
>> 736 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 737
>> 738 config SIBYTE_CRHINE
>> 739 bool "Sibyte BCM91120C-CRhine"
>> 740 select BOOT_ELF32
>> 741 select DMA_COHERENT
>> 742 select SIBYTE_BCM1120
>> 743 select SWAP_IO_SPACE
>> 744 select SYS_HAS_CPU_SB1
>> 745 select SYS_SUPPORTS_BIG_ENDIAN
>> 746 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 747
>> 748 config SIBYTE_CARMEL
>> 749 bool "Sibyte BCM91120x-Carmel"
>> 750 select BOOT_ELF32
>> 751 select DMA_COHERENT
>> 752 select SIBYTE_BCM1120
>> 753 select SWAP_IO_SPACE
>> 754 select SYS_HAS_CPU_SB1
>> 755 select SYS_SUPPORTS_BIG_ENDIAN
>> 756 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 757
>> 758 config SIBYTE_CRHONE
>> 759 bool "Sibyte BCM91125C-CRhone"
>> 760 select BOOT_ELF32
>> 761 select DMA_COHERENT
>> 762 select SIBYTE_BCM1125
>> 763 select SWAP_IO_SPACE
>> 764 select SYS_HAS_CPU_SB1
>> 765 select SYS_SUPPORTS_BIG_ENDIAN
>> 766 select SYS_SUPPORTS_HIGHMEM
>> 767 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 768
>> 769 config SIBYTE_RHONE
>> 770 bool "Sibyte BCM91125E-Rhone"
>> 771 select BOOT_ELF32
>> 772 select DMA_COHERENT
>> 773 select SIBYTE_BCM1125H
>> 774 select SWAP_IO_SPACE
>> 775 select SYS_HAS_CPU_SB1
>> 776 select SYS_SUPPORTS_BIG_ENDIAN
>> 777 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 778
>> 779 config SIBYTE_SWARM
>> 780 bool "Sibyte BCM91250A-SWARM"
>> 781 select BOOT_ELF32
>> 782 select DMA_COHERENT
>> 783 select HAVE_PATA_PLATFORM
>> 784 select SIBYTE_SB1250
>> 785 select SWAP_IO_SPACE
>> 786 select SYS_HAS_CPU_SB1
>> 787 select SYS_SUPPORTS_BIG_ENDIAN
>> 788 select SYS_SUPPORTS_HIGHMEM
>> 789 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 790 select ZONE_DMA32 if 64BIT
>> 791
>> 792 config SIBYTE_LITTLESUR
>> 793 bool "Sibyte BCM91250C2-LittleSur"
>> 794 select BOOT_ELF32
>> 795 select DMA_COHERENT
>> 796 select HAVE_PATA_PLATFORM
>> 797 select SIBYTE_SB1250
>> 798 select SWAP_IO_SPACE
>> 799 select SYS_HAS_CPU_SB1
>> 800 select SYS_SUPPORTS_BIG_ENDIAN
>> 801 select SYS_SUPPORTS_HIGHMEM
>> 802 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 803
>> 804 config SIBYTE_SENTOSA
>> 805 bool "Sibyte BCM91250E-Sentosa"
>> 806 select BOOT_ELF32
>> 807 select DMA_COHERENT
>> 808 select SIBYTE_SB1250
>> 809 select SWAP_IO_SPACE
>> 810 select SYS_HAS_CPU_SB1
>> 811 select SYS_SUPPORTS_BIG_ENDIAN
>> 812 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 813
>> 814 config SIBYTE_BIGSUR
>> 815 bool "Sibyte BCM91480B-BigSur"
>> 816 select BOOT_ELF32
>> 817 select DMA_COHERENT
>> 818 select NR_CPUS_DEFAULT_4
>> 819 select SIBYTE_BCM1x80
>> 820 select SWAP_IO_SPACE
>> 821 select SYS_HAS_CPU_SB1
>> 822 select SYS_SUPPORTS_BIG_ENDIAN
>> 823 select SYS_SUPPORTS_HIGHMEM
>> 824 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 825 select ZONE_DMA32 if 64BIT
>> 826
>> 827 config SNI_RM
>> 828 bool "SNI RM200/300/400"
>> 829 select FW_ARC if CPU_LITTLE_ENDIAN
>> 830 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 831 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 832 select ARCH_MAY_HAVE_PC_FDC
>> 833 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 834 select ARCH_MIGHT_HAVE_PC_SERIO
>> 835 select BOOT_ELF32
>> 836 select CEVT_R4K
>> 837 select CSRC_R4K
>> 838 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 839 select DMA_NONCOHERENT
>> 840 select GENERIC_ISA_DMA
>> 841 select HAVE_PCSPKR_PLATFORM
>> 842 select HW_HAS_EISA
>> 843 select HW_HAS_PCI
>> 844 select IRQ_MIPS_CPU
>> 845 select I8253
>> 846 select I8259
>> 847 select ISA
>> 848 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 849 select SYS_HAS_CPU_R4X00
>> 850 select SYS_HAS_CPU_R5000
>> 851 select SYS_HAS_CPU_R10000
>> 852 select R5000_CPU_SCACHE
>> 853 select SYS_HAS_EARLY_PRINTK
>> 854 select SYS_SUPPORTS_32BIT_KERNEL
>> 855 select SYS_SUPPORTS_64BIT_KERNEL
>> 856 select SYS_SUPPORTS_BIG_ENDIAN
>> 857 select SYS_SUPPORTS_HIGHMEM
>> 858 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 859 help
>> 860 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 861 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 862 Technology and now in turn merged with Fujitsu. Say Y here to
>> 863 support this machine type.
>> 864
>> 865 config MACH_TX39XX
>> 866 bool "Toshiba TX39 series based machines"
>> 867
>> 868 config MACH_TX49XX
>> 869 bool "Toshiba TX49 series based machines"
>> 870
>> 871 config MIKROTIK_RB532
>> 872 bool "Mikrotik RB532 boards"
>> 873 select CEVT_R4K
>> 874 select CSRC_R4K
>> 875 select DMA_NONCOHERENT
>> 876 select HW_HAS_PCI
>> 877 select IRQ_MIPS_CPU
>> 878 select SYS_HAS_CPU_MIPS32_R1
>> 879 select SYS_SUPPORTS_32BIT_KERNEL
>> 880 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 881 select SWAP_IO_SPACE
>> 882 select BOOT_RAW
>> 883 select GPIOLIB
>> 884 select MIPS_L1_CACHE_SHIFT_4
>> 885 help
>> 886 Support the Mikrotik(tm) RouterBoard 532 series,
>> 887 based on the IDT RC32434 SoC.
>> 888
>> 889 config CAVIUM_OCTEON_SOC
>> 890 bool "Cavium Networks Octeon SoC based boards"
>> 891 select CEVT_R4K
>> 892 select ARCH_HAS_PHYS_TO_DMA
>> 893 select ARCH_PHYS_ADDR_T_64BIT
>> 894 select DMA_COHERENT
>> 895 select SYS_SUPPORTS_64BIT_KERNEL
>> 896 select SYS_SUPPORTS_BIG_ENDIAN
>> 897 select EDAC_SUPPORT
>> 898 select EDAC_ATOMIC_SCRUB
>> 899 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 900 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 901 select SYS_HAS_EARLY_PRINTK
>> 902 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 903 select HW_HAS_PCI
>> 904 select ZONE_DMA32
>> 905 select HOLES_IN_ZONE
>> 906 select GPIOLIB
>> 907 select LIBFDT
>> 908 select USE_OF
>> 909 select ARCH_SPARSEMEM_ENABLE
>> 910 select SYS_SUPPORTS_SMP
>> 911 select NR_CPUS_DEFAULT_64
>> 912 select MIPS_NR_CPU_NR_MAP_1024
>> 913 select BUILTIN_DTB
>> 914 select MTD_COMPLEX_MAPPINGS
>> 915 select SYS_SUPPORTS_RELOCATABLE
>> 916 help
>> 917 This option supports all of the Octeon reference boards from Cavium
>> 918 Networks. It builds a kernel that dynamically determines the Octeon
>> 919 CPU type and supports all known board reference implementations.
>> 920 Some of the supported boards are:
>> 921 EBT3000
>> 922 EBH3000
>> 923 EBH3100
>> 924 Thunder
>> 925 Kodama
>> 926 Hikari
>> 927 Say Y here for most Octeon reference boards.
>> 928
>> 929 config NLM_XLR_BOARD
>> 930 bool "Netlogic XLR/XLS based systems"
>> 931 select BOOT_ELF32
>> 932 select NLM_COMMON
>> 933 select SYS_HAS_CPU_XLR
>> 934 select SYS_SUPPORTS_SMP
>> 935 select HW_HAS_PCI
>> 936 select SWAP_IO_SPACE
>> 937 select SYS_SUPPORTS_32BIT_KERNEL
>> 938 select SYS_SUPPORTS_64BIT_KERNEL
>> 939 select ARCH_PHYS_ADDR_T_64BIT
>> 940 select SYS_SUPPORTS_BIG_ENDIAN
>> 941 select SYS_SUPPORTS_HIGHMEM
>> 942 select DMA_COHERENT
>> 943 select NR_CPUS_DEFAULT_32
>> 944 select CEVT_R4K
>> 945 select CSRC_R4K
>> 946 select IRQ_MIPS_CPU
>> 947 select ZONE_DMA32 if 64BIT
>> 948 select SYNC_R4K
>> 949 select SYS_HAS_EARLY_PRINTK
>> 950 select SYS_SUPPORTS_ZBOOT
>> 951 select SYS_SUPPORTS_ZBOOT_UART16550
>> 952 help
>> 953 Support for systems based on Netlogic XLR and XLS processors.
>> 954 Say Y here if you have a XLR or XLS based board.
>> 955
>> 956 config NLM_XLP_BOARD
>> 957 bool "Netlogic XLP based systems"
>> 958 select BOOT_ELF32
>> 959 select NLM_COMMON
>> 960 select SYS_HAS_CPU_XLP
>> 961 select SYS_SUPPORTS_SMP
>> 962 select HW_HAS_PCI
>> 963 select SYS_SUPPORTS_32BIT_KERNEL
>> 964 select SYS_SUPPORTS_64BIT_KERNEL
>> 965 select ARCH_PHYS_ADDR_T_64BIT
>> 966 select GPIOLIB
>> 967 select SYS_SUPPORTS_BIG_ENDIAN
>> 968 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 969 select SYS_SUPPORTS_HIGHMEM
>> 970 select DMA_COHERENT
>> 971 select NR_CPUS_DEFAULT_32
>> 972 select CEVT_R4K
>> 973 select CSRC_R4K
>> 974 select IRQ_MIPS_CPU
>> 975 select ZONE_DMA32 if 64BIT
>> 976 select SYNC_R4K
>> 977 select SYS_HAS_EARLY_PRINTK
>> 978 select USE_OF
>> 979 select SYS_SUPPORTS_ZBOOT
>> 980 select SYS_SUPPORTS_ZBOOT_UART16550
>> 981 help
>> 982 This board is based on Netlogic XLP Processor.
>> 983 Say Y here if you have a XLP based board.
>> 984
>> 985 config MIPS_PARAVIRT
>> 986 bool "Para-Virtualized guest system"
>> 987 select CEVT_R4K
>> 988 select CSRC_R4K
>> 989 select DMA_COHERENT
>> 990 select SYS_SUPPORTS_64BIT_KERNEL
>> 991 select SYS_SUPPORTS_32BIT_KERNEL
>> 992 select SYS_SUPPORTS_BIG_ENDIAN
>> 993 select SYS_SUPPORTS_SMP
>> 994 select NR_CPUS_DEFAULT_4
>> 995 select SYS_HAS_EARLY_PRINTK
>> 996 select SYS_HAS_CPU_MIPS32_R2
>> 997 select SYS_HAS_CPU_MIPS64_R2
>> 998 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 999 select HW_HAS_PCI
>> 1000 select SWAP_IO_SPACE
60 help 1001 help
61 Xtensa processors are 32-bit RISC ma !! 1002 This option supports guest running under ????
62 primarily for embedded systems. The !! 1003
63 configurable and extensible. The Li !! 1004 endchoice
64 architecture supports all processor !! 1005
65 with reasonable minimum requirements !! 1006 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 1007 source "arch/mips/ath25/Kconfig"
>> 1008 source "arch/mips/ath79/Kconfig"
>> 1009 source "arch/mips/bcm47xx/Kconfig"
>> 1010 source "arch/mips/bcm63xx/Kconfig"
>> 1011 source "arch/mips/bmips/Kconfig"
>> 1012 source "arch/mips/generic/Kconfig"
>> 1013 source "arch/mips/jazz/Kconfig"
>> 1014 source "arch/mips/jz4740/Kconfig"
>> 1015 source "arch/mips/lantiq/Kconfig"
>> 1016 source "arch/mips/lasat/Kconfig"
>> 1017 source "arch/mips/pic32/Kconfig"
>> 1018 source "arch/mips/pistachio/Kconfig"
>> 1019 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1020 source "arch/mips/ralink/Kconfig"
>> 1021 source "arch/mips/sgi-ip27/Kconfig"
>> 1022 source "arch/mips/sibyte/Kconfig"
>> 1023 source "arch/mips/txx9/Kconfig"
>> 1024 source "arch/mips/vr41xx/Kconfig"
>> 1025 source "arch/mips/cavium-octeon/Kconfig"
>> 1026 source "arch/mips/loongson32/Kconfig"
>> 1027 source "arch/mips/loongson64/Kconfig"
>> 1028 source "arch/mips/netlogic/Kconfig"
>> 1029 source "arch/mips/paravirt/Kconfig"
>> 1030
>> 1031 endmenu
>> 1032
>> 1033 config RWSEM_GENERIC_SPINLOCK
>> 1034 bool
>> 1035 default y
>> 1036
>> 1037 config RWSEM_XCHGADD_ALGORITHM
>> 1038 bool
67 1039
68 config GENERIC_HWEIGHT 1040 config GENERIC_HWEIGHT
69 def_bool y !! 1041 bool
>> 1042 default y
70 1043
71 config ARCH_HAS_ILOG2_U32 !! 1044 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1045 bool
>> 1046 default y
73 1047
74 config ARCH_HAS_ILOG2_U64 !! 1048 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1049 bool
>> 1050 default y
76 1051
77 config ARCH_MTD_XIP !! 1052 #
78 def_bool y !! 1053 # Select some configuration options automatically based on user selections.
>> 1054 #
>> 1055 config FW_ARC
>> 1056 bool
>> 1057
>> 1058 config ARCH_MAY_HAVE_PC_FDC
>> 1059 bool
>> 1060
>> 1061 config BOOT_RAW
>> 1062 bool
>> 1063
>> 1064 config CEVT_BCM1480
>> 1065 bool
>> 1066
>> 1067 config CEVT_DS1287
>> 1068 bool
>> 1069
>> 1070 config CEVT_GT641XX
>> 1071 bool
>> 1072
>> 1073 config CEVT_R4K
>> 1074 bool
>> 1075
>> 1076 config CEVT_SB1250
>> 1077 bool
>> 1078
>> 1079 config CEVT_TXX9
>> 1080 bool
>> 1081
>> 1082 config CSRC_BCM1480
>> 1083 bool
>> 1084
>> 1085 config CSRC_IOASIC
>> 1086 bool
>> 1087
>> 1088 config CSRC_R4K
>> 1089 bool
>> 1090
>> 1091 config CSRC_SB1250
>> 1092 bool
>> 1093
>> 1094 config MIPS_CLOCK_VSYSCALL
>> 1095 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1096
>> 1097 config GPIO_TXX9
>> 1098 select GPIOLIB
>> 1099 bool
>> 1100
>> 1101 config FW_CFE
>> 1102 bool
>> 1103
>> 1104 config ARCH_DMA_ADDR_T_64BIT
>> 1105 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
>> 1106
>> 1107 config ARCH_SUPPORTS_UPROBES
>> 1108 bool
>> 1109
>> 1110 config DMA_MAYBE_COHERENT
>> 1111 select DMA_NONCOHERENT
>> 1112 bool
>> 1113
>> 1114 config DMA_PERDEV_COHERENT
>> 1115 bool
>> 1116 select DMA_MAYBE_COHERENT
>> 1117
>> 1118 config DMA_COHERENT
>> 1119 bool
>> 1120
>> 1121 config DMA_NONCOHERENT
>> 1122 bool
>> 1123 select NEED_DMA_MAP_STATE
>> 1124
>> 1125 config NEED_DMA_MAP_STATE
>> 1126 bool
>> 1127
>> 1128 config SYS_HAS_EARLY_PRINTK
>> 1129 bool
>> 1130
>> 1131 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1132 bool
>> 1133
>> 1134 config MIPS_BONITO64
>> 1135 bool
>> 1136
>> 1137 config MIPS_MSC
>> 1138 bool
>> 1139
>> 1140 config MIPS_NILE4
>> 1141 bool
>> 1142
>> 1143 config SYNC_R4K
>> 1144 bool
>> 1145
>> 1146 config MIPS_MACHINE
>> 1147 def_bool n
79 1148
80 config NO_IOPORT_MAP 1149 config NO_IOPORT_MAP
81 def_bool n 1150 def_bool n
82 1151
83 config HZ !! 1152 config GENERIC_CSUM
84 int !! 1153 bool
85 default 100 <<
86 1154
87 config LOCKDEP_SUPPORT !! 1155 config GENERIC_ISA_DMA
88 def_bool y !! 1156 bool
>> 1157 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1158 select ISA_DMA_API
89 1159
90 config STACKTRACE_SUPPORT !! 1160 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1161 bool
>> 1162 select GENERIC_ISA_DMA
>> 1163
>> 1164 config ISA_DMA_API
>> 1165 bool
>> 1166
>> 1167 config HOLES_IN_ZONE
>> 1168 bool
>> 1169
>> 1170 config SYS_SUPPORTS_RELOCATABLE
>> 1171 bool
>> 1172 help
>> 1173 Selected if the platform supports relocating the kernel.
>> 1174 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1175 to allow access to command line and entropy sources.
>> 1176
>> 1177 config MIPS_CBPF_JIT
91 def_bool y 1178 def_bool y
>> 1179 depends on BPF_JIT && HAVE_CBPF_JIT
92 1180
93 config MMU !! 1181 config MIPS_EBPF_JIT
94 def_bool n !! 1182 def_bool y
95 select PFAULT !! 1183 depends on BPF_JIT && HAVE_EBPF_JIT
96 1184
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1185
100 config KASAN_SHADOW_OFFSET !! 1186 #
101 hex !! 1187 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1188 # answer,so we try hard to limit the available choices. Also the use of a
>> 1189 # choice statement should be more obvious to the user.
>> 1190 #
>> 1191 choice
>> 1192 prompt "Endianness selection"
>> 1193 help
>> 1194 Some MIPS machines can be configured for either little or big endian
>> 1195 byte order. These modes require different kernels and a different
>> 1196 Linux distribution. In general there is one preferred byteorder for a
>> 1197 particular system but some systems are just as commonly used in the
>> 1198 one or the other endianness.
103 1199
104 config CPU_BIG_ENDIAN 1200 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1201 bool "Big endian"
>> 1202 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1203
107 config CPU_LITTLE_ENDIAN 1204 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1205 bool "Little endian"
>> 1206 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1207
110 config CC_HAVE_CALL0_ABI !! 1208 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1209
113 menu "Processor type and features" !! 1210 config EXPORT_UASM
>> 1211 bool
114 1212
115 choice !! 1213 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1214 bool
117 default XTENSA_VARIANT_FSF <<
118 1215
119 config XTENSA_VARIANT_FSF !! 1216 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1217 bool
121 select MMU <<
122 1218
123 config XTENSA_VARIANT_DC232B !! 1219 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1220 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1221
130 config XTENSA_VARIANT_DC233C !! 1222 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1223 bool
132 select MMU !! 1224 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1225 default y
134 help !! 1226
135 This variant refers to Tensilica's D !! 1227 config MIPS_HUGE_TLB_SUPPORT
>> 1228 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1229
>> 1230 config IRQ_CPU_RM7K
>> 1231 bool
>> 1232
>> 1233 config IRQ_MSP_SLP
>> 1234 bool
>> 1235
>> 1236 config IRQ_MSP_CIC
>> 1237 bool
>> 1238
>> 1239 config IRQ_TXX9
>> 1240 bool
>> 1241
>> 1242 config IRQ_GT641XX
>> 1243 bool
>> 1244
>> 1245 config PCI_GT64XXX_PCI0
>> 1246 bool
>> 1247
>> 1248 config NO_EXCEPT_FILL
>> 1249 bool
>> 1250
>> 1251 config SOC_EMMA2RH
>> 1252 bool
>> 1253 select CEVT_R4K
>> 1254 select CSRC_R4K
>> 1255 select DMA_NONCOHERENT
>> 1256 select IRQ_MIPS_CPU
>> 1257 select SWAP_IO_SPACE
>> 1258 select SYS_HAS_CPU_R5500
>> 1259 select SYS_SUPPORTS_32BIT_KERNEL
>> 1260 select SYS_SUPPORTS_64BIT_KERNEL
>> 1261 select SYS_SUPPORTS_BIG_ENDIAN
>> 1262
>> 1263 config SOC_PNX833X
>> 1264 bool
>> 1265 select CEVT_R4K
>> 1266 select CSRC_R4K
>> 1267 select IRQ_MIPS_CPU
>> 1268 select DMA_NONCOHERENT
>> 1269 select SYS_HAS_CPU_MIPS32_R2
>> 1270 select SYS_SUPPORTS_32BIT_KERNEL
>> 1271 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1272 select SYS_SUPPORTS_BIG_ENDIAN
>> 1273 select SYS_SUPPORTS_MIPS16
>> 1274 select CPU_MIPSR2_IRQ_VI
>> 1275
>> 1276 config SOC_PNX8335
>> 1277 bool
>> 1278 select SOC_PNX833X
>> 1279
>> 1280 config MIPS_SPRAM
>> 1281 bool
>> 1282
>> 1283 config SWAP_IO_SPACE
>> 1284 bool
>> 1285
>> 1286 config SGI_HAS_INDYDOG
>> 1287 bool
136 1288
137 config XTENSA_VARIANT_CUSTOM !! 1289 config SGI_HAS_HAL2
138 bool "Custom Xtensa processor configur !! 1290 bool
139 select HAVE_XTENSA_GPIO32 !! 1291
>> 1292 config SGI_HAS_SEEQ
>> 1293 bool
>> 1294
>> 1295 config SGI_HAS_WD93
>> 1296 bool
>> 1297
>> 1298 config SGI_HAS_ZILOG
>> 1299 bool
>> 1300
>> 1301 config SGI_HAS_I8042
>> 1302 bool
>> 1303
>> 1304 config DEFAULT_SGI_PARTITION
>> 1305 bool
>> 1306
>> 1307 config FW_ARC32
>> 1308 bool
>> 1309
>> 1310 config FW_SNIPROM
>> 1311 bool
>> 1312
>> 1313 config BOOT_ELF32
>> 1314 bool
>> 1315
>> 1316 config MIPS_L1_CACHE_SHIFT_4
>> 1317 bool
>> 1318
>> 1319 config MIPS_L1_CACHE_SHIFT_5
>> 1320 bool
>> 1321
>> 1322 config MIPS_L1_CACHE_SHIFT_6
>> 1323 bool
>> 1324
>> 1325 config MIPS_L1_CACHE_SHIFT_7
>> 1326 bool
>> 1327
>> 1328 config MIPS_L1_CACHE_SHIFT
>> 1329 int
>> 1330 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1331 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1332 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1333 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1334 default "5"
>> 1335
>> 1336 config HAVE_STD_PC_SERIAL_PORT
>> 1337 bool
>> 1338
>> 1339 config ARC_CONSOLE
>> 1340 bool "ARC console support"
>> 1341 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1342
>> 1343 config ARC_MEMORY
>> 1344 bool
>> 1345 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1346 default y
>> 1347
>> 1348 config ARC_PROMLIB
>> 1349 bool
>> 1350 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1351 default y
>> 1352
>> 1353 config FW_ARC64
>> 1354 bool
>> 1355
>> 1356 config BOOT_ELF64
>> 1357 bool
>> 1358
>> 1359 menu "CPU selection"
>> 1360
>> 1361 choice
>> 1362 prompt "CPU type"
>> 1363 default CPU_R4X00
>> 1364
>> 1365 config CPU_LOONGSON3
>> 1366 bool "Loongson 3 CPU"
>> 1367 depends on SYS_HAS_CPU_LOONGSON3
>> 1368 select CPU_SUPPORTS_64BIT_KERNEL
>> 1369 select CPU_SUPPORTS_HIGHMEM
>> 1370 select CPU_SUPPORTS_HUGEPAGES
>> 1371 select WEAK_ORDERING
>> 1372 select WEAK_REORDERING_BEYOND_LLSC
>> 1373 select MIPS_PGD_C0_CONTEXT
>> 1374 select MIPS_L1_CACHE_SHIFT_6
>> 1375 select GPIOLIB
140 help 1376 help
141 Select this variant to use a custom !! 1377 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1378 set with many extensions.
143 endchoice <<
144 1379
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1380 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1381 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1382 default n
>> 1383 select CPU_MIPSR2
>> 1384 select CPU_HAS_PREFETCH
>> 1385 depends on CPU_LOONGSON3
>> 1386 help
>> 1387 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1388 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1389 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1390 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1391 Fast TLB refill support, etc.
>> 1392
>> 1393 This option enable those enhancements which are not probed at run
>> 1394 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1395 please say 'N' here. If you want a high-performance kernel to run on
>> 1396 new Loongson 3 machines only, please say 'Y' here.
>> 1397
>> 1398 config CPU_LOONGSON2E
>> 1399 bool "Loongson 2E"
>> 1400 depends on SYS_HAS_CPU_LOONGSON2E
>> 1401 select CPU_LOONGSON2
>> 1402 help
>> 1403 The Loongson 2E processor implements the MIPS III instruction set
>> 1404 with many extensions.
>> 1405
>> 1406 It has an internal FPGA northbridge, which is compatible to
>> 1407 bonito64.
>> 1408
>> 1409 config CPU_LOONGSON2F
>> 1410 bool "Loongson 2F"
>> 1411 depends on SYS_HAS_CPU_LOONGSON2F
>> 1412 select CPU_LOONGSON2
>> 1413 select GPIOLIB
>> 1414 help
>> 1415 The Loongson 2F processor implements the MIPS III instruction set
>> 1416 with many extensions.
>> 1417
>> 1418 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1419 have a similar programming interface with FPGA northbridge used in
>> 1420 Loongson2E.
>> 1421
>> 1422 config CPU_LOONGSON1B
>> 1423 bool "Loongson 1B"
>> 1424 depends on SYS_HAS_CPU_LOONGSON1B
>> 1425 select CPU_LOONGSON1
>> 1426 select LEDS_GPIO_REGISTER
>> 1427 help
>> 1428 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1429 release 2 instruction set.
>> 1430
>> 1431 config CPU_LOONGSON1C
>> 1432 bool "Loongson 1C"
>> 1433 depends on SYS_HAS_CPU_LOONGSON1C
>> 1434 select CPU_LOONGSON1
>> 1435 select LEDS_GPIO_REGISTER
>> 1436 help
>> 1437 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1438 release 2 instruction set.
>> 1439
>> 1440 config CPU_MIPS32_R1
>> 1441 bool "MIPS32 Release 1"
>> 1442 depends on SYS_HAS_CPU_MIPS32_R1
>> 1443 select CPU_HAS_PREFETCH
>> 1444 select CPU_SUPPORTS_32BIT_KERNEL
>> 1445 select CPU_SUPPORTS_HIGHMEM
>> 1446 help
>> 1447 Choose this option to build a kernel for release 1 or later of the
>> 1448 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1449 MIPS processor are based on a MIPS32 processor. If you know the
>> 1450 specific type of processor in your system, choose those that one
>> 1451 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1452 Release 2 of the MIPS32 architecture is available since several
>> 1453 years so chances are you even have a MIPS32 Release 2 processor
>> 1454 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1455 performance.
>> 1456
>> 1457 config CPU_MIPS32_R2
>> 1458 bool "MIPS32 Release 2"
>> 1459 depends on SYS_HAS_CPU_MIPS32_R2
>> 1460 select CPU_HAS_PREFETCH
>> 1461 select CPU_SUPPORTS_32BIT_KERNEL
>> 1462 select CPU_SUPPORTS_HIGHMEM
>> 1463 select CPU_SUPPORTS_MSA
>> 1464 select HAVE_KVM
>> 1465 help
>> 1466 Choose this option to build a kernel for release 2 or later of the
>> 1467 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1468 MIPS processor are based on a MIPS32 processor. If you know the
>> 1469 specific type of processor in your system, choose those that one
>> 1470 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1471
>> 1472 config CPU_MIPS32_R6
>> 1473 bool "MIPS32 Release 6"
>> 1474 depends on SYS_HAS_CPU_MIPS32_R6
>> 1475 select CPU_HAS_PREFETCH
>> 1476 select CPU_SUPPORTS_32BIT_KERNEL
>> 1477 select CPU_SUPPORTS_HIGHMEM
>> 1478 select CPU_SUPPORTS_MSA
>> 1479 select GENERIC_CSUM
>> 1480 select HAVE_KVM
>> 1481 select MIPS_O32_FP64_SUPPORT
>> 1482 help
>> 1483 Choose this option to build a kernel for release 6 or later of the
>> 1484 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1485 family, are based on a MIPS32r6 processor. If you own an older
>> 1486 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1487
>> 1488 config CPU_MIPS64_R1
>> 1489 bool "MIPS64 Release 1"
>> 1490 depends on SYS_HAS_CPU_MIPS64_R1
>> 1491 select CPU_HAS_PREFETCH
>> 1492 select CPU_SUPPORTS_32BIT_KERNEL
>> 1493 select CPU_SUPPORTS_64BIT_KERNEL
>> 1494 select CPU_SUPPORTS_HIGHMEM
>> 1495 select CPU_SUPPORTS_HUGEPAGES
>> 1496 help
>> 1497 Choose this option to build a kernel for release 1 or later of the
>> 1498 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1499 MIPS processor are based on a MIPS64 processor. If you know the
>> 1500 specific type of processor in your system, choose those that one
>> 1501 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1502 Release 2 of the MIPS64 architecture is available since several
>> 1503 years so chances are you even have a MIPS64 Release 2 processor
>> 1504 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1505 performance.
>> 1506
>> 1507 config CPU_MIPS64_R2
>> 1508 bool "MIPS64 Release 2"
>> 1509 depends on SYS_HAS_CPU_MIPS64_R2
>> 1510 select CPU_HAS_PREFETCH
>> 1511 select CPU_SUPPORTS_32BIT_KERNEL
>> 1512 select CPU_SUPPORTS_64BIT_KERNEL
>> 1513 select CPU_SUPPORTS_HIGHMEM
>> 1514 select CPU_SUPPORTS_HUGEPAGES
>> 1515 select CPU_SUPPORTS_MSA
>> 1516 select HAVE_KVM
>> 1517 help
>> 1518 Choose this option to build a kernel for release 2 or later of the
>> 1519 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1520 MIPS processor are based on a MIPS64 processor. If you know the
>> 1521 specific type of processor in your system, choose those that one
>> 1522 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1523
>> 1524 config CPU_MIPS64_R6
>> 1525 bool "MIPS64 Release 6"
>> 1526 depends on SYS_HAS_CPU_MIPS64_R6
>> 1527 select CPU_HAS_PREFETCH
>> 1528 select CPU_SUPPORTS_32BIT_KERNEL
>> 1529 select CPU_SUPPORTS_64BIT_KERNEL
>> 1530 select CPU_SUPPORTS_HIGHMEM
>> 1531 select CPU_SUPPORTS_MSA
>> 1532 select GENERIC_CSUM
>> 1533 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1534 select HAVE_KVM
>> 1535 help
>> 1536 Choose this option to build a kernel for release 6 or later of the
>> 1537 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1538 family, are based on a MIPS64r6 processor. If you own an older
>> 1539 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1540
>> 1541 config CPU_R3000
>> 1542 bool "R3000"
>> 1543 depends on SYS_HAS_CPU_R3000
>> 1544 select CPU_HAS_WB
>> 1545 select CPU_SUPPORTS_32BIT_KERNEL
>> 1546 select CPU_SUPPORTS_HIGHMEM
>> 1547 help
>> 1548 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1549 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1550 *not* work on R4000 machines and vice versa. However, since most
>> 1551 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1552 might be a safe bet. If the resulting kernel does not work,
>> 1553 try to recompile with R3000.
>> 1554
>> 1555 config CPU_TX39XX
>> 1556 bool "R39XX"
>> 1557 depends on SYS_HAS_CPU_TX39XX
>> 1558 select CPU_SUPPORTS_32BIT_KERNEL
>> 1559
>> 1560 config CPU_VR41XX
>> 1561 bool "R41xx"
>> 1562 depends on SYS_HAS_CPU_VR41XX
>> 1563 select CPU_SUPPORTS_32BIT_KERNEL
>> 1564 select CPU_SUPPORTS_64BIT_KERNEL
>> 1565 help
>> 1566 The options selects support for the NEC VR4100 series of processors.
>> 1567 Only choose this option if you have one of these processors as a
>> 1568 kernel built with this option will not run on any other type of
>> 1569 processor or vice versa.
>> 1570
>> 1571 config CPU_R4300
>> 1572 bool "R4300"
>> 1573 depends on SYS_HAS_CPU_R4300
>> 1574 select CPU_SUPPORTS_32BIT_KERNEL
>> 1575 select CPU_SUPPORTS_64BIT_KERNEL
>> 1576 help
>> 1577 MIPS Technologies R4300-series processors.
>> 1578
>> 1579 config CPU_R4X00
>> 1580 bool "R4x00"
>> 1581 depends on SYS_HAS_CPU_R4X00
>> 1582 select CPU_SUPPORTS_32BIT_KERNEL
>> 1583 select CPU_SUPPORTS_64BIT_KERNEL
>> 1584 select CPU_SUPPORTS_HUGEPAGES
>> 1585 help
>> 1586 MIPS Technologies R4000-series processors other than 4300, including
>> 1587 the R4000, R4400, R4600, and 4700.
>> 1588
>> 1589 config CPU_TX49XX
>> 1590 bool "R49XX"
>> 1591 depends on SYS_HAS_CPU_TX49XX
>> 1592 select CPU_HAS_PREFETCH
>> 1593 select CPU_SUPPORTS_32BIT_KERNEL
>> 1594 select CPU_SUPPORTS_64BIT_KERNEL
>> 1595 select CPU_SUPPORTS_HUGEPAGES
>> 1596
>> 1597 config CPU_R5000
>> 1598 bool "R5000"
>> 1599 depends on SYS_HAS_CPU_R5000
>> 1600 select CPU_SUPPORTS_32BIT_KERNEL
>> 1601 select CPU_SUPPORTS_64BIT_KERNEL
>> 1602 select CPU_SUPPORTS_HUGEPAGES
>> 1603 help
>> 1604 MIPS Technologies R5000-series processors other than the Nevada.
>> 1605
>> 1606 config CPU_R5432
>> 1607 bool "R5432"
>> 1608 depends on SYS_HAS_CPU_R5432
>> 1609 select CPU_SUPPORTS_32BIT_KERNEL
>> 1610 select CPU_SUPPORTS_64BIT_KERNEL
>> 1611 select CPU_SUPPORTS_HUGEPAGES
>> 1612
>> 1613 config CPU_R5500
>> 1614 bool "R5500"
>> 1615 depends on SYS_HAS_CPU_R5500
>> 1616 select CPU_SUPPORTS_32BIT_KERNEL
>> 1617 select CPU_SUPPORTS_64BIT_KERNEL
>> 1618 select CPU_SUPPORTS_HUGEPAGES
>> 1619 help
>> 1620 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1621 instruction set.
>> 1622
>> 1623 config CPU_NEVADA
>> 1624 bool "RM52xx"
>> 1625 depends on SYS_HAS_CPU_NEVADA
>> 1626 select CPU_SUPPORTS_32BIT_KERNEL
>> 1627 select CPU_SUPPORTS_64BIT_KERNEL
>> 1628 select CPU_SUPPORTS_HUGEPAGES
>> 1629 help
>> 1630 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1631
>> 1632 config CPU_R8000
>> 1633 bool "R8000"
>> 1634 depends on SYS_HAS_CPU_R8000
>> 1635 select CPU_HAS_PREFETCH
>> 1636 select CPU_SUPPORTS_64BIT_KERNEL
>> 1637 help
>> 1638 MIPS Technologies R8000 processors. Note these processors are
>> 1639 uncommon and the support for them is incomplete.
>> 1640
>> 1641 config CPU_R10000
>> 1642 bool "R10000"
>> 1643 depends on SYS_HAS_CPU_R10000
>> 1644 select CPU_HAS_PREFETCH
>> 1645 select CPU_SUPPORTS_32BIT_KERNEL
>> 1646 select CPU_SUPPORTS_64BIT_KERNEL
>> 1647 select CPU_SUPPORTS_HIGHMEM
>> 1648 select CPU_SUPPORTS_HUGEPAGES
>> 1649 help
>> 1650 MIPS Technologies R10000-series processors.
>> 1651
>> 1652 config CPU_RM7000
>> 1653 bool "RM7000"
>> 1654 depends on SYS_HAS_CPU_RM7000
>> 1655 select CPU_HAS_PREFETCH
>> 1656 select CPU_SUPPORTS_32BIT_KERNEL
>> 1657 select CPU_SUPPORTS_64BIT_KERNEL
>> 1658 select CPU_SUPPORTS_HIGHMEM
>> 1659 select CPU_SUPPORTS_HUGEPAGES
>> 1660
>> 1661 config CPU_SB1
>> 1662 bool "SB1"
>> 1663 depends on SYS_HAS_CPU_SB1
>> 1664 select CPU_SUPPORTS_32BIT_KERNEL
>> 1665 select CPU_SUPPORTS_64BIT_KERNEL
>> 1666 select CPU_SUPPORTS_HIGHMEM
>> 1667 select CPU_SUPPORTS_HUGEPAGES
>> 1668 select WEAK_ORDERING
>> 1669
>> 1670 config CPU_CAVIUM_OCTEON
>> 1671 bool "Cavium Octeon processor"
>> 1672 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1673 select CPU_HAS_PREFETCH
>> 1674 select CPU_SUPPORTS_64BIT_KERNEL
>> 1675 select WEAK_ORDERING
>> 1676 select CPU_SUPPORTS_HIGHMEM
>> 1677 select CPU_SUPPORTS_HUGEPAGES
>> 1678 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1679 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1680 select MIPS_L1_CACHE_SHIFT_7
>> 1681 select HAVE_KVM
>> 1682 help
>> 1683 The Cavium Octeon processor is a highly integrated chip containing
>> 1684 many ethernet hardware widgets for networking tasks. The processor
>> 1685 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1686 Full details can be found at http://www.caviumnetworks.com.
>> 1687
>> 1688 config CPU_BMIPS
>> 1689 bool "Broadcom BMIPS"
>> 1690 depends on SYS_HAS_CPU_BMIPS
>> 1691 select CPU_MIPS32
>> 1692 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1693 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1694 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1695 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1696 select CPU_SUPPORTS_32BIT_KERNEL
>> 1697 select DMA_NONCOHERENT
>> 1698 select IRQ_MIPS_CPU
>> 1699 select SWAP_IO_SPACE
>> 1700 select WEAK_ORDERING
>> 1701 select CPU_SUPPORTS_HIGHMEM
>> 1702 select CPU_HAS_PREFETCH
>> 1703 select CPU_SUPPORTS_CPUFREQ
>> 1704 select MIPS_EXTERNAL_TIMER
>> 1705 help
>> 1706 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1707
>> 1708 config CPU_XLR
>> 1709 bool "Netlogic XLR SoC"
>> 1710 depends on SYS_HAS_CPU_XLR
>> 1711 select CPU_SUPPORTS_32BIT_KERNEL
>> 1712 select CPU_SUPPORTS_64BIT_KERNEL
>> 1713 select CPU_SUPPORTS_HIGHMEM
>> 1714 select CPU_SUPPORTS_HUGEPAGES
>> 1715 select WEAK_ORDERING
>> 1716 select WEAK_REORDERING_BEYOND_LLSC
>> 1717 help
>> 1718 Netlogic Microsystems XLR/XLS processors.
>> 1719
>> 1720 config CPU_XLP
>> 1721 bool "Netlogic XLP SoC"
>> 1722 depends on SYS_HAS_CPU_XLP
>> 1723 select CPU_SUPPORTS_32BIT_KERNEL
>> 1724 select CPU_SUPPORTS_64BIT_KERNEL
>> 1725 select CPU_SUPPORTS_HIGHMEM
>> 1726 select WEAK_ORDERING
>> 1727 select WEAK_REORDERING_BEYOND_LLSC
>> 1728 select CPU_HAS_PREFETCH
>> 1729 select CPU_MIPSR2
>> 1730 select CPU_SUPPORTS_HUGEPAGES
>> 1731 select MIPS_ASID_BITS_VARIABLE
173 help 1732 help
174 Enable if core variant has Performan !! 1733 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1734 endchoice
176 <<
177 If unsure, say N. <<
178 1735
179 config XTENSA_FAKE_NMI !! 1736 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1737 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1738 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1739 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1740 help
>> 1741 Choose this option to build a kernel for release 2 or later of the
>> 1742 MIPS32 architecture including features from the 3.5 release such as
>> 1743 support for Enhanced Virtual Addressing (EVA).
>> 1744
>> 1745 config CPU_MIPS32_3_5_EVA
>> 1746 bool "Enhanced Virtual Addressing (EVA)"
>> 1747 depends on CPU_MIPS32_3_5_FEATURES
>> 1748 select EVA
>> 1749 default y
>> 1750 help
>> 1751 Choose this option if you want to enable the Enhanced Virtual
>> 1752 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1753 One of its primary benefits is an increase in the maximum size
>> 1754 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1755
>> 1756 config CPU_MIPS32_R5_FEATURES
>> 1757 bool "MIPS32 Release 5 Features"
>> 1758 depends on SYS_HAS_CPU_MIPS32_R5
>> 1759 depends on CPU_MIPS32_R2
>> 1760 help
>> 1761 Choose this option to build a kernel for release 2 or later of the
>> 1762 MIPS32 architecture including features from release 5 such as
>> 1763 support for Extended Physical Addressing (XPA).
>> 1764
>> 1765 config CPU_MIPS32_R5_XPA
>> 1766 bool "Extended Physical Addressing (XPA)"
>> 1767 depends on CPU_MIPS32_R5_FEATURES
>> 1768 depends on !EVA
>> 1769 depends on !PAGE_SIZE_4KB
>> 1770 depends on SYS_SUPPORTS_HIGHMEM
>> 1771 select XPA
>> 1772 select HIGHMEM
>> 1773 select ARCH_PHYS_ADDR_T_64BIT
182 default n 1774 default n
183 help 1775 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1776 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1777 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1778 benefit is to increase physical addressing equal to or greater
>> 1779 than 40 bits. Note that this has the side effect of turning on
>> 1780 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1781 If unsure, say 'N' here.
186 1782
187 If there are other interrupts at or !! 1783 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1784 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1785 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1786
193 If unsure, say N. !! 1787 config CPU_JUMP_WORKAROUNDS
>> 1788 bool
194 1789
195 config PFAULT !! 1790 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1791 bool "Loongson 2F Workarounds"
197 default y 1792 default y
>> 1793 select CPU_NOP_WORKAROUNDS
>> 1794 select CPU_JUMP_WORKAROUNDS
198 help 1795 help
199 Handle protection faults. MMU config !! 1796 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1797 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1798 unexpectedly. For more information please refer to the gas
>> 1799 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1800
>> 1801 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1802 are needed. The workarounds have no significant side effect on them
>> 1803 but may decrease the performance of the system so this option should
>> 1804 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1805 systems.
202 1806
203 If unsure, say Y. !! 1807 If unsure, please say Y.
>> 1808 endif # CPU_LOONGSON2F
204 1809
205 config XTENSA_UNALIGNED_USER !! 1810 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1811 bool
207 help !! 1812 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1813 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1814 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1815 select HAVE_KERNEL_LZMA
>> 1816 select HAVE_KERNEL_LZO
>> 1817 select HAVE_KERNEL_XZ
211 1818
212 Say Y here to enable unaligned memor !! 1819 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1820 bool
>> 1821 select SYS_SUPPORTS_ZBOOT
213 1822
214 config XTENSA_LOAD_STORE !! 1823 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1824 bool
216 help !! 1825 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1826
223 Say Y here to enable exception handl !! 1827 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1828 bool
>> 1829 select CPU_SUPPORTS_32BIT_KERNEL
>> 1830 select CPU_SUPPORTS_64BIT_KERNEL
>> 1831 select CPU_SUPPORTS_HIGHMEM
>> 1832 select CPU_SUPPORTS_HUGEPAGES
225 1833
226 config HAVE_SMP !! 1834 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1835 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1836 select CPU_MIPS32
229 select XTENSA_MX !! 1837 select CPU_MIPSR2
230 help !! 1838 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1839 select CPU_SUPPORTS_32BIT_KERNEL
232 supports Multiprocessing. Multiproce !! 1840 select CPU_SUPPORTS_HIGHMEM
233 the CPU core definition and currentl !! 1841 select CPU_SUPPORTS_CPUFREQ
234 1842
235 Multiprocessor support is implemente !! 1843 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1844 select SMP_UP if SMP
>> 1845 bool
237 1846
238 The MX interrupt distributer adds In !! 1847 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1848 bool
240 like the open cores ethernet driver !! 1849 select SYS_SUPPORTS_SMP
>> 1850 select SYS_SUPPORTS_HOTPLUG_CPU
241 1851
242 You still have to select "Enable SMP !! 1852 config CPU_BMIPS4380
>> 1853 bool
>> 1854 select MIPS_L1_CACHE_SHIFT_6
>> 1855 select SYS_SUPPORTS_SMP
>> 1856 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1857 select CPU_HAS_RIXI
243 1858
244 config SMP !! 1859 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1860 bool
246 depends on HAVE_SMP !! 1861 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1862 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1863 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1864 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1865 select CPU_HAS_RIXI
251 1866
252 config NR_CPUS !! 1867 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1868 bool
254 int "Maximum number of CPUs (2-32)" !! 1869 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1870 select CPU_HAS_RIXI
256 default "4" <<
257 1871
258 config HOTPLUG_CPU !! 1872 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1873 bool
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 1874
265 Say N if you want to disable CPU hot !! 1875 config SYS_HAS_CPU_LOONGSON2F
>> 1876 bool
>> 1877 select CPU_SUPPORTS_CPUFREQ
>> 1878 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1879 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1880
>> 1881 config SYS_HAS_CPU_LOONGSON1B
>> 1882 bool
>> 1883
>> 1884 config SYS_HAS_CPU_LOONGSON1C
>> 1885 bool
>> 1886
>> 1887 config SYS_HAS_CPU_MIPS32_R1
>> 1888 bool
>> 1889
>> 1890 config SYS_HAS_CPU_MIPS32_R2
>> 1891 bool
>> 1892
>> 1893 config SYS_HAS_CPU_MIPS32_R3_5
>> 1894 bool
>> 1895
>> 1896 config SYS_HAS_CPU_MIPS32_R5
>> 1897 bool
>> 1898
>> 1899 config SYS_HAS_CPU_MIPS32_R6
>> 1900 bool
>> 1901
>> 1902 config SYS_HAS_CPU_MIPS64_R1
>> 1903 bool
>> 1904
>> 1905 config SYS_HAS_CPU_MIPS64_R2
>> 1906 bool
>> 1907
>> 1908 config SYS_HAS_CPU_MIPS64_R6
>> 1909 bool
>> 1910
>> 1911 config SYS_HAS_CPU_R3000
>> 1912 bool
>> 1913
>> 1914 config SYS_HAS_CPU_TX39XX
>> 1915 bool
>> 1916
>> 1917 config SYS_HAS_CPU_VR41XX
>> 1918 bool
>> 1919
>> 1920 config SYS_HAS_CPU_R4300
>> 1921 bool
>> 1922
>> 1923 config SYS_HAS_CPU_R4X00
>> 1924 bool
>> 1925
>> 1926 config SYS_HAS_CPU_TX49XX
>> 1927 bool
>> 1928
>> 1929 config SYS_HAS_CPU_R5000
>> 1930 bool
>> 1931
>> 1932 config SYS_HAS_CPU_R5432
>> 1933 bool
>> 1934
>> 1935 config SYS_HAS_CPU_R5500
>> 1936 bool
266 1937
267 config SECONDARY_RESET_VECTOR !! 1938 config SYS_HAS_CPU_NEVADA
268 bool "Secondary cores use alternative !! 1939 bool
>> 1940
>> 1941 config SYS_HAS_CPU_R8000
>> 1942 bool
>> 1943
>> 1944 config SYS_HAS_CPU_R10000
>> 1945 bool
>> 1946
>> 1947 config SYS_HAS_CPU_RM7000
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_SB1
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1954 bool
>> 1955
>> 1956 config SYS_HAS_CPU_BMIPS
>> 1957 bool
>> 1958
>> 1959 config SYS_HAS_CPU_BMIPS32_3300
>> 1960 bool
>> 1961 select SYS_HAS_CPU_BMIPS
>> 1962
>> 1963 config SYS_HAS_CPU_BMIPS4350
>> 1964 bool
>> 1965 select SYS_HAS_CPU_BMIPS
>> 1966
>> 1967 config SYS_HAS_CPU_BMIPS4380
>> 1968 bool
>> 1969 select SYS_HAS_CPU_BMIPS
>> 1970
>> 1971 config SYS_HAS_CPU_BMIPS5000
>> 1972 bool
>> 1973 select SYS_HAS_CPU_BMIPS
>> 1974
>> 1975 config SYS_HAS_CPU_XLR
>> 1976 bool
>> 1977
>> 1978 config SYS_HAS_CPU_XLP
>> 1979 bool
>> 1980
>> 1981 config MIPS_MALTA_PM
>> 1982 depends on MIPS_MALTA
>> 1983 depends on PCI
>> 1984 bool
269 default y 1985 default y
270 depends on HAVE_SMP !! 1986
>> 1987 #
>> 1988 # CPU may reorder R->R, R->W, W->R, W->W
>> 1989 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1990 #
>> 1991 config WEAK_ORDERING
>> 1992 bool
>> 1993
>> 1994 #
>> 1995 # CPU may reorder reads and writes beyond LL/SC
>> 1996 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1997 #
>> 1998 config WEAK_REORDERING_BEYOND_LLSC
>> 1999 bool
>> 2000 endmenu
>> 2001
>> 2002 #
>> 2003 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2004 #
>> 2005 config CPU_MIPS32
>> 2006 bool
>> 2007 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2008
>> 2009 config CPU_MIPS64
>> 2010 bool
>> 2011 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2012
>> 2013 #
>> 2014 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2015 #
>> 2016 config CPU_MIPSR1
>> 2017 bool
>> 2018 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2019
>> 2020 config CPU_MIPSR2
>> 2021 bool
>> 2022 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2023 select CPU_HAS_RIXI
>> 2024 select MIPS_SPRAM
>> 2025
>> 2026 config CPU_MIPSR6
>> 2027 bool
>> 2028 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2029 select CPU_HAS_RIXI
>> 2030 select HAVE_ARCH_BITREVERSE
>> 2031 select MIPS_ASID_BITS_VARIABLE
>> 2032 select MIPS_CRC_SUPPORT
>> 2033 select MIPS_SPRAM
>> 2034
>> 2035 config EVA
>> 2036 bool
>> 2037
>> 2038 config XPA
>> 2039 bool
>> 2040
>> 2041 config SYS_SUPPORTS_32BIT_KERNEL
>> 2042 bool
>> 2043 config SYS_SUPPORTS_64BIT_KERNEL
>> 2044 bool
>> 2045 config CPU_SUPPORTS_32BIT_KERNEL
>> 2046 bool
>> 2047 config CPU_SUPPORTS_64BIT_KERNEL
>> 2048 bool
>> 2049 config CPU_SUPPORTS_CPUFREQ
>> 2050 bool
>> 2051 config CPU_SUPPORTS_ADDRWINCFG
>> 2052 bool
>> 2053 config CPU_SUPPORTS_HUGEPAGES
>> 2054 bool
>> 2055 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2056 bool
>> 2057 config MIPS_PGD_C0_CONTEXT
>> 2058 bool
>> 2059 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2060
>> 2061 #
>> 2062 # Set to y for ptrace access to watch registers.
>> 2063 #
>> 2064 config HARDWARE_WATCHPOINTS
>> 2065 bool
>> 2066 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2067
>> 2068 menu "Kernel type"
>> 2069
>> 2070 choice
>> 2071 prompt "Kernel code model"
271 help 2072 help
272 Secondary cores may be configured to !! 2073 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2074 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2075 large memory. You will only be presented a single option in this
>> 2076 menu if your system does not support both 32-bit and 64-bit kernels.
275 2077
276 config FAST_SYSCALL_XTENSA !! 2078 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2079 bool "32-bit kernel"
278 default n !! 2080 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2081 select TRAD_SIGNALS
279 help 2082 help
280 fast_syscall_xtensa is a syscall tha !! 2083 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2084
283 This syscall is deprecated. It may h !! 2085 config 64BIT
284 invalid arguments. It is provided on !! 2086 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2087 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2088 help
>> 2089 Select this option if you want to build a 64-bit kernel.
286 2090
287 If unsure, say N. !! 2091 endchoice
288 2092
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2093 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2094 bool "KVM Guest Kernel"
291 default n !! 2095 depends on BROKEN_ON_SMP
>> 2096 help
>> 2097 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2098 mode.
>> 2099
>> 2100 config KVM_GUEST_TIMER_FREQ
>> 2101 int "Count/Compare Timer Frequency (MHz)"
>> 2102 depends on KVM_GUEST
>> 2103 default 100
292 help 2104 help
293 fast_syscall_spill_registers is a sy !! 2105 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2106 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2107 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2108
297 invalid arguments. It is provided on !! 2109 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2110 bool "48 bits virtual memory"
>> 2111 depends on 64BIT
>> 2112 help
>> 2113 Support a maximum at least 48 bits of application virtual
>> 2114 memory. Default is 40 bits or less, depending on the CPU.
>> 2115 For page sizes 16k and above, this option results in a small
>> 2116 memory overhead for page tables. For 4k page size, a fourth
>> 2117 level of page tables is added which imposes both a memory
>> 2118 overhead as well as slower TLB fault handling.
299 2119
300 If unsure, say N. 2120 If unsure, say N.
301 2121
302 choice 2122 choice
303 prompt "Kernel ABI" !! 2123 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2124 default PAGE_SIZE_4KB
305 help !! 2125
306 Select ABI for the kernel code. This !! 2126 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2127 bool "4kB"
308 kernel/userspace ABI is possible and !! 2128 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2129 help
310 In case both kernel and userspace su !! 2130 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2131 R3000-family processors this is the only available page size. Using
312 build. !! 2132 4kB page size will minimize memory consumption and is therefore
313 !! 2133 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2134
315 !! 2135 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2136 bool "8kB"
317 bool "Default ABI" !! 2137 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2138 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2139 help
320 selected for the toolchain. !! 2140 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2141 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2142 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2143 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2144
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2145 config PAGE_SIZE_16KB
326 help !! 2146 bool "16kB"
327 Select this option to compile kernel !! 2147 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2148 help
329 When this option is not selected the !! 2149 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2150 the price of higher memory consumption. This option is available on
>> 2151 all non-R3000 family processors. Note that you will need a suitable
>> 2152 Linux distribution to support this.
>> 2153
>> 2154 config PAGE_SIZE_32KB
>> 2155 bool "32kB"
>> 2156 depends on CPU_CAVIUM_OCTEON
>> 2157 depends on !MIPS_VA_BITS_48
>> 2158 help
>> 2159 Using 32kB page size will result in higher performance kernel at
>> 2160 the price of higher memory consumption. This option is available
>> 2161 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2162 distribution to support this.
>> 2163
>> 2164 config PAGE_SIZE_64KB
>> 2165 bool "64kB"
>> 2166 depends on !CPU_R3000 && !CPU_TX39XX
>> 2167 help
>> 2168 Using 64kB page size will result in higher performance kernel at
>> 2169 the price of higher memory consumption. This option is available on
>> 2170 all non-R3000 family processor. Not that at the time of this
>> 2171 writing this option is still high experimental.
331 2172
332 endchoice 2173 endchoice
333 2174
334 config USER_ABI_CALL0 !! 2175 config FORCE_MAX_ZONEORDER
>> 2176 int "Maximum zone order"
>> 2177 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2178 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2179 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2180 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2181 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2182 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2183 range 11 64
>> 2184 default "11"
>> 2185 help
>> 2186 The kernel memory allocator divides physically contiguous memory
>> 2187 blocks into "zones", where each zone is a power of two number of
>> 2188 pages. This option selects the largest power of two that the kernel
>> 2189 keeps in the memory allocator. If you need to allocate very large
>> 2190 blocks of physically contiguous memory, then you may need to
>> 2191 increase this value.
>> 2192
>> 2193 This config option is actually maximum order plus one. For example,
>> 2194 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2195
>> 2196 The page size is not necessarily 4KB. Keep this in mind
>> 2197 when choosing a value for this option.
>> 2198
>> 2199 config BOARD_SCACHE
335 bool 2200 bool
336 2201
337 choice !! 2202 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2203 bool
339 default USER_ABI_DEFAULT !! 2204 select BOARD_SCACHE
>> 2205
>> 2206 #
>> 2207 # Support for a MIPS32 / MIPS64 style S-caches
>> 2208 #
>> 2209 config MIPS_CPU_SCACHE
>> 2210 bool
>> 2211 select BOARD_SCACHE
>> 2212
>> 2213 config R5000_CPU_SCACHE
>> 2214 bool
>> 2215 select BOARD_SCACHE
>> 2216
>> 2217 config RM7000_CPU_SCACHE
>> 2218 bool
>> 2219 select BOARD_SCACHE
>> 2220
>> 2221 config SIBYTE_DMA_PAGEOPS
>> 2222 bool "Use DMA to clear/copy pages"
>> 2223 depends on CPU_SB1
340 help 2224 help
341 Select supported userspace ABI. !! 2225 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2226 channel. These DMA channels are otherwise unused by the standard
>> 2227 SiByte Linux port. Seems to give a small performance benefit.
>> 2228
>> 2229 config CPU_HAS_PREFETCH
>> 2230 bool
>> 2231
>> 2232 config CPU_GENERIC_DUMP_TLB
>> 2233 bool
>> 2234 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
>> 2235
>> 2236 config CPU_R4K_FPU
>> 2237 bool
>> 2238 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2239
>> 2240 config CPU_R4K_CACHE_TLB
>> 2241 bool
>> 2242 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
342 2243
343 If unsure, choose the default ABI. !! 2244 config MIPS_MT_SMP
>> 2245 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2246 default y
>> 2247 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2248 select CPU_MIPSR2_IRQ_VI
>> 2249 select CPU_MIPSR2_IRQ_EI
>> 2250 select SYNC_R4K
>> 2251 select MIPS_MT
>> 2252 select SMP
>> 2253 select SMP_UP
>> 2254 select SYS_SUPPORTS_SMP
>> 2255 select SYS_SUPPORTS_SCHED_SMT
>> 2256 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2257 help
>> 2258 This is a kernel model which is known as SMVP. This is supported
>> 2259 on cores with the MT ASE and uses the available VPEs to implement
>> 2260 virtual processors which supports SMP. This is equivalent to the
>> 2261 Intel Hyperthreading feature. For further information go to
>> 2262 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2263
>> 2264 config MIPS_MT
>> 2265 bool
344 2266
345 config USER_ABI_DEFAULT !! 2267 config SCHED_SMT
346 bool "Default ABI only" !! 2268 bool "SMT (multithreading) scheduler support"
>> 2269 depends on SYS_SUPPORTS_SCHED_SMT
>> 2270 default n
347 help 2271 help
348 Assume default userspace ABI. For XE !! 2272 SMT scheduler support improves the CPU scheduler's decision making
349 call0 ABI binaries may be run on suc !! 2273 when dealing with MIPS MT enabled cores at a cost of slightly
350 will not work correctly for them. !! 2274 increased overhead in some places. If unsure say N here.
>> 2275
>> 2276 config SYS_SUPPORTS_SCHED_SMT
>> 2277 bool
>> 2278
>> 2279 config SYS_SUPPORTS_MULTITHREADING
>> 2280 bool
>> 2281
>> 2282 config MIPS_MT_FPAFF
>> 2283 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2284 default y
>> 2285 depends on MIPS_MT_SMP
351 2286
352 config USER_ABI_CALL0_ONLY !! 2287 config MIPSR2_TO_R6_EMULATOR
353 bool "Call0 ABI only" !! 2288 bool "MIPS R2-to-R6 emulator"
354 select USER_ABI_CALL0 !! 2289 depends on CPU_MIPSR6
>> 2290 default y
355 help 2291 help
356 Select this option to support only c !! 2292 Choose this option if you want to run non-R6 MIPS userland code.
357 Windowed ABI binaries will crash wit !! 2293 Even if you say 'Y' here, the emulator will still be disabled by
358 an illegal instruction exception on !! 2294 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2295 The only reason this is a build-time option is to save ~14K from the
>> 2296 final kernel image.
359 2297
360 Choose this option if you're plannin !! 2298 config SYS_SUPPORTS_VPE_LOADER
361 built with call0 ABI. !! 2299 bool
>> 2300 depends on SYS_SUPPORTS_MULTITHREADING
>> 2301 help
>> 2302 Indicates that the platform supports the VPE loader, and provides
>> 2303 physical_memsize.
362 2304
363 config USER_ABI_CALL0_PROBE !! 2305 config MIPS_VPE_LOADER
364 bool "Support both windowed and call0 !! 2306 bool "VPE loader support."
365 select USER_ABI_CALL0 !! 2307 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2308 select CPU_MIPSR2_IRQ_VI
>> 2309 select CPU_MIPSR2_IRQ_EI
>> 2310 select MIPS_MT
366 help 2311 help
367 Select this option to support both w !! 2312 Includes a loader for loading an elf relocatable object
368 ABIs. When enabled all processes are !! 2313 onto another VPE and running it.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 2314
373 This option should be enabled for th !! 2315 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2316 bool
>> 2317 default "y"
>> 2318 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2319
376 Note that Xtensa ISA does not guaran !! 2320 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2321 bool
378 PS.WOE is disabled, check whether th !! 2322 default "y"
>> 2323 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2324
380 endchoice !! 2325 config MIPS_VPE_LOADER_TOM
>> 2326 bool "Load VPE program into memory hidden from linux"
>> 2327 depends on MIPS_VPE_LOADER
>> 2328 default y
>> 2329 help
>> 2330 The loader can use memory that is present but has been hidden from
>> 2331 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2332 you to ensure the amount you put in the option and the space your
>> 2333 program requires is less or equal to the amount physically present.
>> 2334
>> 2335 config MIPS_VPE_APSP_API
>> 2336 bool "Enable support for AP/SP API (RTLX)"
>> 2337 depends on MIPS_VPE_LOADER
381 2338
382 endmenu !! 2339 config MIPS_VPE_APSP_API_CMP
>> 2340 bool
>> 2341 default "y"
>> 2342 depends on MIPS_VPE_APSP_API && MIPS_CMP
383 2343
384 config XTENSA_CALIBRATE_CCOUNT !! 2344 config MIPS_VPE_APSP_API_MT
385 def_bool n !! 2345 bool
>> 2346 default "y"
>> 2347 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2348
>> 2349 config MIPS_CMP
>> 2350 bool "MIPS CMP framework support (DEPRECATED)"
>> 2351 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2352 select SMP
>> 2353 select SYNC_R4K
>> 2354 select SYS_SUPPORTS_SMP
>> 2355 select WEAK_ORDERING
>> 2356 default n
386 help 2357 help
387 On some platforms (XT2000, for examp !! 2358 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2359 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2360 its ability to start secondary CPUs.
>> 2361
>> 2362 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2363 instead of this.
>> 2364
>> 2365 config MIPS_CPS
>> 2366 bool "MIPS Coherent Processing System support"
>> 2367 depends on SYS_SUPPORTS_MIPS_CPS
>> 2368 select MIPS_CM
>> 2369 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2370 select SMP
>> 2371 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2372 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2373 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2374 select SYS_SUPPORTS_SMP
>> 2375 select WEAK_ORDERING
>> 2376 help
>> 2377 Select this if you wish to run an SMP kernel across multiple cores
>> 2378 within a MIPS Coherent Processing System. When this option is
>> 2379 enabled the kernel will probe for other cores and boot them with
>> 2380 no external assistance. It is safe to enable this when hardware
>> 2381 support is unavailable.
390 2382
391 config SERIAL_CONSOLE !! 2383 config MIPS_CPS_PM
392 def_bool n !! 2384 depends on MIPS_CPS
>> 2385 bool
393 2386
394 config PLATFORM_HAVE_XIP !! 2387 config MIPS_CM
395 def_bool n !! 2388 bool
>> 2389 select MIPS_CPC
396 2390
397 menu "Platform options" !! 2391 config MIPS_CPC
>> 2392 bool
>> 2393
>> 2394 config SB1_PASS_2_WORKAROUNDS
>> 2395 bool
>> 2396 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2397 default y
>> 2398
>> 2399 config SB1_PASS_2_1_WORKAROUNDS
>> 2400 bool
>> 2401 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2402 default y
>> 2403
>> 2404
>> 2405 config ARCH_PHYS_ADDR_T_64BIT
>> 2406 bool
398 2407
399 choice 2408 choice
400 prompt "Xtensa System Type" !! 2409 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS !! 2410
>> 2411 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2412 bool "None"
>> 2413 help
>> 2414 Select this if you want neither microMIPS nor SmartMIPS support
402 2415
403 config XTENSA_PLATFORM_ISS !! 2416 config CPU_HAS_SMARTMIPS
404 bool "ISS" !! 2417 depends on SYS_SUPPORTS_SMARTMIPS
405 select XTENSA_CALIBRATE_CCOUNT !! 2418 bool "SmartMIPS"
406 select SERIAL_CONSOLE !! 2419 help
407 help !! 2420 SmartMIPS is a extension of the MIPS32 architecture aimed at
408 ISS is an acronym for Tensilica's In !! 2421 increased security at both hardware and software level for
409 !! 2422 smartcards. Enabling this option will allow proper use of the
410 config XTENSA_PLATFORM_XT2000 !! 2423 SmartMIPS instructions by Linux applications. However a kernel with
411 bool "XT2000" !! 2424 this option will not work on a MIPS core without SmartMIPS core. If
412 help !! 2425 you don't know you probably don't have SmartMIPS and should say N
413 XT2000 is the name of Tensilica's fe !! 2426 here.
414 This hardware is capable of running !! 2427
415 !! 2428 config CPU_MICROMIPS
416 config XTENSA_PLATFORM_XTFPGA !! 2429 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
417 bool "XTFPGA" !! 2430 bool "microMIPS"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2431 help
424 XTFPGA is the name of Tensilica boar !! 2432 When this option is enabled the kernel will be built using the
425 This hardware is capable of running !! 2433 microMIPS ISA
426 2434
427 endchoice 2435 endchoice
428 2436
429 config PLATFORM_NR_IRQS !! 2437 config CPU_HAS_MSA
>> 2438 bool "Support for the MIPS SIMD Architecture"
>> 2439 depends on CPU_SUPPORTS_MSA
>> 2440 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2441 help
>> 2442 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2443 and a set of SIMD instructions to operate on them. When this option
>> 2444 is enabled the kernel will support allocating & switching MSA
>> 2445 vector register contexts. If you know that your kernel will only be
>> 2446 running on CPUs which do not support MSA or that your userland will
>> 2447 not be making use of it then you may wish to say N here to reduce
>> 2448 the size & complexity of your kernel.
>> 2449
>> 2450 If unsure, say Y.
>> 2451
>> 2452 config CPU_HAS_WB
>> 2453 bool
>> 2454
>> 2455 config XKS01
>> 2456 bool
>> 2457
>> 2458 config CPU_HAS_RIXI
>> 2459 bool
>> 2460
>> 2461 #
>> 2462 # Vectored interrupt mode is an R2 feature
>> 2463 #
>> 2464 config CPU_MIPSR2_IRQ_VI
>> 2465 bool
>> 2466
>> 2467 #
>> 2468 # Extended interrupt mode is an R2 feature
>> 2469 #
>> 2470 config CPU_MIPSR2_IRQ_EI
>> 2471 bool
>> 2472
>> 2473 config CPU_HAS_SYNC
>> 2474 bool
>> 2475 depends on !CPU_R3000
>> 2476 default y
>> 2477
>> 2478 #
>> 2479 # CPU non-features
>> 2480 #
>> 2481 config CPU_DADDI_WORKAROUNDS
>> 2482 bool
>> 2483
>> 2484 config CPU_R4000_WORKAROUNDS
>> 2485 bool
>> 2486 select CPU_R4400_WORKAROUNDS
>> 2487
>> 2488 config CPU_R4400_WORKAROUNDS
>> 2489 bool
>> 2490
>> 2491 config MIPS_ASID_SHIFT
430 int 2492 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2493 default 6 if CPU_R3000 || CPU_TX39XX
>> 2494 default 4 if CPU_R8000
432 default 0 2495 default 0
433 2496
434 config XTENSA_CPU_CLOCK !! 2497 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2498 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2499 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2500 default 6 if CPU_R3000 || CPU_TX39XX
>> 2501 default 8
438 2502
439 config GENERIC_CALIBRATE_DELAY !! 2503 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2504 bool
>> 2505
>> 2506 config MIPS_CRC_SUPPORT
>> 2507 bool
>> 2508
>> 2509 #
>> 2510 # - Highmem only makes sense for the 32-bit kernel.
>> 2511 # - The current highmem code will only work properly on physically indexed
>> 2512 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2513 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2514 # moment we protect the user and offer the highmem option only on machines
>> 2515 # where it's known to be safe. This will not offer highmem on a few systems
>> 2516 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2517 # indexed CPUs but we're playing safe.
>> 2518 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2519 # know they might have memory configurations that could make use of highmem
>> 2520 # support.
>> 2521 #
>> 2522 config HIGHMEM
>> 2523 bool "High Memory Support"
>> 2524 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2525
>> 2526 config CPU_SUPPORTS_HIGHMEM
>> 2527 bool
>> 2528
>> 2529 config SYS_SUPPORTS_HIGHMEM
>> 2530 bool
>> 2531
>> 2532 config SYS_SUPPORTS_SMARTMIPS
>> 2533 bool
>> 2534
>> 2535 config SYS_SUPPORTS_MICROMIPS
>> 2536 bool
>> 2537
>> 2538 config SYS_SUPPORTS_MIPS16
>> 2539 bool
441 help 2540 help
442 The BogoMIPS value can easily be der !! 2541 This option must be set if a kernel might be executed on a MIPS16-
>> 2542 enabled CPU even if MIPS16 is not actually being used. In other
>> 2543 words, it makes the kernel MIPS16-tolerant.
443 2544
444 config CMDLINE_BOOL !! 2545 config CPU_SUPPORTS_MSA
445 bool "Default bootloader kernel argume !! 2546 bool
446 2547
447 config CMDLINE !! 2548 config ARCH_FLATMEM_ENABLE
448 string "Initial kernel command string" !! 2549 def_bool y
449 depends on CMDLINE_BOOL !! 2550 depends on !NUMA && !CPU_LOONGSON2
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2551
458 config USE_OF !! 2552 config ARCH_DISCONTIGMEM_ENABLE
459 bool "Flattened Device Tree support" !! 2553 bool
460 select OF !! 2554 default y if SGI_IP27
461 select OF_EARLY_FLATTREE <<
462 help 2555 help
463 Include support for flattened device !! 2556 Say Y to support efficient handling of discontiguous physical memory,
>> 2557 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2558 or have huge holes in the physical address space for other reasons.
>> 2559 See <file:Documentation/vm/numa> for more.
464 2560
465 config BUILTIN_DTB_SOURCE !! 2561 config ARCH_SPARSEMEM_ENABLE
466 string "DTB to build into the kernel i !! 2562 bool
467 depends on OF !! 2563 select SPARSEMEM_STATIC
468 2564
469 config PARSE_BOOTPARAM !! 2565 config NUMA
470 bool "Parse bootparam block" !! 2566 bool "NUMA Support"
>> 2567 depends on SYS_SUPPORTS_NUMA
>> 2568 help
>> 2569 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2570 Access). This option improves performance on systems with more
>> 2571 than two nodes; on two node systems it is generally better to
>> 2572 leave it disabled; on single node systems disable this option
>> 2573 disabled.
>> 2574
>> 2575 config SYS_SUPPORTS_NUMA
>> 2576 bool
>> 2577
>> 2578 config RELOCATABLE
>> 2579 bool "Relocatable kernel"
>> 2580 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2581 help
>> 2582 This builds a kernel image that retains relocation information
>> 2583 so it can be loaded someplace besides the default 1MB.
>> 2584 The relocations make the kernel binary about 15% larger,
>> 2585 but are discarded at runtime
>> 2586
>> 2587 config RELOCATION_TABLE_SIZE
>> 2588 hex "Relocation table size"
>> 2589 depends on RELOCATABLE
>> 2590 range 0x0 0x01000000
>> 2591 default "0x00100000"
>> 2592 ---help---
>> 2593 A table of relocation data will be appended to the kernel binary
>> 2594 and parsed at boot to fix up the relocated kernel.
>> 2595
>> 2596 This option allows the amount of space reserved for the table to be
>> 2597 adjusted, although the default of 1Mb should be ok in most cases.
>> 2598
>> 2599 The build will fail and a valid size suggested if this is too small.
>> 2600
>> 2601 If unsure, leave at the default value.
>> 2602
>> 2603 config RANDOMIZE_BASE
>> 2604 bool "Randomize the address of the kernel image"
>> 2605 depends on RELOCATABLE
>> 2606 ---help---
>> 2607 Randomizes the physical and virtual address at which the
>> 2608 kernel image is loaded, as a security feature that
>> 2609 deters exploit attempts relying on knowledge of the location
>> 2610 of kernel internals.
>> 2611
>> 2612 Entropy is generated using any coprocessor 0 registers available.
>> 2613
>> 2614 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2615
>> 2616 If unsure, say N.
>> 2617
>> 2618 config RANDOMIZE_BASE_MAX_OFFSET
>> 2619 hex "Maximum kASLR offset" if EXPERT
>> 2620 depends on RANDOMIZE_BASE
>> 2621 range 0x0 0x40000000 if EVA || 64BIT
>> 2622 range 0x0 0x08000000
>> 2623 default "0x01000000"
>> 2624 ---help---
>> 2625 When kASLR is active, this provides the maximum offset that will
>> 2626 be applied to the kernel image. It should be set according to the
>> 2627 amount of physical RAM available in the target system minus
>> 2628 PHYSICAL_START and must be a power of 2.
>> 2629
>> 2630 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2631 EVA or 64-bit. The default is 16Mb.
>> 2632
>> 2633 config NODES_SHIFT
>> 2634 int
>> 2635 default "6"
>> 2636 depends on NEED_MULTIPLE_NODES
>> 2637
>> 2638 config HW_PERF_EVENTS
>> 2639 bool "Enable hardware performance counter support for perf events"
>> 2640 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
471 default y 2641 default y
472 help 2642 help
473 Parse parameters passed to the kerne !! 2643 Enable hardware performance counter support for perf events. If
474 be disabled if the kernel is known t !! 2644 disabled, perf events will use software events only.
475 2645
476 If unsure, say Y. !! 2646 source "mm/Kconfig"
477 2647
478 choice !! 2648 config SMP
479 prompt "Semihosting interface" !! 2649 bool "Multi-Processing support"
480 default XTENSA_SIMCALL_ISS !! 2650 depends on SYS_SUPPORTS_SMP
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2651 help
483 Choose semihosting interface that wi !! 2652 This enables support for systems with more than one CPU. If you have
484 block device and networking. !! 2653 a system with only one CPU, say N. If you have a system with more
>> 2654 than one CPU, say Y.
>> 2655
>> 2656 If you say N here, the kernel will run on uni- and multiprocessor
>> 2657 machines, but will use only one CPU of a multiprocessor machine. If
>> 2658 you say Y here, the kernel will run on many, but not all,
>> 2659 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2660 will run faster if you say N here.
485 2661
486 config XTENSA_SIMCALL_ISS !! 2662 People using multiprocessor machines who say Y here should also say
487 bool "simcall" !! 2663 Y to "Enhanced Real Time Clock Support", below.
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2664
492 config XTENSA_SIMCALL_GDBIO !! 2665 See also the SMP-HOWTO available at
493 bool "GDBIO" !! 2666 <http://www.tldp.org/docs.html#howto>.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 2667
498 endchoice !! 2668 If you don't know what to do here, say N.
499 2669
500 config BLK_DEV_SIMDISK !! 2670 config HOTPLUG_CPU
501 tristate "Host file-based simulated bl !! 2671 bool "Support for hot-pluggable CPUs"
502 default n !! 2672 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2673 help
541 There's a 2x16 LCD on most of XTFPGA !! 2674 Say Y here to allow turning CPUs off and on. CPUs can be
542 progress messages there during bootu !! 2675 controlled through /sys/devices/system/cpu.
543 during board bringup. !! 2676 (Note: power management support will enable this option
>> 2677 automatically on SMP systems. )
>> 2678 Say N if you want to disable CPU hotplug.
544 2679
545 If unsure, say N. !! 2680 config SMP_UP
>> 2681 bool
546 2682
547 config XTFPGA_LCD_BASE_ADDR !! 2683 config SYS_SUPPORTS_MIPS_CMP
548 hex "XTFPGA LCD base address" !! 2684 bool
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2685
617 If unsure, say N. !! 2686 config SYS_SUPPORTS_MIPS_CPS
>> 2687 bool
>> 2688
>> 2689 config SYS_SUPPORTS_SMP
>> 2690 bool
>> 2691
>> 2692 config NR_CPUS_DEFAULT_4
>> 2693 bool
>> 2694
>> 2695 config NR_CPUS_DEFAULT_8
>> 2696 bool
>> 2697
>> 2698 config NR_CPUS_DEFAULT_16
>> 2699 bool
>> 2700
>> 2701 config NR_CPUS_DEFAULT_32
>> 2702 bool
>> 2703
>> 2704 config NR_CPUS_DEFAULT_64
>> 2705 bool
618 2706
619 config MEMMAP_CACHEATTR !! 2707 config NR_CPUS
620 hex "Cache attributes for the memory a !! 2708 int "Maximum number of CPUs (2-256)"
621 depends on !MMU !! 2709 range 2 256
622 default 0x22222222 !! 2710 depends on SMP
623 help !! 2711 default "4" if NR_CPUS_DEFAULT_4
624 These cache attributes are set up fo !! 2712 default "8" if NR_CPUS_DEFAULT_8
625 specifies cache attributes for the c !! 2713 default "16" if NR_CPUS_DEFAULT_16
626 region: bits 0..3 -- for addresses 0 !! 2714 default "32" if NR_CPUS_DEFAULT_32
627 bits 4..7 -- for addresses 0x2000000 !! 2715 default "64" if NR_CPUS_DEFAULT_64
628 !! 2716 help
629 Cache attribute values are specific !! 2717 This allows you to specify the maximum number of CPUs which this
630 For region protection MMUs: !! 2718 kernel will support. The maximum supported value is 32 for 32-bit
631 1: WT cached, !! 2719 kernel and 64 for 64-bit kernels; the minimum value which makes
632 2: cache bypass, !! 2720 sense is 1 for Qemu (useful only for kernel debugging purposes)
633 4: WB cached, !! 2721 and 2 for all others.
634 f: illegal. !! 2722
635 For full MMU: !! 2723 This is purely to save memory - each supported CPU adds
636 bit 0: executable, !! 2724 approximately eight kilobytes to the kernel image. For best
637 bit 1: writable, !! 2725 performance should round up your number of processors to the next
638 bits 2..3: !! 2726 power of two.
639 0: cache bypass, !! 2727
640 1: WB cache, !! 2728 config MIPS_PERF_SHARED_TC_COUNTERS
641 2: WT cache, !! 2729 bool
642 3: special (c and e are illegal, !! 2730
643 For MPU: !! 2731 config MIPS_NR_CPU_NR_MAP_1024
644 0: illegal, !! 2732 bool
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2733
683 If unsure, leave the default value h !! 2734 config MIPS_NR_CPU_NR_MAP
>> 2735 int
>> 2736 depends on SMP
>> 2737 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2738 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2739
>> 2740 #
>> 2741 # Timer Interrupt Frequency Configuration
>> 2742 #
684 2743
685 choice 2744 choice
686 prompt "Relocatable vectors location" !! 2745 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2746 default HZ_250
688 help 2747 help
689 Choose whether relocatable vectors a !! 2748 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2749
691 configurations without VECBASE regis !! 2750 config HZ_24
692 placed at their hardware-defined loc !! 2751 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2752
694 config XTENSA_VECTORS_IN_TEXT !! 2753 config HZ_48
695 bool "Merge relocatable vectors into k !! 2754 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2755
697 help !! 2756 config HZ_100
698 This option puts relocatable vectors !! 2757 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2758
700 This is a safe choice for most confi !! 2759 config HZ_128
701 !! 2760 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2761
703 bool "Put relocatable vectors at fixed !! 2762 config HZ_250
704 help !! 2763 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2764
706 Vectors are merged with the .init da !! 2765 config HZ_256
707 are copied into their designated loc !! 2766 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2767
709 XIP-aware MTD support. !! 2768 config HZ_1000
>> 2769 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2770
>> 2771 config HZ_1024
>> 2772 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2773
711 endchoice 2774 endchoice
712 2775
713 config VECTORS_ADDR !! 2776 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2777 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2778
729 config PLATFORM_WANT_DEFAULT_MEM !! 2779 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2780 bool
>> 2781
>> 2782 config SYS_SUPPORTS_100HZ
>> 2783 bool
>> 2784
>> 2785 config SYS_SUPPORTS_128HZ
>> 2786 bool
>> 2787
>> 2788 config SYS_SUPPORTS_250HZ
>> 2789 bool
>> 2790
>> 2791 config SYS_SUPPORTS_256HZ
>> 2792 bool
>> 2793
>> 2794 config SYS_SUPPORTS_1000HZ
>> 2795 bool
>> 2796
>> 2797 config SYS_SUPPORTS_1024HZ
>> 2798 bool
>> 2799
>> 2800 config SYS_SUPPORTS_ARBIT_HZ
>> 2801 bool
>> 2802 default y if !SYS_SUPPORTS_24HZ && \
>> 2803 !SYS_SUPPORTS_48HZ && \
>> 2804 !SYS_SUPPORTS_100HZ && \
>> 2805 !SYS_SUPPORTS_128HZ && \
>> 2806 !SYS_SUPPORTS_250HZ && \
>> 2807 !SYS_SUPPORTS_256HZ && \
>> 2808 !SYS_SUPPORTS_1000HZ && \
>> 2809 !SYS_SUPPORTS_1024HZ
731 2810
732 config DEFAULT_MEM_START !! 2811 config HZ
733 hex !! 2812 int
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2813 default 24 if HZ_24
735 default 0x60000000 if PLATFORM_WANT_DE !! 2814 default 48 if HZ_48
736 default 0x00000000 !! 2815 default 100 if HZ_100
>> 2816 default 128 if HZ_128
>> 2817 default 250 if HZ_250
>> 2818 default 256 if HZ_256
>> 2819 default 1000 if HZ_1000
>> 2820 default 1024 if HZ_1024
>> 2821
>> 2822 config SCHED_HRTICK
>> 2823 def_bool HIGH_RES_TIMERS
>> 2824
>> 2825 source "kernel/Kconfig.preempt"
>> 2826
>> 2827 config KEXEC
>> 2828 bool "Kexec system call"
>> 2829 select KEXEC_CORE
>> 2830 help
>> 2831 kexec is a system call that implements the ability to shutdown your
>> 2832 current kernel, and to start another kernel. It is like a reboot
>> 2833 but it is independent of the system firmware. And like a reboot
>> 2834 you can start any kernel with it, not just Linux.
>> 2835
>> 2836 The name comes from the similarity to the exec system call.
>> 2837
>> 2838 It is an ongoing process to be certain the hardware in a machine
>> 2839 is properly shutdown, so do not be surprised if this code does not
>> 2840 initially work for you. As of this writing the exact hardware
>> 2841 interface is strongly in flux, so no good recommendation can be
>> 2842 made.
>> 2843
>> 2844 config CRASH_DUMP
>> 2845 bool "Kernel crash dumps"
>> 2846 help
>> 2847 Generate crash dump after being started by kexec.
>> 2848 This should be normally only set in special crash dump kernels
>> 2849 which are loaded in the main kernel with kexec-tools into
>> 2850 a specially reserved region and then later executed after
>> 2851 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2852 to a memory address not used by the main kernel or firmware using
>> 2853 PHYSICAL_START.
>> 2854
>> 2855 config PHYSICAL_START
>> 2856 hex "Physical address where the kernel is loaded"
>> 2857 default "0xffffffff84000000"
>> 2858 depends on CRASH_DUMP
>> 2859 help
>> 2860 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2861 If you plan to use kernel for capturing the crash dump change
>> 2862 this value to start of the reserved region (the "X" value as
>> 2863 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2864 passed to the panic-ed kernel).
>> 2865
>> 2866 config SECCOMP
>> 2867 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2868 depends on PROC_FS
>> 2869 default y
737 help 2870 help
738 This is the base address used for bo !! 2871 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2872 that may need to compute untrusted bytecode during their
>> 2873 execution. By using pipes or other transports made available to
>> 2874 the process as file descriptors supporting the read/write
>> 2875 syscalls, it's possible to isolate those applications in
>> 2876 their own address space using seccomp. Once seccomp is
>> 2877 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2878 and the task is only allowed to execute a few safe syscalls
>> 2879 defined by each seccomp mode.
>> 2880
>> 2881 If unsure, say Y. Only embedded should say N here.
>> 2882
>> 2883 config MIPS_O32_FP64_SUPPORT
>> 2884 bool "Support for O32 binaries using 64-bit FP"
>> 2885 depends on 32BIT || MIPS32_O32
>> 2886 help
>> 2887 When this is enabled, the kernel will support use of 64-bit floating
>> 2888 point registers with binaries using the O32 ABI along with the
>> 2889 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2890 32-bit MIPS systems this support is at the cost of increasing the
>> 2891 size and complexity of the compiled FPU emulator. Thus if you are
>> 2892 running a MIPS32 system and know that none of your userland binaries
>> 2893 will require 64-bit floating point, you may wish to reduce the size
>> 2894 of your kernel & potentially improve FP emulation performance by
>> 2895 saying N here.
>> 2896
>> 2897 Although binutils currently supports use of this flag the details
>> 2898 concerning its effect upon the O32 ABI in userland are still being
>> 2899 worked on. In order to avoid userland becoming dependant upon current
>> 2900 behaviour before the details have been finalised, this option should
>> 2901 be considered experimental and only enabled by those working upon
>> 2902 said details.
740 2903
741 If unsure, leave the default value h !! 2904 If unsure, say N.
>> 2905
>> 2906 config USE_OF
>> 2907 bool
>> 2908 select OF
>> 2909 select OF_EARLY_FLATTREE
>> 2910 select IRQ_DOMAIN
>> 2911
>> 2912 config BUILTIN_DTB
>> 2913 bool
742 2914
743 choice 2915 choice
744 prompt "KSEG layout" !! 2916 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2917 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2918
>> 2919 config MIPS_NO_APPENDED_DTB
>> 2920 bool "None"
>> 2921 help
>> 2922 Do not enable appended dtb support.
>> 2923
>> 2924 config MIPS_ELF_APPENDED_DTB
>> 2925 bool "vmlinux"
>> 2926 help
>> 2927 With this option, the boot code will look for a device tree binary
>> 2928 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2929 it is empty and the DTB can be appended using binutils command
>> 2930 objcopy:
>> 2931
>> 2932 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2933
>> 2934 This is meant as a backward compatiblity convenience for those
>> 2935 systems with a bootloader that can't be upgraded to accommodate
>> 2936 the documented boot protocol using a device tree.
>> 2937
>> 2938 config MIPS_RAW_APPENDED_DTB
>> 2939 bool "vmlinux.bin or vmlinuz.bin"
>> 2940 help
>> 2941 With this option, the boot code will look for a device tree binary
>> 2942 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2943 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2944
>> 2945 This is meant as a backward compatibility convenience for those
>> 2946 systems with a bootloader that can't be upgraded to accommodate
>> 2947 the documented boot protocol using a device tree.
>> 2948
>> 2949 Beware that there is very little in terms of protection against
>> 2950 this option being confused by leftover garbage in memory that might
>> 2951 look like a DTB header after a reboot if no actual DTB is appended
>> 2952 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2953 if you don't intend to always append a DTB.
772 endchoice 2954 endchoice
773 2955
774 config HIGHMEM !! 2956 choice
775 bool "High Memory Support" !! 2957 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2958 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2959 !MIPS_MALTA && \
>> 2960 !CAVIUM_OCTEON_SOC
>> 2961 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2962
>> 2963 config MIPS_CMDLINE_FROM_DTB
>> 2964 depends on USE_OF
>> 2965 bool "Dtb kernel arguments if available"
>> 2966
>> 2967 config MIPS_CMDLINE_DTB_EXTEND
>> 2968 depends on USE_OF
>> 2969 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2970
>> 2971 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2972 bool "Bootloader kernel arguments if available"
>> 2973
>> 2974 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2975 depends on CMDLINE_BOOL
>> 2976 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2977 endchoice
>> 2978
>> 2979 endmenu
>> 2980
>> 2981 config LOCKDEP_SUPPORT
>> 2982 bool
>> 2983 default y
>> 2984
>> 2985 config STACKTRACE_SUPPORT
>> 2986 bool
>> 2987 default y
>> 2988
>> 2989 config HAVE_LATENCYTOP_SUPPORT
>> 2990 bool
>> 2991 default y
>> 2992
>> 2993 config PGTABLE_LEVELS
>> 2994 int
>> 2995 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2996 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2997 default 2
>> 2998
>> 2999 source "init/Kconfig"
>> 3000
>> 3001 source "kernel/Kconfig.freezer"
>> 3002
>> 3003 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3004
>> 3005 config HW_HAS_EISA
>> 3006 bool
>> 3007 config HW_HAS_PCI
>> 3008 bool
>> 3009
>> 3010 config PCI
>> 3011 bool "Support for PCI controller"
>> 3012 depends on HW_HAS_PCI
>> 3013 select PCI_DOMAINS
>> 3014 help
>> 3015 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3016 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3017 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3018 say Y, otherwise N.
>> 3019
>> 3020 config HT_PCI
>> 3021 bool "Support for HT-linked PCI"
>> 3022 default y
>> 3023 depends on CPU_LOONGSON3
>> 3024 select PCI
>> 3025 select PCI_DOMAINS
>> 3026 help
>> 3027 Loongson family machines use Hyper-Transport bus for inter-core
>> 3028 connection and device connection. The PCI bus is a subordinate
>> 3029 linked at HT. Choose Y for Loongson-3 based machines.
>> 3030
>> 3031 config PCI_DOMAINS
>> 3032 bool
>> 3033
>> 3034 config PCI_DOMAINS_GENERIC
>> 3035 bool
>> 3036
>> 3037 config PCI_DRIVERS_GENERIC
>> 3038 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3039 bool
>> 3040
>> 3041 config PCI_DRIVERS_LEGACY
>> 3042 def_bool !PCI_DRIVERS_GENERIC
>> 3043 select NO_GENERIC_PCI_IOPORT_MAP
>> 3044
>> 3045 source "drivers/pci/Kconfig"
>> 3046
>> 3047 #
>> 3048 # ISA support is now enabled via select. Too many systems still have the one
>> 3049 # or other ISA chip on the board that users don't know about so don't expect
>> 3050 # users to choose the right thing ...
>> 3051 #
>> 3052 config ISA
>> 3053 bool
>> 3054
>> 3055 config EISA
>> 3056 bool "EISA support"
>> 3057 depends on HW_HAS_EISA
>> 3058 select ISA
>> 3059 select GENERIC_ISA_DMA
>> 3060 ---help---
>> 3061 The Extended Industry Standard Architecture (EISA) bus was
>> 3062 developed as an open alternative to the IBM MicroChannel bus.
>> 3063
>> 3064 The EISA bus provided some of the features of the IBM MicroChannel
>> 3065 bus while maintaining backward compatibility with cards made for
>> 3066 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3067 1995 when it was made obsolete by the PCI bus.
>> 3068
>> 3069 Say Y here if you are building a kernel for an EISA-based machine.
>> 3070
>> 3071 Otherwise, say N.
>> 3072
>> 3073 source "drivers/eisa/Kconfig"
>> 3074
>> 3075 config TC
>> 3076 bool "TURBOchannel support"
>> 3077 depends on MACH_DECSTATION
>> 3078 help
>> 3079 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3080 processors. TURBOchannel programming specifications are available
>> 3081 at:
>> 3082 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3083 and:
>> 3084 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3085 Linux driver support status is documented at:
>> 3086 <http://www.linux-mips.org/wiki/DECstation>
>> 3087
>> 3088 config MMU
>> 3089 bool
>> 3090 default y
>> 3091
>> 3092 config ARCH_MMAP_RND_BITS_MIN
>> 3093 default 12 if 64BIT
>> 3094 default 8
>> 3095
>> 3096 config ARCH_MMAP_RND_BITS_MAX
>> 3097 default 18 if 64BIT
>> 3098 default 15
>> 3099
>> 3100 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3101 default 8
>> 3102
>> 3103 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3104 default 15
>> 3105
>> 3106 config I8253
>> 3107 bool
>> 3108 select CLKSRC_I8253
>> 3109 select CLKEVT_I8253
>> 3110 select MIPS_EXTERNAL_TIMER
>> 3111
>> 3112 config ZONE_DMA
>> 3113 bool
>> 3114
>> 3115 config ZONE_DMA32
>> 3116 bool
>> 3117
>> 3118 source "drivers/pcmcia/Kconfig"
>> 3119
>> 3120 config RAPIDIO
>> 3121 tristate "RapidIO support"
>> 3122 depends on PCI
>> 3123 default n
778 help 3124 help
779 Linux can use the full amount of RAM !! 3125 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3126 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3127
782 at 0xd0000000 (cached) and 0xd800000 !! 3128 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3129
784 all of it can be "permanently mapped !! 3130 endmenu
785 The physical memory that's not perma !! 3131
786 "high memory". !! 3132 menu "Executable file formats"
787 !! 3133
788 If you are compiling a kernel which !! 3134 source "fs/Kconfig.binfmt"
789 machine with more than 128 MB total !! 3135
790 N here. !! 3136 config TRAD_SIGNALS
>> 3137 bool
>> 3138
>> 3139 config MIPS32_COMPAT
>> 3140 bool
>> 3141
>> 3142 config COMPAT
>> 3143 bool
>> 3144
>> 3145 config SYSVIPC_COMPAT
>> 3146 bool
>> 3147
>> 3148 config MIPS32_O32
>> 3149 bool "Kernel support for o32 binaries"
>> 3150 depends on 64BIT
>> 3151 select ARCH_WANT_OLD_COMPAT_IPC
>> 3152 select COMPAT
>> 3153 select MIPS32_COMPAT
>> 3154 select SYSVIPC_COMPAT if SYSVIPC
>> 3155 help
>> 3156 Select this option if you want to run o32 binaries. These are pure
>> 3157 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3158 existing binaries are in this format.
791 3159
792 If unsure, say Y. 3160 If unsure, say Y.
793 3161
794 config ARCH_FORCE_MAX_ORDER !! 3162 config MIPS32_N32
795 int "Order of maximal physically conti !! 3163 bool "Kernel support for n32 binaries"
796 default "10" !! 3164 depends on 64BIT
797 help !! 3165 select COMPAT
798 The kernel page allocator limits the !! 3166 select MIPS32_COMPAT
799 contiguous allocations. The limit is !! 3167 select SYSVIPC_COMPAT if SYSVIPC
800 defines the maximal power of two of !! 3168 help
801 allocated as a single contiguous blo !! 3169 Select this option if you want to run n32 binaries. These are
802 overriding the default setting when !! 3170 64-bit binaries using 32-bit quantities for addressing and certain
803 large blocks of physically contiguou !! 3171 data that would normally be 64-bit. They are used in special
>> 3172 cases.
804 3173
805 Don't change if unsure. !! 3174 If unsure, say N.
>> 3175
>> 3176 config BINFMT_ELF32
>> 3177 bool
>> 3178 default y if MIPS32_O32 || MIPS32_N32
>> 3179 select ELFCORE
806 3180
807 endmenu 3181 endmenu
808 3182
809 menu "Power management options" 3183 menu "Power management options"
810 3184
811 config ARCH_HIBERNATION_POSSIBLE 3185 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3186 def_bool y
>> 3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3188
>> 3189 config ARCH_SUSPEND_POSSIBLE
>> 3190 def_bool y
>> 3191 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3192
814 source "kernel/power/Kconfig" 3193 source "kernel/power/Kconfig"
815 3194
816 endmenu 3195 endmenu
>> 3196
>> 3197 config MIPS_EXTERNAL_TIMER
>> 3198 bool
>> 3199
>> 3200 menu "CPU Power Management"
>> 3201
>> 3202 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3203 source "drivers/cpufreq/Kconfig"
>> 3204 endif
>> 3205
>> 3206 source "drivers/cpuidle/Kconfig"
>> 3207
>> 3208 endmenu
>> 3209
>> 3210 source "net/Kconfig"
>> 3211
>> 3212 source "drivers/Kconfig"
>> 3213
>> 3214 source "drivers/firmware/Kconfig"
>> 3215
>> 3216 source "fs/Kconfig"
>> 3217
>> 3218 source "arch/mips/Kconfig.debug"
>> 3219
>> 3220 source "security/Kconfig"
>> 3221
>> 3222 source "crypto/Kconfig"
>> 3223
>> 3224 source "lib/Kconfig"
>> 3225
>> 3226 source "arch/mips/kvm/Kconfig"
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