1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_BINFMT_ELF_STATE
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_DISCARD_MEMBLOCK
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_HAS_ELF_RANDOMIZE
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_SUPPORTS_UPROBES
11 select ARCH_HAS_KCOV !! 11 select ARCH_USE_BUILTIN_BSWAP
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if <<
14 select ARCH_HAS_DMA_SET_UNCACHED if MM <<
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 13 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 14 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 15 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 16 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 17 select CLONE_BACKWARDS
24 select COMMON_CLK !! 18 select CPU_PM if CPU_IDLE
25 select DMA_NONCOHERENT_MMAP if MMU !! 19 select GENERIC_ATOMIC64 if !64BIT
26 select GENERIC_ATOMIC64 !! 20 select GENERIC_CLOCKEVENTS
>> 21 select GENERIC_CMOS_UPDATE
>> 22 select GENERIC_CPU_AUTOPROBE
>> 23 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 24 select GENERIC_IRQ_SHOW
>> 25 select GENERIC_LIB_ASHLDI3
>> 26 select GENERIC_LIB_ASHRDI3
28 select GENERIC_LIB_CMPDI2 27 select GENERIC_LIB_CMPDI2
29 select GENERIC_LIB_MULDI3 !! 28 select GENERIC_LIB_LSHRDI3
30 select GENERIC_LIB_UCMPDI2 29 select GENERIC_LIB_UCMPDI2
31 select GENERIC_PCI_IOMAP 30 select GENERIC_PCI_IOMAP
32 select GENERIC_SCHED_CLOCK !! 31 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
33 select GENERIC_IOREMAP if MMU !! 32 select GENERIC_SMP_IDLE_THREAD
34 select HAVE_ARCH_AUDITSYSCALL !! 33 select GENERIC_TIME_VSYSCALL
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 34 select HANDLE_DOMAIN_IRQ
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 35 select HAVE_ARCH_JUMP_LABEL
37 select HAVE_ARCH_KCSAN !! 36 select HAVE_ARCH_KGDB
>> 37 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 38 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 39 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 40 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 41 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 42 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 43 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 44 select HAVE_CONTEXT_TRACKING
>> 45 select HAVE_COPY_THREAD_TLS
>> 46 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 47 select HAVE_DEBUG_KMEMLEAK
>> 48 select HAVE_DEBUG_STACKOVERFLOW
43 select HAVE_DMA_CONTIGUOUS 49 select HAVE_DMA_CONTIGUOUS
>> 50 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 51 select HAVE_EXIT_THREAD
>> 52 select HAVE_FTRACE_MCOUNT_RECORD
>> 53 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 54 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 55 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 56 select HAVE_IDE
>> 57 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 58 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 59 select HAVE_KPROBES
50 select HAVE_PCI !! 60 select HAVE_KRETPROBES
>> 61 select HAVE_MEMBLOCK
>> 62 select HAVE_MEMBLOCK_NODE_MAP
>> 63 select HAVE_MOD_ARCH_SPECIFIC
>> 64 select HAVE_NMI
>> 65 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 66 select HAVE_PERF_EVENTS
>> 67 select HAVE_REGS_AND_STACK_ACCESS_API
>> 68 select HAVE_RSEQ
52 select HAVE_STACKPROTECTOR 69 select HAVE_STACKPROTECTOR
53 select HAVE_SYSCALL_TRACEPOINTS 70 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 71 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
55 select IRQ_DOMAIN !! 72 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 73 select MODULES_USE_ELF_RELA if MODULES && 64BIT
57 select MODULES_USE_ELF_RELA !! 74 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 75 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 76 select RTC_LIB if !MACH_LOONGSON64
>> 77 select SYSCTL_EXCEPTION_TRACE
>> 78 select VIRT_TO_BUS
>> 79
>> 80 menu "Machine selection"
>> 81
>> 82 choice
>> 83 prompt "System type"
>> 84 default MIPS_GENERIC
>> 85
>> 86 config MIPS_GENERIC
>> 87 bool "Generic board-agnostic MIPS kernel"
>> 88 select BOOT_RAW
>> 89 select BUILTIN_DTB
>> 90 select CEVT_R4K
>> 91 select CLKSRC_MIPS_GIC
>> 92 select COMMON_CLK
>> 93 select CPU_MIPSR2_IRQ_VI
>> 94 select CPU_MIPSR2_IRQ_EI
>> 95 select CSRC_R4K
>> 96 select DMA_PERDEV_COHERENT
>> 97 select HW_HAS_PCI
>> 98 select IRQ_MIPS_CPU
>> 99 select LIBFDT
>> 100 select MIPS_CPU_SCACHE
>> 101 select MIPS_GIC
>> 102 select MIPS_L1_CACHE_SHIFT_7
>> 103 select NO_EXCEPT_FILL
>> 104 select PCI_DRIVERS_GENERIC
>> 105 select PINCTRL
>> 106 select SMP_UP if SMP
>> 107 select SWAP_IO_SPACE
>> 108 select SYS_HAS_CPU_MIPS32_R1
>> 109 select SYS_HAS_CPU_MIPS32_R2
>> 110 select SYS_HAS_CPU_MIPS32_R6
>> 111 select SYS_HAS_CPU_MIPS64_R1
>> 112 select SYS_HAS_CPU_MIPS64_R2
>> 113 select SYS_HAS_CPU_MIPS64_R6
>> 114 select SYS_SUPPORTS_32BIT_KERNEL
>> 115 select SYS_SUPPORTS_64BIT_KERNEL
>> 116 select SYS_SUPPORTS_BIG_ENDIAN
>> 117 select SYS_SUPPORTS_HIGHMEM
>> 118 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 119 select SYS_SUPPORTS_MICROMIPS
>> 120 select SYS_SUPPORTS_MIPS_CPS
>> 121 select SYS_SUPPORTS_MIPS16
>> 122 select SYS_SUPPORTS_MULTITHREADING
>> 123 select SYS_SUPPORTS_RELOCATABLE
>> 124 select SYS_SUPPORTS_SMARTMIPS
>> 125 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 126 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 127 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 128 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 129 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 130 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 131 select USE_OF
>> 132 help
>> 133 Select this to build a kernel which aims to support multiple boards,
>> 134 generally using a flattened device tree passed from the bootloader
>> 135 using the boot protocol defined in the UHI (Unified Hosting
>> 136 Interface) specification.
>> 137
>> 138 config MIPS_ALCHEMY
>> 139 bool "Alchemy processor based machines"
>> 140 select PHYS_ADDR_T_64BIT
>> 141 select CEVT_R4K
>> 142 select CSRC_R4K
>> 143 select IRQ_MIPS_CPU
>> 144 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 145 select SYS_HAS_CPU_MIPS32_R1
>> 146 select SYS_SUPPORTS_32BIT_KERNEL
>> 147 select SYS_SUPPORTS_APM_EMULATION
>> 148 select GPIOLIB
>> 149 select SYS_SUPPORTS_ZBOOT
>> 150 select COMMON_CLK
>> 151
>> 152 config AR7
>> 153 bool "Texas Instruments AR7"
>> 154 select BOOT_ELF32
>> 155 select DMA_NONCOHERENT
>> 156 select CEVT_R4K
>> 157 select CSRC_R4K
>> 158 select IRQ_MIPS_CPU
>> 159 select NO_EXCEPT_FILL
>> 160 select SWAP_IO_SPACE
>> 161 select SYS_HAS_CPU_MIPS32_R1
>> 162 select SYS_HAS_EARLY_PRINTK
>> 163 select SYS_SUPPORTS_32BIT_KERNEL
>> 164 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 165 select SYS_SUPPORTS_MIPS16
>> 166 select SYS_SUPPORTS_ZBOOT_UART16550
>> 167 select GPIOLIB
>> 168 select VLYNQ
>> 169 select HAVE_CLK
>> 170 help
>> 171 Support for the Texas Instruments AR7 System-on-a-Chip
>> 172 family: TNETD7100, 7200 and 7300.
>> 173
>> 174 config ATH25
>> 175 bool "Atheros AR231x/AR531x SoC support"
>> 176 select CEVT_R4K
>> 177 select CSRC_R4K
>> 178 select DMA_NONCOHERENT
>> 179 select IRQ_MIPS_CPU
>> 180 select IRQ_DOMAIN
>> 181 select SYS_HAS_CPU_MIPS32_R1
>> 182 select SYS_SUPPORTS_BIG_ENDIAN
>> 183 select SYS_SUPPORTS_32BIT_KERNEL
>> 184 select SYS_HAS_EARLY_PRINTK
>> 185 help
>> 186 Support for Atheros AR231x and Atheros AR531x based boards
>> 187
>> 188 config ATH79
>> 189 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 190 select ARCH_HAS_RESET_CONTROLLER
>> 191 select BOOT_RAW
>> 192 select CEVT_R4K
>> 193 select CSRC_R4K
>> 194 select DMA_NONCOHERENT
>> 195 select GPIOLIB
>> 196 select HAVE_CLK
>> 197 select COMMON_CLK
>> 198 select CLKDEV_LOOKUP
>> 199 select IRQ_MIPS_CPU
>> 200 select MIPS_MACHINE
>> 201 select SYS_HAS_CPU_MIPS32_R2
>> 202 select SYS_HAS_EARLY_PRINTK
>> 203 select SYS_SUPPORTS_32BIT_KERNEL
>> 204 select SYS_SUPPORTS_BIG_ENDIAN
>> 205 select SYS_SUPPORTS_MIPS16
>> 206 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 207 select USE_OF
>> 208 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 209 help
>> 210 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 211
>> 212 config BMIPS_GENERIC
>> 213 bool "Broadcom Generic BMIPS kernel"
>> 214 select BOOT_RAW
>> 215 select NO_EXCEPT_FILL
>> 216 select USE_OF
>> 217 select CEVT_R4K
>> 218 select CSRC_R4K
>> 219 select SYNC_R4K
>> 220 select COMMON_CLK
>> 221 select BCM6345_L1_IRQ
>> 222 select BCM7038_L1_IRQ
>> 223 select BCM7120_L2_IRQ
>> 224 select BRCMSTB_L2_IRQ
>> 225 select IRQ_MIPS_CPU
>> 226 select DMA_NONCOHERENT
>> 227 select SYS_SUPPORTS_32BIT_KERNEL
>> 228 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 229 select SYS_SUPPORTS_BIG_ENDIAN
>> 230 select SYS_SUPPORTS_HIGHMEM
>> 231 select SYS_HAS_CPU_BMIPS32_3300
>> 232 select SYS_HAS_CPU_BMIPS4350
>> 233 select SYS_HAS_CPU_BMIPS4380
>> 234 select SYS_HAS_CPU_BMIPS5000
>> 235 select SWAP_IO_SPACE
>> 236 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 237 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 238 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 239 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 240 select HARDIRQS_SW_RESEND
>> 241 help
>> 242 Build a generic DT-based kernel image that boots on select
>> 243 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 244 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 245 must be set appropriately for your board.
>> 246
>> 247 config BCM47XX
>> 248 bool "Broadcom BCM47XX based boards"
>> 249 select BOOT_RAW
>> 250 select CEVT_R4K
>> 251 select CSRC_R4K
>> 252 select DMA_NONCOHERENT
>> 253 select HW_HAS_PCI
>> 254 select IRQ_MIPS_CPU
>> 255 select SYS_HAS_CPU_MIPS32_R1
>> 256 select NO_EXCEPT_FILL
>> 257 select SYS_SUPPORTS_32BIT_KERNEL
>> 258 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 259 select SYS_SUPPORTS_MIPS16
>> 260 select SYS_SUPPORTS_ZBOOT
>> 261 select SYS_HAS_EARLY_PRINTK
>> 262 select USE_GENERIC_EARLY_PRINTK_8250
>> 263 select GPIOLIB
>> 264 select LEDS_GPIO_REGISTER
>> 265 select BCM47XX_NVRAM
>> 266 select BCM47XX_SPROM
>> 267 select BCM47XX_SSB if !BCM47XX_BCMA
>> 268 help
>> 269 Support for BCM47XX based boards
>> 270
>> 271 config BCM63XX
>> 272 bool "Broadcom BCM63XX based boards"
>> 273 select BOOT_RAW
>> 274 select CEVT_R4K
>> 275 select CSRC_R4K
>> 276 select SYNC_R4K
>> 277 select DMA_NONCOHERENT
>> 278 select IRQ_MIPS_CPU
>> 279 select SYS_SUPPORTS_32BIT_KERNEL
>> 280 select SYS_SUPPORTS_BIG_ENDIAN
>> 281 select SYS_HAS_EARLY_PRINTK
>> 282 select SWAP_IO_SPACE
>> 283 select GPIOLIB
>> 284 select HAVE_CLK
>> 285 select MIPS_L1_CACHE_SHIFT_4
>> 286 select CLKDEV_LOOKUP
>> 287 help
>> 288 Support for BCM63XX based boards
>> 289
>> 290 config MIPS_COBALT
>> 291 bool "Cobalt Server"
>> 292 select CEVT_R4K
>> 293 select CSRC_R4K
>> 294 select CEVT_GT641XX
>> 295 select DMA_NONCOHERENT
>> 296 select HW_HAS_PCI
>> 297 select I8253
>> 298 select I8259
>> 299 select IRQ_MIPS_CPU
>> 300 select IRQ_GT641XX
>> 301 select PCI_GT64XXX_PCI0
>> 302 select PCI
>> 303 select SYS_HAS_CPU_NEVADA
>> 304 select SYS_HAS_EARLY_PRINTK
>> 305 select SYS_SUPPORTS_32BIT_KERNEL
>> 306 select SYS_SUPPORTS_64BIT_KERNEL
>> 307 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 308 select USE_GENERIC_EARLY_PRINTK_8250
>> 309
>> 310 config MACH_DECSTATION
>> 311 bool "DECstations"
>> 312 select BOOT_ELF32
>> 313 select CEVT_DS1287
>> 314 select CEVT_R4K if CPU_R4X00
>> 315 select CSRC_IOASIC
>> 316 select CSRC_R4K if CPU_R4X00
>> 317 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 318 select CPU_R4000_WORKAROUNDS if 64BIT
>> 319 select CPU_R4400_WORKAROUNDS if 64BIT
>> 320 select DMA_NONCOHERENT
>> 321 select NO_IOPORT_MAP
>> 322 select IRQ_MIPS_CPU
>> 323 select SYS_HAS_CPU_R3000
>> 324 select SYS_HAS_CPU_R4X00
>> 325 select SYS_SUPPORTS_32BIT_KERNEL
>> 326 select SYS_SUPPORTS_64BIT_KERNEL
>> 327 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 328 select SYS_SUPPORTS_128HZ
>> 329 select SYS_SUPPORTS_256HZ
>> 330 select SYS_SUPPORTS_1024HZ
>> 331 select MIPS_L1_CACHE_SHIFT_4
>> 332 help
>> 333 This enables support for DEC's MIPS based workstations. For details
>> 334 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 335 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 336
>> 337 If you have one of the following DECstation Models you definitely
>> 338 want to choose R4xx0 for the CPU Type:
>> 339
>> 340 DECstation 5000/50
>> 341 DECstation 5000/150
>> 342 DECstation 5000/260
>> 343 DECsystem 5900/260
>> 344
>> 345 otherwise choose R3000.
>> 346
>> 347 config MACH_JAZZ
>> 348 bool "Jazz family of machines"
>> 349 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 350 select ARCH_MIGHT_HAVE_PC_SERIO
>> 351 select FW_ARC
>> 352 select FW_ARC32
>> 353 select ARCH_MAY_HAVE_PC_FDC
>> 354 select CEVT_R4K
>> 355 select CSRC_R4K
>> 356 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 357 select GENERIC_ISA_DMA
>> 358 select HAVE_PCSPKR_PLATFORM
>> 359 select IRQ_MIPS_CPU
>> 360 select I8253
>> 361 select I8259
>> 362 select ISA
>> 363 select SYS_HAS_CPU_R4X00
>> 364 select SYS_SUPPORTS_32BIT_KERNEL
>> 365 select SYS_SUPPORTS_64BIT_KERNEL
>> 366 select SYS_SUPPORTS_100HZ
>> 367 help
>> 368 This a family of machines based on the MIPS R4030 chipset which was
>> 369 used by several vendors to build RISC/os and Windows NT workstations.
>> 370 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 371 Olivetti M700-10 workstations.
>> 372
>> 373 config MACH_INGENIC
>> 374 bool "Ingenic SoC based machines"
>> 375 select SYS_SUPPORTS_32BIT_KERNEL
>> 376 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 377 select SYS_SUPPORTS_ZBOOT_UART16550
>> 378 select DMA_NONCOHERENT
>> 379 select IRQ_MIPS_CPU
>> 380 select PINCTRL
>> 381 select GPIOLIB
>> 382 select COMMON_CLK
>> 383 select GENERIC_IRQ_CHIP
>> 384 select BUILTIN_DTB
>> 385 select USE_OF
>> 386 select LIBFDT
>> 387
>> 388 config LANTIQ
>> 389 bool "Lantiq based platforms"
>> 390 select DMA_NONCOHERENT
>> 391 select IRQ_MIPS_CPU
>> 392 select CEVT_R4K
>> 393 select CSRC_R4K
>> 394 select SYS_HAS_CPU_MIPS32_R1
>> 395 select SYS_HAS_CPU_MIPS32_R2
>> 396 select SYS_SUPPORTS_BIG_ENDIAN
>> 397 select SYS_SUPPORTS_32BIT_KERNEL
>> 398 select SYS_SUPPORTS_MIPS16
>> 399 select SYS_SUPPORTS_MULTITHREADING
>> 400 select SYS_SUPPORTS_VPE_LOADER
>> 401 select SYS_HAS_EARLY_PRINTK
>> 402 select GPIOLIB
>> 403 select SWAP_IO_SPACE
>> 404 select BOOT_RAW
>> 405 select CLKDEV_LOOKUP
>> 406 select USE_OF
>> 407 select PINCTRL
>> 408 select PINCTRL_LANTIQ
>> 409 select ARCH_HAS_RESET_CONTROLLER
>> 410 select RESET_CONTROLLER
>> 411
>> 412 config LASAT
>> 413 bool "LASAT Networks platforms"
>> 414 select CEVT_R4K
>> 415 select CRC32
>> 416 select CSRC_R4K
>> 417 select DMA_NONCOHERENT
>> 418 select SYS_HAS_EARLY_PRINTK
>> 419 select HW_HAS_PCI
>> 420 select IRQ_MIPS_CPU
>> 421 select PCI_GT64XXX_PCI0
>> 422 select MIPS_NILE4
>> 423 select R5000_CPU_SCACHE
>> 424 select SYS_HAS_CPU_R5000
>> 425 select SYS_SUPPORTS_32BIT_KERNEL
>> 426 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 427 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 428
>> 429 config MACH_LOONGSON32
>> 430 bool "Loongson-1 family of machines"
>> 431 select SYS_SUPPORTS_ZBOOT
>> 432 help
>> 433 This enables support for the Loongson-1 family of machines.
>> 434
>> 435 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 436 the Institute of Computing Technology (ICT), Chinese Academy of
>> 437 Sciences (CAS).
>> 438
>> 439 config MACH_LOONGSON64
>> 440 bool "Loongson-2/3 family of machines"
>> 441 select ARCH_HAS_PHYS_TO_DMA
>> 442 select SYS_SUPPORTS_ZBOOT
>> 443 help
>> 444 This enables the support of Loongson-2/3 family of machines.
>> 445
>> 446 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 447 family of multi-core CPUs. They are both 64-bit general-purpose
>> 448 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 449 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 450 in the People's Republic of China. The chief architect is Professor
>> 451 Weiwu Hu.
>> 452
>> 453 config MACH_PISTACHIO
>> 454 bool "IMG Pistachio SoC based boards"
>> 455 select BOOT_ELF32
>> 456 select BOOT_RAW
>> 457 select CEVT_R4K
>> 458 select CLKSRC_MIPS_GIC
>> 459 select COMMON_CLK
>> 460 select CSRC_R4K
>> 461 select DMA_NONCOHERENT
>> 462 select GPIOLIB
>> 463 select IRQ_MIPS_CPU
>> 464 select LIBFDT
>> 465 select MFD_SYSCON
>> 466 select MIPS_CPU_SCACHE
>> 467 select MIPS_GIC
>> 468 select PINCTRL
>> 469 select REGULATOR
>> 470 select SYS_HAS_CPU_MIPS32_R2
>> 471 select SYS_SUPPORTS_32BIT_KERNEL
>> 472 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 473 select SYS_SUPPORTS_MIPS_CPS
>> 474 select SYS_SUPPORTS_MULTITHREADING
>> 475 select SYS_SUPPORTS_RELOCATABLE
>> 476 select SYS_SUPPORTS_ZBOOT
>> 477 select SYS_HAS_EARLY_PRINTK
>> 478 select USE_GENERIC_EARLY_PRINTK_8250
>> 479 select USE_OF
>> 480 help
>> 481 This enables support for the IMG Pistachio SoC platform.
>> 482
>> 483 config MIPS_MALTA
>> 484 bool "MIPS Malta board"
>> 485 select ARCH_MAY_HAVE_PC_FDC
>> 486 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 487 select ARCH_MIGHT_HAVE_PC_SERIO
>> 488 select BOOT_ELF32
>> 489 select BOOT_RAW
>> 490 select BUILTIN_DTB
>> 491 select CEVT_R4K
>> 492 select CSRC_R4K
>> 493 select CLKSRC_MIPS_GIC
>> 494 select COMMON_CLK
>> 495 select DMA_MAYBE_COHERENT
>> 496 select GENERIC_ISA_DMA
>> 497 select HAVE_PCSPKR_PLATFORM
>> 498 select IRQ_MIPS_CPU
>> 499 select MIPS_GIC
>> 500 select HW_HAS_PCI
>> 501 select I8253
>> 502 select I8259
>> 503 select MIPS_BONITO64
>> 504 select MIPS_CPU_SCACHE
>> 505 select MIPS_L1_CACHE_SHIFT_6
>> 506 select PCI_GT64XXX_PCI0
>> 507 select MIPS_MSC
>> 508 select SMP_UP if SMP
>> 509 select SWAP_IO_SPACE
>> 510 select SYS_HAS_CPU_MIPS32_R1
>> 511 select SYS_HAS_CPU_MIPS32_R2
>> 512 select SYS_HAS_CPU_MIPS32_R3_5
>> 513 select SYS_HAS_CPU_MIPS32_R5
>> 514 select SYS_HAS_CPU_MIPS32_R6
>> 515 select SYS_HAS_CPU_MIPS64_R1
>> 516 select SYS_HAS_CPU_MIPS64_R2
>> 517 select SYS_HAS_CPU_MIPS64_R6
>> 518 select SYS_HAS_CPU_NEVADA
>> 519 select SYS_HAS_CPU_RM7000
>> 520 select SYS_SUPPORTS_32BIT_KERNEL
>> 521 select SYS_SUPPORTS_64BIT_KERNEL
>> 522 select SYS_SUPPORTS_BIG_ENDIAN
>> 523 select SYS_SUPPORTS_HIGHMEM
>> 524 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 525 select SYS_SUPPORTS_MICROMIPS
>> 526 select SYS_SUPPORTS_MIPS_CMP
>> 527 select SYS_SUPPORTS_MIPS_CPS
>> 528 select SYS_SUPPORTS_MIPS16
>> 529 select SYS_SUPPORTS_MULTITHREADING
>> 530 select SYS_SUPPORTS_SMARTMIPS
>> 531 select SYS_SUPPORTS_VPE_LOADER
>> 532 select SYS_SUPPORTS_ZBOOT
>> 533 select SYS_SUPPORTS_RELOCATABLE
>> 534 select USE_OF
>> 535 select LIBFDT
>> 536 select ZONE_DMA32 if 64BIT
>> 537 select BUILTIN_DTB
>> 538 select LIBFDT
>> 539 help
>> 540 This enables support for the MIPS Technologies Malta evaluation
>> 541 board.
>> 542
>> 543 config MACH_PIC32
>> 544 bool "Microchip PIC32 Family"
>> 545 help
>> 546 This enables support for the Microchip PIC32 family of platforms.
>> 547
>> 548 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 549 microcontrollers.
>> 550
>> 551 config NEC_MARKEINS
>> 552 bool "NEC EMMA2RH Mark-eins board"
>> 553 select SOC_EMMA2RH
>> 554 select HW_HAS_PCI
>> 555 help
>> 556 This enables support for the NEC Electronics Mark-eins boards.
>> 557
>> 558 config MACH_VR41XX
>> 559 bool "NEC VR4100 series based machines"
>> 560 select CEVT_R4K
>> 561 select CSRC_R4K
>> 562 select SYS_HAS_CPU_VR41XX
>> 563 select SYS_SUPPORTS_MIPS16
>> 564 select GPIOLIB
>> 565
>> 566 config NXP_STB220
>> 567 bool "NXP STB220 board"
>> 568 select SOC_PNX833X
>> 569 help
>> 570 Support for NXP Semiconductors STB220 Development Board.
>> 571
>> 572 config NXP_STB225
>> 573 bool "NXP 225 board"
>> 574 select SOC_PNX833X
>> 575 select SOC_PNX8335
>> 576 help
>> 577 Support for NXP Semiconductors STB225 Development Board.
>> 578
>> 579 config PMC_MSP
>> 580 bool "PMC-Sierra MSP chipsets"
>> 581 select CEVT_R4K
>> 582 select CSRC_R4K
>> 583 select DMA_NONCOHERENT
>> 584 select SWAP_IO_SPACE
>> 585 select NO_EXCEPT_FILL
>> 586 select BOOT_RAW
>> 587 select SYS_HAS_CPU_MIPS32_R1
>> 588 select SYS_HAS_CPU_MIPS32_R2
>> 589 select SYS_SUPPORTS_32BIT_KERNEL
>> 590 select SYS_SUPPORTS_BIG_ENDIAN
>> 591 select SYS_SUPPORTS_MIPS16
>> 592 select IRQ_MIPS_CPU
>> 593 select SERIAL_8250
>> 594 select SERIAL_8250_CONSOLE
>> 595 select USB_EHCI_BIG_ENDIAN_MMIO
>> 596 select USB_EHCI_BIG_ENDIAN_DESC
>> 597 help
>> 598 This adds support for the PMC-Sierra family of Multi-Service
>> 599 Processor System-On-A-Chips. These parts include a number
>> 600 of integrated peripherals, interfaces and DSPs in addition to
>> 601 a variety of MIPS cores.
>> 602
>> 603 config RALINK
>> 604 bool "Ralink based machines"
>> 605 select CEVT_R4K
>> 606 select CSRC_R4K
>> 607 select BOOT_RAW
>> 608 select DMA_NONCOHERENT
>> 609 select IRQ_MIPS_CPU
>> 610 select USE_OF
>> 611 select SYS_HAS_CPU_MIPS32_R1
>> 612 select SYS_HAS_CPU_MIPS32_R2
>> 613 select SYS_SUPPORTS_32BIT_KERNEL
>> 614 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 615 select SYS_SUPPORTS_MIPS16
>> 616 select SYS_HAS_EARLY_PRINTK
>> 617 select CLKDEV_LOOKUP
>> 618 select ARCH_HAS_RESET_CONTROLLER
>> 619 select RESET_CONTROLLER
>> 620
>> 621 config SGI_IP22
>> 622 bool "SGI IP22 (Indy/Indigo2)"
>> 623 select FW_ARC
>> 624 select FW_ARC32
>> 625 select ARCH_MIGHT_HAVE_PC_SERIO
>> 626 select BOOT_ELF32
>> 627 select CEVT_R4K
>> 628 select CSRC_R4K
>> 629 select DEFAULT_SGI_PARTITION
>> 630 select DMA_NONCOHERENT
>> 631 select HW_HAS_EISA
>> 632 select I8253
>> 633 select I8259
>> 634 select IP22_CPU_SCACHE
>> 635 select IRQ_MIPS_CPU
>> 636 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 637 select SGI_HAS_I8042
>> 638 select SGI_HAS_INDYDOG
>> 639 select SGI_HAS_HAL2
>> 640 select SGI_HAS_SEEQ
>> 641 select SGI_HAS_WD93
>> 642 select SGI_HAS_ZILOG
>> 643 select SWAP_IO_SPACE
>> 644 select SYS_HAS_CPU_R4X00
>> 645 select SYS_HAS_CPU_R5000
>> 646 #
>> 647 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 648 # memory during early boot on some machines.
>> 649 #
>> 650 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 651 # for a more details discussion
>> 652 #
>> 653 # select SYS_HAS_EARLY_PRINTK
>> 654 select SYS_SUPPORTS_32BIT_KERNEL
>> 655 select SYS_SUPPORTS_64BIT_KERNEL
>> 656 select SYS_SUPPORTS_BIG_ENDIAN
>> 657 select MIPS_L1_CACHE_SHIFT_7
>> 658 help
>> 659 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 660 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 661 that runs on these, say Y here.
>> 662
>> 663 config SGI_IP27
>> 664 bool "SGI IP27 (Origin200/2000)"
>> 665 select FW_ARC
>> 666 select FW_ARC64
>> 667 select BOOT_ELF64
>> 668 select DEFAULT_SGI_PARTITION
>> 669 select DMA_COHERENT
>> 670 select SYS_HAS_EARLY_PRINTK
>> 671 select HW_HAS_PCI
>> 672 select NR_CPUS_DEFAULT_64
>> 673 select SYS_HAS_CPU_R10000
>> 674 select SYS_SUPPORTS_64BIT_KERNEL
>> 675 select SYS_SUPPORTS_BIG_ENDIAN
>> 676 select SYS_SUPPORTS_NUMA
>> 677 select SYS_SUPPORTS_SMP
>> 678 select MIPS_L1_CACHE_SHIFT_7
>> 679 help
>> 680 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 681 workstations. To compile a Linux kernel that runs on these, say Y
>> 682 here.
>> 683
>> 684 config SGI_IP28
>> 685 bool "SGI IP28 (Indigo2 R10k)"
>> 686 select FW_ARC
>> 687 select FW_ARC64
>> 688 select ARCH_MIGHT_HAVE_PC_SERIO
>> 689 select BOOT_ELF64
>> 690 select CEVT_R4K
>> 691 select CSRC_R4K
>> 692 select DEFAULT_SGI_PARTITION
>> 693 select DMA_NONCOHERENT
>> 694 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 695 select IRQ_MIPS_CPU
>> 696 select HW_HAS_EISA
>> 697 select I8253
>> 698 select I8259
>> 699 select SGI_HAS_I8042
>> 700 select SGI_HAS_INDYDOG
>> 701 select SGI_HAS_HAL2
>> 702 select SGI_HAS_SEEQ
>> 703 select SGI_HAS_WD93
>> 704 select SGI_HAS_ZILOG
>> 705 select SWAP_IO_SPACE
>> 706 select SYS_HAS_CPU_R10000
>> 707 #
>> 708 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 709 # memory during early boot on some machines.
>> 710 #
>> 711 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 712 # for a more details discussion
>> 713 #
>> 714 # select SYS_HAS_EARLY_PRINTK
>> 715 select SYS_SUPPORTS_64BIT_KERNEL
>> 716 select SYS_SUPPORTS_BIG_ENDIAN
>> 717 select MIPS_L1_CACHE_SHIFT_7
>> 718 help
>> 719 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 720 kernel that runs on these, say Y here.
>> 721
>> 722 config SGI_IP32
>> 723 bool "SGI IP32 (O2)"
>> 724 select FW_ARC
>> 725 select FW_ARC32
>> 726 select BOOT_ELF32
>> 727 select CEVT_R4K
>> 728 select CSRC_R4K
>> 729 select DMA_NONCOHERENT
>> 730 select HW_HAS_PCI
>> 731 select IRQ_MIPS_CPU
>> 732 select R5000_CPU_SCACHE
>> 733 select RM7000_CPU_SCACHE
>> 734 select SYS_HAS_CPU_R5000
>> 735 select SYS_HAS_CPU_R10000 if BROKEN
>> 736 select SYS_HAS_CPU_RM7000
>> 737 select SYS_HAS_CPU_NEVADA
>> 738 select SYS_SUPPORTS_64BIT_KERNEL
>> 739 select SYS_SUPPORTS_BIG_ENDIAN
>> 740 help
>> 741 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 742
>> 743 config SIBYTE_CRHINE
>> 744 bool "Sibyte BCM91120C-CRhine"
>> 745 select BOOT_ELF32
>> 746 select DMA_COHERENT
>> 747 select SIBYTE_BCM1120
>> 748 select SWAP_IO_SPACE
>> 749 select SYS_HAS_CPU_SB1
>> 750 select SYS_SUPPORTS_BIG_ENDIAN
>> 751 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 752
>> 753 config SIBYTE_CARMEL
>> 754 bool "Sibyte BCM91120x-Carmel"
>> 755 select BOOT_ELF32
>> 756 select DMA_COHERENT
>> 757 select SIBYTE_BCM1120
>> 758 select SWAP_IO_SPACE
>> 759 select SYS_HAS_CPU_SB1
>> 760 select SYS_SUPPORTS_BIG_ENDIAN
>> 761 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 762
>> 763 config SIBYTE_CRHONE
>> 764 bool "Sibyte BCM91125C-CRhone"
>> 765 select BOOT_ELF32
>> 766 select DMA_COHERENT
>> 767 select SIBYTE_BCM1125
>> 768 select SWAP_IO_SPACE
>> 769 select SYS_HAS_CPU_SB1
>> 770 select SYS_SUPPORTS_BIG_ENDIAN
>> 771 select SYS_SUPPORTS_HIGHMEM
>> 772 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 773
>> 774 config SIBYTE_RHONE
>> 775 bool "Sibyte BCM91125E-Rhone"
>> 776 select BOOT_ELF32
>> 777 select DMA_COHERENT
>> 778 select SIBYTE_BCM1125H
>> 779 select SWAP_IO_SPACE
>> 780 select SYS_HAS_CPU_SB1
>> 781 select SYS_SUPPORTS_BIG_ENDIAN
>> 782 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 783
>> 784 config SIBYTE_SWARM
>> 785 bool "Sibyte BCM91250A-SWARM"
>> 786 select BOOT_ELF32
>> 787 select DMA_COHERENT
>> 788 select HAVE_PATA_PLATFORM
>> 789 select SIBYTE_SB1250
>> 790 select SWAP_IO_SPACE
>> 791 select SYS_HAS_CPU_SB1
>> 792 select SYS_SUPPORTS_BIG_ENDIAN
>> 793 select SYS_SUPPORTS_HIGHMEM
>> 794 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 795 select ZONE_DMA32 if 64BIT
>> 796
>> 797 config SIBYTE_LITTLESUR
>> 798 bool "Sibyte BCM91250C2-LittleSur"
>> 799 select BOOT_ELF32
>> 800 select DMA_COHERENT
>> 801 select HAVE_PATA_PLATFORM
>> 802 select SIBYTE_SB1250
>> 803 select SWAP_IO_SPACE
>> 804 select SYS_HAS_CPU_SB1
>> 805 select SYS_SUPPORTS_BIG_ENDIAN
>> 806 select SYS_SUPPORTS_HIGHMEM
>> 807 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 808
>> 809 config SIBYTE_SENTOSA
>> 810 bool "Sibyte BCM91250E-Sentosa"
>> 811 select BOOT_ELF32
>> 812 select DMA_COHERENT
>> 813 select SIBYTE_SB1250
>> 814 select SWAP_IO_SPACE
>> 815 select SYS_HAS_CPU_SB1
>> 816 select SYS_SUPPORTS_BIG_ENDIAN
>> 817 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 818
>> 819 config SIBYTE_BIGSUR
>> 820 bool "Sibyte BCM91480B-BigSur"
>> 821 select BOOT_ELF32
>> 822 select DMA_COHERENT
>> 823 select NR_CPUS_DEFAULT_4
>> 824 select SIBYTE_BCM1x80
>> 825 select SWAP_IO_SPACE
>> 826 select SYS_HAS_CPU_SB1
>> 827 select SYS_SUPPORTS_BIG_ENDIAN
>> 828 select SYS_SUPPORTS_HIGHMEM
>> 829 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 830 select ZONE_DMA32 if 64BIT
>> 831
>> 832 config SNI_RM
>> 833 bool "SNI RM200/300/400"
>> 834 select FW_ARC if CPU_LITTLE_ENDIAN
>> 835 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 836 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 837 select ARCH_MAY_HAVE_PC_FDC
>> 838 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 839 select ARCH_MIGHT_HAVE_PC_SERIO
>> 840 select BOOT_ELF32
>> 841 select CEVT_R4K
>> 842 select CSRC_R4K
>> 843 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 844 select DMA_NONCOHERENT
>> 845 select GENERIC_ISA_DMA
>> 846 select HAVE_PCSPKR_PLATFORM
>> 847 select HW_HAS_EISA
>> 848 select HW_HAS_PCI
>> 849 select IRQ_MIPS_CPU
>> 850 select I8253
>> 851 select I8259
>> 852 select ISA
>> 853 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 854 select SYS_HAS_CPU_R4X00
>> 855 select SYS_HAS_CPU_R5000
>> 856 select SYS_HAS_CPU_R10000
>> 857 select R5000_CPU_SCACHE
>> 858 select SYS_HAS_EARLY_PRINTK
>> 859 select SYS_SUPPORTS_32BIT_KERNEL
>> 860 select SYS_SUPPORTS_64BIT_KERNEL
>> 861 select SYS_SUPPORTS_BIG_ENDIAN
>> 862 select SYS_SUPPORTS_HIGHMEM
>> 863 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 864 help
>> 865 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 866 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 867 Technology and now in turn merged with Fujitsu. Say Y here to
>> 868 support this machine type.
>> 869
>> 870 config MACH_TX39XX
>> 871 bool "Toshiba TX39 series based machines"
>> 872
>> 873 config MACH_TX49XX
>> 874 bool "Toshiba TX49 series based machines"
>> 875
>> 876 config MIKROTIK_RB532
>> 877 bool "Mikrotik RB532 boards"
>> 878 select CEVT_R4K
>> 879 select CSRC_R4K
>> 880 select DMA_NONCOHERENT
>> 881 select HW_HAS_PCI
>> 882 select IRQ_MIPS_CPU
>> 883 select SYS_HAS_CPU_MIPS32_R1
>> 884 select SYS_SUPPORTS_32BIT_KERNEL
>> 885 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 886 select SWAP_IO_SPACE
>> 887 select BOOT_RAW
>> 888 select GPIOLIB
>> 889 select MIPS_L1_CACHE_SHIFT_4
>> 890 help
>> 891 Support the Mikrotik(tm) RouterBoard 532 series,
>> 892 based on the IDT RC32434 SoC.
>> 893
>> 894 config CAVIUM_OCTEON_SOC
>> 895 bool "Cavium Networks Octeon SoC based boards"
>> 896 select CEVT_R4K
>> 897 select ARCH_HAS_PHYS_TO_DMA
>> 898 select PHYS_ADDR_T_64BIT
>> 899 select DMA_COHERENT
>> 900 select SYS_SUPPORTS_64BIT_KERNEL
>> 901 select SYS_SUPPORTS_BIG_ENDIAN
>> 902 select EDAC_SUPPORT
>> 903 select EDAC_ATOMIC_SCRUB
>> 904 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 905 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 906 select SYS_HAS_EARLY_PRINTK
>> 907 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 908 select HW_HAS_PCI
>> 909 select ZONE_DMA32
>> 910 select HOLES_IN_ZONE
>> 911 select GPIOLIB
>> 912 select LIBFDT
>> 913 select USE_OF
>> 914 select ARCH_SPARSEMEM_ENABLE
>> 915 select SYS_SUPPORTS_SMP
>> 916 select NR_CPUS_DEFAULT_64
>> 917 select MIPS_NR_CPU_NR_MAP_1024
>> 918 select BUILTIN_DTB
>> 919 select MTD_COMPLEX_MAPPINGS
>> 920 select SWIOTLB
>> 921 select SYS_SUPPORTS_RELOCATABLE
>> 922 help
>> 923 This option supports all of the Octeon reference boards from Cavium
>> 924 Networks. It builds a kernel that dynamically determines the Octeon
>> 925 CPU type and supports all known board reference implementations.
>> 926 Some of the supported boards are:
>> 927 EBT3000
>> 928 EBH3000
>> 929 EBH3100
>> 930 Thunder
>> 931 Kodama
>> 932 Hikari
>> 933 Say Y here for most Octeon reference boards.
>> 934
>> 935 config NLM_XLR_BOARD
>> 936 bool "Netlogic XLR/XLS based systems"
>> 937 select BOOT_ELF32
>> 938 select NLM_COMMON
>> 939 select SYS_HAS_CPU_XLR
>> 940 select SYS_SUPPORTS_SMP
>> 941 select HW_HAS_PCI
>> 942 select SWAP_IO_SPACE
>> 943 select SYS_SUPPORTS_32BIT_KERNEL
>> 944 select SYS_SUPPORTS_64BIT_KERNEL
>> 945 select PHYS_ADDR_T_64BIT
>> 946 select SYS_SUPPORTS_BIG_ENDIAN
>> 947 select SYS_SUPPORTS_HIGHMEM
>> 948 select DMA_COHERENT
>> 949 select NR_CPUS_DEFAULT_32
>> 950 select CEVT_R4K
>> 951 select CSRC_R4K
>> 952 select IRQ_MIPS_CPU
>> 953 select ZONE_DMA32 if 64BIT
>> 954 select SYNC_R4K
>> 955 select SYS_HAS_EARLY_PRINTK
>> 956 select SYS_SUPPORTS_ZBOOT
>> 957 select SYS_SUPPORTS_ZBOOT_UART16550
>> 958 help
>> 959 Support for systems based on Netlogic XLR and XLS processors.
>> 960 Say Y here if you have a XLR or XLS based board.
>> 961
>> 962 config NLM_XLP_BOARD
>> 963 bool "Netlogic XLP based systems"
>> 964 select BOOT_ELF32
>> 965 select NLM_COMMON
>> 966 select SYS_HAS_CPU_XLP
>> 967 select SYS_SUPPORTS_SMP
>> 968 select HW_HAS_PCI
>> 969 select SYS_SUPPORTS_32BIT_KERNEL
>> 970 select SYS_SUPPORTS_64BIT_KERNEL
>> 971 select PHYS_ADDR_T_64BIT
>> 972 select GPIOLIB
>> 973 select SYS_SUPPORTS_BIG_ENDIAN
>> 974 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 975 select SYS_SUPPORTS_HIGHMEM
>> 976 select DMA_COHERENT
>> 977 select NR_CPUS_DEFAULT_32
>> 978 select CEVT_R4K
>> 979 select CSRC_R4K
>> 980 select IRQ_MIPS_CPU
>> 981 select ZONE_DMA32 if 64BIT
>> 982 select SYNC_R4K
>> 983 select SYS_HAS_EARLY_PRINTK
>> 984 select USE_OF
>> 985 select SYS_SUPPORTS_ZBOOT
>> 986 select SYS_SUPPORTS_ZBOOT_UART16550
>> 987 help
>> 988 This board is based on Netlogic XLP Processor.
>> 989 Say Y here if you have a XLP based board.
>> 990
>> 991 config MIPS_PARAVIRT
>> 992 bool "Para-Virtualized guest system"
>> 993 select CEVT_R4K
>> 994 select CSRC_R4K
>> 995 select DMA_COHERENT
>> 996 select SYS_SUPPORTS_64BIT_KERNEL
>> 997 select SYS_SUPPORTS_32BIT_KERNEL
>> 998 select SYS_SUPPORTS_BIG_ENDIAN
>> 999 select SYS_SUPPORTS_SMP
>> 1000 select NR_CPUS_DEFAULT_4
>> 1001 select SYS_HAS_EARLY_PRINTK
>> 1002 select SYS_HAS_CPU_MIPS32_R2
>> 1003 select SYS_HAS_CPU_MIPS64_R2
>> 1004 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1005 select HW_HAS_PCI
>> 1006 select SWAP_IO_SPACE
60 help 1007 help
61 Xtensa processors are 32-bit RISC ma !! 1008 This option supports guest running under ????
62 primarily for embedded systems. The !! 1009
63 configurable and extensible. The Li !! 1010 endchoice
64 architecture supports all processor !! 1011
65 with reasonable minimum requirements !! 1012 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 1013 source "arch/mips/ath25/Kconfig"
>> 1014 source "arch/mips/ath79/Kconfig"
>> 1015 source "arch/mips/bcm47xx/Kconfig"
>> 1016 source "arch/mips/bcm63xx/Kconfig"
>> 1017 source "arch/mips/bmips/Kconfig"
>> 1018 source "arch/mips/generic/Kconfig"
>> 1019 source "arch/mips/jazz/Kconfig"
>> 1020 source "arch/mips/jz4740/Kconfig"
>> 1021 source "arch/mips/lantiq/Kconfig"
>> 1022 source "arch/mips/lasat/Kconfig"
>> 1023 source "arch/mips/pic32/Kconfig"
>> 1024 source "arch/mips/pistachio/Kconfig"
>> 1025 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1026 source "arch/mips/ralink/Kconfig"
>> 1027 source "arch/mips/sgi-ip27/Kconfig"
>> 1028 source "arch/mips/sibyte/Kconfig"
>> 1029 source "arch/mips/txx9/Kconfig"
>> 1030 source "arch/mips/vr41xx/Kconfig"
>> 1031 source "arch/mips/cavium-octeon/Kconfig"
>> 1032 source "arch/mips/loongson32/Kconfig"
>> 1033 source "arch/mips/loongson64/Kconfig"
>> 1034 source "arch/mips/netlogic/Kconfig"
>> 1035 source "arch/mips/paravirt/Kconfig"
>> 1036
>> 1037 endmenu
>> 1038
>> 1039 config RWSEM_GENERIC_SPINLOCK
>> 1040 bool
>> 1041 default y
>> 1042
>> 1043 config RWSEM_XCHGADD_ALGORITHM
>> 1044 bool
67 1045
68 config GENERIC_HWEIGHT 1046 config GENERIC_HWEIGHT
69 def_bool y !! 1047 bool
>> 1048 default y
70 1049
71 config ARCH_HAS_ILOG2_U32 !! 1050 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1051 bool
>> 1052 default y
73 1053
74 config ARCH_HAS_ILOG2_U64 !! 1054 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1055 bool
>> 1056 default y
76 1057
77 config ARCH_MTD_XIP !! 1058 #
78 def_bool y !! 1059 # Select some configuration options automatically based on user selections.
>> 1060 #
>> 1061 config FW_ARC
>> 1062 bool
>> 1063
>> 1064 config ARCH_MAY_HAVE_PC_FDC
>> 1065 bool
>> 1066
>> 1067 config BOOT_RAW
>> 1068 bool
>> 1069
>> 1070 config CEVT_BCM1480
>> 1071 bool
>> 1072
>> 1073 config CEVT_DS1287
>> 1074 bool
>> 1075
>> 1076 config CEVT_GT641XX
>> 1077 bool
>> 1078
>> 1079 config CEVT_R4K
>> 1080 bool
>> 1081
>> 1082 config CEVT_SB1250
>> 1083 bool
>> 1084
>> 1085 config CEVT_TXX9
>> 1086 bool
>> 1087
>> 1088 config CSRC_BCM1480
>> 1089 bool
>> 1090
>> 1091 config CSRC_IOASIC
>> 1092 bool
>> 1093
>> 1094 config CSRC_R4K
>> 1095 bool
>> 1096
>> 1097 config CSRC_SB1250
>> 1098 bool
>> 1099
>> 1100 config MIPS_CLOCK_VSYSCALL
>> 1101 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1102
>> 1103 config GPIO_TXX9
>> 1104 select GPIOLIB
>> 1105 bool
>> 1106
>> 1107 config FW_CFE
>> 1108 bool
>> 1109
>> 1110 config ARCH_SUPPORTS_UPROBES
>> 1111 bool
>> 1112
>> 1113 config DMA_MAYBE_COHERENT
>> 1114 select DMA_NONCOHERENT
>> 1115 bool
>> 1116
>> 1117 config DMA_PERDEV_COHERENT
>> 1118 bool
>> 1119 select DMA_MAYBE_COHERENT
>> 1120
>> 1121 config DMA_COHERENT
>> 1122 bool
>> 1123
>> 1124 config DMA_NONCOHERENT
>> 1125 bool
>> 1126 select NEED_DMA_MAP_STATE
>> 1127
>> 1128 config SYS_HAS_EARLY_PRINTK
>> 1129 bool
>> 1130
>> 1131 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1132 bool
>> 1133
>> 1134 config MIPS_BONITO64
>> 1135 bool
>> 1136
>> 1137 config MIPS_MSC
>> 1138 bool
>> 1139
>> 1140 config MIPS_NILE4
>> 1141 bool
>> 1142
>> 1143 config SYNC_R4K
>> 1144 bool
>> 1145
>> 1146 config MIPS_MACHINE
>> 1147 def_bool n
79 1148
80 config NO_IOPORT_MAP 1149 config NO_IOPORT_MAP
81 def_bool n 1150 def_bool n
82 1151
83 config HZ !! 1152 config GENERIC_CSUM
84 int !! 1153 bool
85 default 100 <<
86 1154
87 config LOCKDEP_SUPPORT !! 1155 config GENERIC_ISA_DMA
88 def_bool y !! 1156 bool
>> 1157 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1158 select ISA_DMA_API
89 1159
90 config STACKTRACE_SUPPORT !! 1160 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1161 bool
>> 1162 select GENERIC_ISA_DMA
>> 1163
>> 1164 config ISA_DMA_API
>> 1165 bool
>> 1166
>> 1167 config HOLES_IN_ZONE
>> 1168 bool
>> 1169
>> 1170 config SYS_SUPPORTS_RELOCATABLE
>> 1171 bool
>> 1172 help
>> 1173 Selected if the platform supports relocating the kernel.
>> 1174 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1175 to allow access to command line and entropy sources.
>> 1176
>> 1177 config MIPS_CBPF_JIT
91 def_bool y 1178 def_bool y
>> 1179 depends on BPF_JIT && HAVE_CBPF_JIT
92 1180
93 config MMU !! 1181 config MIPS_EBPF_JIT
94 def_bool n !! 1182 def_bool y
95 select PFAULT !! 1183 depends on BPF_JIT && HAVE_EBPF_JIT
96 1184
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1185
100 config KASAN_SHADOW_OFFSET !! 1186 #
101 hex !! 1187 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1188 # answer,so we try hard to limit the available choices. Also the use of a
>> 1189 # choice statement should be more obvious to the user.
>> 1190 #
>> 1191 choice
>> 1192 prompt "Endianness selection"
>> 1193 help
>> 1194 Some MIPS machines can be configured for either little or big endian
>> 1195 byte order. These modes require different kernels and a different
>> 1196 Linux distribution. In general there is one preferred byteorder for a
>> 1197 particular system but some systems are just as commonly used in the
>> 1198 one or the other endianness.
103 1199
104 config CPU_BIG_ENDIAN 1200 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1201 bool "Big endian"
>> 1202 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1203
107 config CPU_LITTLE_ENDIAN 1204 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1205 bool "Little endian"
>> 1206 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1207
110 config CC_HAVE_CALL0_ABI !! 1208 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1209
113 menu "Processor type and features" !! 1210 config EXPORT_UASM
>> 1211 bool
114 1212
115 choice !! 1213 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1214 bool
117 default XTENSA_VARIANT_FSF <<
118 1215
119 config XTENSA_VARIANT_FSF !! 1216 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1217 bool
121 select MMU <<
122 1218
123 config XTENSA_VARIANT_DC232B !! 1219 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1220 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1221
130 config XTENSA_VARIANT_DC233C !! 1222 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1223 bool
132 select MMU !! 1224 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1225 default y
134 help !! 1226
135 This variant refers to Tensilica's D !! 1227 config MIPS_HUGE_TLB_SUPPORT
>> 1228 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1229
>> 1230 config IRQ_CPU_RM7K
>> 1231 bool
>> 1232
>> 1233 config IRQ_MSP_SLP
>> 1234 bool
>> 1235
>> 1236 config IRQ_MSP_CIC
>> 1237 bool
>> 1238
>> 1239 config IRQ_TXX9
>> 1240 bool
>> 1241
>> 1242 config IRQ_GT641XX
>> 1243 bool
>> 1244
>> 1245 config PCI_GT64XXX_PCI0
>> 1246 bool
>> 1247
>> 1248 config NO_EXCEPT_FILL
>> 1249 bool
>> 1250
>> 1251 config SOC_EMMA2RH
>> 1252 bool
>> 1253 select CEVT_R4K
>> 1254 select CSRC_R4K
>> 1255 select DMA_NONCOHERENT
>> 1256 select IRQ_MIPS_CPU
>> 1257 select SWAP_IO_SPACE
>> 1258 select SYS_HAS_CPU_R5500
>> 1259 select SYS_SUPPORTS_32BIT_KERNEL
>> 1260 select SYS_SUPPORTS_64BIT_KERNEL
>> 1261 select SYS_SUPPORTS_BIG_ENDIAN
>> 1262
>> 1263 config SOC_PNX833X
>> 1264 bool
>> 1265 select CEVT_R4K
>> 1266 select CSRC_R4K
>> 1267 select IRQ_MIPS_CPU
>> 1268 select DMA_NONCOHERENT
>> 1269 select SYS_HAS_CPU_MIPS32_R2
>> 1270 select SYS_SUPPORTS_32BIT_KERNEL
>> 1271 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1272 select SYS_SUPPORTS_BIG_ENDIAN
>> 1273 select SYS_SUPPORTS_MIPS16
>> 1274 select CPU_MIPSR2_IRQ_VI
>> 1275
>> 1276 config SOC_PNX8335
>> 1277 bool
>> 1278 select SOC_PNX833X
>> 1279
>> 1280 config MIPS_SPRAM
>> 1281 bool
>> 1282
>> 1283 config SWAP_IO_SPACE
>> 1284 bool
>> 1285
>> 1286 config SGI_HAS_INDYDOG
>> 1287 bool
>> 1288
>> 1289 config SGI_HAS_HAL2
>> 1290 bool
136 1291
137 config XTENSA_VARIANT_CUSTOM !! 1292 config SGI_HAS_SEEQ
138 bool "Custom Xtensa processor configur !! 1293 bool
139 select HAVE_XTENSA_GPIO32 !! 1294
>> 1295 config SGI_HAS_WD93
>> 1296 bool
>> 1297
>> 1298 config SGI_HAS_ZILOG
>> 1299 bool
>> 1300
>> 1301 config SGI_HAS_I8042
>> 1302 bool
>> 1303
>> 1304 config DEFAULT_SGI_PARTITION
>> 1305 bool
>> 1306
>> 1307 config FW_ARC32
>> 1308 bool
>> 1309
>> 1310 config FW_SNIPROM
>> 1311 bool
>> 1312
>> 1313 config BOOT_ELF32
>> 1314 bool
>> 1315
>> 1316 config MIPS_L1_CACHE_SHIFT_4
>> 1317 bool
>> 1318
>> 1319 config MIPS_L1_CACHE_SHIFT_5
>> 1320 bool
>> 1321
>> 1322 config MIPS_L1_CACHE_SHIFT_6
>> 1323 bool
>> 1324
>> 1325 config MIPS_L1_CACHE_SHIFT_7
>> 1326 bool
>> 1327
>> 1328 config MIPS_L1_CACHE_SHIFT
>> 1329 int
>> 1330 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1331 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1332 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1333 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1334 default "5"
>> 1335
>> 1336 config HAVE_STD_PC_SERIAL_PORT
>> 1337 bool
>> 1338
>> 1339 config ARC_CONSOLE
>> 1340 bool "ARC console support"
>> 1341 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1342
>> 1343 config ARC_MEMORY
>> 1344 bool
>> 1345 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1346 default y
>> 1347
>> 1348 config ARC_PROMLIB
>> 1349 bool
>> 1350 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1351 default y
>> 1352
>> 1353 config FW_ARC64
>> 1354 bool
>> 1355
>> 1356 config BOOT_ELF64
>> 1357 bool
>> 1358
>> 1359 menu "CPU selection"
>> 1360
>> 1361 choice
>> 1362 prompt "CPU type"
>> 1363 default CPU_R4X00
>> 1364
>> 1365 config CPU_LOONGSON3
>> 1366 bool "Loongson 3 CPU"
>> 1367 depends on SYS_HAS_CPU_LOONGSON3
>> 1368 select CPU_SUPPORTS_64BIT_KERNEL
>> 1369 select CPU_SUPPORTS_HIGHMEM
>> 1370 select CPU_SUPPORTS_HUGEPAGES
>> 1371 select WEAK_ORDERING
>> 1372 select WEAK_REORDERING_BEYOND_LLSC
>> 1373 select MIPS_PGD_C0_CONTEXT
>> 1374 select MIPS_L1_CACHE_SHIFT_6
>> 1375 select GPIOLIB
>> 1376 select SWIOTLB
140 help 1377 help
141 Select this variant to use a custom !! 1378 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1379 set with many extensions.
143 endchoice <<
144 1380
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1381 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1382 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1383 default n
>> 1384 select CPU_MIPSR2
>> 1385 select CPU_HAS_PREFETCH
>> 1386 depends on CPU_LOONGSON3
>> 1387 help
>> 1388 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1389 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1390 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1391 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1392 Fast TLB refill support, etc.
>> 1393
>> 1394 This option enable those enhancements which are not probed at run
>> 1395 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1396 please say 'N' here. If you want a high-performance kernel to run on
>> 1397 new Loongson 3 machines only, please say 'Y' here.
>> 1398
>> 1399 config CPU_LOONGSON2E
>> 1400 bool "Loongson 2E"
>> 1401 depends on SYS_HAS_CPU_LOONGSON2E
>> 1402 select CPU_LOONGSON2
>> 1403 help
>> 1404 The Loongson 2E processor implements the MIPS III instruction set
>> 1405 with many extensions.
>> 1406
>> 1407 It has an internal FPGA northbridge, which is compatible to
>> 1408 bonito64.
>> 1409
>> 1410 config CPU_LOONGSON2F
>> 1411 bool "Loongson 2F"
>> 1412 depends on SYS_HAS_CPU_LOONGSON2F
>> 1413 select CPU_LOONGSON2
>> 1414 select GPIOLIB
>> 1415 help
>> 1416 The Loongson 2F processor implements the MIPS III instruction set
>> 1417 with many extensions.
>> 1418
>> 1419 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1420 have a similar programming interface with FPGA northbridge used in
>> 1421 Loongson2E.
>> 1422
>> 1423 config CPU_LOONGSON1B
>> 1424 bool "Loongson 1B"
>> 1425 depends on SYS_HAS_CPU_LOONGSON1B
>> 1426 select CPU_LOONGSON1
>> 1427 select LEDS_GPIO_REGISTER
>> 1428 help
>> 1429 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1430 release 2 instruction set.
>> 1431
>> 1432 config CPU_LOONGSON1C
>> 1433 bool "Loongson 1C"
>> 1434 depends on SYS_HAS_CPU_LOONGSON1C
>> 1435 select CPU_LOONGSON1
>> 1436 select LEDS_GPIO_REGISTER
>> 1437 help
>> 1438 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1439 release 2 instruction set.
>> 1440
>> 1441 config CPU_MIPS32_R1
>> 1442 bool "MIPS32 Release 1"
>> 1443 depends on SYS_HAS_CPU_MIPS32_R1
>> 1444 select CPU_HAS_PREFETCH
>> 1445 select CPU_SUPPORTS_32BIT_KERNEL
>> 1446 select CPU_SUPPORTS_HIGHMEM
>> 1447 help
>> 1448 Choose this option to build a kernel for release 1 or later of the
>> 1449 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1450 MIPS processor are based on a MIPS32 processor. If you know the
>> 1451 specific type of processor in your system, choose those that one
>> 1452 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1453 Release 2 of the MIPS32 architecture is available since several
>> 1454 years so chances are you even have a MIPS32 Release 2 processor
>> 1455 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1456 performance.
>> 1457
>> 1458 config CPU_MIPS32_R2
>> 1459 bool "MIPS32 Release 2"
>> 1460 depends on SYS_HAS_CPU_MIPS32_R2
>> 1461 select CPU_HAS_PREFETCH
>> 1462 select CPU_SUPPORTS_32BIT_KERNEL
>> 1463 select CPU_SUPPORTS_HIGHMEM
>> 1464 select CPU_SUPPORTS_MSA
>> 1465 select HAVE_KVM
>> 1466 help
>> 1467 Choose this option to build a kernel for release 2 or later of the
>> 1468 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1469 MIPS processor are based on a MIPS32 processor. If you know the
>> 1470 specific type of processor in your system, choose those that one
>> 1471 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1472
>> 1473 config CPU_MIPS32_R6
>> 1474 bool "MIPS32 Release 6"
>> 1475 depends on SYS_HAS_CPU_MIPS32_R6
>> 1476 select CPU_HAS_PREFETCH
>> 1477 select CPU_SUPPORTS_32BIT_KERNEL
>> 1478 select CPU_SUPPORTS_HIGHMEM
>> 1479 select CPU_SUPPORTS_MSA
>> 1480 select GENERIC_CSUM
>> 1481 select HAVE_KVM
>> 1482 select MIPS_O32_FP64_SUPPORT
>> 1483 help
>> 1484 Choose this option to build a kernel for release 6 or later of the
>> 1485 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1486 family, are based on a MIPS32r6 processor. If you own an older
>> 1487 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1488
>> 1489 config CPU_MIPS64_R1
>> 1490 bool "MIPS64 Release 1"
>> 1491 depends on SYS_HAS_CPU_MIPS64_R1
>> 1492 select CPU_HAS_PREFETCH
>> 1493 select CPU_SUPPORTS_32BIT_KERNEL
>> 1494 select CPU_SUPPORTS_64BIT_KERNEL
>> 1495 select CPU_SUPPORTS_HIGHMEM
>> 1496 select CPU_SUPPORTS_HUGEPAGES
>> 1497 help
>> 1498 Choose this option to build a kernel for release 1 or later of the
>> 1499 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1500 MIPS processor are based on a MIPS64 processor. If you know the
>> 1501 specific type of processor in your system, choose those that one
>> 1502 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1503 Release 2 of the MIPS64 architecture is available since several
>> 1504 years so chances are you even have a MIPS64 Release 2 processor
>> 1505 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1506 performance.
>> 1507
>> 1508 config CPU_MIPS64_R2
>> 1509 bool "MIPS64 Release 2"
>> 1510 depends on SYS_HAS_CPU_MIPS64_R2
>> 1511 select CPU_HAS_PREFETCH
>> 1512 select CPU_SUPPORTS_32BIT_KERNEL
>> 1513 select CPU_SUPPORTS_64BIT_KERNEL
>> 1514 select CPU_SUPPORTS_HIGHMEM
>> 1515 select CPU_SUPPORTS_HUGEPAGES
>> 1516 select CPU_SUPPORTS_MSA
>> 1517 select HAVE_KVM
>> 1518 help
>> 1519 Choose this option to build a kernel for release 2 or later of the
>> 1520 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1521 MIPS processor are based on a MIPS64 processor. If you know the
>> 1522 specific type of processor in your system, choose those that one
>> 1523 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1524
>> 1525 config CPU_MIPS64_R6
>> 1526 bool "MIPS64 Release 6"
>> 1527 depends on SYS_HAS_CPU_MIPS64_R6
>> 1528 select CPU_HAS_PREFETCH
>> 1529 select CPU_SUPPORTS_32BIT_KERNEL
>> 1530 select CPU_SUPPORTS_64BIT_KERNEL
>> 1531 select CPU_SUPPORTS_HIGHMEM
>> 1532 select CPU_SUPPORTS_MSA
>> 1533 select GENERIC_CSUM
>> 1534 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1535 select HAVE_KVM
>> 1536 help
>> 1537 Choose this option to build a kernel for release 6 or later of the
>> 1538 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1539 family, are based on a MIPS64r6 processor. If you own an older
>> 1540 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1541
>> 1542 config CPU_R3000
>> 1543 bool "R3000"
>> 1544 depends on SYS_HAS_CPU_R3000
>> 1545 select CPU_HAS_WB
>> 1546 select CPU_SUPPORTS_32BIT_KERNEL
>> 1547 select CPU_SUPPORTS_HIGHMEM
>> 1548 help
>> 1549 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1550 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1551 *not* work on R4000 machines and vice versa. However, since most
>> 1552 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1553 might be a safe bet. If the resulting kernel does not work,
>> 1554 try to recompile with R3000.
>> 1555
>> 1556 config CPU_TX39XX
>> 1557 bool "R39XX"
>> 1558 depends on SYS_HAS_CPU_TX39XX
>> 1559 select CPU_SUPPORTS_32BIT_KERNEL
>> 1560
>> 1561 config CPU_VR41XX
>> 1562 bool "R41xx"
>> 1563 depends on SYS_HAS_CPU_VR41XX
>> 1564 select CPU_SUPPORTS_32BIT_KERNEL
>> 1565 select CPU_SUPPORTS_64BIT_KERNEL
>> 1566 help
>> 1567 The options selects support for the NEC VR4100 series of processors.
>> 1568 Only choose this option if you have one of these processors as a
>> 1569 kernel built with this option will not run on any other type of
>> 1570 processor or vice versa.
>> 1571
>> 1572 config CPU_R4300
>> 1573 bool "R4300"
>> 1574 depends on SYS_HAS_CPU_R4300
>> 1575 select CPU_SUPPORTS_32BIT_KERNEL
>> 1576 select CPU_SUPPORTS_64BIT_KERNEL
>> 1577 help
>> 1578 MIPS Technologies R4300-series processors.
>> 1579
>> 1580 config CPU_R4X00
>> 1581 bool "R4x00"
>> 1582 depends on SYS_HAS_CPU_R4X00
>> 1583 select CPU_SUPPORTS_32BIT_KERNEL
>> 1584 select CPU_SUPPORTS_64BIT_KERNEL
>> 1585 select CPU_SUPPORTS_HUGEPAGES
>> 1586 help
>> 1587 MIPS Technologies R4000-series processors other than 4300, including
>> 1588 the R4000, R4400, R4600, and 4700.
>> 1589
>> 1590 config CPU_TX49XX
>> 1591 bool "R49XX"
>> 1592 depends on SYS_HAS_CPU_TX49XX
>> 1593 select CPU_HAS_PREFETCH
>> 1594 select CPU_SUPPORTS_32BIT_KERNEL
>> 1595 select CPU_SUPPORTS_64BIT_KERNEL
>> 1596 select CPU_SUPPORTS_HUGEPAGES
>> 1597
>> 1598 config CPU_R5000
>> 1599 bool "R5000"
>> 1600 depends on SYS_HAS_CPU_R5000
>> 1601 select CPU_SUPPORTS_32BIT_KERNEL
>> 1602 select CPU_SUPPORTS_64BIT_KERNEL
>> 1603 select CPU_SUPPORTS_HUGEPAGES
>> 1604 help
>> 1605 MIPS Technologies R5000-series processors other than the Nevada.
>> 1606
>> 1607 config CPU_R5432
>> 1608 bool "R5432"
>> 1609 depends on SYS_HAS_CPU_R5432
>> 1610 select CPU_SUPPORTS_32BIT_KERNEL
>> 1611 select CPU_SUPPORTS_64BIT_KERNEL
>> 1612 select CPU_SUPPORTS_HUGEPAGES
>> 1613
>> 1614 config CPU_R5500
>> 1615 bool "R5500"
>> 1616 depends on SYS_HAS_CPU_R5500
>> 1617 select CPU_SUPPORTS_32BIT_KERNEL
>> 1618 select CPU_SUPPORTS_64BIT_KERNEL
>> 1619 select CPU_SUPPORTS_HUGEPAGES
>> 1620 help
>> 1621 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1622 instruction set.
>> 1623
>> 1624 config CPU_NEVADA
>> 1625 bool "RM52xx"
>> 1626 depends on SYS_HAS_CPU_NEVADA
>> 1627 select CPU_SUPPORTS_32BIT_KERNEL
>> 1628 select CPU_SUPPORTS_64BIT_KERNEL
>> 1629 select CPU_SUPPORTS_HUGEPAGES
>> 1630 help
>> 1631 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1632
>> 1633 config CPU_R8000
>> 1634 bool "R8000"
>> 1635 depends on SYS_HAS_CPU_R8000
>> 1636 select CPU_HAS_PREFETCH
>> 1637 select CPU_SUPPORTS_64BIT_KERNEL
>> 1638 help
>> 1639 MIPS Technologies R8000 processors. Note these processors are
>> 1640 uncommon and the support for them is incomplete.
>> 1641
>> 1642 config CPU_R10000
>> 1643 bool "R10000"
>> 1644 depends on SYS_HAS_CPU_R10000
>> 1645 select CPU_HAS_PREFETCH
>> 1646 select CPU_SUPPORTS_32BIT_KERNEL
>> 1647 select CPU_SUPPORTS_64BIT_KERNEL
>> 1648 select CPU_SUPPORTS_HIGHMEM
>> 1649 select CPU_SUPPORTS_HUGEPAGES
>> 1650 help
>> 1651 MIPS Technologies R10000-series processors.
>> 1652
>> 1653 config CPU_RM7000
>> 1654 bool "RM7000"
>> 1655 depends on SYS_HAS_CPU_RM7000
>> 1656 select CPU_HAS_PREFETCH
>> 1657 select CPU_SUPPORTS_32BIT_KERNEL
>> 1658 select CPU_SUPPORTS_64BIT_KERNEL
>> 1659 select CPU_SUPPORTS_HIGHMEM
>> 1660 select CPU_SUPPORTS_HUGEPAGES
>> 1661
>> 1662 config CPU_SB1
>> 1663 bool "SB1"
>> 1664 depends on SYS_HAS_CPU_SB1
>> 1665 select CPU_SUPPORTS_32BIT_KERNEL
>> 1666 select CPU_SUPPORTS_64BIT_KERNEL
>> 1667 select CPU_SUPPORTS_HIGHMEM
>> 1668 select CPU_SUPPORTS_HUGEPAGES
>> 1669 select WEAK_ORDERING
>> 1670
>> 1671 config CPU_CAVIUM_OCTEON
>> 1672 bool "Cavium Octeon processor"
>> 1673 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1674 select CPU_HAS_PREFETCH
>> 1675 select CPU_SUPPORTS_64BIT_KERNEL
>> 1676 select WEAK_ORDERING
>> 1677 select CPU_SUPPORTS_HIGHMEM
>> 1678 select CPU_SUPPORTS_HUGEPAGES
>> 1679 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1680 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1681 select MIPS_L1_CACHE_SHIFT_7
>> 1682 select HAVE_KVM
>> 1683 help
>> 1684 The Cavium Octeon processor is a highly integrated chip containing
>> 1685 many ethernet hardware widgets for networking tasks. The processor
>> 1686 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1687 Full details can be found at http://www.caviumnetworks.com.
>> 1688
>> 1689 config CPU_BMIPS
>> 1690 bool "Broadcom BMIPS"
>> 1691 depends on SYS_HAS_CPU_BMIPS
>> 1692 select CPU_MIPS32
>> 1693 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1694 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1695 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1696 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1697 select CPU_SUPPORTS_32BIT_KERNEL
>> 1698 select DMA_NONCOHERENT
>> 1699 select IRQ_MIPS_CPU
>> 1700 select SWAP_IO_SPACE
>> 1701 select WEAK_ORDERING
>> 1702 select CPU_SUPPORTS_HIGHMEM
>> 1703 select CPU_HAS_PREFETCH
>> 1704 select CPU_SUPPORTS_CPUFREQ
>> 1705 select MIPS_EXTERNAL_TIMER
>> 1706 help
>> 1707 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1708
>> 1709 config CPU_XLR
>> 1710 bool "Netlogic XLR SoC"
>> 1711 depends on SYS_HAS_CPU_XLR
>> 1712 select CPU_SUPPORTS_32BIT_KERNEL
>> 1713 select CPU_SUPPORTS_64BIT_KERNEL
>> 1714 select CPU_SUPPORTS_HIGHMEM
>> 1715 select CPU_SUPPORTS_HUGEPAGES
>> 1716 select WEAK_ORDERING
>> 1717 select WEAK_REORDERING_BEYOND_LLSC
>> 1718 help
>> 1719 Netlogic Microsystems XLR/XLS processors.
>> 1720
>> 1721 config CPU_XLP
>> 1722 bool "Netlogic XLP SoC"
>> 1723 depends on SYS_HAS_CPU_XLP
>> 1724 select CPU_SUPPORTS_32BIT_KERNEL
>> 1725 select CPU_SUPPORTS_64BIT_KERNEL
>> 1726 select CPU_SUPPORTS_HIGHMEM
>> 1727 select WEAK_ORDERING
>> 1728 select WEAK_REORDERING_BEYOND_LLSC
>> 1729 select CPU_HAS_PREFETCH
>> 1730 select CPU_MIPSR2
>> 1731 select CPU_SUPPORTS_HUGEPAGES
>> 1732 select MIPS_ASID_BITS_VARIABLE
173 help 1733 help
174 Enable if core variant has Performan !! 1734 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1735 endchoice
176 <<
177 If unsure, say N. <<
178 1736
179 config XTENSA_FAKE_NMI !! 1737 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1738 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1739 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1740 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1741 help
>> 1742 Choose this option to build a kernel for release 2 or later of the
>> 1743 MIPS32 architecture including features from the 3.5 release such as
>> 1744 support for Enhanced Virtual Addressing (EVA).
>> 1745
>> 1746 config CPU_MIPS32_3_5_EVA
>> 1747 bool "Enhanced Virtual Addressing (EVA)"
>> 1748 depends on CPU_MIPS32_3_5_FEATURES
>> 1749 select EVA
>> 1750 default y
>> 1751 help
>> 1752 Choose this option if you want to enable the Enhanced Virtual
>> 1753 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1754 One of its primary benefits is an increase in the maximum size
>> 1755 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1756
>> 1757 config CPU_MIPS32_R5_FEATURES
>> 1758 bool "MIPS32 Release 5 Features"
>> 1759 depends on SYS_HAS_CPU_MIPS32_R5
>> 1760 depends on CPU_MIPS32_R2
>> 1761 help
>> 1762 Choose this option to build a kernel for release 2 or later of the
>> 1763 MIPS32 architecture including features from release 5 such as
>> 1764 support for Extended Physical Addressing (XPA).
>> 1765
>> 1766 config CPU_MIPS32_R5_XPA
>> 1767 bool "Extended Physical Addressing (XPA)"
>> 1768 depends on CPU_MIPS32_R5_FEATURES
>> 1769 depends on !EVA
>> 1770 depends on !PAGE_SIZE_4KB
>> 1771 depends on SYS_SUPPORTS_HIGHMEM
>> 1772 select XPA
>> 1773 select HIGHMEM
>> 1774 select PHYS_ADDR_T_64BIT
182 default n 1775 default n
183 help 1776 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1777 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1778 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1779 benefit is to increase physical addressing equal to or greater
>> 1780 than 40 bits. Note that this has the side effect of turning on
>> 1781 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1782 If unsure, say 'N' here.
186 1783
187 If there are other interrupts at or !! 1784 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1785 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1786 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1787
193 If unsure, say N. !! 1788 config CPU_JUMP_WORKAROUNDS
>> 1789 bool
194 1790
195 config PFAULT !! 1791 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1792 bool "Loongson 2F Workarounds"
197 default y 1793 default y
>> 1794 select CPU_NOP_WORKAROUNDS
>> 1795 select CPU_JUMP_WORKAROUNDS
198 help 1796 help
199 Handle protection faults. MMU config !! 1797 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1798 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1799 unexpectedly. For more information please refer to the gas
>> 1800 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1801
>> 1802 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1803 are needed. The workarounds have no significant side effect on them
>> 1804 but may decrease the performance of the system so this option should
>> 1805 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1806 systems.
202 1807
203 If unsure, say Y. !! 1808 If unsure, please say Y.
>> 1809 endif # CPU_LOONGSON2F
204 1810
205 config XTENSA_UNALIGNED_USER !! 1811 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1812 bool
207 help !! 1813 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1814 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1815 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1816 select HAVE_KERNEL_LZMA
>> 1817 select HAVE_KERNEL_LZO
>> 1818 select HAVE_KERNEL_XZ
211 1819
212 Say Y here to enable unaligned memor !! 1820 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1821 bool
>> 1822 select SYS_SUPPORTS_ZBOOT
213 1823
214 config XTENSA_LOAD_STORE !! 1824 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1825 bool
216 help !! 1826 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1827
223 Say Y here to enable exception handl !! 1828 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1829 bool
>> 1830 select CPU_SUPPORTS_32BIT_KERNEL
>> 1831 select CPU_SUPPORTS_64BIT_KERNEL
>> 1832 select CPU_SUPPORTS_HIGHMEM
>> 1833 select CPU_SUPPORTS_HUGEPAGES
225 1834
226 config HAVE_SMP !! 1835 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1836 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1837 select CPU_MIPS32
229 select XTENSA_MX !! 1838 select CPU_MIPSR2
230 help !! 1839 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1840 select CPU_SUPPORTS_32BIT_KERNEL
232 supports Multiprocessing. Multiproce !! 1841 select CPU_SUPPORTS_HIGHMEM
233 the CPU core definition and currentl !! 1842 select CPU_SUPPORTS_CPUFREQ
234 1843
235 Multiprocessor support is implemente !! 1844 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1845 select SMP_UP if SMP
>> 1846 bool
237 1847
238 The MX interrupt distributer adds In !! 1848 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1849 bool
240 like the open cores ethernet driver !! 1850 select SYS_SUPPORTS_SMP
>> 1851 select SYS_SUPPORTS_HOTPLUG_CPU
241 1852
242 You still have to select "Enable SMP !! 1853 config CPU_BMIPS4380
>> 1854 bool
>> 1855 select MIPS_L1_CACHE_SHIFT_6
>> 1856 select SYS_SUPPORTS_SMP
>> 1857 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1858 select CPU_HAS_RIXI
243 1859
244 config SMP !! 1860 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1861 bool
246 depends on HAVE_SMP !! 1862 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1863 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1864 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1865 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1866 select CPU_HAS_RIXI
251 1867
252 config NR_CPUS !! 1868 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1869 bool
254 int "Maximum number of CPUs (2-32)" !! 1870 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1871 select CPU_HAS_RIXI
256 default "4" <<
257 1872
258 config HOTPLUG_CPU !! 1873 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1874 bool
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 1875
265 Say N if you want to disable CPU hot !! 1876 config SYS_HAS_CPU_LOONGSON2F
>> 1877 bool
>> 1878 select CPU_SUPPORTS_CPUFREQ
>> 1879 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1880 select CPU_SUPPORTS_UNCACHED_ACCELERATED
266 1881
267 config SECONDARY_RESET_VECTOR !! 1882 config SYS_HAS_CPU_LOONGSON1B
268 bool "Secondary cores use alternative !! 1883 bool
>> 1884
>> 1885 config SYS_HAS_CPU_LOONGSON1C
>> 1886 bool
>> 1887
>> 1888 config SYS_HAS_CPU_MIPS32_R1
>> 1889 bool
>> 1890
>> 1891 config SYS_HAS_CPU_MIPS32_R2
>> 1892 bool
>> 1893
>> 1894 config SYS_HAS_CPU_MIPS32_R3_5
>> 1895 bool
>> 1896
>> 1897 config SYS_HAS_CPU_MIPS32_R5
>> 1898 bool
>> 1899
>> 1900 config SYS_HAS_CPU_MIPS32_R6
>> 1901 bool
>> 1902
>> 1903 config SYS_HAS_CPU_MIPS64_R1
>> 1904 bool
>> 1905
>> 1906 config SYS_HAS_CPU_MIPS64_R2
>> 1907 bool
>> 1908
>> 1909 config SYS_HAS_CPU_MIPS64_R6
>> 1910 bool
>> 1911
>> 1912 config SYS_HAS_CPU_R3000
>> 1913 bool
>> 1914
>> 1915 config SYS_HAS_CPU_TX39XX
>> 1916 bool
>> 1917
>> 1918 config SYS_HAS_CPU_VR41XX
>> 1919 bool
>> 1920
>> 1921 config SYS_HAS_CPU_R4300
>> 1922 bool
>> 1923
>> 1924 config SYS_HAS_CPU_R4X00
>> 1925 bool
>> 1926
>> 1927 config SYS_HAS_CPU_TX49XX
>> 1928 bool
>> 1929
>> 1930 config SYS_HAS_CPU_R5000
>> 1931 bool
>> 1932
>> 1933 config SYS_HAS_CPU_R5432
>> 1934 bool
>> 1935
>> 1936 config SYS_HAS_CPU_R5500
>> 1937 bool
>> 1938
>> 1939 config SYS_HAS_CPU_NEVADA
>> 1940 bool
>> 1941
>> 1942 config SYS_HAS_CPU_R8000
>> 1943 bool
>> 1944
>> 1945 config SYS_HAS_CPU_R10000
>> 1946 bool
>> 1947
>> 1948 config SYS_HAS_CPU_RM7000
>> 1949 bool
>> 1950
>> 1951 config SYS_HAS_CPU_SB1
>> 1952 bool
>> 1953
>> 1954 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1955 bool
>> 1956
>> 1957 config SYS_HAS_CPU_BMIPS
>> 1958 bool
>> 1959
>> 1960 config SYS_HAS_CPU_BMIPS32_3300
>> 1961 bool
>> 1962 select SYS_HAS_CPU_BMIPS
>> 1963
>> 1964 config SYS_HAS_CPU_BMIPS4350
>> 1965 bool
>> 1966 select SYS_HAS_CPU_BMIPS
>> 1967
>> 1968 config SYS_HAS_CPU_BMIPS4380
>> 1969 bool
>> 1970 select SYS_HAS_CPU_BMIPS
>> 1971
>> 1972 config SYS_HAS_CPU_BMIPS5000
>> 1973 bool
>> 1974 select SYS_HAS_CPU_BMIPS
>> 1975
>> 1976 config SYS_HAS_CPU_XLR
>> 1977 bool
>> 1978
>> 1979 config SYS_HAS_CPU_XLP
>> 1980 bool
>> 1981
>> 1982 config MIPS_MALTA_PM
>> 1983 depends on MIPS_MALTA
>> 1984 depends on PCI
>> 1985 bool
269 default y 1986 default y
270 depends on HAVE_SMP !! 1987
>> 1988 #
>> 1989 # CPU may reorder R->R, R->W, W->R, W->W
>> 1990 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1991 #
>> 1992 config WEAK_ORDERING
>> 1993 bool
>> 1994
>> 1995 #
>> 1996 # CPU may reorder reads and writes beyond LL/SC
>> 1997 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 1998 #
>> 1999 config WEAK_REORDERING_BEYOND_LLSC
>> 2000 bool
>> 2001 endmenu
>> 2002
>> 2003 #
>> 2004 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2005 #
>> 2006 config CPU_MIPS32
>> 2007 bool
>> 2008 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2009
>> 2010 config CPU_MIPS64
>> 2011 bool
>> 2012 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2013
>> 2014 #
>> 2015 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2016 #
>> 2017 config CPU_MIPSR1
>> 2018 bool
>> 2019 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2020
>> 2021 config CPU_MIPSR2
>> 2022 bool
>> 2023 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2024 select CPU_HAS_RIXI
>> 2025 select MIPS_SPRAM
>> 2026
>> 2027 config CPU_MIPSR6
>> 2028 bool
>> 2029 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2030 select CPU_HAS_RIXI
>> 2031 select HAVE_ARCH_BITREVERSE
>> 2032 select MIPS_ASID_BITS_VARIABLE
>> 2033 select MIPS_CRC_SUPPORT
>> 2034 select MIPS_SPRAM
>> 2035
>> 2036 config EVA
>> 2037 bool
>> 2038
>> 2039 config XPA
>> 2040 bool
>> 2041
>> 2042 config SYS_SUPPORTS_32BIT_KERNEL
>> 2043 bool
>> 2044 config SYS_SUPPORTS_64BIT_KERNEL
>> 2045 bool
>> 2046 config CPU_SUPPORTS_32BIT_KERNEL
>> 2047 bool
>> 2048 config CPU_SUPPORTS_64BIT_KERNEL
>> 2049 bool
>> 2050 config CPU_SUPPORTS_CPUFREQ
>> 2051 bool
>> 2052 config CPU_SUPPORTS_ADDRWINCFG
>> 2053 bool
>> 2054 config CPU_SUPPORTS_HUGEPAGES
>> 2055 bool
>> 2056 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2057 bool
>> 2058 config MIPS_PGD_C0_CONTEXT
>> 2059 bool
>> 2060 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2061
>> 2062 #
>> 2063 # Set to y for ptrace access to watch registers.
>> 2064 #
>> 2065 config HARDWARE_WATCHPOINTS
>> 2066 bool
>> 2067 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2068
>> 2069 menu "Kernel type"
>> 2070
>> 2071 choice
>> 2072 prompt "Kernel code model"
271 help 2073 help
272 Secondary cores may be configured to !! 2074 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2075 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2076 large memory. You will only be presented a single option in this
>> 2077 menu if your system does not support both 32-bit and 64-bit kernels.
275 2078
276 config FAST_SYSCALL_XTENSA !! 2079 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2080 bool "32-bit kernel"
278 default n !! 2081 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2082 select TRAD_SIGNALS
279 help 2083 help
280 fast_syscall_xtensa is a syscall tha !! 2084 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2085
283 This syscall is deprecated. It may h !! 2086 config 64BIT
284 invalid arguments. It is provided on !! 2087 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2088 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2089 help
>> 2090 Select this option if you want to build a 64-bit kernel.
286 2091
287 If unsure, say N. !! 2092 endchoice
288 2093
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2094 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2095 bool "KVM Guest Kernel"
291 default n !! 2096 depends on BROKEN_ON_SMP
>> 2097 help
>> 2098 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2099 mode.
>> 2100
>> 2101 config KVM_GUEST_TIMER_FREQ
>> 2102 int "Count/Compare Timer Frequency (MHz)"
>> 2103 depends on KVM_GUEST
>> 2104 default 100
292 help 2105 help
293 fast_syscall_spill_registers is a sy !! 2106 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2107 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2108 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2109
297 invalid arguments. It is provided on !! 2110 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2111 bool "48 bits virtual memory"
>> 2112 depends on 64BIT
>> 2113 help
>> 2114 Support a maximum at least 48 bits of application virtual
>> 2115 memory. Default is 40 bits or less, depending on the CPU.
>> 2116 For page sizes 16k and above, this option results in a small
>> 2117 memory overhead for page tables. For 4k page size, a fourth
>> 2118 level of page tables is added which imposes both a memory
>> 2119 overhead as well as slower TLB fault handling.
299 2120
300 If unsure, say N. 2121 If unsure, say N.
301 2122
302 choice 2123 choice
303 prompt "Kernel ABI" !! 2124 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2125 default PAGE_SIZE_4KB
305 help !! 2126
306 Select ABI for the kernel code. This !! 2127 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2128 bool "4kB"
308 kernel/userspace ABI is possible and !! 2129 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2130 help
310 In case both kernel and userspace su !! 2131 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2132 R3000-family processors this is the only available page size. Using
312 build. !! 2133 4kB page size will minimize memory consumption and is therefore
313 !! 2134 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2135
315 !! 2136 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2137 bool "8kB"
317 bool "Default ABI" !! 2138 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2139 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2140 help
320 selected for the toolchain. !! 2141 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2142 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2143 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2144 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2145
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2146 config PAGE_SIZE_16KB
326 help !! 2147 bool "16kB"
327 Select this option to compile kernel !! 2148 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2149 help
329 When this option is not selected the !! 2150 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2151 the price of higher memory consumption. This option is available on
>> 2152 all non-R3000 family processors. Note that you will need a suitable
>> 2153 Linux distribution to support this.
>> 2154
>> 2155 config PAGE_SIZE_32KB
>> 2156 bool "32kB"
>> 2157 depends on CPU_CAVIUM_OCTEON
>> 2158 depends on !MIPS_VA_BITS_48
>> 2159 help
>> 2160 Using 32kB page size will result in higher performance kernel at
>> 2161 the price of higher memory consumption. This option is available
>> 2162 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2163 distribution to support this.
>> 2164
>> 2165 config PAGE_SIZE_64KB
>> 2166 bool "64kB"
>> 2167 depends on !CPU_R3000 && !CPU_TX39XX
>> 2168 help
>> 2169 Using 64kB page size will result in higher performance kernel at
>> 2170 the price of higher memory consumption. This option is available on
>> 2171 all non-R3000 family processor. Not that at the time of this
>> 2172 writing this option is still high experimental.
331 2173
332 endchoice 2174 endchoice
333 2175
334 config USER_ABI_CALL0 !! 2176 config FORCE_MAX_ZONEORDER
>> 2177 int "Maximum zone order"
>> 2178 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2179 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2180 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2181 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2182 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2183 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2184 range 11 64
>> 2185 default "11"
>> 2186 help
>> 2187 The kernel memory allocator divides physically contiguous memory
>> 2188 blocks into "zones", where each zone is a power of two number of
>> 2189 pages. This option selects the largest power of two that the kernel
>> 2190 keeps in the memory allocator. If you need to allocate very large
>> 2191 blocks of physically contiguous memory, then you may need to
>> 2192 increase this value.
>> 2193
>> 2194 This config option is actually maximum order plus one. For example,
>> 2195 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2196
>> 2197 The page size is not necessarily 4KB. Keep this in mind
>> 2198 when choosing a value for this option.
>> 2199
>> 2200 config BOARD_SCACHE
335 bool 2201 bool
336 2202
337 choice !! 2203 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2204 bool
339 default USER_ABI_DEFAULT !! 2205 select BOARD_SCACHE
>> 2206
>> 2207 #
>> 2208 # Support for a MIPS32 / MIPS64 style S-caches
>> 2209 #
>> 2210 config MIPS_CPU_SCACHE
>> 2211 bool
>> 2212 select BOARD_SCACHE
>> 2213
>> 2214 config R5000_CPU_SCACHE
>> 2215 bool
>> 2216 select BOARD_SCACHE
>> 2217
>> 2218 config RM7000_CPU_SCACHE
>> 2219 bool
>> 2220 select BOARD_SCACHE
>> 2221
>> 2222 config SIBYTE_DMA_PAGEOPS
>> 2223 bool "Use DMA to clear/copy pages"
>> 2224 depends on CPU_SB1
340 help 2225 help
341 Select supported userspace ABI. !! 2226 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2227 channel. These DMA channels are otherwise unused by the standard
>> 2228 SiByte Linux port. Seems to give a small performance benefit.
>> 2229
>> 2230 config CPU_HAS_PREFETCH
>> 2231 bool
>> 2232
>> 2233 config CPU_GENERIC_DUMP_TLB
>> 2234 bool
>> 2235 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
>> 2236
>> 2237 config CPU_R4K_FPU
>> 2238 bool
>> 2239 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2240
>> 2241 config CPU_R4K_CACHE_TLB
>> 2242 bool
>> 2243 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
342 2244
343 If unsure, choose the default ABI. !! 2245 config MIPS_MT_SMP
>> 2246 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2247 default y
>> 2248 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2249 select CPU_MIPSR2_IRQ_VI
>> 2250 select CPU_MIPSR2_IRQ_EI
>> 2251 select SYNC_R4K
>> 2252 select MIPS_MT
>> 2253 select SMP
>> 2254 select SMP_UP
>> 2255 select SYS_SUPPORTS_SMP
>> 2256 select SYS_SUPPORTS_SCHED_SMT
>> 2257 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2258 help
>> 2259 This is a kernel model which is known as SMVP. This is supported
>> 2260 on cores with the MT ASE and uses the available VPEs to implement
>> 2261 virtual processors which supports SMP. This is equivalent to the
>> 2262 Intel Hyperthreading feature. For further information go to
>> 2263 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2264
>> 2265 config MIPS_MT
>> 2266 bool
344 2267
345 config USER_ABI_DEFAULT !! 2268 config SCHED_SMT
346 bool "Default ABI only" !! 2269 bool "SMT (multithreading) scheduler support"
>> 2270 depends on SYS_SUPPORTS_SCHED_SMT
>> 2271 default n
347 help 2272 help
348 Assume default userspace ABI. For XE !! 2273 SMT scheduler support improves the CPU scheduler's decision making
349 call0 ABI binaries may be run on suc !! 2274 when dealing with MIPS MT enabled cores at a cost of slightly
350 will not work correctly for them. !! 2275 increased overhead in some places. If unsure say N here.
>> 2276
>> 2277 config SYS_SUPPORTS_SCHED_SMT
>> 2278 bool
>> 2279
>> 2280 config SYS_SUPPORTS_MULTITHREADING
>> 2281 bool
>> 2282
>> 2283 config MIPS_MT_FPAFF
>> 2284 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2285 default y
>> 2286 depends on MIPS_MT_SMP
351 2287
352 config USER_ABI_CALL0_ONLY !! 2288 config MIPSR2_TO_R6_EMULATOR
353 bool "Call0 ABI only" !! 2289 bool "MIPS R2-to-R6 emulator"
354 select USER_ABI_CALL0 !! 2290 depends on CPU_MIPSR6
>> 2291 default y
355 help 2292 help
356 Select this option to support only c !! 2293 Choose this option if you want to run non-R6 MIPS userland code.
357 Windowed ABI binaries will crash wit !! 2294 Even if you say 'Y' here, the emulator will still be disabled by
358 an illegal instruction exception on !! 2295 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2296 The only reason this is a build-time option is to save ~14K from the
>> 2297 final kernel image.
359 2298
360 Choose this option if you're plannin !! 2299 config SYS_SUPPORTS_VPE_LOADER
361 built with call0 ABI. !! 2300 bool
>> 2301 depends on SYS_SUPPORTS_MULTITHREADING
>> 2302 help
>> 2303 Indicates that the platform supports the VPE loader, and provides
>> 2304 physical_memsize.
362 2305
363 config USER_ABI_CALL0_PROBE !! 2306 config MIPS_VPE_LOADER
364 bool "Support both windowed and call0 !! 2307 bool "VPE loader support."
365 select USER_ABI_CALL0 !! 2308 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2309 select CPU_MIPSR2_IRQ_VI
>> 2310 select CPU_MIPSR2_IRQ_EI
>> 2311 select MIPS_MT
366 help 2312 help
367 Select this option to support both w !! 2313 Includes a loader for loading an elf relocatable object
368 ABIs. When enabled all processes are !! 2314 onto another VPE and running it.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 2315
373 This option should be enabled for th !! 2316 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2317 bool
>> 2318 default "y"
>> 2319 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2320
376 Note that Xtensa ISA does not guaran !! 2321 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2322 bool
378 PS.WOE is disabled, check whether th !! 2323 default "y"
>> 2324 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2325
380 endchoice !! 2326 config MIPS_VPE_LOADER_TOM
>> 2327 bool "Load VPE program into memory hidden from linux"
>> 2328 depends on MIPS_VPE_LOADER
>> 2329 default y
>> 2330 help
>> 2331 The loader can use memory that is present but has been hidden from
>> 2332 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2333 you to ensure the amount you put in the option and the space your
>> 2334 program requires is less or equal to the amount physically present.
>> 2335
>> 2336 config MIPS_VPE_APSP_API
>> 2337 bool "Enable support for AP/SP API (RTLX)"
>> 2338 depends on MIPS_VPE_LOADER
381 2339
382 endmenu !! 2340 config MIPS_VPE_APSP_API_CMP
>> 2341 bool
>> 2342 default "y"
>> 2343 depends on MIPS_VPE_APSP_API && MIPS_CMP
383 2344
384 config XTENSA_CALIBRATE_CCOUNT !! 2345 config MIPS_VPE_APSP_API_MT
385 def_bool n !! 2346 bool
>> 2347 default "y"
>> 2348 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2349
>> 2350 config MIPS_CMP
>> 2351 bool "MIPS CMP framework support (DEPRECATED)"
>> 2352 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2353 select SMP
>> 2354 select SYNC_R4K
>> 2355 select SYS_SUPPORTS_SMP
>> 2356 select WEAK_ORDERING
>> 2357 default n
386 help 2358 help
387 On some platforms (XT2000, for examp !! 2359 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2360 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2361 its ability to start secondary CPUs.
>> 2362
>> 2363 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2364 instead of this.
>> 2365
>> 2366 config MIPS_CPS
>> 2367 bool "MIPS Coherent Processing System support"
>> 2368 depends on SYS_SUPPORTS_MIPS_CPS
>> 2369 select MIPS_CM
>> 2370 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2371 select SMP
>> 2372 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2373 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2374 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2375 select SYS_SUPPORTS_SMP
>> 2376 select WEAK_ORDERING
>> 2377 help
>> 2378 Select this if you wish to run an SMP kernel across multiple cores
>> 2379 within a MIPS Coherent Processing System. When this option is
>> 2380 enabled the kernel will probe for other cores and boot them with
>> 2381 no external assistance. It is safe to enable this when hardware
>> 2382 support is unavailable.
390 2383
391 config SERIAL_CONSOLE !! 2384 config MIPS_CPS_PM
392 def_bool n !! 2385 depends on MIPS_CPS
>> 2386 bool
393 2387
394 config PLATFORM_HAVE_XIP !! 2388 config MIPS_CM
395 def_bool n !! 2389 bool
>> 2390 select MIPS_CPC
>> 2391
>> 2392 config MIPS_CPC
>> 2393 bool
>> 2394
>> 2395 config SB1_PASS_2_WORKAROUNDS
>> 2396 bool
>> 2397 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2398 default y
>> 2399
>> 2400 config SB1_PASS_2_1_WORKAROUNDS
>> 2401 bool
>> 2402 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2403 default y
396 2404
397 menu "Platform options" <<
398 2405
399 choice 2406 choice
400 prompt "Xtensa System Type" !! 2407 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS <<
402 2408
403 config XTENSA_PLATFORM_ISS !! 2409 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
404 bool "ISS" !! 2410 bool "None"
405 select XTENSA_CALIBRATE_CCOUNT <<
406 select SERIAL_CONSOLE <<
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 <<
410 config XTENSA_PLATFORM_XT2000 <<
411 bool "XT2000" <<
412 help <<
413 XT2000 is the name of Tensilica's fe <<
414 This hardware is capable of running <<
415 <<
416 config XTENSA_PLATFORM_XTFPGA <<
417 bool "XTFPGA" <<
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2411 help
424 XTFPGA is the name of Tensilica boar !! 2412 Select this if you want neither microMIPS nor SmartMIPS support
425 This hardware is capable of running !! 2413
>> 2414 config CPU_HAS_SMARTMIPS
>> 2415 depends on SYS_SUPPORTS_SMARTMIPS
>> 2416 bool "SmartMIPS"
>> 2417 help
>> 2418 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2419 increased security at both hardware and software level for
>> 2420 smartcards. Enabling this option will allow proper use of the
>> 2421 SmartMIPS instructions by Linux applications. However a kernel with
>> 2422 this option will not work on a MIPS core without SmartMIPS core. If
>> 2423 you don't know you probably don't have SmartMIPS and should say N
>> 2424 here.
>> 2425
>> 2426 config CPU_MICROMIPS
>> 2427 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2428 bool "microMIPS"
>> 2429 help
>> 2430 When this option is enabled the kernel will be built using the
>> 2431 microMIPS ISA
426 2432
427 endchoice 2433 endchoice
428 2434
429 config PLATFORM_NR_IRQS !! 2435 config CPU_HAS_MSA
>> 2436 bool "Support for the MIPS SIMD Architecture"
>> 2437 depends on CPU_SUPPORTS_MSA
>> 2438 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2439 help
>> 2440 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2441 and a set of SIMD instructions to operate on them. When this option
>> 2442 is enabled the kernel will support allocating & switching MSA
>> 2443 vector register contexts. If you know that your kernel will only be
>> 2444 running on CPUs which do not support MSA or that your userland will
>> 2445 not be making use of it then you may wish to say N here to reduce
>> 2446 the size & complexity of your kernel.
>> 2447
>> 2448 If unsure, say Y.
>> 2449
>> 2450 config CPU_HAS_WB
>> 2451 bool
>> 2452
>> 2453 config XKS01
>> 2454 bool
>> 2455
>> 2456 config CPU_HAS_RIXI
>> 2457 bool
>> 2458
>> 2459 #
>> 2460 # Vectored interrupt mode is an R2 feature
>> 2461 #
>> 2462 config CPU_MIPSR2_IRQ_VI
>> 2463 bool
>> 2464
>> 2465 #
>> 2466 # Extended interrupt mode is an R2 feature
>> 2467 #
>> 2468 config CPU_MIPSR2_IRQ_EI
>> 2469 bool
>> 2470
>> 2471 config CPU_HAS_SYNC
>> 2472 bool
>> 2473 depends on !CPU_R3000
>> 2474 default y
>> 2475
>> 2476 #
>> 2477 # CPU non-features
>> 2478 #
>> 2479 config CPU_DADDI_WORKAROUNDS
>> 2480 bool
>> 2481
>> 2482 config CPU_R4000_WORKAROUNDS
>> 2483 bool
>> 2484 select CPU_R4400_WORKAROUNDS
>> 2485
>> 2486 config CPU_R4400_WORKAROUNDS
>> 2487 bool
>> 2488
>> 2489 config MIPS_ASID_SHIFT
430 int 2490 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2491 default 6 if CPU_R3000 || CPU_TX39XX
>> 2492 default 4 if CPU_R8000
432 default 0 2493 default 0
433 2494
434 config XTENSA_CPU_CLOCK !! 2495 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2496 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2497 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2498 default 6 if CPU_R3000 || CPU_TX39XX
>> 2499 default 8
438 2500
439 config GENERIC_CALIBRATE_DELAY !! 2501 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2502 bool
>> 2503
>> 2504 config MIPS_CRC_SUPPORT
>> 2505 bool
>> 2506
>> 2507 #
>> 2508 # - Highmem only makes sense for the 32-bit kernel.
>> 2509 # - The current highmem code will only work properly on physically indexed
>> 2510 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2511 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2512 # moment we protect the user and offer the highmem option only on machines
>> 2513 # where it's known to be safe. This will not offer highmem on a few systems
>> 2514 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2515 # indexed CPUs but we're playing safe.
>> 2516 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2517 # know they might have memory configurations that could make use of highmem
>> 2518 # support.
>> 2519 #
>> 2520 config HIGHMEM
>> 2521 bool "High Memory Support"
>> 2522 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2523
>> 2524 config CPU_SUPPORTS_HIGHMEM
>> 2525 bool
>> 2526
>> 2527 config SYS_SUPPORTS_HIGHMEM
>> 2528 bool
>> 2529
>> 2530 config SYS_SUPPORTS_SMARTMIPS
>> 2531 bool
>> 2532
>> 2533 config SYS_SUPPORTS_MICROMIPS
>> 2534 bool
>> 2535
>> 2536 config SYS_SUPPORTS_MIPS16
>> 2537 bool
441 help 2538 help
442 The BogoMIPS value can easily be der !! 2539 This option must be set if a kernel might be executed on a MIPS16-
>> 2540 enabled CPU even if MIPS16 is not actually being used. In other
>> 2541 words, it makes the kernel MIPS16-tolerant.
443 2542
444 config CMDLINE_BOOL !! 2543 config CPU_SUPPORTS_MSA
445 bool "Default bootloader kernel argume !! 2544 bool
446 2545
447 config CMDLINE !! 2546 config ARCH_FLATMEM_ENABLE
448 string "Initial kernel command string" !! 2547 def_bool y
449 depends on CMDLINE_BOOL !! 2548 depends on !NUMA && !CPU_LOONGSON2
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2549
458 config USE_OF !! 2550 config ARCH_DISCONTIGMEM_ENABLE
459 bool "Flattened Device Tree support" !! 2551 bool
460 select OF !! 2552 default y if SGI_IP27
461 select OF_EARLY_FLATTREE <<
462 help 2553 help
463 Include support for flattened device !! 2554 Say Y to support efficient handling of discontiguous physical memory,
>> 2555 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2556 or have huge holes in the physical address space for other reasons.
>> 2557 See <file:Documentation/vm/numa.rst> for more.
>> 2558
>> 2559 config ARCH_SPARSEMEM_ENABLE
>> 2560 bool
>> 2561 select SPARSEMEM_STATIC
464 2562
465 config BUILTIN_DTB_SOURCE !! 2563 config NUMA
466 string "DTB to build into the kernel i !! 2564 bool "NUMA Support"
467 depends on OF !! 2565 depends on SYS_SUPPORTS_NUMA
>> 2566 help
>> 2567 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2568 Access). This option improves performance on systems with more
>> 2569 than two nodes; on two node systems it is generally better to
>> 2570 leave it disabled; on single node systems disable this option
>> 2571 disabled.
>> 2572
>> 2573 config SYS_SUPPORTS_NUMA
>> 2574 bool
468 2575
469 config PARSE_BOOTPARAM !! 2576 config RELOCATABLE
470 bool "Parse bootparam block" !! 2577 bool "Relocatable kernel"
>> 2578 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2579 help
>> 2580 This builds a kernel image that retains relocation information
>> 2581 so it can be loaded someplace besides the default 1MB.
>> 2582 The relocations make the kernel binary about 15% larger,
>> 2583 but are discarded at runtime
>> 2584
>> 2585 config RELOCATION_TABLE_SIZE
>> 2586 hex "Relocation table size"
>> 2587 depends on RELOCATABLE
>> 2588 range 0x0 0x01000000
>> 2589 default "0x00100000"
>> 2590 ---help---
>> 2591 A table of relocation data will be appended to the kernel binary
>> 2592 and parsed at boot to fix up the relocated kernel.
>> 2593
>> 2594 This option allows the amount of space reserved for the table to be
>> 2595 adjusted, although the default of 1Mb should be ok in most cases.
>> 2596
>> 2597 The build will fail and a valid size suggested if this is too small.
>> 2598
>> 2599 If unsure, leave at the default value.
>> 2600
>> 2601 config RANDOMIZE_BASE
>> 2602 bool "Randomize the address of the kernel image"
>> 2603 depends on RELOCATABLE
>> 2604 ---help---
>> 2605 Randomizes the physical and virtual address at which the
>> 2606 kernel image is loaded, as a security feature that
>> 2607 deters exploit attempts relying on knowledge of the location
>> 2608 of kernel internals.
>> 2609
>> 2610 Entropy is generated using any coprocessor 0 registers available.
>> 2611
>> 2612 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2613
>> 2614 If unsure, say N.
>> 2615
>> 2616 config RANDOMIZE_BASE_MAX_OFFSET
>> 2617 hex "Maximum kASLR offset" if EXPERT
>> 2618 depends on RANDOMIZE_BASE
>> 2619 range 0x0 0x40000000 if EVA || 64BIT
>> 2620 range 0x0 0x08000000
>> 2621 default "0x01000000"
>> 2622 ---help---
>> 2623 When kASLR is active, this provides the maximum offset that will
>> 2624 be applied to the kernel image. It should be set according to the
>> 2625 amount of physical RAM available in the target system minus
>> 2626 PHYSICAL_START and must be a power of 2.
>> 2627
>> 2628 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2629 EVA or 64-bit. The default is 16Mb.
>> 2630
>> 2631 config NODES_SHIFT
>> 2632 int
>> 2633 default "6"
>> 2634 depends on NEED_MULTIPLE_NODES
>> 2635
>> 2636 config HW_PERF_EVENTS
>> 2637 bool "Enable hardware performance counter support for perf events"
>> 2638 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
471 default y 2639 default y
472 help 2640 help
473 Parse parameters passed to the kerne !! 2641 Enable hardware performance counter support for perf events. If
474 be disabled if the kernel is known t !! 2642 disabled, perf events will use software events only.
475 2643
476 If unsure, say Y. !! 2644 source "mm/Kconfig"
477 2645
478 choice !! 2646 config SMP
479 prompt "Semihosting interface" !! 2647 bool "Multi-Processing support"
480 default XTENSA_SIMCALL_ISS !! 2648 depends on SYS_SUPPORTS_SMP
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2649 help
483 Choose semihosting interface that wi !! 2650 This enables support for systems with more than one CPU. If you have
484 block device and networking. !! 2651 a system with only one CPU, say N. If you have a system with more
>> 2652 than one CPU, say Y.
>> 2653
>> 2654 If you say N here, the kernel will run on uni- and multiprocessor
>> 2655 machines, but will use only one CPU of a multiprocessor machine. If
>> 2656 you say Y here, the kernel will run on many, but not all,
>> 2657 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2658 will run faster if you say N here.
485 2659
486 config XTENSA_SIMCALL_ISS !! 2660 People using multiprocessor machines who say Y here should also say
487 bool "simcall" !! 2661 Y to "Enhanced Real Time Clock Support", below.
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2662
492 config XTENSA_SIMCALL_GDBIO !! 2663 See also the SMP-HOWTO available at
493 bool "GDBIO" !! 2664 <http://www.tldp.org/docs.html#howto>.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 2665
498 endchoice !! 2666 If you don't know what to do here, say N.
499 2667
500 config BLK_DEV_SIMDISK !! 2668 config HOTPLUG_CPU
501 tristate "Host file-based simulated bl !! 2669 bool "Support for hot-pluggable CPUs"
502 default n !! 2670 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2671 help
541 There's a 2x16 LCD on most of XTFPGA !! 2672 Say Y here to allow turning CPUs off and on. CPUs can be
542 progress messages there during bootu !! 2673 controlled through /sys/devices/system/cpu.
543 during board bringup. !! 2674 (Note: power management support will enable this option
>> 2675 automatically on SMP systems. )
>> 2676 Say N if you want to disable CPU hotplug.
544 2677
545 If unsure, say N. !! 2678 config SMP_UP
>> 2679 bool
546 2680
547 config XTFPGA_LCD_BASE_ADDR !! 2681 config SYS_SUPPORTS_MIPS_CMP
548 hex "XTFPGA LCD base address" !! 2682 bool
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2683
617 If unsure, say N. !! 2684 config SYS_SUPPORTS_MIPS_CPS
>> 2685 bool
>> 2686
>> 2687 config SYS_SUPPORTS_SMP
>> 2688 bool
>> 2689
>> 2690 config NR_CPUS_DEFAULT_4
>> 2691 bool
>> 2692
>> 2693 config NR_CPUS_DEFAULT_8
>> 2694 bool
>> 2695
>> 2696 config NR_CPUS_DEFAULT_16
>> 2697 bool
618 2698
619 config MEMMAP_CACHEATTR !! 2699 config NR_CPUS_DEFAULT_32
620 hex "Cache attributes for the memory a !! 2700 bool
621 depends on !MMU !! 2701
622 default 0x22222222 !! 2702 config NR_CPUS_DEFAULT_64
623 help !! 2703 bool
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2704
683 If unsure, leave the default value h !! 2705 config NR_CPUS
>> 2706 int "Maximum number of CPUs (2-256)"
>> 2707 range 2 256
>> 2708 depends on SMP
>> 2709 default "4" if NR_CPUS_DEFAULT_4
>> 2710 default "8" if NR_CPUS_DEFAULT_8
>> 2711 default "16" if NR_CPUS_DEFAULT_16
>> 2712 default "32" if NR_CPUS_DEFAULT_32
>> 2713 default "64" if NR_CPUS_DEFAULT_64
>> 2714 help
>> 2715 This allows you to specify the maximum number of CPUs which this
>> 2716 kernel will support. The maximum supported value is 32 for 32-bit
>> 2717 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2718 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2719 and 2 for all others.
>> 2720
>> 2721 This is purely to save memory - each supported CPU adds
>> 2722 approximately eight kilobytes to the kernel image. For best
>> 2723 performance should round up your number of processors to the next
>> 2724 power of two.
>> 2725
>> 2726 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2727 bool
>> 2728
>> 2729 config MIPS_NR_CPU_NR_MAP_1024
>> 2730 bool
>> 2731
>> 2732 config MIPS_NR_CPU_NR_MAP
>> 2733 int
>> 2734 depends on SMP
>> 2735 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2736 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2737
>> 2738 #
>> 2739 # Timer Interrupt Frequency Configuration
>> 2740 #
684 2741
685 choice 2742 choice
686 prompt "Relocatable vectors location" !! 2743 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2744 default HZ_250
688 help 2745 help
689 Choose whether relocatable vectors a !! 2746 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2747
691 configurations without VECBASE regis !! 2748 config HZ_24
692 placed at their hardware-defined loc !! 2749 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2750
694 config XTENSA_VECTORS_IN_TEXT !! 2751 config HZ_48
695 bool "Merge relocatable vectors into k !! 2752 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2753
697 help !! 2754 config HZ_100
698 This option puts relocatable vectors !! 2755 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2756
700 This is a safe choice for most confi !! 2757 config HZ_128
701 !! 2758 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2759
703 bool "Put relocatable vectors at fixed !! 2760 config HZ_250
704 help !! 2761 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2762
706 Vectors are merged with the .init da !! 2763 config HZ_256
707 are copied into their designated loc !! 2764 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2765
709 XIP-aware MTD support. !! 2766 config HZ_1000
>> 2767 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2768
>> 2769 config HZ_1024
>> 2770 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2771
711 endchoice 2772 endchoice
712 2773
713 config VECTORS_ADDR !! 2774 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2775 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2776
729 config PLATFORM_WANT_DEFAULT_MEM !! 2777 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2778 bool
>> 2779
>> 2780 config SYS_SUPPORTS_100HZ
>> 2781 bool
>> 2782
>> 2783 config SYS_SUPPORTS_128HZ
>> 2784 bool
>> 2785
>> 2786 config SYS_SUPPORTS_250HZ
>> 2787 bool
>> 2788
>> 2789 config SYS_SUPPORTS_256HZ
>> 2790 bool
>> 2791
>> 2792 config SYS_SUPPORTS_1000HZ
>> 2793 bool
>> 2794
>> 2795 config SYS_SUPPORTS_1024HZ
>> 2796 bool
>> 2797
>> 2798 config SYS_SUPPORTS_ARBIT_HZ
>> 2799 bool
>> 2800 default y if !SYS_SUPPORTS_24HZ && \
>> 2801 !SYS_SUPPORTS_48HZ && \
>> 2802 !SYS_SUPPORTS_100HZ && \
>> 2803 !SYS_SUPPORTS_128HZ && \
>> 2804 !SYS_SUPPORTS_250HZ && \
>> 2805 !SYS_SUPPORTS_256HZ && \
>> 2806 !SYS_SUPPORTS_1000HZ && \
>> 2807 !SYS_SUPPORTS_1024HZ
731 2808
732 config DEFAULT_MEM_START !! 2809 config HZ
733 hex !! 2810 int
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2811 default 24 if HZ_24
735 default 0x60000000 if PLATFORM_WANT_DE !! 2812 default 48 if HZ_48
736 default 0x00000000 !! 2813 default 100 if HZ_100
>> 2814 default 128 if HZ_128
>> 2815 default 250 if HZ_250
>> 2816 default 256 if HZ_256
>> 2817 default 1000 if HZ_1000
>> 2818 default 1024 if HZ_1024
>> 2819
>> 2820 config SCHED_HRTICK
>> 2821 def_bool HIGH_RES_TIMERS
>> 2822
>> 2823 source "kernel/Kconfig.preempt"
>> 2824
>> 2825 config KEXEC
>> 2826 bool "Kexec system call"
>> 2827 select KEXEC_CORE
>> 2828 help
>> 2829 kexec is a system call that implements the ability to shutdown your
>> 2830 current kernel, and to start another kernel. It is like a reboot
>> 2831 but it is independent of the system firmware. And like a reboot
>> 2832 you can start any kernel with it, not just Linux.
>> 2833
>> 2834 The name comes from the similarity to the exec system call.
>> 2835
>> 2836 It is an ongoing process to be certain the hardware in a machine
>> 2837 is properly shutdown, so do not be surprised if this code does not
>> 2838 initially work for you. As of this writing the exact hardware
>> 2839 interface is strongly in flux, so no good recommendation can be
>> 2840 made.
>> 2841
>> 2842 config CRASH_DUMP
>> 2843 bool "Kernel crash dumps"
>> 2844 help
>> 2845 Generate crash dump after being started by kexec.
>> 2846 This should be normally only set in special crash dump kernels
>> 2847 which are loaded in the main kernel with kexec-tools into
>> 2848 a specially reserved region and then later executed after
>> 2849 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2850 to a memory address not used by the main kernel or firmware using
>> 2851 PHYSICAL_START.
>> 2852
>> 2853 config PHYSICAL_START
>> 2854 hex "Physical address where the kernel is loaded"
>> 2855 default "0xffffffff84000000"
>> 2856 depends on CRASH_DUMP
>> 2857 help
>> 2858 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2859 If you plan to use kernel for capturing the crash dump change
>> 2860 this value to start of the reserved region (the "X" value as
>> 2861 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2862 passed to the panic-ed kernel).
>> 2863
>> 2864 config SECCOMP
>> 2865 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2866 depends on PROC_FS
>> 2867 default y
737 help 2868 help
738 This is the base address used for bo !! 2869 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2870 that may need to compute untrusted bytecode during their
>> 2871 execution. By using pipes or other transports made available to
>> 2872 the process as file descriptors supporting the read/write
>> 2873 syscalls, it's possible to isolate those applications in
>> 2874 their own address space using seccomp. Once seccomp is
>> 2875 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2876 and the task is only allowed to execute a few safe syscalls
>> 2877 defined by each seccomp mode.
>> 2878
>> 2879 If unsure, say Y. Only embedded should say N here.
>> 2880
>> 2881 config MIPS_O32_FP64_SUPPORT
>> 2882 bool "Support for O32 binaries using 64-bit FP"
>> 2883 depends on 32BIT || MIPS32_O32
>> 2884 help
>> 2885 When this is enabled, the kernel will support use of 64-bit floating
>> 2886 point registers with binaries using the O32 ABI along with the
>> 2887 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2888 32-bit MIPS systems this support is at the cost of increasing the
>> 2889 size and complexity of the compiled FPU emulator. Thus if you are
>> 2890 running a MIPS32 system and know that none of your userland binaries
>> 2891 will require 64-bit floating point, you may wish to reduce the size
>> 2892 of your kernel & potentially improve FP emulation performance by
>> 2893 saying N here.
>> 2894
>> 2895 Although binutils currently supports use of this flag the details
>> 2896 concerning its effect upon the O32 ABI in userland are still being
>> 2897 worked on. In order to avoid userland becoming dependant upon current
>> 2898 behaviour before the details have been finalised, this option should
>> 2899 be considered experimental and only enabled by those working upon
>> 2900 said details.
740 2901
741 If unsure, leave the default value h !! 2902 If unsure, say N.
>> 2903
>> 2904 config USE_OF
>> 2905 bool
>> 2906 select OF
>> 2907 select OF_EARLY_FLATTREE
>> 2908 select IRQ_DOMAIN
>> 2909
>> 2910 config BUILTIN_DTB
>> 2911 bool
742 2912
743 choice 2913 choice
744 prompt "KSEG layout" !! 2914 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2915 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2916
>> 2917 config MIPS_NO_APPENDED_DTB
>> 2918 bool "None"
>> 2919 help
>> 2920 Do not enable appended dtb support.
>> 2921
>> 2922 config MIPS_ELF_APPENDED_DTB
>> 2923 bool "vmlinux"
>> 2924 help
>> 2925 With this option, the boot code will look for a device tree binary
>> 2926 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2927 it is empty and the DTB can be appended using binutils command
>> 2928 objcopy:
>> 2929
>> 2930 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2931
>> 2932 This is meant as a backward compatiblity convenience for those
>> 2933 systems with a bootloader that can't be upgraded to accommodate
>> 2934 the documented boot protocol using a device tree.
>> 2935
>> 2936 config MIPS_RAW_APPENDED_DTB
>> 2937 bool "vmlinux.bin or vmlinuz.bin"
>> 2938 help
>> 2939 With this option, the boot code will look for a device tree binary
>> 2940 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2941 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2942
>> 2943 This is meant as a backward compatibility convenience for those
>> 2944 systems with a bootloader that can't be upgraded to accommodate
>> 2945 the documented boot protocol using a device tree.
>> 2946
>> 2947 Beware that there is very little in terms of protection against
>> 2948 this option being confused by leftover garbage in memory that might
>> 2949 look like a DTB header after a reboot if no actual DTB is appended
>> 2950 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2951 if you don't intend to always append a DTB.
772 endchoice 2952 endchoice
773 2953
774 config HIGHMEM !! 2954 choice
775 bool "High Memory Support" !! 2955 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2956 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2957 !MIPS_MALTA && \
>> 2958 !CAVIUM_OCTEON_SOC
>> 2959 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2960
>> 2961 config MIPS_CMDLINE_FROM_DTB
>> 2962 depends on USE_OF
>> 2963 bool "Dtb kernel arguments if available"
>> 2964
>> 2965 config MIPS_CMDLINE_DTB_EXTEND
>> 2966 depends on USE_OF
>> 2967 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2968
>> 2969 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2970 bool "Bootloader kernel arguments if available"
>> 2971
>> 2972 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2973 depends on CMDLINE_BOOL
>> 2974 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2975 endchoice
>> 2976
>> 2977 endmenu
>> 2978
>> 2979 config LOCKDEP_SUPPORT
>> 2980 bool
>> 2981 default y
>> 2982
>> 2983 config STACKTRACE_SUPPORT
>> 2984 bool
>> 2985 default y
>> 2986
>> 2987 config HAVE_LATENCYTOP_SUPPORT
>> 2988 bool
>> 2989 default y
>> 2990
>> 2991 config PGTABLE_LEVELS
>> 2992 int
>> 2993 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2994 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2995 default 2
>> 2996
>> 2997 source "init/Kconfig"
>> 2998
>> 2999 source "kernel/Kconfig.freezer"
>> 3000
>> 3001 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3002
>> 3003 config HW_HAS_EISA
>> 3004 bool
>> 3005 config HW_HAS_PCI
>> 3006 bool
>> 3007
>> 3008 config PCI
>> 3009 bool "Support for PCI controller"
>> 3010 depends on HW_HAS_PCI
>> 3011 select PCI_DOMAINS
>> 3012 help
>> 3013 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3014 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3015 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3016 say Y, otherwise N.
>> 3017
>> 3018 config HT_PCI
>> 3019 bool "Support for HT-linked PCI"
>> 3020 default y
>> 3021 depends on CPU_LOONGSON3
>> 3022 select PCI
>> 3023 select PCI_DOMAINS
>> 3024 help
>> 3025 Loongson family machines use Hyper-Transport bus for inter-core
>> 3026 connection and device connection. The PCI bus is a subordinate
>> 3027 linked at HT. Choose Y for Loongson-3 based machines.
>> 3028
>> 3029 config PCI_DOMAINS
>> 3030 bool
>> 3031
>> 3032 config PCI_DOMAINS_GENERIC
>> 3033 bool
>> 3034
>> 3035 config PCI_DRIVERS_GENERIC
>> 3036 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3037 bool
>> 3038
>> 3039 config PCI_DRIVERS_LEGACY
>> 3040 def_bool !PCI_DRIVERS_GENERIC
>> 3041 select NO_GENERIC_PCI_IOPORT_MAP
>> 3042
>> 3043 source "drivers/pci/Kconfig"
>> 3044
>> 3045 #
>> 3046 # ISA support is now enabled via select. Too many systems still have the one
>> 3047 # or other ISA chip on the board that users don't know about so don't expect
>> 3048 # users to choose the right thing ...
>> 3049 #
>> 3050 config ISA
>> 3051 bool
>> 3052
>> 3053 config EISA
>> 3054 bool "EISA support"
>> 3055 depends on HW_HAS_EISA
>> 3056 select ISA
>> 3057 select GENERIC_ISA_DMA
>> 3058 ---help---
>> 3059 The Extended Industry Standard Architecture (EISA) bus was
>> 3060 developed as an open alternative to the IBM MicroChannel bus.
>> 3061
>> 3062 The EISA bus provided some of the features of the IBM MicroChannel
>> 3063 bus while maintaining backward compatibility with cards made for
>> 3064 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3065 1995 when it was made obsolete by the PCI bus.
>> 3066
>> 3067 Say Y here if you are building a kernel for an EISA-based machine.
>> 3068
>> 3069 Otherwise, say N.
>> 3070
>> 3071 source "drivers/eisa/Kconfig"
>> 3072
>> 3073 config TC
>> 3074 bool "TURBOchannel support"
>> 3075 depends on MACH_DECSTATION
>> 3076 help
>> 3077 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3078 processors. TURBOchannel programming specifications are available
>> 3079 at:
>> 3080 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3081 and:
>> 3082 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3083 Linux driver support status is documented at:
>> 3084 <http://www.linux-mips.org/wiki/DECstation>
>> 3085
>> 3086 config MMU
>> 3087 bool
>> 3088 default y
>> 3089
>> 3090 config ARCH_MMAP_RND_BITS_MIN
>> 3091 default 12 if 64BIT
>> 3092 default 8
>> 3093
>> 3094 config ARCH_MMAP_RND_BITS_MAX
>> 3095 default 18 if 64BIT
>> 3096 default 15
>> 3097
>> 3098 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3099 default 8
>> 3100
>> 3101 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3102 default 15
>> 3103
>> 3104 config I8253
>> 3105 bool
>> 3106 select CLKSRC_I8253
>> 3107 select CLKEVT_I8253
>> 3108 select MIPS_EXTERNAL_TIMER
>> 3109
>> 3110 config ZONE_DMA
>> 3111 bool
>> 3112
>> 3113 config ZONE_DMA32
>> 3114 bool
>> 3115
>> 3116 source "drivers/pcmcia/Kconfig"
>> 3117
>> 3118 config RAPIDIO
>> 3119 tristate "RapidIO support"
>> 3120 depends on PCI
>> 3121 default n
778 help 3122 help
779 Linux can use the full amount of RAM !! 3123 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3124 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3125
782 at 0xd0000000 (cached) and 0xd800000 !! 3126 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3127
784 all of it can be "permanently mapped !! 3128 endmenu
785 The physical memory that's not perma !! 3129
786 "high memory". !! 3130 menu "Executable file formats"
787 !! 3131
788 If you are compiling a kernel which !! 3132 source "fs/Kconfig.binfmt"
789 machine with more than 128 MB total !! 3133
790 N here. !! 3134 config TRAD_SIGNALS
>> 3135 bool
>> 3136
>> 3137 config MIPS32_COMPAT
>> 3138 bool
>> 3139
>> 3140 config COMPAT
>> 3141 bool
>> 3142
>> 3143 config SYSVIPC_COMPAT
>> 3144 bool
>> 3145
>> 3146 config MIPS32_O32
>> 3147 bool "Kernel support for o32 binaries"
>> 3148 depends on 64BIT
>> 3149 select ARCH_WANT_OLD_COMPAT_IPC
>> 3150 select COMPAT
>> 3151 select MIPS32_COMPAT
>> 3152 select SYSVIPC_COMPAT if SYSVIPC
>> 3153 help
>> 3154 Select this option if you want to run o32 binaries. These are pure
>> 3155 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3156 existing binaries are in this format.
791 3157
792 If unsure, say Y. 3158 If unsure, say Y.
793 3159
794 config ARCH_FORCE_MAX_ORDER !! 3160 config MIPS32_N32
795 int "Order of maximal physically conti !! 3161 bool "Kernel support for n32 binaries"
796 default "10" !! 3162 depends on 64BIT
797 help !! 3163 select COMPAT
798 The kernel page allocator limits the !! 3164 select MIPS32_COMPAT
799 contiguous allocations. The limit is !! 3165 select SYSVIPC_COMPAT if SYSVIPC
800 defines the maximal power of two of !! 3166 help
801 allocated as a single contiguous blo !! 3167 Select this option if you want to run n32 binaries. These are
802 overriding the default setting when !! 3168 64-bit binaries using 32-bit quantities for addressing and certain
803 large blocks of physically contiguou !! 3169 data that would normally be 64-bit. They are used in special
>> 3170 cases.
804 3171
805 Don't change if unsure. !! 3172 If unsure, say N.
>> 3173
>> 3174 config BINFMT_ELF32
>> 3175 bool
>> 3176 default y if MIPS32_O32 || MIPS32_N32
>> 3177 select ELFCORE
806 3178
807 endmenu 3179 endmenu
808 3180
809 menu "Power management options" 3181 menu "Power management options"
810 3182
811 config ARCH_HIBERNATION_POSSIBLE 3183 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3184 def_bool y
>> 3185 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3186
>> 3187 config ARCH_SUSPEND_POSSIBLE
>> 3188 def_bool y
>> 3189 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3190
814 source "kernel/power/Kconfig" 3191 source "kernel/power/Kconfig"
815 3192
816 endmenu 3193 endmenu
>> 3194
>> 3195 config MIPS_EXTERNAL_TIMER
>> 3196 bool
>> 3197
>> 3198 menu "CPU Power Management"
>> 3199
>> 3200 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3201 source "drivers/cpufreq/Kconfig"
>> 3202 endif
>> 3203
>> 3204 source "drivers/cpuidle/Kconfig"
>> 3205
>> 3206 endmenu
>> 3207
>> 3208 source "net/Kconfig"
>> 3209
>> 3210 source "drivers/Kconfig"
>> 3211
>> 3212 source "drivers/firmware/Kconfig"
>> 3213
>> 3214 source "fs/Kconfig"
>> 3215
>> 3216 source "arch/mips/Kconfig.debug"
>> 3217
>> 3218 source "security/Kconfig"
>> 3219
>> 3220 source "crypto/Kconfig"
>> 3221
>> 3222 source "lib/Kconfig"
>> 3223
>> 3224 source "arch/mips/kvm/Kconfig"
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