1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_BINFMT_ELF_STATE
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_HAS_CPU_FINALIZE_INIT
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_DISCARD_MEMBLOCK
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_HAS_ELF_RANDOMIZE
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
11 select ARCH_HAS_KCOV !! 11 select ARCH_SUPPORTS_UPROBES
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_USE_BUILTIN_BSWAP
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
14 select ARCH_HAS_DMA_SET_UNCACHED if MM <<
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 15 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 16 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 17 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 18 select CLONE_BACKWARDS
24 select COMMON_CLK !! 19 select CPU_PM if CPU_IDLE
25 select DMA_NONCOHERENT_MMAP if MMU !! 20 select DMA_DIRECT_OPS
26 select GENERIC_ATOMIC64 !! 21 select GENERIC_ATOMIC64 if !64BIT
>> 22 select GENERIC_CLOCKEVENTS
>> 23 select GENERIC_CMOS_UPDATE
>> 24 select GENERIC_CPU_AUTOPROBE
>> 25 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 26 select GENERIC_IRQ_SHOW
>> 27 select GENERIC_LIB_ASHLDI3
>> 28 select GENERIC_LIB_ASHRDI3
28 select GENERIC_LIB_CMPDI2 29 select GENERIC_LIB_CMPDI2
29 select GENERIC_LIB_MULDI3 !! 30 select GENERIC_LIB_LSHRDI3
30 select GENERIC_LIB_UCMPDI2 31 select GENERIC_LIB_UCMPDI2
31 select GENERIC_PCI_IOMAP 32 select GENERIC_PCI_IOMAP
32 select GENERIC_SCHED_CLOCK !! 33 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
33 select GENERIC_IOREMAP if MMU !! 34 select GENERIC_SMP_IDLE_THREAD
34 select HAVE_ARCH_AUDITSYSCALL !! 35 select GENERIC_TIME_VSYSCALL
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 36 select HANDLE_DOMAIN_IRQ
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 37 select HAVE_ARCH_COMPILER_H
37 select HAVE_ARCH_KCSAN !! 38 select HAVE_ARCH_JUMP_LABEL
>> 39 select HAVE_ARCH_KGDB
>> 40 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 41 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 42 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 43 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 44 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 45 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 46 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 47 select HAVE_CONTEXT_TRACKING
>> 48 select HAVE_COPY_THREAD_TLS
>> 49 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 50 select HAVE_DEBUG_KMEMLEAK
>> 51 select HAVE_DEBUG_STACKOVERFLOW
43 select HAVE_DMA_CONTIGUOUS 52 select HAVE_DMA_CONTIGUOUS
>> 53 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 54 select HAVE_EXIT_THREAD
>> 55 select HAVE_FTRACE_MCOUNT_RECORD
>> 56 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 57 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 58 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 59 select HAVE_IDE
>> 60 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 61 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 62 select HAVE_KPROBES
50 select HAVE_PCI !! 63 select HAVE_KRETPROBES
>> 64 select HAVE_MEMBLOCK
>> 65 select HAVE_MEMBLOCK_NODE_MAP
>> 66 select HAVE_MOD_ARCH_SPECIFIC
>> 67 select HAVE_NMI
>> 68 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 69 select HAVE_PERF_EVENTS
>> 70 select HAVE_REGS_AND_STACK_ACCESS_API
>> 71 select HAVE_RSEQ
52 select HAVE_STACKPROTECTOR 72 select HAVE_STACKPROTECTOR
53 select HAVE_SYSCALL_TRACEPOINTS 73 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 74 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
55 select IRQ_DOMAIN !! 75 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 76 select MODULES_USE_ELF_RELA if MODULES && 64BIT
57 select MODULES_USE_ELF_RELA !! 77 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 78 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 79 select RTC_LIB if !MACH_LOONGSON64
>> 80 select SYSCTL_EXCEPTION_TRACE
>> 81 select VIRT_TO_BUS
>> 82
>> 83 menu "Machine selection"
>> 84
>> 85 choice
>> 86 prompt "System type"
>> 87 default MIPS_GENERIC
>> 88
>> 89 config MIPS_GENERIC
>> 90 bool "Generic board-agnostic MIPS kernel"
>> 91 select BOOT_RAW
>> 92 select BUILTIN_DTB
>> 93 select CEVT_R4K
>> 94 select CLKSRC_MIPS_GIC
>> 95 select COMMON_CLK
>> 96 select CPU_MIPSR2_IRQ_VI
>> 97 select CPU_MIPSR2_IRQ_EI
>> 98 select CSRC_R4K
>> 99 select DMA_PERDEV_COHERENT
>> 100 select HW_HAS_PCI
>> 101 select IRQ_MIPS_CPU
>> 102 select LIBFDT
>> 103 select MIPS_AUTO_PFN_OFFSET
>> 104 select MIPS_CPU_SCACHE
>> 105 select MIPS_GIC
>> 106 select MIPS_L1_CACHE_SHIFT_7
>> 107 select NO_EXCEPT_FILL
>> 108 select PCI_DRIVERS_GENERIC
>> 109 select PINCTRL
>> 110 select SMP_UP if SMP
>> 111 select SWAP_IO_SPACE
>> 112 select SYS_HAS_CPU_MIPS32_R1
>> 113 select SYS_HAS_CPU_MIPS32_R2
>> 114 select SYS_HAS_CPU_MIPS32_R6
>> 115 select SYS_HAS_CPU_MIPS64_R1
>> 116 select SYS_HAS_CPU_MIPS64_R2
>> 117 select SYS_HAS_CPU_MIPS64_R6
>> 118 select SYS_SUPPORTS_32BIT_KERNEL
>> 119 select SYS_SUPPORTS_64BIT_KERNEL
>> 120 select SYS_SUPPORTS_BIG_ENDIAN
>> 121 select SYS_SUPPORTS_HIGHMEM
>> 122 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 123 select SYS_SUPPORTS_MICROMIPS
>> 124 select SYS_SUPPORTS_MIPS_CPS
>> 125 select SYS_SUPPORTS_MIPS16
>> 126 select SYS_SUPPORTS_MULTITHREADING
>> 127 select SYS_SUPPORTS_RELOCATABLE
>> 128 select SYS_SUPPORTS_SMARTMIPS
>> 129 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 130 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 131 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 132 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 133 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 134 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 135 select USE_OF
>> 136 help
>> 137 Select this to build a kernel which aims to support multiple boards,
>> 138 generally using a flattened device tree passed from the bootloader
>> 139 using the boot protocol defined in the UHI (Unified Hosting
>> 140 Interface) specification.
>> 141
>> 142 config MIPS_ALCHEMY
>> 143 bool "Alchemy processor based machines"
>> 144 select PHYS_ADDR_T_64BIT
>> 145 select CEVT_R4K
>> 146 select CSRC_R4K
>> 147 select IRQ_MIPS_CPU
>> 148 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 149 select SYS_HAS_CPU_MIPS32_R1
>> 150 select SYS_SUPPORTS_32BIT_KERNEL
>> 151 select SYS_SUPPORTS_APM_EMULATION
>> 152 select GPIOLIB
>> 153 select SYS_SUPPORTS_ZBOOT
>> 154 select COMMON_CLK
>> 155
>> 156 config AR7
>> 157 bool "Texas Instruments AR7"
>> 158 select BOOT_ELF32
>> 159 select DMA_NONCOHERENT
>> 160 select CEVT_R4K
>> 161 select CSRC_R4K
>> 162 select IRQ_MIPS_CPU
>> 163 select NO_EXCEPT_FILL
>> 164 select SWAP_IO_SPACE
>> 165 select SYS_HAS_CPU_MIPS32_R1
>> 166 select SYS_HAS_EARLY_PRINTK
>> 167 select SYS_SUPPORTS_32BIT_KERNEL
>> 168 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 169 select SYS_SUPPORTS_MIPS16
>> 170 select SYS_SUPPORTS_ZBOOT_UART16550
>> 171 select GPIOLIB
>> 172 select VLYNQ
>> 173 select HAVE_CLK
>> 174 help
>> 175 Support for the Texas Instruments AR7 System-on-a-Chip
>> 176 family: TNETD7100, 7200 and 7300.
>> 177
>> 178 config ATH25
>> 179 bool "Atheros AR231x/AR531x SoC support"
>> 180 select CEVT_R4K
>> 181 select CSRC_R4K
>> 182 select DMA_NONCOHERENT
>> 183 select IRQ_MIPS_CPU
>> 184 select IRQ_DOMAIN
>> 185 select SYS_HAS_CPU_MIPS32_R1
>> 186 select SYS_SUPPORTS_BIG_ENDIAN
>> 187 select SYS_SUPPORTS_32BIT_KERNEL
>> 188 select SYS_HAS_EARLY_PRINTK
>> 189 help
>> 190 Support for Atheros AR231x and Atheros AR531x based boards
>> 191
>> 192 config ATH79
>> 193 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 194 select ARCH_HAS_RESET_CONTROLLER
>> 195 select BOOT_RAW
>> 196 select CEVT_R4K
>> 197 select CSRC_R4K
>> 198 select DMA_NONCOHERENT
>> 199 select GPIOLIB
>> 200 select PINCTRL
>> 201 select HAVE_CLK
>> 202 select COMMON_CLK
>> 203 select CLKDEV_LOOKUP
>> 204 select IRQ_MIPS_CPU
>> 205 select MIPS_MACHINE
>> 206 select SYS_HAS_CPU_MIPS32_R2
>> 207 select SYS_HAS_EARLY_PRINTK
>> 208 select SYS_SUPPORTS_32BIT_KERNEL
>> 209 select SYS_SUPPORTS_BIG_ENDIAN
>> 210 select SYS_SUPPORTS_MIPS16
>> 211 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 212 select USE_OF
>> 213 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 214 help
>> 215 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 216
>> 217 config BMIPS_GENERIC
>> 218 bool "Broadcom Generic BMIPS kernel"
>> 219 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 220 select ARCH_HAS_PHYS_TO_DMA
>> 221 select BOOT_RAW
>> 222 select NO_EXCEPT_FILL
>> 223 select USE_OF
>> 224 select CEVT_R4K
>> 225 select CSRC_R4K
>> 226 select SYNC_R4K
>> 227 select COMMON_CLK
>> 228 select BCM6345_L1_IRQ
>> 229 select BCM7038_L1_IRQ
>> 230 select BCM7120_L2_IRQ
>> 231 select BRCMSTB_L2_IRQ
>> 232 select IRQ_MIPS_CPU
>> 233 select DMA_NONCOHERENT
>> 234 select SYS_SUPPORTS_32BIT_KERNEL
>> 235 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 236 select SYS_SUPPORTS_BIG_ENDIAN
>> 237 select SYS_SUPPORTS_HIGHMEM
>> 238 select SYS_HAS_CPU_BMIPS32_3300
>> 239 select SYS_HAS_CPU_BMIPS4350
>> 240 select SYS_HAS_CPU_BMIPS4380
>> 241 select SYS_HAS_CPU_BMIPS5000
>> 242 select SWAP_IO_SPACE
>> 243 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 244 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 245 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 246 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 247 select HARDIRQS_SW_RESEND
>> 248 help
>> 249 Build a generic DT-based kernel image that boots on select
>> 250 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 251 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 252 must be set appropriately for your board.
>> 253
>> 254 config BCM47XX
>> 255 bool "Broadcom BCM47XX based boards"
>> 256 select BOOT_RAW
>> 257 select CEVT_R4K
>> 258 select CSRC_R4K
>> 259 select DMA_NONCOHERENT
>> 260 select HW_HAS_PCI
>> 261 select IRQ_MIPS_CPU
>> 262 select SYS_HAS_CPU_MIPS32_R1
>> 263 select NO_EXCEPT_FILL
>> 264 select SYS_SUPPORTS_32BIT_KERNEL
>> 265 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 266 select SYS_SUPPORTS_MIPS16
>> 267 select SYS_SUPPORTS_ZBOOT
>> 268 select SYS_HAS_EARLY_PRINTK
>> 269 select USE_GENERIC_EARLY_PRINTK_8250
>> 270 select GPIOLIB
>> 271 select LEDS_GPIO_REGISTER
>> 272 select BCM47XX_NVRAM
>> 273 select BCM47XX_SPROM
>> 274 select BCM47XX_SSB if !BCM47XX_BCMA
>> 275 help
>> 276 Support for BCM47XX based boards
>> 277
>> 278 config BCM63XX
>> 279 bool "Broadcom BCM63XX based boards"
>> 280 select BOOT_RAW
>> 281 select CEVT_R4K
>> 282 select CSRC_R4K
>> 283 select SYNC_R4K
>> 284 select DMA_NONCOHERENT
>> 285 select IRQ_MIPS_CPU
>> 286 select SYS_SUPPORTS_32BIT_KERNEL
>> 287 select SYS_SUPPORTS_BIG_ENDIAN
>> 288 select SYS_HAS_EARLY_PRINTK
>> 289 select SYS_HAS_CPU_BMIPS32_3300
>> 290 select SYS_HAS_CPU_BMIPS4350
>> 291 select SYS_HAS_CPU_BMIPS4380
>> 292 select SWAP_IO_SPACE
>> 293 select GPIOLIB
>> 294 select HAVE_CLK
>> 295 select MIPS_L1_CACHE_SHIFT_4
>> 296 select CLKDEV_LOOKUP
>> 297 help
>> 298 Support for BCM63XX based boards
>> 299
>> 300 config MIPS_COBALT
>> 301 bool "Cobalt Server"
>> 302 select CEVT_R4K
>> 303 select CSRC_R4K
>> 304 select CEVT_GT641XX
>> 305 select DMA_NONCOHERENT
>> 306 select HW_HAS_PCI
>> 307 select I8253
>> 308 select I8259
>> 309 select IRQ_MIPS_CPU
>> 310 select IRQ_GT641XX
>> 311 select PCI_GT64XXX_PCI0
>> 312 select PCI
>> 313 select SYS_HAS_CPU_NEVADA
>> 314 select SYS_HAS_EARLY_PRINTK
>> 315 select SYS_SUPPORTS_32BIT_KERNEL
>> 316 select SYS_SUPPORTS_64BIT_KERNEL
>> 317 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 318 select USE_GENERIC_EARLY_PRINTK_8250
>> 319
>> 320 config MACH_DECSTATION
>> 321 bool "DECstations"
>> 322 select BOOT_ELF32
>> 323 select CEVT_DS1287
>> 324 select CEVT_R4K if CPU_R4X00
>> 325 select CSRC_IOASIC
>> 326 select CSRC_R4K if CPU_R4X00
>> 327 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 328 select CPU_R4000_WORKAROUNDS if 64BIT
>> 329 select CPU_R4400_WORKAROUNDS if 64BIT
>> 330 select DMA_NONCOHERENT
>> 331 select NO_IOPORT_MAP
>> 332 select IRQ_MIPS_CPU
>> 333 select SYS_HAS_CPU_R3000
>> 334 select SYS_HAS_CPU_R4X00
>> 335 select SYS_SUPPORTS_32BIT_KERNEL
>> 336 select SYS_SUPPORTS_64BIT_KERNEL
>> 337 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 338 select SYS_SUPPORTS_128HZ
>> 339 select SYS_SUPPORTS_256HZ
>> 340 select SYS_SUPPORTS_1024HZ
>> 341 select MIPS_L1_CACHE_SHIFT_4
>> 342 help
>> 343 This enables support for DEC's MIPS based workstations. For details
>> 344 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 345 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 346
>> 347 If you have one of the following DECstation Models you definitely
>> 348 want to choose R4xx0 for the CPU Type:
>> 349
>> 350 DECstation 5000/50
>> 351 DECstation 5000/150
>> 352 DECstation 5000/260
>> 353 DECsystem 5900/260
>> 354
>> 355 otherwise choose R3000.
>> 356
>> 357 config MACH_JAZZ
>> 358 bool "Jazz family of machines"
>> 359 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 360 select ARCH_MIGHT_HAVE_PC_SERIO
>> 361 select FW_ARC
>> 362 select FW_ARC32
>> 363 select ARCH_MAY_HAVE_PC_FDC
>> 364 select CEVT_R4K
>> 365 select CSRC_R4K
>> 366 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 367 select GENERIC_ISA_DMA
>> 368 select HAVE_PCSPKR_PLATFORM
>> 369 select IRQ_MIPS_CPU
>> 370 select I8253
>> 371 select I8259
>> 372 select ISA
>> 373 select SYS_HAS_CPU_R4X00
>> 374 select SYS_SUPPORTS_32BIT_KERNEL
>> 375 select SYS_SUPPORTS_64BIT_KERNEL
>> 376 select SYS_SUPPORTS_100HZ
>> 377 help
>> 378 This a family of machines based on the MIPS R4030 chipset which was
>> 379 used by several vendors to build RISC/os and Windows NT workstations.
>> 380 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 381 Olivetti M700-10 workstations.
>> 382
>> 383 config MACH_INGENIC
>> 384 bool "Ingenic SoC based machines"
>> 385 select SYS_SUPPORTS_32BIT_KERNEL
>> 386 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 387 select SYS_SUPPORTS_ZBOOT_UART16550
>> 388 select DMA_NONCOHERENT
>> 389 select IRQ_MIPS_CPU
>> 390 select PINCTRL
>> 391 select GPIOLIB
>> 392 select COMMON_CLK
>> 393 select GENERIC_IRQ_CHIP
>> 394 select BUILTIN_DTB
>> 395 select USE_OF
>> 396 select LIBFDT
>> 397
>> 398 config LANTIQ
>> 399 bool "Lantiq based platforms"
>> 400 select DMA_NONCOHERENT
>> 401 select IRQ_MIPS_CPU
>> 402 select CEVT_R4K
>> 403 select CSRC_R4K
>> 404 select SYS_HAS_CPU_MIPS32_R1
>> 405 select SYS_HAS_CPU_MIPS32_R2
>> 406 select SYS_SUPPORTS_BIG_ENDIAN
>> 407 select SYS_SUPPORTS_32BIT_KERNEL
>> 408 select SYS_SUPPORTS_MIPS16
>> 409 select SYS_SUPPORTS_MULTITHREADING
>> 410 select SYS_SUPPORTS_VPE_LOADER
>> 411 select SYS_HAS_EARLY_PRINTK
>> 412 select GPIOLIB
>> 413 select SWAP_IO_SPACE
>> 414 select BOOT_RAW
>> 415 select CLKDEV_LOOKUP
>> 416 select USE_OF
>> 417 select PINCTRL
>> 418 select PINCTRL_LANTIQ
>> 419 select ARCH_HAS_RESET_CONTROLLER
>> 420 select RESET_CONTROLLER
>> 421
>> 422 config LASAT
>> 423 bool "LASAT Networks platforms"
>> 424 select CEVT_R4K
>> 425 select CRC32
>> 426 select CSRC_R4K
>> 427 select DMA_NONCOHERENT
>> 428 select SYS_HAS_EARLY_PRINTK
>> 429 select HW_HAS_PCI
>> 430 select IRQ_MIPS_CPU
>> 431 select PCI_GT64XXX_PCI0
>> 432 select MIPS_NILE4
>> 433 select R5000_CPU_SCACHE
>> 434 select SYS_HAS_CPU_R5000
>> 435 select SYS_SUPPORTS_32BIT_KERNEL
>> 436 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 437 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 438
>> 439 config MACH_LOONGSON32
>> 440 bool "Loongson-1 family of machines"
>> 441 select SYS_SUPPORTS_ZBOOT
>> 442 help
>> 443 This enables support for the Loongson-1 family of machines.
>> 444
>> 445 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 446 the Institute of Computing Technology (ICT), Chinese Academy of
>> 447 Sciences (CAS).
>> 448
>> 449 config MACH_LOONGSON64
>> 450 bool "Loongson-2/3 family of machines"
>> 451 select SYS_SUPPORTS_ZBOOT
>> 452 help
>> 453 This enables the support of Loongson-2/3 family of machines.
>> 454
>> 455 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 456 family of multi-core CPUs. They are both 64-bit general-purpose
>> 457 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 458 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 459 in the People's Republic of China. The chief architect is Professor
>> 460 Weiwu Hu.
>> 461
>> 462 config MACH_PISTACHIO
>> 463 bool "IMG Pistachio SoC based boards"
>> 464 select BOOT_ELF32
>> 465 select BOOT_RAW
>> 466 select CEVT_R4K
>> 467 select CLKSRC_MIPS_GIC
>> 468 select COMMON_CLK
>> 469 select CSRC_R4K
>> 470 select DMA_NONCOHERENT
>> 471 select GPIOLIB
>> 472 select IRQ_MIPS_CPU
>> 473 select LIBFDT
>> 474 select MFD_SYSCON
>> 475 select MIPS_CPU_SCACHE
>> 476 select MIPS_GIC
>> 477 select PINCTRL
>> 478 select REGULATOR
>> 479 select SYS_HAS_CPU_MIPS32_R2
>> 480 select SYS_SUPPORTS_32BIT_KERNEL
>> 481 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 482 select SYS_SUPPORTS_MIPS_CPS
>> 483 select SYS_SUPPORTS_MULTITHREADING
>> 484 select SYS_SUPPORTS_RELOCATABLE
>> 485 select SYS_SUPPORTS_ZBOOT
>> 486 select SYS_HAS_EARLY_PRINTK
>> 487 select USE_GENERIC_EARLY_PRINTK_8250
>> 488 select USE_OF
>> 489 help
>> 490 This enables support for the IMG Pistachio SoC platform.
>> 491
>> 492 config MIPS_MALTA
>> 493 bool "MIPS Malta board"
>> 494 select ARCH_MAY_HAVE_PC_FDC
>> 495 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 496 select ARCH_MIGHT_HAVE_PC_SERIO
>> 497 select BOOT_ELF32
>> 498 select BOOT_RAW
>> 499 select BUILTIN_DTB
>> 500 select CEVT_R4K
>> 501 select CSRC_R4K
>> 502 select CLKSRC_MIPS_GIC
>> 503 select COMMON_CLK
>> 504 select DMA_MAYBE_COHERENT
>> 505 select GENERIC_ISA_DMA
>> 506 select HAVE_PCSPKR_PLATFORM
>> 507 select IRQ_MIPS_CPU
>> 508 select MIPS_GIC
>> 509 select HW_HAS_PCI
>> 510 select I8253
>> 511 select I8259
>> 512 select MIPS_BONITO64
>> 513 select MIPS_CPU_SCACHE
>> 514 select MIPS_L1_CACHE_SHIFT_6
>> 515 select PCI_GT64XXX_PCI0
>> 516 select MIPS_MSC
>> 517 select SMP_UP if SMP
>> 518 select SWAP_IO_SPACE
>> 519 select SYS_HAS_CPU_MIPS32_R1
>> 520 select SYS_HAS_CPU_MIPS32_R2
>> 521 select SYS_HAS_CPU_MIPS32_R3_5
>> 522 select SYS_HAS_CPU_MIPS32_R5
>> 523 select SYS_HAS_CPU_MIPS32_R6
>> 524 select SYS_HAS_CPU_MIPS64_R1
>> 525 select SYS_HAS_CPU_MIPS64_R2
>> 526 select SYS_HAS_CPU_MIPS64_R6
>> 527 select SYS_HAS_CPU_NEVADA
>> 528 select SYS_HAS_CPU_RM7000
>> 529 select SYS_SUPPORTS_32BIT_KERNEL
>> 530 select SYS_SUPPORTS_64BIT_KERNEL
>> 531 select SYS_SUPPORTS_BIG_ENDIAN
>> 532 select SYS_SUPPORTS_HIGHMEM
>> 533 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 534 select SYS_SUPPORTS_MICROMIPS
>> 535 select SYS_SUPPORTS_MIPS_CMP
>> 536 select SYS_SUPPORTS_MIPS_CPS
>> 537 select SYS_SUPPORTS_MIPS16
>> 538 select SYS_SUPPORTS_MULTITHREADING
>> 539 select SYS_SUPPORTS_SMARTMIPS
>> 540 select SYS_SUPPORTS_VPE_LOADER
>> 541 select SYS_SUPPORTS_ZBOOT
>> 542 select SYS_SUPPORTS_RELOCATABLE
>> 543 select USE_OF
>> 544 select LIBFDT
>> 545 select ZONE_DMA32 if 64BIT
>> 546 select BUILTIN_DTB
>> 547 select LIBFDT
>> 548 help
>> 549 This enables support for the MIPS Technologies Malta evaluation
>> 550 board.
>> 551
>> 552 config MACH_PIC32
>> 553 bool "Microchip PIC32 Family"
>> 554 help
>> 555 This enables support for the Microchip PIC32 family of platforms.
>> 556
>> 557 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 558 microcontrollers.
>> 559
>> 560 config NEC_MARKEINS
>> 561 bool "NEC EMMA2RH Mark-eins board"
>> 562 select SOC_EMMA2RH
>> 563 select HW_HAS_PCI
>> 564 help
>> 565 This enables support for the NEC Electronics Mark-eins boards.
>> 566
>> 567 config MACH_VR41XX
>> 568 bool "NEC VR4100 series based machines"
>> 569 select CEVT_R4K
>> 570 select CSRC_R4K
>> 571 select SYS_HAS_CPU_VR41XX
>> 572 select SYS_SUPPORTS_MIPS16
>> 573 select GPIOLIB
>> 574
>> 575 config NXP_STB220
>> 576 bool "NXP STB220 board"
>> 577 select SOC_PNX833X
>> 578 help
>> 579 Support for NXP Semiconductors STB220 Development Board.
>> 580
>> 581 config NXP_STB225
>> 582 bool "NXP 225 board"
>> 583 select SOC_PNX833X
>> 584 select SOC_PNX8335
>> 585 help
>> 586 Support for NXP Semiconductors STB225 Development Board.
>> 587
>> 588 config PMC_MSP
>> 589 bool "PMC-Sierra MSP chipsets"
>> 590 select CEVT_R4K
>> 591 select CSRC_R4K
>> 592 select DMA_NONCOHERENT
>> 593 select SWAP_IO_SPACE
>> 594 select NO_EXCEPT_FILL
>> 595 select BOOT_RAW
>> 596 select SYS_HAS_CPU_MIPS32_R1
>> 597 select SYS_HAS_CPU_MIPS32_R2
>> 598 select SYS_SUPPORTS_32BIT_KERNEL
>> 599 select SYS_SUPPORTS_BIG_ENDIAN
>> 600 select SYS_SUPPORTS_MIPS16
>> 601 select IRQ_MIPS_CPU
>> 602 select SERIAL_8250
>> 603 select SERIAL_8250_CONSOLE
>> 604 select USB_EHCI_BIG_ENDIAN_MMIO
>> 605 select USB_EHCI_BIG_ENDIAN_DESC
>> 606 help
>> 607 This adds support for the PMC-Sierra family of Multi-Service
>> 608 Processor System-On-A-Chips. These parts include a number
>> 609 of integrated peripherals, interfaces and DSPs in addition to
>> 610 a variety of MIPS cores.
>> 611
>> 612 config RALINK
>> 613 bool "Ralink based machines"
>> 614 select CEVT_R4K
>> 615 select CSRC_R4K
>> 616 select BOOT_RAW
>> 617 select DMA_NONCOHERENT
>> 618 select IRQ_MIPS_CPU
>> 619 select USE_OF
>> 620 select SYS_HAS_CPU_MIPS32_R1
>> 621 select SYS_HAS_CPU_MIPS32_R2
>> 622 select SYS_SUPPORTS_32BIT_KERNEL
>> 623 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 624 select SYS_SUPPORTS_MIPS16
>> 625 select SYS_HAS_EARLY_PRINTK
>> 626 select CLKDEV_LOOKUP
>> 627 select ARCH_HAS_RESET_CONTROLLER
>> 628 select RESET_CONTROLLER
>> 629
>> 630 config SGI_IP22
>> 631 bool "SGI IP22 (Indy/Indigo2)"
>> 632 select FW_ARC
>> 633 select FW_ARC32
>> 634 select ARCH_MIGHT_HAVE_PC_SERIO
>> 635 select BOOT_ELF32
>> 636 select CEVT_R4K
>> 637 select CSRC_R4K
>> 638 select DEFAULT_SGI_PARTITION
>> 639 select DMA_NONCOHERENT
>> 640 select HW_HAS_EISA
>> 641 select I8253
>> 642 select I8259
>> 643 select IP22_CPU_SCACHE
>> 644 select IRQ_MIPS_CPU
>> 645 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 646 select SGI_HAS_I8042
>> 647 select SGI_HAS_INDYDOG
>> 648 select SGI_HAS_HAL2
>> 649 select SGI_HAS_SEEQ
>> 650 select SGI_HAS_WD93
>> 651 select SGI_HAS_ZILOG
>> 652 select SWAP_IO_SPACE
>> 653 select SYS_HAS_CPU_R4X00
>> 654 select SYS_HAS_CPU_R5000
>> 655 #
>> 656 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 657 # memory during early boot on some machines.
>> 658 #
>> 659 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 660 # for a more details discussion
>> 661 #
>> 662 # select SYS_HAS_EARLY_PRINTK
>> 663 select SYS_SUPPORTS_32BIT_KERNEL
>> 664 select SYS_SUPPORTS_64BIT_KERNEL
>> 665 select SYS_SUPPORTS_BIG_ENDIAN
>> 666 select MIPS_L1_CACHE_SHIFT_7
>> 667 help
>> 668 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 669 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 670 that runs on these, say Y here.
>> 671
>> 672 config SGI_IP27
>> 673 bool "SGI IP27 (Origin200/2000)"
>> 674 select ARCH_HAS_PHYS_TO_DMA
>> 675 select FW_ARC
>> 676 select FW_ARC64
>> 677 select BOOT_ELF64
>> 678 select DEFAULT_SGI_PARTITION
>> 679 select SYS_HAS_EARLY_PRINTK
>> 680 select HW_HAS_PCI
>> 681 select NR_CPUS_DEFAULT_64
>> 682 select SYS_HAS_CPU_R10000
>> 683 select SYS_SUPPORTS_64BIT_KERNEL
>> 684 select SYS_SUPPORTS_BIG_ENDIAN
>> 685 select SYS_SUPPORTS_NUMA
>> 686 select SYS_SUPPORTS_SMP
>> 687 select MIPS_L1_CACHE_SHIFT_7
>> 688 help
>> 689 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 690 workstations. To compile a Linux kernel that runs on these, say Y
>> 691 here.
>> 692
>> 693 config SGI_IP28
>> 694 bool "SGI IP28 (Indigo2 R10k)"
>> 695 select FW_ARC
>> 696 select FW_ARC64
>> 697 select ARCH_MIGHT_HAVE_PC_SERIO
>> 698 select BOOT_ELF64
>> 699 select CEVT_R4K
>> 700 select CSRC_R4K
>> 701 select DEFAULT_SGI_PARTITION
>> 702 select DMA_NONCOHERENT
>> 703 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 704 select IRQ_MIPS_CPU
>> 705 select HW_HAS_EISA
>> 706 select I8253
>> 707 select I8259
>> 708 select SGI_HAS_I8042
>> 709 select SGI_HAS_INDYDOG
>> 710 select SGI_HAS_HAL2
>> 711 select SGI_HAS_SEEQ
>> 712 select SGI_HAS_WD93
>> 713 select SGI_HAS_ZILOG
>> 714 select SWAP_IO_SPACE
>> 715 select SYS_HAS_CPU_R10000
>> 716 #
>> 717 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 718 # memory during early boot on some machines.
>> 719 #
>> 720 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 721 # for a more details discussion
>> 722 #
>> 723 # select SYS_HAS_EARLY_PRINTK
>> 724 select SYS_SUPPORTS_64BIT_KERNEL
>> 725 select SYS_SUPPORTS_BIG_ENDIAN
>> 726 select MIPS_L1_CACHE_SHIFT_7
>> 727 help
>> 728 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 729 kernel that runs on these, say Y here.
>> 730
>> 731 config SGI_IP32
>> 732 bool "SGI IP32 (O2)"
>> 733 select ARCH_HAS_PHYS_TO_DMA
>> 734 select FW_ARC
>> 735 select FW_ARC32
>> 736 select BOOT_ELF32
>> 737 select CEVT_R4K
>> 738 select CSRC_R4K
>> 739 select DMA_NONCOHERENT
>> 740 select HW_HAS_PCI
>> 741 select IRQ_MIPS_CPU
>> 742 select R5000_CPU_SCACHE
>> 743 select RM7000_CPU_SCACHE
>> 744 select SYS_HAS_CPU_R5000
>> 745 select SYS_HAS_CPU_R10000 if BROKEN
>> 746 select SYS_HAS_CPU_RM7000
>> 747 select SYS_HAS_CPU_NEVADA
>> 748 select SYS_SUPPORTS_64BIT_KERNEL
>> 749 select SYS_SUPPORTS_BIG_ENDIAN
>> 750 help
>> 751 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 752
>> 753 config SIBYTE_CRHINE
>> 754 bool "Sibyte BCM91120C-CRhine"
>> 755 select BOOT_ELF32
>> 756 select SIBYTE_BCM1120
>> 757 select SWAP_IO_SPACE
>> 758 select SYS_HAS_CPU_SB1
>> 759 select SYS_SUPPORTS_BIG_ENDIAN
>> 760 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 761
>> 762 config SIBYTE_CARMEL
>> 763 bool "Sibyte BCM91120x-Carmel"
>> 764 select BOOT_ELF32
>> 765 select SIBYTE_BCM1120
>> 766 select SWAP_IO_SPACE
>> 767 select SYS_HAS_CPU_SB1
>> 768 select SYS_SUPPORTS_BIG_ENDIAN
>> 769 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 770
>> 771 config SIBYTE_CRHONE
>> 772 bool "Sibyte BCM91125C-CRhone"
>> 773 select BOOT_ELF32
>> 774 select SIBYTE_BCM1125
>> 775 select SWAP_IO_SPACE
>> 776 select SYS_HAS_CPU_SB1
>> 777 select SYS_SUPPORTS_BIG_ENDIAN
>> 778 select SYS_SUPPORTS_HIGHMEM
>> 779 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 780
>> 781 config SIBYTE_RHONE
>> 782 bool "Sibyte BCM91125E-Rhone"
>> 783 select BOOT_ELF32
>> 784 select SIBYTE_BCM1125H
>> 785 select SWAP_IO_SPACE
>> 786 select SYS_HAS_CPU_SB1
>> 787 select SYS_SUPPORTS_BIG_ENDIAN
>> 788 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 789
>> 790 config SIBYTE_SWARM
>> 791 bool "Sibyte BCM91250A-SWARM"
>> 792 select BOOT_ELF32
>> 793 select HAVE_PATA_PLATFORM
>> 794 select SIBYTE_SB1250
>> 795 select SWAP_IO_SPACE
>> 796 select SYS_HAS_CPU_SB1
>> 797 select SYS_SUPPORTS_BIG_ENDIAN
>> 798 select SYS_SUPPORTS_HIGHMEM
>> 799 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 800 select ZONE_DMA32 if 64BIT
>> 801 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 802
>> 803 config SIBYTE_LITTLESUR
>> 804 bool "Sibyte BCM91250C2-LittleSur"
>> 805 select BOOT_ELF32
>> 806 select HAVE_PATA_PLATFORM
>> 807 select SIBYTE_SB1250
>> 808 select SWAP_IO_SPACE
>> 809 select SYS_HAS_CPU_SB1
>> 810 select SYS_SUPPORTS_BIG_ENDIAN
>> 811 select SYS_SUPPORTS_HIGHMEM
>> 812 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 813 select ZONE_DMA32 if 64BIT
>> 814
>> 815 config SIBYTE_SENTOSA
>> 816 bool "Sibyte BCM91250E-Sentosa"
>> 817 select BOOT_ELF32
>> 818 select SIBYTE_SB1250
>> 819 select SWAP_IO_SPACE
>> 820 select SYS_HAS_CPU_SB1
>> 821 select SYS_SUPPORTS_BIG_ENDIAN
>> 822 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 823 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 824
>> 825 config SIBYTE_BIGSUR
>> 826 bool "Sibyte BCM91480B-BigSur"
>> 827 select BOOT_ELF32
>> 828 select NR_CPUS_DEFAULT_4
>> 829 select SIBYTE_BCM1x80
>> 830 select SWAP_IO_SPACE
>> 831 select SYS_HAS_CPU_SB1
>> 832 select SYS_SUPPORTS_BIG_ENDIAN
>> 833 select SYS_SUPPORTS_HIGHMEM
>> 834 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 835 select ZONE_DMA32 if 64BIT
>> 836 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 837
>> 838 config SNI_RM
>> 839 bool "SNI RM200/300/400"
>> 840 select FW_ARC if CPU_LITTLE_ENDIAN
>> 841 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 842 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 843 select ARCH_MAY_HAVE_PC_FDC
>> 844 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 845 select ARCH_MIGHT_HAVE_PC_SERIO
>> 846 select BOOT_ELF32
>> 847 select CEVT_R4K
>> 848 select CSRC_R4K
>> 849 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 850 select DMA_NONCOHERENT
>> 851 select GENERIC_ISA_DMA
>> 852 select HAVE_PCSPKR_PLATFORM
>> 853 select HW_HAS_EISA
>> 854 select HW_HAS_PCI
>> 855 select IRQ_MIPS_CPU
>> 856 select I8253
>> 857 select I8259
>> 858 select ISA
>> 859 select MIPS_L1_CACHE_SHIFT_6
>> 860 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 861 select SYS_HAS_CPU_R4X00
>> 862 select SYS_HAS_CPU_R5000
>> 863 select SYS_HAS_CPU_R10000
>> 864 select R5000_CPU_SCACHE
>> 865 select SYS_HAS_EARLY_PRINTK
>> 866 select SYS_SUPPORTS_32BIT_KERNEL
>> 867 select SYS_SUPPORTS_64BIT_KERNEL
>> 868 select SYS_SUPPORTS_BIG_ENDIAN
>> 869 select SYS_SUPPORTS_HIGHMEM
>> 870 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 871 help
>> 872 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 873 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 874 Technology and now in turn merged with Fujitsu. Say Y here to
>> 875 support this machine type.
>> 876
>> 877 config MACH_TX39XX
>> 878 bool "Toshiba TX39 series based machines"
>> 879
>> 880 config MACH_TX49XX
>> 881 bool "Toshiba TX49 series based machines"
>> 882
>> 883 config MIKROTIK_RB532
>> 884 bool "Mikrotik RB532 boards"
>> 885 select CEVT_R4K
>> 886 select CSRC_R4K
>> 887 select DMA_NONCOHERENT
>> 888 select HW_HAS_PCI
>> 889 select IRQ_MIPS_CPU
>> 890 select SYS_HAS_CPU_MIPS32_R1
>> 891 select SYS_SUPPORTS_32BIT_KERNEL
>> 892 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 893 select SWAP_IO_SPACE
>> 894 select BOOT_RAW
>> 895 select GPIOLIB
>> 896 select MIPS_L1_CACHE_SHIFT_4
>> 897 help
>> 898 Support the Mikrotik(tm) RouterBoard 532 series,
>> 899 based on the IDT RC32434 SoC.
>> 900
>> 901 config CAVIUM_OCTEON_SOC
>> 902 bool "Cavium Networks Octeon SoC based boards"
>> 903 select CEVT_R4K
>> 904 select ARCH_HAS_PHYS_TO_DMA
>> 905 select HAS_RAPIDIO
>> 906 select PHYS_ADDR_T_64BIT
>> 907 select SYS_SUPPORTS_64BIT_KERNEL
>> 908 select SYS_SUPPORTS_BIG_ENDIAN
>> 909 select EDAC_SUPPORT
>> 910 select EDAC_ATOMIC_SCRUB
>> 911 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 912 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 913 select SYS_HAS_EARLY_PRINTK
>> 914 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 915 select HW_HAS_PCI
>> 916 select ZONE_DMA32
>> 917 select HOLES_IN_ZONE
>> 918 select GPIOLIB
>> 919 select LIBFDT
>> 920 select USE_OF
>> 921 select ARCH_SPARSEMEM_ENABLE
>> 922 select SYS_SUPPORTS_SMP
>> 923 select NR_CPUS_DEFAULT_64
>> 924 select MIPS_NR_CPU_NR_MAP_1024
>> 925 select BUILTIN_DTB
>> 926 select MTD_COMPLEX_MAPPINGS
>> 927 select SWIOTLB
>> 928 select SYS_SUPPORTS_RELOCATABLE
>> 929 help
>> 930 This option supports all of the Octeon reference boards from Cavium
>> 931 Networks. It builds a kernel that dynamically determines the Octeon
>> 932 CPU type and supports all known board reference implementations.
>> 933 Some of the supported boards are:
>> 934 EBT3000
>> 935 EBH3000
>> 936 EBH3100
>> 937 Thunder
>> 938 Kodama
>> 939 Hikari
>> 940 Say Y here for most Octeon reference boards.
>> 941
>> 942 config NLM_XLR_BOARD
>> 943 bool "Netlogic XLR/XLS based systems"
>> 944 select BOOT_ELF32
>> 945 select NLM_COMMON
>> 946 select SYS_HAS_CPU_XLR
>> 947 select SYS_SUPPORTS_SMP
>> 948 select HW_HAS_PCI
>> 949 select SWAP_IO_SPACE
>> 950 select SYS_SUPPORTS_32BIT_KERNEL
>> 951 select SYS_SUPPORTS_64BIT_KERNEL
>> 952 select PHYS_ADDR_T_64BIT
>> 953 select SYS_SUPPORTS_BIG_ENDIAN
>> 954 select SYS_SUPPORTS_HIGHMEM
>> 955 select NR_CPUS_DEFAULT_32
>> 956 select CEVT_R4K
>> 957 select CSRC_R4K
>> 958 select IRQ_MIPS_CPU
>> 959 select ZONE_DMA32 if 64BIT
>> 960 select SYNC_R4K
>> 961 select SYS_HAS_EARLY_PRINTK
>> 962 select SYS_SUPPORTS_ZBOOT
>> 963 select SYS_SUPPORTS_ZBOOT_UART16550
>> 964 help
>> 965 Support for systems based on Netlogic XLR and XLS processors.
>> 966 Say Y here if you have a XLR or XLS based board.
>> 967
>> 968 config NLM_XLP_BOARD
>> 969 bool "Netlogic XLP based systems"
>> 970 select BOOT_ELF32
>> 971 select NLM_COMMON
>> 972 select SYS_HAS_CPU_XLP
>> 973 select SYS_SUPPORTS_SMP
>> 974 select HW_HAS_PCI
>> 975 select SYS_SUPPORTS_32BIT_KERNEL
>> 976 select SYS_SUPPORTS_64BIT_KERNEL
>> 977 select PHYS_ADDR_T_64BIT
>> 978 select GPIOLIB
>> 979 select SYS_SUPPORTS_BIG_ENDIAN
>> 980 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 981 select SYS_SUPPORTS_HIGHMEM
>> 982 select NR_CPUS_DEFAULT_32
>> 983 select CEVT_R4K
>> 984 select CSRC_R4K
>> 985 select IRQ_MIPS_CPU
>> 986 select ZONE_DMA32 if 64BIT
>> 987 select SYNC_R4K
>> 988 select SYS_HAS_EARLY_PRINTK
>> 989 select USE_OF
>> 990 select SYS_SUPPORTS_ZBOOT
>> 991 select SYS_SUPPORTS_ZBOOT_UART16550
>> 992 help
>> 993 This board is based on Netlogic XLP Processor.
>> 994 Say Y here if you have a XLP based board.
>> 995
>> 996 config MIPS_PARAVIRT
>> 997 bool "Para-Virtualized guest system"
>> 998 select CEVT_R4K
>> 999 select CSRC_R4K
>> 1000 select SYS_SUPPORTS_64BIT_KERNEL
>> 1001 select SYS_SUPPORTS_32BIT_KERNEL
>> 1002 select SYS_SUPPORTS_BIG_ENDIAN
>> 1003 select SYS_SUPPORTS_SMP
>> 1004 select NR_CPUS_DEFAULT_4
>> 1005 select SYS_HAS_EARLY_PRINTK
>> 1006 select SYS_HAS_CPU_MIPS32_R2
>> 1007 select SYS_HAS_CPU_MIPS64_R2
>> 1008 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1009 select HW_HAS_PCI
>> 1010 select SWAP_IO_SPACE
60 help 1011 help
61 Xtensa processors are 32-bit RISC ma !! 1012 This option supports guest running under ????
62 primarily for embedded systems. The !! 1013
63 configurable and extensible. The Li !! 1014 endchoice
64 architecture supports all processor !! 1015
65 with reasonable minimum requirements !! 1016 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 1017 source "arch/mips/ath25/Kconfig"
>> 1018 source "arch/mips/ath79/Kconfig"
>> 1019 source "arch/mips/bcm47xx/Kconfig"
>> 1020 source "arch/mips/bcm63xx/Kconfig"
>> 1021 source "arch/mips/bmips/Kconfig"
>> 1022 source "arch/mips/generic/Kconfig"
>> 1023 source "arch/mips/jazz/Kconfig"
>> 1024 source "arch/mips/jz4740/Kconfig"
>> 1025 source "arch/mips/lantiq/Kconfig"
>> 1026 source "arch/mips/lasat/Kconfig"
>> 1027 source "arch/mips/pic32/Kconfig"
>> 1028 source "arch/mips/pistachio/Kconfig"
>> 1029 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1030 source "arch/mips/ralink/Kconfig"
>> 1031 source "arch/mips/sgi-ip27/Kconfig"
>> 1032 source "arch/mips/sibyte/Kconfig"
>> 1033 source "arch/mips/txx9/Kconfig"
>> 1034 source "arch/mips/vr41xx/Kconfig"
>> 1035 source "arch/mips/cavium-octeon/Kconfig"
>> 1036 source "arch/mips/loongson32/Kconfig"
>> 1037 source "arch/mips/loongson64/Kconfig"
>> 1038 source "arch/mips/netlogic/Kconfig"
>> 1039 source "arch/mips/paravirt/Kconfig"
>> 1040
>> 1041 endmenu
>> 1042
>> 1043 config RWSEM_GENERIC_SPINLOCK
>> 1044 bool
>> 1045 default y
>> 1046
>> 1047 config RWSEM_XCHGADD_ALGORITHM
>> 1048 bool
67 1049
68 config GENERIC_HWEIGHT 1050 config GENERIC_HWEIGHT
69 def_bool y !! 1051 bool
>> 1052 default y
70 1053
71 config ARCH_HAS_ILOG2_U32 !! 1054 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1055 bool
>> 1056 default y
73 1057
74 config ARCH_HAS_ILOG2_U64 !! 1058 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1059 bool
>> 1060 default y
76 1061
77 config ARCH_MTD_XIP !! 1062 #
78 def_bool y !! 1063 # Select some configuration options automatically based on user selections.
>> 1064 #
>> 1065 config FW_ARC
>> 1066 bool
>> 1067
>> 1068 config ARCH_MAY_HAVE_PC_FDC
>> 1069 bool
>> 1070
>> 1071 config BOOT_RAW
>> 1072 bool
>> 1073
>> 1074 config CEVT_BCM1480
>> 1075 bool
>> 1076
>> 1077 config CEVT_DS1287
>> 1078 bool
>> 1079
>> 1080 config CEVT_GT641XX
>> 1081 bool
>> 1082
>> 1083 config CEVT_R4K
>> 1084 bool
>> 1085
>> 1086 config CEVT_SB1250
>> 1087 bool
>> 1088
>> 1089 config CEVT_TXX9
>> 1090 bool
>> 1091
>> 1092 config CSRC_BCM1480
>> 1093 bool
>> 1094
>> 1095 config CSRC_IOASIC
>> 1096 bool
>> 1097
>> 1098 config CSRC_R4K
>> 1099 bool
>> 1100
>> 1101 config CSRC_SB1250
>> 1102 bool
>> 1103
>> 1104 config MIPS_CLOCK_VSYSCALL
>> 1105 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1106
>> 1107 config GPIO_TXX9
>> 1108 select GPIOLIB
>> 1109 bool
>> 1110
>> 1111 config FW_CFE
>> 1112 bool
>> 1113
>> 1114 config ARCH_SUPPORTS_UPROBES
>> 1115 bool
>> 1116
>> 1117 config DMA_MAYBE_COHERENT
>> 1118 select DMA_NONCOHERENT
>> 1119 bool
>> 1120
>> 1121 config DMA_PERDEV_COHERENT
>> 1122 bool
>> 1123 select DMA_MAYBE_COHERENT
>> 1124
>> 1125 config DMA_NONCOHERENT
>> 1126 bool
>> 1127 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1128 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1129 select NEED_DMA_MAP_STATE
>> 1130 select DMA_NONCOHERENT_MMAP
>> 1131 select DMA_NONCOHERENT_CACHE_SYNC
>> 1132 select DMA_NONCOHERENT_OPS
>> 1133
>> 1134 config SYS_HAS_EARLY_PRINTK
>> 1135 bool
>> 1136
>> 1137 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1138 bool
>> 1139
>> 1140 config MIPS_BONITO64
>> 1141 bool
>> 1142
>> 1143 config MIPS_MSC
>> 1144 bool
>> 1145
>> 1146 config MIPS_NILE4
>> 1147 bool
>> 1148
>> 1149 config SYNC_R4K
>> 1150 bool
>> 1151
>> 1152 config MIPS_MACHINE
>> 1153 def_bool n
79 1154
80 config NO_IOPORT_MAP 1155 config NO_IOPORT_MAP
81 def_bool n 1156 def_bool n
82 1157
83 config HZ !! 1158 config GENERIC_CSUM
84 int !! 1159 bool
85 default 100 <<
86 1160
87 config LOCKDEP_SUPPORT !! 1161 config GENERIC_ISA_DMA
88 def_bool y !! 1162 bool
>> 1163 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1164 select ISA_DMA_API
89 1165
90 config STACKTRACE_SUPPORT !! 1166 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1167 bool
>> 1168 select GENERIC_ISA_DMA
>> 1169
>> 1170 config ISA_DMA_API
>> 1171 bool
>> 1172
>> 1173 config HOLES_IN_ZONE
>> 1174 bool
>> 1175
>> 1176 config SYS_SUPPORTS_RELOCATABLE
>> 1177 bool
>> 1178 help
>> 1179 Selected if the platform supports relocating the kernel.
>> 1180 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1181 to allow access to command line and entropy sources.
>> 1182
>> 1183 config MIPS_CBPF_JIT
91 def_bool y 1184 def_bool y
>> 1185 depends on BPF_JIT && HAVE_CBPF_JIT
92 1186
93 config MMU !! 1187 config MIPS_EBPF_JIT
94 def_bool n !! 1188 def_bool y
95 select PFAULT !! 1189 depends on BPF_JIT && HAVE_EBPF_JIT
96 1190
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1191
100 config KASAN_SHADOW_OFFSET !! 1192 #
101 hex !! 1193 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1194 # answer,so we try hard to limit the available choices. Also the use of a
>> 1195 # choice statement should be more obvious to the user.
>> 1196 #
>> 1197 choice
>> 1198 prompt "Endianness selection"
>> 1199 help
>> 1200 Some MIPS machines can be configured for either little or big endian
>> 1201 byte order. These modes require different kernels and a different
>> 1202 Linux distribution. In general there is one preferred byteorder for a
>> 1203 particular system but some systems are just as commonly used in the
>> 1204 one or the other endianness.
103 1205
104 config CPU_BIG_ENDIAN 1206 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1207 bool "Big endian"
>> 1208 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1209
107 config CPU_LITTLE_ENDIAN 1210 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1211 bool "Little endian"
>> 1212 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1213
110 config CC_HAVE_CALL0_ABI !! 1214 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1215
113 menu "Processor type and features" !! 1216 config EXPORT_UASM
>> 1217 bool
114 1218
115 choice !! 1219 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1220 bool
117 default XTENSA_VARIANT_FSF <<
118 1221
119 config XTENSA_VARIANT_FSF !! 1222 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1223 bool
121 select MMU <<
122 1224
123 config XTENSA_VARIANT_DC232B !! 1225 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1226 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1227
130 config XTENSA_VARIANT_DC233C !! 1228 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1229 bool
132 select MMU !! 1230 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1231 default y
134 help !! 1232
135 This variant refers to Tensilica's D !! 1233 config MIPS_HUGE_TLB_SUPPORT
>> 1234 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1235
>> 1236 config IRQ_CPU_RM7K
>> 1237 bool
>> 1238
>> 1239 config IRQ_MSP_SLP
>> 1240 bool
>> 1241
>> 1242 config IRQ_MSP_CIC
>> 1243 bool
>> 1244
>> 1245 config IRQ_TXX9
>> 1246 bool
>> 1247
>> 1248 config IRQ_GT641XX
>> 1249 bool
>> 1250
>> 1251 config PCI_GT64XXX_PCI0
>> 1252 bool
>> 1253
>> 1254 config NO_EXCEPT_FILL
>> 1255 bool
>> 1256
>> 1257 config SOC_EMMA2RH
>> 1258 bool
>> 1259 select CEVT_R4K
>> 1260 select CSRC_R4K
>> 1261 select DMA_NONCOHERENT
>> 1262 select IRQ_MIPS_CPU
>> 1263 select SWAP_IO_SPACE
>> 1264 select SYS_HAS_CPU_R5500
>> 1265 select SYS_SUPPORTS_32BIT_KERNEL
>> 1266 select SYS_SUPPORTS_64BIT_KERNEL
>> 1267 select SYS_SUPPORTS_BIG_ENDIAN
>> 1268
>> 1269 config SOC_PNX833X
>> 1270 bool
>> 1271 select CEVT_R4K
>> 1272 select CSRC_R4K
>> 1273 select IRQ_MIPS_CPU
>> 1274 select DMA_NONCOHERENT
>> 1275 select SYS_HAS_CPU_MIPS32_R2
>> 1276 select SYS_SUPPORTS_32BIT_KERNEL
>> 1277 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1278 select SYS_SUPPORTS_BIG_ENDIAN
>> 1279 select SYS_SUPPORTS_MIPS16
>> 1280 select CPU_MIPSR2_IRQ_VI
>> 1281
>> 1282 config SOC_PNX8335
>> 1283 bool
>> 1284 select SOC_PNX833X
>> 1285
>> 1286 config MIPS_SPRAM
>> 1287 bool
>> 1288
>> 1289 config SWAP_IO_SPACE
>> 1290 bool
>> 1291
>> 1292 config SGI_HAS_INDYDOG
>> 1293 bool
>> 1294
>> 1295 config SGI_HAS_HAL2
>> 1296 bool
136 1297
137 config XTENSA_VARIANT_CUSTOM !! 1298 config SGI_HAS_SEEQ
138 bool "Custom Xtensa processor configur !! 1299 bool
139 select HAVE_XTENSA_GPIO32 !! 1300
>> 1301 config SGI_HAS_WD93
>> 1302 bool
>> 1303
>> 1304 config SGI_HAS_ZILOG
>> 1305 bool
>> 1306
>> 1307 config SGI_HAS_I8042
>> 1308 bool
>> 1309
>> 1310 config DEFAULT_SGI_PARTITION
>> 1311 bool
>> 1312
>> 1313 config FW_ARC32
>> 1314 bool
>> 1315
>> 1316 config FW_SNIPROM
>> 1317 bool
>> 1318
>> 1319 config BOOT_ELF32
>> 1320 bool
>> 1321
>> 1322 config MIPS_L1_CACHE_SHIFT_4
>> 1323 bool
>> 1324
>> 1325 config MIPS_L1_CACHE_SHIFT_5
>> 1326 bool
>> 1327
>> 1328 config MIPS_L1_CACHE_SHIFT_6
>> 1329 bool
>> 1330
>> 1331 config MIPS_L1_CACHE_SHIFT_7
>> 1332 bool
>> 1333
>> 1334 config MIPS_L1_CACHE_SHIFT
>> 1335 int
>> 1336 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1337 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1338 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1339 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1340 default "5"
>> 1341
>> 1342 config HAVE_STD_PC_SERIAL_PORT
>> 1343 bool
>> 1344
>> 1345 config ARC_CONSOLE
>> 1346 bool "ARC console support"
>> 1347 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1348
>> 1349 config ARC_MEMORY
>> 1350 bool
>> 1351 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1352 default y
>> 1353
>> 1354 config ARC_PROMLIB
>> 1355 bool
>> 1356 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1357 default y
>> 1358
>> 1359 config FW_ARC64
>> 1360 bool
>> 1361
>> 1362 config BOOT_ELF64
>> 1363 bool
>> 1364
>> 1365 menu "CPU selection"
>> 1366
>> 1367 choice
>> 1368 prompt "CPU type"
>> 1369 default CPU_R4X00
>> 1370
>> 1371 config CPU_LOONGSON3
>> 1372 bool "Loongson 3 CPU"
>> 1373 depends on SYS_HAS_CPU_LOONGSON3
>> 1374 select ARCH_HAS_PHYS_TO_DMA
>> 1375 select CPU_SUPPORTS_64BIT_KERNEL
>> 1376 select CPU_SUPPORTS_HIGHMEM
>> 1377 select CPU_SUPPORTS_HUGEPAGES
>> 1378 select WEAK_ORDERING
>> 1379 select WEAK_REORDERING_BEYOND_LLSC
>> 1380 select MIPS_PGD_C0_CONTEXT
>> 1381 select MIPS_L1_CACHE_SHIFT_6
>> 1382 select MIPS_FP_SUPPORT
>> 1383 select GPIOLIB
>> 1384 select SWIOTLB
140 help 1385 help
141 Select this variant to use a custom !! 1386 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1387 set with many extensions.
143 endchoice <<
144 1388
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1389 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1390 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1391 default n
>> 1392 select CPU_MIPSR2
>> 1393 select CPU_HAS_PREFETCH
>> 1394 depends on CPU_LOONGSON3
>> 1395 help
>> 1396 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1397 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1398 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1399 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1400 Fast TLB refill support, etc.
>> 1401
>> 1402 This option enable those enhancements which are not probed at run
>> 1403 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1404 please say 'N' here. If you want a high-performance kernel to run on
>> 1405 new Loongson 3 machines only, please say 'Y' here.
>> 1406
>> 1407 config CPU_LOONGSON2E
>> 1408 bool "Loongson 2E"
>> 1409 depends on SYS_HAS_CPU_LOONGSON2E
>> 1410 select CPU_LOONGSON2
>> 1411 help
>> 1412 The Loongson 2E processor implements the MIPS III instruction set
>> 1413 with many extensions.
>> 1414
>> 1415 It has an internal FPGA northbridge, which is compatible to
>> 1416 bonito64.
>> 1417
>> 1418 config CPU_LOONGSON2F
>> 1419 bool "Loongson 2F"
>> 1420 depends on SYS_HAS_CPU_LOONGSON2F
>> 1421 select CPU_LOONGSON2
>> 1422 select GPIOLIB
>> 1423 help
>> 1424 The Loongson 2F processor implements the MIPS III instruction set
>> 1425 with many extensions.
>> 1426
>> 1427 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1428 have a similar programming interface with FPGA northbridge used in
>> 1429 Loongson2E.
>> 1430
>> 1431 config CPU_LOONGSON1B
>> 1432 bool "Loongson 1B"
>> 1433 depends on SYS_HAS_CPU_LOONGSON1B
>> 1434 select CPU_LOONGSON1
>> 1435 select LEDS_GPIO_REGISTER
>> 1436 help
>> 1437 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1438 Release 1 instruction set and part of the MIPS32 Release 2
>> 1439 instruction set.
>> 1440
>> 1441 config CPU_LOONGSON1C
>> 1442 bool "Loongson 1C"
>> 1443 depends on SYS_HAS_CPU_LOONGSON1C
>> 1444 select CPU_LOONGSON1
>> 1445 select LEDS_GPIO_REGISTER
>> 1446 help
>> 1447 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1448 Release 1 instruction set and part of the MIPS32 Release 2
>> 1449 instruction set.
>> 1450
>> 1451 config CPU_MIPS32_R1
>> 1452 bool "MIPS32 Release 1"
>> 1453 depends on SYS_HAS_CPU_MIPS32_R1
>> 1454 select CPU_HAS_PREFETCH
>> 1455 select CPU_SUPPORTS_32BIT_KERNEL
>> 1456 select CPU_SUPPORTS_HIGHMEM
>> 1457 help
>> 1458 Choose this option to build a kernel for release 1 or later of the
>> 1459 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1460 MIPS processor are based on a MIPS32 processor. If you know the
>> 1461 specific type of processor in your system, choose those that one
>> 1462 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1463 Release 2 of the MIPS32 architecture is available since several
>> 1464 years so chances are you even have a MIPS32 Release 2 processor
>> 1465 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1466 performance.
>> 1467
>> 1468 config CPU_MIPS32_R2
>> 1469 bool "MIPS32 Release 2"
>> 1470 depends on SYS_HAS_CPU_MIPS32_R2
>> 1471 select CPU_HAS_PREFETCH
>> 1472 select CPU_SUPPORTS_32BIT_KERNEL
>> 1473 select CPU_SUPPORTS_HIGHMEM
>> 1474 select CPU_SUPPORTS_MSA
>> 1475 select HAVE_KVM
>> 1476 help
>> 1477 Choose this option to build a kernel for release 2 or later of the
>> 1478 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1479 MIPS processor are based on a MIPS32 processor. If you know the
>> 1480 specific type of processor in your system, choose those that one
>> 1481 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1482
>> 1483 config CPU_MIPS32_R6
>> 1484 bool "MIPS32 Release 6"
>> 1485 depends on SYS_HAS_CPU_MIPS32_R6
>> 1486 select CPU_HAS_PREFETCH
>> 1487 select CPU_SUPPORTS_32BIT_KERNEL
>> 1488 select CPU_SUPPORTS_HIGHMEM
>> 1489 select CPU_SUPPORTS_MSA
>> 1490 select GENERIC_CSUM
>> 1491 select HAVE_KVM
>> 1492 select MIPS_O32_FP64_SUPPORT
>> 1493 help
>> 1494 Choose this option to build a kernel for release 6 or later of the
>> 1495 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1496 family, are based on a MIPS32r6 processor. If you own an older
>> 1497 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1498
>> 1499 config CPU_MIPS64_R1
>> 1500 bool "MIPS64 Release 1"
>> 1501 depends on SYS_HAS_CPU_MIPS64_R1
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_64BIT_KERNEL
>> 1505 select CPU_SUPPORTS_HIGHMEM
>> 1506 select CPU_SUPPORTS_HUGEPAGES
>> 1507 help
>> 1508 Choose this option to build a kernel for release 1 or later of the
>> 1509 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1510 MIPS processor are based on a MIPS64 processor. If you know the
>> 1511 specific type of processor in your system, choose those that one
>> 1512 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1513 Release 2 of the MIPS64 architecture is available since several
>> 1514 years so chances are you even have a MIPS64 Release 2 processor
>> 1515 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1516 performance.
>> 1517
>> 1518 config CPU_MIPS64_R2
>> 1519 bool "MIPS64 Release 2"
>> 1520 depends on SYS_HAS_CPU_MIPS64_R2
>> 1521 select CPU_HAS_PREFETCH
>> 1522 select CPU_SUPPORTS_32BIT_KERNEL
>> 1523 select CPU_SUPPORTS_64BIT_KERNEL
>> 1524 select CPU_SUPPORTS_HIGHMEM
>> 1525 select CPU_SUPPORTS_HUGEPAGES
>> 1526 select CPU_SUPPORTS_MSA
>> 1527 select HAVE_KVM
>> 1528 help
>> 1529 Choose this option to build a kernel for release 2 or later of the
>> 1530 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1531 MIPS processor are based on a MIPS64 processor. If you know the
>> 1532 specific type of processor in your system, choose those that one
>> 1533 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1534
>> 1535 config CPU_MIPS64_R6
>> 1536 bool "MIPS64 Release 6"
>> 1537 depends on SYS_HAS_CPU_MIPS64_R6
>> 1538 select CPU_HAS_PREFETCH
>> 1539 select CPU_SUPPORTS_32BIT_KERNEL
>> 1540 select CPU_SUPPORTS_64BIT_KERNEL
>> 1541 select CPU_SUPPORTS_HIGHMEM
>> 1542 select CPU_SUPPORTS_MSA
>> 1543 select GENERIC_CSUM
>> 1544 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1545 select HAVE_KVM
>> 1546 help
>> 1547 Choose this option to build a kernel for release 6 or later of the
>> 1548 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1549 family, are based on a MIPS64r6 processor. If you own an older
>> 1550 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1551
>> 1552 config CPU_R3000
>> 1553 bool "R3000"
>> 1554 depends on SYS_HAS_CPU_R3000
>> 1555 select CPU_HAS_WB
>> 1556 select CPU_SUPPORTS_32BIT_KERNEL
>> 1557 select CPU_SUPPORTS_HIGHMEM
>> 1558 help
>> 1559 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1560 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1561 *not* work on R4000 machines and vice versa. However, since most
>> 1562 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1563 might be a safe bet. If the resulting kernel does not work,
>> 1564 try to recompile with R3000.
>> 1565
>> 1566 config CPU_TX39XX
>> 1567 bool "R39XX"
>> 1568 depends on SYS_HAS_CPU_TX39XX
>> 1569 select CPU_SUPPORTS_32BIT_KERNEL
>> 1570
>> 1571 config CPU_VR41XX
>> 1572 bool "R41xx"
>> 1573 depends on SYS_HAS_CPU_VR41XX
>> 1574 select CPU_SUPPORTS_32BIT_KERNEL
>> 1575 select CPU_SUPPORTS_64BIT_KERNEL
>> 1576 help
>> 1577 The options selects support for the NEC VR4100 series of processors.
>> 1578 Only choose this option if you have one of these processors as a
>> 1579 kernel built with this option will not run on any other type of
>> 1580 processor or vice versa.
>> 1581
>> 1582 config CPU_R4300
>> 1583 bool "R4300"
>> 1584 depends on SYS_HAS_CPU_R4300
>> 1585 select CPU_SUPPORTS_32BIT_KERNEL
>> 1586 select CPU_SUPPORTS_64BIT_KERNEL
>> 1587 help
>> 1588 MIPS Technologies R4300-series processors.
>> 1589
>> 1590 config CPU_R4X00
>> 1591 bool "R4x00"
>> 1592 depends on SYS_HAS_CPU_R4X00
>> 1593 select CPU_SUPPORTS_32BIT_KERNEL
>> 1594 select CPU_SUPPORTS_64BIT_KERNEL
>> 1595 select CPU_SUPPORTS_HUGEPAGES
>> 1596 help
>> 1597 MIPS Technologies R4000-series processors other than 4300, including
>> 1598 the R4000, R4400, R4600, and 4700.
>> 1599
>> 1600 config CPU_TX49XX
>> 1601 bool "R49XX"
>> 1602 depends on SYS_HAS_CPU_TX49XX
>> 1603 select CPU_HAS_PREFETCH
>> 1604 select CPU_SUPPORTS_32BIT_KERNEL
>> 1605 select CPU_SUPPORTS_64BIT_KERNEL
>> 1606 select CPU_SUPPORTS_HUGEPAGES
>> 1607
>> 1608 config CPU_R5000
>> 1609 bool "R5000"
>> 1610 depends on SYS_HAS_CPU_R5000
>> 1611 select CPU_SUPPORTS_32BIT_KERNEL
>> 1612 select CPU_SUPPORTS_64BIT_KERNEL
>> 1613 select CPU_SUPPORTS_HUGEPAGES
>> 1614 help
>> 1615 MIPS Technologies R5000-series processors other than the Nevada.
>> 1616
>> 1617 config CPU_R5432
>> 1618 bool "R5432"
>> 1619 depends on SYS_HAS_CPU_R5432
>> 1620 select CPU_SUPPORTS_32BIT_KERNEL
>> 1621 select CPU_SUPPORTS_64BIT_KERNEL
>> 1622 select CPU_SUPPORTS_HUGEPAGES
>> 1623
>> 1624 config CPU_R5500
>> 1625 bool "R5500"
>> 1626 depends on SYS_HAS_CPU_R5500
>> 1627 select CPU_SUPPORTS_32BIT_KERNEL
>> 1628 select CPU_SUPPORTS_64BIT_KERNEL
>> 1629 select CPU_SUPPORTS_HUGEPAGES
>> 1630 help
>> 1631 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1632 instruction set.
>> 1633
>> 1634 config CPU_NEVADA
>> 1635 bool "RM52xx"
>> 1636 depends on SYS_HAS_CPU_NEVADA
>> 1637 select CPU_SUPPORTS_32BIT_KERNEL
>> 1638 select CPU_SUPPORTS_64BIT_KERNEL
>> 1639 select CPU_SUPPORTS_HUGEPAGES
>> 1640 help
>> 1641 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1642
>> 1643 config CPU_R8000
>> 1644 bool "R8000"
>> 1645 depends on SYS_HAS_CPU_R8000
>> 1646 select CPU_HAS_PREFETCH
>> 1647 select CPU_SUPPORTS_64BIT_KERNEL
>> 1648 help
>> 1649 MIPS Technologies R8000 processors. Note these processors are
>> 1650 uncommon and the support for them is incomplete.
>> 1651
>> 1652 config CPU_R10000
>> 1653 bool "R10000"
>> 1654 depends on SYS_HAS_CPU_R10000
>> 1655 select CPU_HAS_PREFETCH
>> 1656 select CPU_SUPPORTS_32BIT_KERNEL
>> 1657 select CPU_SUPPORTS_64BIT_KERNEL
>> 1658 select CPU_SUPPORTS_HIGHMEM
>> 1659 select CPU_SUPPORTS_HUGEPAGES
>> 1660 help
>> 1661 MIPS Technologies R10000-series processors.
>> 1662
>> 1663 config CPU_RM7000
>> 1664 bool "RM7000"
>> 1665 depends on SYS_HAS_CPU_RM7000
>> 1666 select CPU_HAS_PREFETCH
>> 1667 select CPU_SUPPORTS_32BIT_KERNEL
>> 1668 select CPU_SUPPORTS_64BIT_KERNEL
>> 1669 select CPU_SUPPORTS_HIGHMEM
>> 1670 select CPU_SUPPORTS_HUGEPAGES
>> 1671
>> 1672 config CPU_SB1
>> 1673 bool "SB1"
>> 1674 depends on SYS_HAS_CPU_SB1
>> 1675 select CPU_SUPPORTS_32BIT_KERNEL
>> 1676 select CPU_SUPPORTS_64BIT_KERNEL
>> 1677 select CPU_SUPPORTS_HIGHMEM
>> 1678 select CPU_SUPPORTS_HUGEPAGES
>> 1679 select WEAK_ORDERING
>> 1680
>> 1681 config CPU_CAVIUM_OCTEON
>> 1682 bool "Cavium Octeon processor"
>> 1683 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1684 select CPU_HAS_PREFETCH
>> 1685 select CPU_SUPPORTS_64BIT_KERNEL
>> 1686 select WEAK_ORDERING
>> 1687 select CPU_SUPPORTS_HIGHMEM
>> 1688 select CPU_SUPPORTS_HUGEPAGES
>> 1689 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1690 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1691 select MIPS_L1_CACHE_SHIFT_7
>> 1692 select HAVE_KVM
>> 1693 help
>> 1694 The Cavium Octeon processor is a highly integrated chip containing
>> 1695 many ethernet hardware widgets for networking tasks. The processor
>> 1696 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1697 Full details can be found at http://www.caviumnetworks.com.
>> 1698
>> 1699 config CPU_BMIPS
>> 1700 bool "Broadcom BMIPS"
>> 1701 depends on SYS_HAS_CPU_BMIPS
>> 1702 select CPU_MIPS32
>> 1703 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1704 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1705 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1706 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1707 select CPU_SUPPORTS_32BIT_KERNEL
>> 1708 select DMA_NONCOHERENT
>> 1709 select IRQ_MIPS_CPU
>> 1710 select SWAP_IO_SPACE
>> 1711 select WEAK_ORDERING
>> 1712 select CPU_SUPPORTS_HIGHMEM
>> 1713 select CPU_HAS_PREFETCH
>> 1714 select CPU_SUPPORTS_CPUFREQ
>> 1715 select MIPS_EXTERNAL_TIMER
>> 1716 help
>> 1717 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1718
>> 1719 config CPU_XLR
>> 1720 bool "Netlogic XLR SoC"
>> 1721 depends on SYS_HAS_CPU_XLR
>> 1722 select CPU_SUPPORTS_32BIT_KERNEL
>> 1723 select CPU_SUPPORTS_64BIT_KERNEL
>> 1724 select CPU_SUPPORTS_HIGHMEM
>> 1725 select CPU_SUPPORTS_HUGEPAGES
>> 1726 select WEAK_ORDERING
>> 1727 select WEAK_REORDERING_BEYOND_LLSC
>> 1728 help
>> 1729 Netlogic Microsystems XLR/XLS processors.
>> 1730
>> 1731 config CPU_XLP
>> 1732 bool "Netlogic XLP SoC"
>> 1733 depends on SYS_HAS_CPU_XLP
>> 1734 select CPU_SUPPORTS_32BIT_KERNEL
>> 1735 select CPU_SUPPORTS_64BIT_KERNEL
>> 1736 select CPU_SUPPORTS_HIGHMEM
>> 1737 select WEAK_ORDERING
>> 1738 select WEAK_REORDERING_BEYOND_LLSC
>> 1739 select CPU_HAS_PREFETCH
>> 1740 select CPU_MIPSR2
>> 1741 select CPU_SUPPORTS_HUGEPAGES
>> 1742 select MIPS_ASID_BITS_VARIABLE
173 help 1743 help
174 Enable if core variant has Performan !! 1744 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1745 endchoice
176 <<
177 If unsure, say N. <<
178 1746
179 config XTENSA_FAKE_NMI !! 1747 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1748 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1749 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1750 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1751 help
>> 1752 Choose this option to build a kernel for release 2 or later of the
>> 1753 MIPS32 architecture including features from the 3.5 release such as
>> 1754 support for Enhanced Virtual Addressing (EVA).
>> 1755
>> 1756 config CPU_MIPS32_3_5_EVA
>> 1757 bool "Enhanced Virtual Addressing (EVA)"
>> 1758 depends on CPU_MIPS32_3_5_FEATURES
>> 1759 select EVA
>> 1760 default y
>> 1761 help
>> 1762 Choose this option if you want to enable the Enhanced Virtual
>> 1763 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1764 One of its primary benefits is an increase in the maximum size
>> 1765 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1766
>> 1767 config CPU_MIPS32_R5_FEATURES
>> 1768 bool "MIPS32 Release 5 Features"
>> 1769 depends on SYS_HAS_CPU_MIPS32_R5
>> 1770 depends on CPU_MIPS32_R2
>> 1771 help
>> 1772 Choose this option to build a kernel for release 2 or later of the
>> 1773 MIPS32 architecture including features from release 5 such as
>> 1774 support for Extended Physical Addressing (XPA).
>> 1775
>> 1776 config CPU_MIPS32_R5_XPA
>> 1777 bool "Extended Physical Addressing (XPA)"
>> 1778 depends on CPU_MIPS32_R5_FEATURES
>> 1779 depends on !EVA
>> 1780 depends on !PAGE_SIZE_4KB
>> 1781 depends on SYS_SUPPORTS_HIGHMEM
>> 1782 select XPA
>> 1783 select HIGHMEM
>> 1784 select PHYS_ADDR_T_64BIT
182 default n 1785 default n
183 help 1786 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1787 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1788 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1789 benefit is to increase physical addressing equal to or greater
>> 1790 than 40 bits. Note that this has the side effect of turning on
>> 1791 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1792 If unsure, say 'N' here.
186 1793
187 If there are other interrupts at or !! 1794 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1795 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1796 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1797
193 If unsure, say N. !! 1798 config CPU_JUMP_WORKAROUNDS
>> 1799 bool
194 1800
195 config PFAULT !! 1801 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1802 bool "Loongson 2F Workarounds"
197 default y 1803 default y
>> 1804 select CPU_NOP_WORKAROUNDS
>> 1805 select CPU_JUMP_WORKAROUNDS
198 help 1806 help
199 Handle protection faults. MMU config !! 1807 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1808 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1809 unexpectedly. For more information please refer to the gas
>> 1810 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1811
>> 1812 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1813 are needed. The workarounds have no significant side effect on them
>> 1814 but may decrease the performance of the system so this option should
>> 1815 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1816 systems.
202 1817
203 If unsure, say Y. !! 1818 If unsure, please say Y.
>> 1819 endif # CPU_LOONGSON2F
204 1820
205 config XTENSA_UNALIGNED_USER !! 1821 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1822 bool
207 help !! 1823 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1824 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1825 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1826 select HAVE_KERNEL_LZMA
>> 1827 select HAVE_KERNEL_LZO
>> 1828 select HAVE_KERNEL_XZ
211 1829
212 Say Y here to enable unaligned memor !! 1830 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1831 bool
>> 1832 select SYS_SUPPORTS_ZBOOT
213 1833
214 config XTENSA_LOAD_STORE !! 1834 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1835 bool
216 help !! 1836 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1837
223 Say Y here to enable exception handl !! 1838 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1839 bool
>> 1840 select CPU_SUPPORTS_32BIT_KERNEL
>> 1841 select CPU_SUPPORTS_64BIT_KERNEL
>> 1842 select CPU_SUPPORTS_HIGHMEM
>> 1843 select CPU_SUPPORTS_HUGEPAGES
>> 1844 select ARCH_HAS_PHYS_TO_DMA
225 1845
226 config HAVE_SMP !! 1846 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1847 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1848 select CPU_MIPS32
229 select XTENSA_MX !! 1849 select CPU_MIPSR1
230 help !! 1850 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1851 select CPU_SUPPORTS_32BIT_KERNEL
232 supports Multiprocessing. Multiproce !! 1852 select CPU_SUPPORTS_HIGHMEM
233 the CPU core definition and currentl !! 1853 select CPU_SUPPORTS_CPUFREQ
234 1854
235 Multiprocessor support is implemente !! 1855 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1856 select SMP_UP if SMP
>> 1857 bool
237 1858
238 The MX interrupt distributer adds In !! 1859 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1860 bool
240 like the open cores ethernet driver !! 1861 select SYS_SUPPORTS_SMP
>> 1862 select SYS_SUPPORTS_HOTPLUG_CPU
241 1863
242 You still have to select "Enable SMP !! 1864 config CPU_BMIPS4380
>> 1865 bool
>> 1866 select MIPS_L1_CACHE_SHIFT_6
>> 1867 select SYS_SUPPORTS_SMP
>> 1868 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1869 select CPU_HAS_RIXI
243 1870
244 config SMP !! 1871 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1872 bool
246 depends on HAVE_SMP !! 1873 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1874 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1875 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1876 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1877 select CPU_HAS_RIXI
251 1878
252 config NR_CPUS !! 1879 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1880 bool
254 int "Maximum number of CPUs (2-32)" !! 1881 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1882 select CPU_HAS_RIXI
256 default "4" <<
257 1883
258 config HOTPLUG_CPU !! 1884 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1885 bool
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 1886
265 Say N if you want to disable CPU hot !! 1887 config SYS_HAS_CPU_LOONGSON2F
>> 1888 bool
>> 1889 select CPU_SUPPORTS_CPUFREQ
>> 1890 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1891 select CPU_SUPPORTS_UNCACHED_ACCELERATED
266 1892
267 config SECONDARY_RESET_VECTOR !! 1893 config SYS_HAS_CPU_LOONGSON1B
268 bool "Secondary cores use alternative !! 1894 bool
269 default y !! 1895
270 depends on HAVE_SMP !! 1896 config SYS_HAS_CPU_LOONGSON1C
>> 1897 bool
>> 1898
>> 1899 config SYS_HAS_CPU_MIPS32_R1
>> 1900 bool
>> 1901
>> 1902 config SYS_HAS_CPU_MIPS32_R2
>> 1903 bool
>> 1904
>> 1905 config SYS_HAS_CPU_MIPS32_R3_5
>> 1906 bool
>> 1907
>> 1908 config SYS_HAS_CPU_MIPS32_R5
>> 1909 bool
>> 1910
>> 1911 config SYS_HAS_CPU_MIPS32_R6
>> 1912 bool
>> 1913
>> 1914 config SYS_HAS_CPU_MIPS64_R1
>> 1915 bool
>> 1916
>> 1917 config SYS_HAS_CPU_MIPS64_R2
>> 1918 bool
>> 1919
>> 1920 config SYS_HAS_CPU_MIPS64_R6
>> 1921 bool
>> 1922
>> 1923 config SYS_HAS_CPU_R3000
>> 1924 bool
>> 1925
>> 1926 config SYS_HAS_CPU_TX39XX
>> 1927 bool
>> 1928
>> 1929 config SYS_HAS_CPU_VR41XX
>> 1930 bool
>> 1931
>> 1932 config SYS_HAS_CPU_R4300
>> 1933 bool
>> 1934
>> 1935 config SYS_HAS_CPU_R4X00
>> 1936 bool
>> 1937
>> 1938 config SYS_HAS_CPU_TX49XX
>> 1939 bool
>> 1940
>> 1941 config SYS_HAS_CPU_R5000
>> 1942 bool
>> 1943
>> 1944 config SYS_HAS_CPU_R5432
>> 1945 bool
>> 1946
>> 1947 config SYS_HAS_CPU_R5500
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_NEVADA
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_R8000
>> 1954 bool
>> 1955
>> 1956 config SYS_HAS_CPU_R10000
>> 1957 bool
>> 1958
>> 1959 config SYS_HAS_CPU_RM7000
>> 1960 bool
>> 1961
>> 1962 config SYS_HAS_CPU_SB1
>> 1963 bool
>> 1964
>> 1965 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1966 bool
>> 1967
>> 1968 config SYS_HAS_CPU_BMIPS
>> 1969 bool
>> 1970
>> 1971 config SYS_HAS_CPU_BMIPS32_3300
>> 1972 bool
>> 1973 select SYS_HAS_CPU_BMIPS
>> 1974
>> 1975 config SYS_HAS_CPU_BMIPS4350
>> 1976 bool
>> 1977 select SYS_HAS_CPU_BMIPS
>> 1978
>> 1979 config SYS_HAS_CPU_BMIPS4380
>> 1980 bool
>> 1981 select SYS_HAS_CPU_BMIPS
>> 1982
>> 1983 config SYS_HAS_CPU_BMIPS5000
>> 1984 bool
>> 1985 select SYS_HAS_CPU_BMIPS
>> 1986
>> 1987 config SYS_HAS_CPU_XLR
>> 1988 bool
>> 1989
>> 1990 config SYS_HAS_CPU_XLP
>> 1991 bool
>> 1992
>> 1993 #
>> 1994 # CPU may reorder R->R, R->W, W->R, W->W
>> 1995 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 1996 #
>> 1997 config WEAK_ORDERING
>> 1998 bool
>> 1999
>> 2000 #
>> 2001 # CPU may reorder reads and writes beyond LL/SC
>> 2002 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2003 #
>> 2004 config WEAK_REORDERING_BEYOND_LLSC
>> 2005 bool
>> 2006 endmenu
>> 2007
>> 2008 #
>> 2009 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2010 #
>> 2011 config CPU_MIPS32
>> 2012 bool
>> 2013 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2014
>> 2015 config CPU_MIPS64
>> 2016 bool
>> 2017 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2018
>> 2019 #
>> 2020 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2021 #
>> 2022 config CPU_MIPSR1
>> 2023 bool
>> 2024 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2025
>> 2026 config CPU_MIPSR2
>> 2027 bool
>> 2028 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2029 select CPU_HAS_RIXI
>> 2030 select MIPS_SPRAM
>> 2031
>> 2032 config CPU_MIPSR6
>> 2033 bool
>> 2034 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2035 select CPU_HAS_RIXI
>> 2036 select HAVE_ARCH_BITREVERSE
>> 2037 select MIPS_ASID_BITS_VARIABLE
>> 2038 select MIPS_CRC_SUPPORT
>> 2039 select MIPS_SPRAM
>> 2040
>> 2041 config EVA
>> 2042 bool
>> 2043
>> 2044 config XPA
>> 2045 bool
>> 2046
>> 2047 config SYS_SUPPORTS_32BIT_KERNEL
>> 2048 bool
>> 2049 config SYS_SUPPORTS_64BIT_KERNEL
>> 2050 bool
>> 2051 config CPU_SUPPORTS_32BIT_KERNEL
>> 2052 bool
>> 2053 config CPU_SUPPORTS_64BIT_KERNEL
>> 2054 bool
>> 2055 config CPU_SUPPORTS_CPUFREQ
>> 2056 bool
>> 2057 config CPU_SUPPORTS_ADDRWINCFG
>> 2058 bool
>> 2059 config CPU_SUPPORTS_HUGEPAGES
>> 2060 bool
>> 2061 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2062 bool
>> 2063 config MIPS_PGD_C0_CONTEXT
>> 2064 bool
>> 2065 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2066
>> 2067 #
>> 2068 # Set to y for ptrace access to watch registers.
>> 2069 #
>> 2070 config HARDWARE_WATCHPOINTS
>> 2071 bool
>> 2072 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2073
>> 2074 menu "Kernel type"
>> 2075
>> 2076 choice
>> 2077 prompt "Kernel code model"
271 help 2078 help
272 Secondary cores may be configured to !! 2079 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2080 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2081 large memory. You will only be presented a single option in this
>> 2082 menu if your system does not support both 32-bit and 64-bit kernels.
275 2083
276 config FAST_SYSCALL_XTENSA !! 2084 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2085 bool "32-bit kernel"
278 default n !! 2086 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2087 select TRAD_SIGNALS
279 help 2088 help
280 fast_syscall_xtensa is a syscall tha !! 2089 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2090
283 This syscall is deprecated. It may h !! 2091 config 64BIT
284 invalid arguments. It is provided on !! 2092 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2093 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2094 help
>> 2095 Select this option if you want to build a 64-bit kernel.
286 2096
287 If unsure, say N. !! 2097 endchoice
288 2098
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2099 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2100 bool "KVM Guest Kernel"
291 default n !! 2101 depends on BROKEN_ON_SMP
>> 2102 help
>> 2103 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2104 mode.
>> 2105
>> 2106 config KVM_GUEST_TIMER_FREQ
>> 2107 int "Count/Compare Timer Frequency (MHz)"
>> 2108 depends on KVM_GUEST
>> 2109 default 100
292 help 2110 help
293 fast_syscall_spill_registers is a sy !! 2111 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2112 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2113 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2114
297 invalid arguments. It is provided on !! 2115 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2116 bool "48 bits virtual memory"
>> 2117 depends on 64BIT
>> 2118 help
>> 2119 Support a maximum at least 48 bits of application virtual
>> 2120 memory. Default is 40 bits or less, depending on the CPU.
>> 2121 For page sizes 16k and above, this option results in a small
>> 2122 memory overhead for page tables. For 4k page size, a fourth
>> 2123 level of page tables is added which imposes both a memory
>> 2124 overhead as well as slower TLB fault handling.
299 2125
300 If unsure, say N. 2126 If unsure, say N.
301 2127
302 choice 2128 choice
303 prompt "Kernel ABI" !! 2129 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2130 default PAGE_SIZE_4KB
305 help !! 2131
306 Select ABI for the kernel code. This !! 2132 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2133 bool "4kB"
308 kernel/userspace ABI is possible and !! 2134 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2135 help
310 In case both kernel and userspace su !! 2136 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2137 R3000-family processors this is the only available page size. Using
312 build. !! 2138 4kB page size will minimize memory consumption and is therefore
313 !! 2139 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2140
315 !! 2141 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2142 bool "8kB"
317 bool "Default ABI" !! 2143 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2144 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2145 help
320 selected for the toolchain. !! 2146 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2147 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2148 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2149 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2150
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2151 config PAGE_SIZE_16KB
326 help !! 2152 bool "16kB"
327 Select this option to compile kernel !! 2153 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2154 help
329 When this option is not selected the !! 2155 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2156 the price of higher memory consumption. This option is available on
>> 2157 all non-R3000 family processors. Note that you will need a suitable
>> 2158 Linux distribution to support this.
>> 2159
>> 2160 config PAGE_SIZE_32KB
>> 2161 bool "32kB"
>> 2162 depends on CPU_CAVIUM_OCTEON
>> 2163 depends on !MIPS_VA_BITS_48
>> 2164 help
>> 2165 Using 32kB page size will result in higher performance kernel at
>> 2166 the price of higher memory consumption. This option is available
>> 2167 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2168 distribution to support this.
>> 2169
>> 2170 config PAGE_SIZE_64KB
>> 2171 bool "64kB"
>> 2172 depends on !CPU_R3000 && !CPU_TX39XX
>> 2173 help
>> 2174 Using 64kB page size will result in higher performance kernel at
>> 2175 the price of higher memory consumption. This option is available on
>> 2176 all non-R3000 family processor. Not that at the time of this
>> 2177 writing this option is still high experimental.
331 2178
332 endchoice 2179 endchoice
333 2180
334 config USER_ABI_CALL0 !! 2181 config FORCE_MAX_ZONEORDER
>> 2182 int "Maximum zone order"
>> 2183 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2184 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2185 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2186 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2187 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2188 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2189 range 11 64
>> 2190 default "11"
>> 2191 help
>> 2192 The kernel memory allocator divides physically contiguous memory
>> 2193 blocks into "zones", where each zone is a power of two number of
>> 2194 pages. This option selects the largest power of two that the kernel
>> 2195 keeps in the memory allocator. If you need to allocate very large
>> 2196 blocks of physically contiguous memory, then you may need to
>> 2197 increase this value.
>> 2198
>> 2199 This config option is actually maximum order plus one. For example,
>> 2200 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2201
>> 2202 The page size is not necessarily 4KB. Keep this in mind
>> 2203 when choosing a value for this option.
>> 2204
>> 2205 config BOARD_SCACHE
335 bool 2206 bool
336 2207
337 choice !! 2208 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2209 bool
339 default USER_ABI_DEFAULT !! 2210 select BOARD_SCACHE
>> 2211
>> 2212 #
>> 2213 # Support for a MIPS32 / MIPS64 style S-caches
>> 2214 #
>> 2215 config MIPS_CPU_SCACHE
>> 2216 bool
>> 2217 select BOARD_SCACHE
>> 2218
>> 2219 config R5000_CPU_SCACHE
>> 2220 bool
>> 2221 select BOARD_SCACHE
>> 2222
>> 2223 config RM7000_CPU_SCACHE
>> 2224 bool
>> 2225 select BOARD_SCACHE
>> 2226
>> 2227 config SIBYTE_DMA_PAGEOPS
>> 2228 bool "Use DMA to clear/copy pages"
>> 2229 depends on CPU_SB1
340 help 2230 help
341 Select supported userspace ABI. !! 2231 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2232 channel. These DMA channels are otherwise unused by the standard
>> 2233 SiByte Linux port. Seems to give a small performance benefit.
>> 2234
>> 2235 config CPU_HAS_PREFETCH
>> 2236 bool
342 2237
343 If unsure, choose the default ABI. !! 2238 config CPU_GENERIC_DUMP_TLB
>> 2239 bool
>> 2240 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
>> 2241
>> 2242 config CPU_R4K_FPU
>> 2243 bool
>> 2244 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2245
>> 2246 config CPU_R4K_CACHE_TLB
>> 2247 bool
>> 2248 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
344 2249
345 config USER_ABI_DEFAULT !! 2250 config MIPS_MT_SMP
346 bool "Default ABI only" !! 2251 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2252 default y
>> 2253 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2254 select CPU_MIPSR2_IRQ_VI
>> 2255 select CPU_MIPSR2_IRQ_EI
>> 2256 select SYNC_R4K
>> 2257 select MIPS_MT
>> 2258 select SMP
>> 2259 select SMP_UP
>> 2260 select SYS_SUPPORTS_SMP
>> 2261 select SYS_SUPPORTS_SCHED_SMT
>> 2262 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2263 help
>> 2264 This is a kernel model which is known as SMVP. This is supported
>> 2265 on cores with the MT ASE and uses the available VPEs to implement
>> 2266 virtual processors which supports SMP. This is equivalent to the
>> 2267 Intel Hyperthreading feature. For further information go to
>> 2268 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2269
>> 2270 config MIPS_MT
>> 2271 bool
>> 2272
>> 2273 config SCHED_SMT
>> 2274 bool "SMT (multithreading) scheduler support"
>> 2275 depends on SYS_SUPPORTS_SCHED_SMT
>> 2276 default n
347 help 2277 help
348 Assume default userspace ABI. For XE !! 2278 SMT scheduler support improves the CPU scheduler's decision making
349 call0 ABI binaries may be run on suc !! 2279 when dealing with MIPS MT enabled cores at a cost of slightly
350 will not work correctly for them. !! 2280 increased overhead in some places. If unsure say N here.
>> 2281
>> 2282 config SYS_SUPPORTS_SCHED_SMT
>> 2283 bool
>> 2284
>> 2285 config SYS_SUPPORTS_MULTITHREADING
>> 2286 bool
351 2287
352 config USER_ABI_CALL0_ONLY !! 2288 config MIPS_MT_FPAFF
353 bool "Call0 ABI only" !! 2289 bool "Dynamic FPU affinity for FP-intensive threads"
354 select USER_ABI_CALL0 !! 2290 default y
>> 2291 depends on MIPS_MT_SMP
>> 2292
>> 2293 config MIPSR2_TO_R6_EMULATOR
>> 2294 bool "MIPS R2-to-R6 emulator"
>> 2295 depends on CPU_MIPSR6
>> 2296 default y
355 help 2297 help
356 Select this option to support only c !! 2298 Choose this option if you want to run non-R6 MIPS userland code.
357 Windowed ABI binaries will crash wit !! 2299 Even if you say 'Y' here, the emulator will still be disabled by
358 an illegal instruction exception on !! 2300 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2301 The only reason this is a build-time option is to save ~14K from the
>> 2302 final kernel image.
359 2303
360 Choose this option if you're plannin !! 2304 config SYS_SUPPORTS_VPE_LOADER
361 built with call0 ABI. !! 2305 bool
>> 2306 depends on SYS_SUPPORTS_MULTITHREADING
>> 2307 help
>> 2308 Indicates that the platform supports the VPE loader, and provides
>> 2309 physical_memsize.
362 2310
363 config USER_ABI_CALL0_PROBE !! 2311 config MIPS_VPE_LOADER
364 bool "Support both windowed and call0 !! 2312 bool "VPE loader support."
365 select USER_ABI_CALL0 !! 2313 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2314 select CPU_MIPSR2_IRQ_VI
>> 2315 select CPU_MIPSR2_IRQ_EI
>> 2316 select MIPS_MT
366 help 2317 help
367 Select this option to support both w !! 2318 Includes a loader for loading an elf relocatable object
368 ABIs. When enabled all processes are !! 2319 onto another VPE and running it.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 2320
373 This option should be enabled for th !! 2321 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2322 bool
>> 2323 default "y"
>> 2324 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2325
376 Note that Xtensa ISA does not guaran !! 2326 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2327 bool
378 PS.WOE is disabled, check whether th !! 2328 default "y"
>> 2329 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2330
380 endchoice !! 2331 config MIPS_VPE_LOADER_TOM
>> 2332 bool "Load VPE program into memory hidden from linux"
>> 2333 depends on MIPS_VPE_LOADER
>> 2334 default y
>> 2335 help
>> 2336 The loader can use memory that is present but has been hidden from
>> 2337 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2338 you to ensure the amount you put in the option and the space your
>> 2339 program requires is less or equal to the amount physically present.
>> 2340
>> 2341 config MIPS_VPE_APSP_API
>> 2342 bool "Enable support for AP/SP API (RTLX)"
>> 2343 depends on MIPS_VPE_LOADER
381 2344
382 endmenu !! 2345 config MIPS_VPE_APSP_API_CMP
>> 2346 bool
>> 2347 default "y"
>> 2348 depends on MIPS_VPE_APSP_API && MIPS_CMP
383 2349
384 config XTENSA_CALIBRATE_CCOUNT !! 2350 config MIPS_VPE_APSP_API_MT
385 def_bool n !! 2351 bool
>> 2352 default "y"
>> 2353 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2354
>> 2355 config MIPS_CMP
>> 2356 bool "MIPS CMP framework support (DEPRECATED)"
>> 2357 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2358 select SMP
>> 2359 select SYNC_R4K
>> 2360 select SYS_SUPPORTS_SMP
>> 2361 select WEAK_ORDERING
>> 2362 default n
386 help 2363 help
387 On some platforms (XT2000, for examp !! 2364 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2365 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2366 its ability to start secondary CPUs.
>> 2367
>> 2368 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2369 instead of this.
>> 2370
>> 2371 config MIPS_CPS
>> 2372 bool "MIPS Coherent Processing System support"
>> 2373 depends on SYS_SUPPORTS_MIPS_CPS
>> 2374 select MIPS_CM
>> 2375 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2376 select SMP
>> 2377 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2378 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2379 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2380 select SYS_SUPPORTS_SMP
>> 2381 select WEAK_ORDERING
>> 2382 help
>> 2383 Select this if you wish to run an SMP kernel across multiple cores
>> 2384 within a MIPS Coherent Processing System. When this option is
>> 2385 enabled the kernel will probe for other cores and boot them with
>> 2386 no external assistance. It is safe to enable this when hardware
>> 2387 support is unavailable.
390 2388
391 config SERIAL_CONSOLE !! 2389 config MIPS_CPS_PM
392 def_bool n !! 2390 depends on MIPS_CPS
>> 2391 bool
393 2392
394 config PLATFORM_HAVE_XIP !! 2393 config MIPS_CM
395 def_bool n !! 2394 bool
>> 2395 select MIPS_CPC
>> 2396
>> 2397 config MIPS_CPC
>> 2398 bool
>> 2399
>> 2400 config SB1_PASS_2_WORKAROUNDS
>> 2401 bool
>> 2402 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2403 default y
>> 2404
>> 2405 config SB1_PASS_2_1_WORKAROUNDS
>> 2406 bool
>> 2407 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2408 default y
396 2409
397 menu "Platform options" <<
398 2410
399 choice 2411 choice
400 prompt "Xtensa System Type" !! 2412 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS !! 2413
>> 2414 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2415 bool "None"
>> 2416 help
>> 2417 Select this if you want neither microMIPS nor SmartMIPS support
402 2418
403 config XTENSA_PLATFORM_ISS !! 2419 config CPU_HAS_SMARTMIPS
404 bool "ISS" !! 2420 depends on SYS_SUPPORTS_SMARTMIPS
405 select XTENSA_CALIBRATE_CCOUNT !! 2421 bool "SmartMIPS"
406 select SERIAL_CONSOLE !! 2422 help
407 help !! 2423 SmartMIPS is a extension of the MIPS32 architecture aimed at
408 ISS is an acronym for Tensilica's In !! 2424 increased security at both hardware and software level for
409 !! 2425 smartcards. Enabling this option will allow proper use of the
410 config XTENSA_PLATFORM_XT2000 !! 2426 SmartMIPS instructions by Linux applications. However a kernel with
411 bool "XT2000" !! 2427 this option will not work on a MIPS core without SmartMIPS core. If
412 help !! 2428 you don't know you probably don't have SmartMIPS and should say N
413 XT2000 is the name of Tensilica's fe !! 2429 here.
414 This hardware is capable of running !! 2430
415 !! 2431 config CPU_MICROMIPS
416 config XTENSA_PLATFORM_XTFPGA !! 2432 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
417 bool "XTFPGA" !! 2433 bool "microMIPS"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2434 help
424 XTFPGA is the name of Tensilica boar !! 2435 When this option is enabled the kernel will be built using the
425 This hardware is capable of running !! 2436 microMIPS ISA
426 2437
427 endchoice 2438 endchoice
428 2439
429 config PLATFORM_NR_IRQS !! 2440 config CPU_HAS_MSA
>> 2441 bool "Support for the MIPS SIMD Architecture"
>> 2442 depends on CPU_SUPPORTS_MSA
>> 2443 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2444 help
>> 2445 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2446 and a set of SIMD instructions to operate on them. When this option
>> 2447 is enabled the kernel will support allocating & switching MSA
>> 2448 vector register contexts. If you know that your kernel will only be
>> 2449 running on CPUs which do not support MSA or that your userland will
>> 2450 not be making use of it then you may wish to say N here to reduce
>> 2451 the size & complexity of your kernel.
>> 2452
>> 2453 If unsure, say Y.
>> 2454
>> 2455 config CPU_HAS_WB
>> 2456 bool
>> 2457
>> 2458 config XKS01
>> 2459 bool
>> 2460
>> 2461 config CPU_HAS_RIXI
>> 2462 bool
>> 2463
>> 2464 #
>> 2465 # Vectored interrupt mode is an R2 feature
>> 2466 #
>> 2467 config CPU_MIPSR2_IRQ_VI
>> 2468 bool
>> 2469
>> 2470 #
>> 2471 # Extended interrupt mode is an R2 feature
>> 2472 #
>> 2473 config CPU_MIPSR2_IRQ_EI
>> 2474 bool
>> 2475
>> 2476 config CPU_HAS_SYNC
>> 2477 bool
>> 2478 depends on !CPU_R3000
>> 2479 default y
>> 2480
>> 2481 #
>> 2482 # CPU non-features
>> 2483 #
>> 2484 config CPU_DADDI_WORKAROUNDS
>> 2485 bool
>> 2486
>> 2487 config CPU_R4000_WORKAROUNDS
>> 2488 bool
>> 2489 select CPU_R4400_WORKAROUNDS
>> 2490
>> 2491 config CPU_R4400_WORKAROUNDS
>> 2492 bool
>> 2493
>> 2494 config MIPS_ASID_SHIFT
430 int 2495 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2496 default 6 if CPU_R3000 || CPU_TX39XX
>> 2497 default 4 if CPU_R8000
432 default 0 2498 default 0
433 2499
434 config XTENSA_CPU_CLOCK !! 2500 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2501 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2502 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2503 default 6 if CPU_R3000 || CPU_TX39XX
>> 2504 default 8
438 2505
439 config GENERIC_CALIBRATE_DELAY !! 2506 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2507 bool
441 help <<
442 The BogoMIPS value can easily be der <<
443 2508
444 config CMDLINE_BOOL !! 2509 config MIPS_CRC_SUPPORT
445 bool "Default bootloader kernel argume !! 2510 bool
446 2511
447 config CMDLINE !! 2512 #
448 string "Initial kernel command string" !! 2513 # - Highmem only makes sense for the 32-bit kernel.
449 depends on CMDLINE_BOOL !! 2514 # - The current highmem code will only work properly on physically indexed
450 default "console=ttyS0,38400 root=/dev !! 2515 # caches such as R3000, SB1, R7000 or those that look like they're virtually
451 help !! 2516 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
452 On some architectures (EBSA110 and C !! 2517 # moment we protect the user and offer the highmem option only on machines
453 for the boot loader to pass argument !! 2518 # where it's known to be safe. This will not offer highmem on a few systems
454 architectures, you should supply som !! 2519 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
455 time by entering them here. As a min !! 2520 # indexed CPUs but we're playing safe.
456 memory size and the root device (e.g !! 2521 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2522 # know they might have memory configurations that could make use of highmem
>> 2523 # support.
>> 2524 #
>> 2525 config HIGHMEM
>> 2526 bool "High Memory Support"
>> 2527 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
457 2528
458 config USE_OF !! 2529 config CPU_SUPPORTS_HIGHMEM
459 bool "Flattened Device Tree support" !! 2530 bool
460 select OF <<
461 select OF_EARLY_FLATTREE <<
462 help <<
463 Include support for flattened device <<
464 2531
465 config BUILTIN_DTB_SOURCE !! 2532 config SYS_SUPPORTS_HIGHMEM
466 string "DTB to build into the kernel i !! 2533 bool
467 depends on OF <<
468 2534
469 config PARSE_BOOTPARAM !! 2535 config SYS_SUPPORTS_SMARTMIPS
470 bool "Parse bootparam block" !! 2536 bool
471 default y <<
472 help <<
473 Parse parameters passed to the kerne <<
474 be disabled if the kernel is known t <<
475 2537
476 If unsure, say Y. !! 2538 config SYS_SUPPORTS_MICROMIPS
>> 2539 bool
477 2540
478 choice !! 2541 config SYS_SUPPORTS_MIPS16
479 prompt "Semihosting interface" !! 2542 bool
480 default XTENSA_SIMCALL_ISS <<
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2543 help
483 Choose semihosting interface that wi !! 2544 This option must be set if a kernel might be executed on a MIPS16-
484 block device and networking. !! 2545 enabled CPU even if MIPS16 is not actually being used. In other
>> 2546 words, it makes the kernel MIPS16-tolerant.
485 2547
486 config XTENSA_SIMCALL_ISS !! 2548 config CPU_SUPPORTS_MSA
487 bool "simcall" !! 2549 bool
488 help !! 2550
489 Use simcall instruction. simcall is !! 2551 config ARCH_FLATMEM_ENABLE
490 it does nothing on hardware. !! 2552 def_bool y
>> 2553 depends on !NUMA && !CPU_LOONGSON2
491 2554
492 config XTENSA_SIMCALL_GDBIO !! 2555 config ARCH_DISCONTIGMEM_ENABLE
493 bool "GDBIO" !! 2556 bool
>> 2557 default y if SGI_IP27
494 help 2558 help
495 Use break instruction. It is availab !! 2559 Say Y to support efficient handling of discontiguous physical memory,
496 is attached to it via JTAG. !! 2560 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2561 or have huge holes in the physical address space for other reasons.
>> 2562 See <file:Documentation/vm/numa.rst> for more.
497 2563
498 endchoice !! 2564 config ARCH_SPARSEMEM_ENABLE
>> 2565 bool
>> 2566 select SPARSEMEM_STATIC
499 2567
500 config BLK_DEV_SIMDISK !! 2568 config NUMA
501 tristate "Host file-based simulated bl !! 2569 bool "NUMA Support"
502 default n !! 2570 depends on SYS_SUPPORTS_NUMA
503 depends on XTENSA_PLATFORM_ISS && BLOC !! 2571 help
504 help !! 2572 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
505 Create block devices that map to fil !! 2573 Access). This option improves performance on systems with more
506 Device binding to host file may be c !! 2574 than two nodes; on two node systems it is generally better to
507 interface provided the device is not !! 2575 leave it disabled; on single node systems disable this option
508 !! 2576 disabled.
509 config BLK_DEV_SIMDISK_COUNT !! 2577
510 int "Number of host file-based simulat !! 2578 config SYS_SUPPORTS_NUMA
511 range 1 10 !! 2579 bool
512 depends on BLK_DEV_SIMDISK !! 2580
513 default 2 !! 2581 config RELOCATABLE
>> 2582 bool "Relocatable kernel"
>> 2583 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2584 help
>> 2585 This builds a kernel image that retains relocation information
>> 2586 so it can be loaded someplace besides the default 1MB.
>> 2587 The relocations make the kernel binary about 15% larger,
>> 2588 but are discarded at runtime
>> 2589
>> 2590 config RELOCATION_TABLE_SIZE
>> 2591 hex "Relocation table size"
>> 2592 depends on RELOCATABLE
>> 2593 range 0x0 0x01000000
>> 2594 default "0x00100000"
>> 2595 ---help---
>> 2596 A table of relocation data will be appended to the kernel binary
>> 2597 and parsed at boot to fix up the relocated kernel.
>> 2598
>> 2599 This option allows the amount of space reserved for the table to be
>> 2600 adjusted, although the default of 1Mb should be ok in most cases.
>> 2601
>> 2602 The build will fail and a valid size suggested if this is too small.
>> 2603
>> 2604 If unsure, leave at the default value.
>> 2605
>> 2606 config RANDOMIZE_BASE
>> 2607 bool "Randomize the address of the kernel image"
>> 2608 depends on RELOCATABLE
>> 2609 ---help---
>> 2610 Randomizes the physical and virtual address at which the
>> 2611 kernel image is loaded, as a security feature that
>> 2612 deters exploit attempts relying on knowledge of the location
>> 2613 of kernel internals.
>> 2614
>> 2615 Entropy is generated using any coprocessor 0 registers available.
>> 2616
>> 2617 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2618
>> 2619 If unsure, say N.
>> 2620
>> 2621 config RANDOMIZE_BASE_MAX_OFFSET
>> 2622 hex "Maximum kASLR offset" if EXPERT
>> 2623 depends on RANDOMIZE_BASE
>> 2624 range 0x0 0x40000000 if EVA || 64BIT
>> 2625 range 0x0 0x08000000
>> 2626 default "0x01000000"
>> 2627 ---help---
>> 2628 When kASLR is active, this provides the maximum offset that will
>> 2629 be applied to the kernel image. It should be set according to the
>> 2630 amount of physical RAM available in the target system minus
>> 2631 PHYSICAL_START and must be a power of 2.
>> 2632
>> 2633 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2634 EVA or 64-bit. The default is 16Mb.
>> 2635
>> 2636 config NODES_SHIFT
>> 2637 int
>> 2638 default "6"
>> 2639 depends on NEED_MULTIPLE_NODES
>> 2640
>> 2641 config HW_PERF_EVENTS
>> 2642 bool "Enable hardware performance counter support for perf events"
>> 2643 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
>> 2644 default y
514 help 2645 help
515 This is the default minimal number o !! 2646 Enable hardware performance counter support for perf events. If
516 Kernel/module parameter 'simdisk_cou !! 2647 disabled, perf events will use software events only.
517 value at runtime. More file names (b !! 2648
518 specified as parameters, simdisk_cou !! 2649 config SMP
519 !! 2650 bool "Multi-Processing support"
520 config SIMDISK0_FILENAME !! 2651 depends on SYS_SUPPORTS_SMP
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2652 help
541 There's a 2x16 LCD on most of XTFPGA !! 2653 This enables support for systems with more than one CPU. If you have
542 progress messages there during bootu !! 2654 a system with only one CPU, say N. If you have a system with more
543 during board bringup. !! 2655 than one CPU, say Y.
>> 2656
>> 2657 If you say N here, the kernel will run on uni- and multiprocessor
>> 2658 machines, but will use only one CPU of a multiprocessor machine. If
>> 2659 you say Y here, the kernel will run on many, but not all,
>> 2660 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2661 will run faster if you say N here.
544 2662
545 If unsure, say N. !! 2663 People using multiprocessor machines who say Y here should also say
>> 2664 Y to "Enhanced Real Time Clock Support", below.
546 2665
547 config XTFPGA_LCD_BASE_ADDR !! 2666 See also the SMP-HOWTO available at
548 hex "XTFPGA LCD base address" !! 2667 <http://www.tldp.org/docs.html#howto>.
549 depends on XTFPGA_LCD !! 2668
550 default "0x0d0c0000" !! 2669 If you don't know what to do here, say N.
551 help !! 2670
552 Base address of the LCD controller i !! 2671 config HOTPLUG_CPU
553 Different boards from XTFPGA family !! 2672 bool "Support for hot-pluggable CPUs"
554 addresses. Please consult prototypin !! 2673 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help 2674 help
562 LCD may be connected with 4- or 8-bi !! 2675 Say Y here to allow turning CPUs off and on. CPUs can be
563 only be used with 8-bit interface. P !! 2676 controlled through /sys/devices/system/cpu.
564 guide for your board for the correct !! 2677 (Note: power management support will enable this option
565 !! 2678 automatically on SMP systems. )
566 comment "Kernel memory layout" !! 2679 Say N if you want to disable CPU hotplug.
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2680
617 If unsure, say N. !! 2681 config SMP_UP
>> 2682 bool
>> 2683
>> 2684 config SYS_SUPPORTS_MIPS_CMP
>> 2685 bool
>> 2686
>> 2687 config SYS_SUPPORTS_MIPS_CPS
>> 2688 bool
>> 2689
>> 2690 config SYS_SUPPORTS_SMP
>> 2691 bool
>> 2692
>> 2693 config NR_CPUS_DEFAULT_4
>> 2694 bool
618 2695
619 config MEMMAP_CACHEATTR !! 2696 config NR_CPUS_DEFAULT_8
620 hex "Cache attributes for the memory a !! 2697 bool
621 depends on !MMU <<
622 default 0x22222222 <<
623 help <<
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2698
683 If unsure, leave the default value h !! 2699 config NR_CPUS_DEFAULT_16
>> 2700 bool
>> 2701
>> 2702 config NR_CPUS_DEFAULT_32
>> 2703 bool
>> 2704
>> 2705 config NR_CPUS_DEFAULT_64
>> 2706 bool
>> 2707
>> 2708 config NR_CPUS
>> 2709 int "Maximum number of CPUs (2-256)"
>> 2710 range 2 256
>> 2711 depends on SMP
>> 2712 default "4" if NR_CPUS_DEFAULT_4
>> 2713 default "8" if NR_CPUS_DEFAULT_8
>> 2714 default "16" if NR_CPUS_DEFAULT_16
>> 2715 default "32" if NR_CPUS_DEFAULT_32
>> 2716 default "64" if NR_CPUS_DEFAULT_64
>> 2717 help
>> 2718 This allows you to specify the maximum number of CPUs which this
>> 2719 kernel will support. The maximum supported value is 32 for 32-bit
>> 2720 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2721 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2722 and 2 for all others.
>> 2723
>> 2724 This is purely to save memory - each supported CPU adds
>> 2725 approximately eight kilobytes to the kernel image. For best
>> 2726 performance should round up your number of processors to the next
>> 2727 power of two.
>> 2728
>> 2729 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2730 bool
>> 2731
>> 2732 config MIPS_NR_CPU_NR_MAP_1024
>> 2733 bool
>> 2734
>> 2735 config MIPS_NR_CPU_NR_MAP
>> 2736 int
>> 2737 depends on SMP
>> 2738 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2739 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2740
>> 2741 #
>> 2742 # Timer Interrupt Frequency Configuration
>> 2743 #
684 2744
685 choice 2745 choice
686 prompt "Relocatable vectors location" !! 2746 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2747 default HZ_250
688 help 2748 help
689 Choose whether relocatable vectors a !! 2749 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2750
691 configurations without VECBASE regis !! 2751 config HZ_24
692 placed at their hardware-defined loc !! 2752 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2753
694 config XTENSA_VECTORS_IN_TEXT !! 2754 config HZ_48
695 bool "Merge relocatable vectors into k !! 2755 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2756
697 help !! 2757 config HZ_100
698 This option puts relocatable vectors !! 2758 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2759
700 This is a safe choice for most confi !! 2760 config HZ_128
701 !! 2761 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2762
703 bool "Put relocatable vectors at fixed !! 2763 config HZ_250
704 help !! 2764 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2765
706 Vectors are merged with the .init da !! 2766 config HZ_256
707 are copied into their designated loc !! 2767 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2768
709 XIP-aware MTD support. !! 2769 config HZ_1000
>> 2770 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2771
>> 2772 config HZ_1024
>> 2773 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2774
711 endchoice 2775 endchoice
712 2776
713 config VECTORS_ADDR !! 2777 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2778 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2779
729 config PLATFORM_WANT_DEFAULT_MEM !! 2780 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2781 bool
>> 2782
>> 2783 config SYS_SUPPORTS_100HZ
>> 2784 bool
>> 2785
>> 2786 config SYS_SUPPORTS_128HZ
>> 2787 bool
>> 2788
>> 2789 config SYS_SUPPORTS_250HZ
>> 2790 bool
>> 2791
>> 2792 config SYS_SUPPORTS_256HZ
>> 2793 bool
>> 2794
>> 2795 config SYS_SUPPORTS_1000HZ
>> 2796 bool
>> 2797
>> 2798 config SYS_SUPPORTS_1024HZ
>> 2799 bool
>> 2800
>> 2801 config SYS_SUPPORTS_ARBIT_HZ
>> 2802 bool
>> 2803 default y if !SYS_SUPPORTS_24HZ && \
>> 2804 !SYS_SUPPORTS_48HZ && \
>> 2805 !SYS_SUPPORTS_100HZ && \
>> 2806 !SYS_SUPPORTS_128HZ && \
>> 2807 !SYS_SUPPORTS_250HZ && \
>> 2808 !SYS_SUPPORTS_256HZ && \
>> 2809 !SYS_SUPPORTS_1000HZ && \
>> 2810 !SYS_SUPPORTS_1024HZ
731 2811
732 config DEFAULT_MEM_START !! 2812 config HZ
733 hex !! 2813 int
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2814 default 24 if HZ_24
735 default 0x60000000 if PLATFORM_WANT_DE !! 2815 default 48 if HZ_48
736 default 0x00000000 !! 2816 default 100 if HZ_100
>> 2817 default 128 if HZ_128
>> 2818 default 250 if HZ_250
>> 2819 default 256 if HZ_256
>> 2820 default 1000 if HZ_1000
>> 2821 default 1024 if HZ_1024
>> 2822
>> 2823 config SCHED_HRTICK
>> 2824 def_bool HIGH_RES_TIMERS
>> 2825
>> 2826 config KEXEC
>> 2827 bool "Kexec system call"
>> 2828 select KEXEC_CORE
>> 2829 help
>> 2830 kexec is a system call that implements the ability to shutdown your
>> 2831 current kernel, and to start another kernel. It is like a reboot
>> 2832 but it is independent of the system firmware. And like a reboot
>> 2833 you can start any kernel with it, not just Linux.
>> 2834
>> 2835 The name comes from the similarity to the exec system call.
>> 2836
>> 2837 It is an ongoing process to be certain the hardware in a machine
>> 2838 is properly shutdown, so do not be surprised if this code does not
>> 2839 initially work for you. As of this writing the exact hardware
>> 2840 interface is strongly in flux, so no good recommendation can be
>> 2841 made.
>> 2842
>> 2843 config CRASH_DUMP
>> 2844 bool "Kernel crash dumps"
>> 2845 help
>> 2846 Generate crash dump after being started by kexec.
>> 2847 This should be normally only set in special crash dump kernels
>> 2848 which are loaded in the main kernel with kexec-tools into
>> 2849 a specially reserved region and then later executed after
>> 2850 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2851 to a memory address not used by the main kernel or firmware using
>> 2852 PHYSICAL_START.
>> 2853
>> 2854 config PHYSICAL_START
>> 2855 hex "Physical address where the kernel is loaded"
>> 2856 default "0xffffffff84000000"
>> 2857 depends on CRASH_DUMP
>> 2858 help
>> 2859 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2860 If you plan to use kernel for capturing the crash dump change
>> 2861 this value to start of the reserved region (the "X" value as
>> 2862 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2863 passed to the panic-ed kernel).
>> 2864
>> 2865 config SECCOMP
>> 2866 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2867 depends on PROC_FS
>> 2868 default y
737 help 2869 help
738 This is the base address used for bo !! 2870 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2871 that may need to compute untrusted bytecode during their
>> 2872 execution. By using pipes or other transports made available to
>> 2873 the process as file descriptors supporting the read/write
>> 2874 syscalls, it's possible to isolate those applications in
>> 2875 their own address space using seccomp. Once seccomp is
>> 2876 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2877 and the task is only allowed to execute a few safe syscalls
>> 2878 defined by each seccomp mode.
>> 2879
>> 2880 If unsure, say Y. Only embedded should say N here.
>> 2881
>> 2882 config MIPS_O32_FP64_SUPPORT
>> 2883 bool "Support for O32 binaries using 64-bit FP"
>> 2884 depends on 32BIT || MIPS32_O32
>> 2885 help
>> 2886 When this is enabled, the kernel will support use of 64-bit floating
>> 2887 point registers with binaries using the O32 ABI along with the
>> 2888 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2889 32-bit MIPS systems this support is at the cost of increasing the
>> 2890 size and complexity of the compiled FPU emulator. Thus if you are
>> 2891 running a MIPS32 system and know that none of your userland binaries
>> 2892 will require 64-bit floating point, you may wish to reduce the size
>> 2893 of your kernel & potentially improve FP emulation performance by
>> 2894 saying N here.
>> 2895
>> 2896 Although binutils currently supports use of this flag the details
>> 2897 concerning its effect upon the O32 ABI in userland are still being
>> 2898 worked on. In order to avoid userland becoming dependant upon current
>> 2899 behaviour before the details have been finalised, this option should
>> 2900 be considered experimental and only enabled by those working upon
>> 2901 said details.
>> 2902
>> 2903 If unsure, say N.
740 2904
741 If unsure, leave the default value h !! 2905 config USE_OF
>> 2906 bool
>> 2907 select OF
>> 2908 select OF_EARLY_FLATTREE
>> 2909 select IRQ_DOMAIN
>> 2910
>> 2911 config BUILTIN_DTB
>> 2912 bool
742 2913
743 choice 2914 choice
744 prompt "KSEG layout" !! 2915 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2916 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2917
>> 2918 config MIPS_NO_APPENDED_DTB
>> 2919 bool "None"
>> 2920 help
>> 2921 Do not enable appended dtb support.
>> 2922
>> 2923 config MIPS_ELF_APPENDED_DTB
>> 2924 bool "vmlinux"
>> 2925 help
>> 2926 With this option, the boot code will look for a device tree binary
>> 2927 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2928 it is empty and the DTB can be appended using binutils command
>> 2929 objcopy:
>> 2930
>> 2931 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2932
>> 2933 This is meant as a backward compatiblity convenience for those
>> 2934 systems with a bootloader that can't be upgraded to accommodate
>> 2935 the documented boot protocol using a device tree.
>> 2936
>> 2937 config MIPS_RAW_APPENDED_DTB
>> 2938 bool "vmlinux.bin or vmlinuz.bin"
>> 2939 help
>> 2940 With this option, the boot code will look for a device tree binary
>> 2941 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2942 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2943
>> 2944 This is meant as a backward compatibility convenience for those
>> 2945 systems with a bootloader that can't be upgraded to accommodate
>> 2946 the documented boot protocol using a device tree.
>> 2947
>> 2948 Beware that there is very little in terms of protection against
>> 2949 this option being confused by leftover garbage in memory that might
>> 2950 look like a DTB header after a reboot if no actual DTB is appended
>> 2951 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2952 if you don't intend to always append a DTB.
772 endchoice 2953 endchoice
773 2954
774 config HIGHMEM !! 2955 choice
775 bool "High Memory Support" !! 2956 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2957 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2958 !MIPS_MALTA && \
>> 2959 !CAVIUM_OCTEON_SOC
>> 2960 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2961
>> 2962 config MIPS_CMDLINE_FROM_DTB
>> 2963 depends on USE_OF
>> 2964 bool "Dtb kernel arguments if available"
>> 2965
>> 2966 config MIPS_CMDLINE_DTB_EXTEND
>> 2967 depends on USE_OF
>> 2968 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2969
>> 2970 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2971 bool "Bootloader kernel arguments if available"
>> 2972
>> 2973 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2974 depends on CMDLINE_BOOL
>> 2975 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2976 endchoice
>> 2977
>> 2978 endmenu
>> 2979
>> 2980 config LOCKDEP_SUPPORT
>> 2981 bool
>> 2982 default y
>> 2983
>> 2984 config STACKTRACE_SUPPORT
>> 2985 bool
>> 2986 default y
>> 2987
>> 2988 config HAVE_LATENCYTOP_SUPPORT
>> 2989 bool
>> 2990 default y
>> 2991
>> 2992 config PGTABLE_LEVELS
>> 2993 int
>> 2994 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 2995 default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
>> 2996 default 2
>> 2997
>> 2998 config MIPS_AUTO_PFN_OFFSET
>> 2999 bool
>> 3000
>> 3001 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3002
>> 3003 config HW_HAS_EISA
>> 3004 bool
>> 3005 config HW_HAS_PCI
>> 3006 bool
>> 3007
>> 3008 config PCI
>> 3009 bool "Support for PCI controller"
>> 3010 depends on HW_HAS_PCI
>> 3011 select PCI_DOMAINS
>> 3012 help
>> 3013 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3014 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3015 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3016 say Y, otherwise N.
>> 3017
>> 3018 config HT_PCI
>> 3019 bool "Support for HT-linked PCI"
>> 3020 default y
>> 3021 depends on CPU_LOONGSON3
>> 3022 select PCI
>> 3023 select PCI_DOMAINS
>> 3024 help
>> 3025 Loongson family machines use Hyper-Transport bus for inter-core
>> 3026 connection and device connection. The PCI bus is a subordinate
>> 3027 linked at HT. Choose Y for Loongson-3 based machines.
>> 3028
>> 3029 config PCI_DOMAINS
>> 3030 bool
>> 3031
>> 3032 config PCI_DOMAINS_GENERIC
>> 3033 bool
>> 3034
>> 3035 config PCI_DRIVERS_GENERIC
>> 3036 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3037 bool
>> 3038
>> 3039 config PCI_DRIVERS_LEGACY
>> 3040 def_bool !PCI_DRIVERS_GENERIC
>> 3041 select NO_GENERIC_PCI_IOPORT_MAP
>> 3042
>> 3043 source "drivers/pci/Kconfig"
>> 3044
>> 3045 #
>> 3046 # ISA support is now enabled via select. Too many systems still have the one
>> 3047 # or other ISA chip on the board that users don't know about so don't expect
>> 3048 # users to choose the right thing ...
>> 3049 #
>> 3050 config ISA
>> 3051 bool
>> 3052
>> 3053 config EISA
>> 3054 bool "EISA support"
>> 3055 depends on HW_HAS_EISA
>> 3056 select ISA
>> 3057 select GENERIC_ISA_DMA
>> 3058 ---help---
>> 3059 The Extended Industry Standard Architecture (EISA) bus was
>> 3060 developed as an open alternative to the IBM MicroChannel bus.
>> 3061
>> 3062 The EISA bus provided some of the features of the IBM MicroChannel
>> 3063 bus while maintaining backward compatibility with cards made for
>> 3064 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3065 1995 when it was made obsolete by the PCI bus.
>> 3066
>> 3067 Say Y here if you are building a kernel for an EISA-based machine.
>> 3068
>> 3069 Otherwise, say N.
>> 3070
>> 3071 source "drivers/eisa/Kconfig"
>> 3072
>> 3073 config TC
>> 3074 bool "TURBOchannel support"
>> 3075 depends on MACH_DECSTATION
>> 3076 help
>> 3077 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3078 processors. TURBOchannel programming specifications are available
>> 3079 at:
>> 3080 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3081 and:
>> 3082 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3083 Linux driver support status is documented at:
>> 3084 <http://www.linux-mips.org/wiki/DECstation>
>> 3085
>> 3086 config MMU
>> 3087 bool
>> 3088 default y
>> 3089
>> 3090 config ARCH_MMAP_RND_BITS_MIN
>> 3091 default 12 if 64BIT
>> 3092 default 8
>> 3093
>> 3094 config ARCH_MMAP_RND_BITS_MAX
>> 3095 default 18 if 64BIT
>> 3096 default 15
>> 3097
>> 3098 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3099 default 8
>> 3100
>> 3101 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3102 default 15
>> 3103
>> 3104 config I8253
>> 3105 bool
>> 3106 select CLKSRC_I8253
>> 3107 select CLKEVT_I8253
>> 3108 select MIPS_EXTERNAL_TIMER
>> 3109
>> 3110 config ZONE_DMA
>> 3111 bool
>> 3112
>> 3113 config ZONE_DMA32
>> 3114 bool
>> 3115
>> 3116 source "drivers/pcmcia/Kconfig"
>> 3117
>> 3118 config HAS_RAPIDIO
>> 3119 bool
>> 3120 default n
>> 3121
>> 3122 config RAPIDIO
>> 3123 tristate "RapidIO support"
>> 3124 depends on HAS_RAPIDIO || PCI
778 help 3125 help
779 Linux can use the full amount of RAM !! 3126 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3127 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3128
782 at 0xd0000000 (cached) and 0xd800000 !! 3129 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3130
784 all of it can be "permanently mapped !! 3131 endmenu
785 The physical memory that's not perma !! 3132
786 "high memory". !! 3133 config TRAD_SIGNALS
787 !! 3134 bool
788 If you are compiling a kernel which !! 3135
789 machine with more than 128 MB total !! 3136 config MIPS32_COMPAT
790 N here. !! 3137 bool
>> 3138
>> 3139 config COMPAT
>> 3140 bool
>> 3141
>> 3142 config SYSVIPC_COMPAT
>> 3143 bool
>> 3144
>> 3145 config MIPS32_O32
>> 3146 bool "Kernel support for o32 binaries"
>> 3147 depends on 64BIT
>> 3148 select ARCH_WANT_OLD_COMPAT_IPC
>> 3149 select COMPAT
>> 3150 select MIPS32_COMPAT
>> 3151 select SYSVIPC_COMPAT if SYSVIPC
>> 3152 help
>> 3153 Select this option if you want to run o32 binaries. These are pure
>> 3154 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3155 existing binaries are in this format.
791 3156
792 If unsure, say Y. 3157 If unsure, say Y.
793 3158
794 config ARCH_FORCE_MAX_ORDER !! 3159 config MIPS32_N32
795 int "Order of maximal physically conti !! 3160 bool "Kernel support for n32 binaries"
796 default "10" !! 3161 depends on 64BIT
797 help !! 3162 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
798 The kernel page allocator limits the !! 3163 select COMPAT
799 contiguous allocations. The limit is !! 3164 select MIPS32_COMPAT
800 defines the maximal power of two of !! 3165 select SYSVIPC_COMPAT if SYSVIPC
801 allocated as a single contiguous blo !! 3166 help
802 overriding the default setting when !! 3167 Select this option if you want to run n32 binaries. These are
803 large blocks of physically contiguou !! 3168 64-bit binaries using 32-bit quantities for addressing and certain
>> 3169 data that would normally be 64-bit. They are used in special
>> 3170 cases.
804 3171
805 Don't change if unsure. !! 3172 If unsure, say N.
806 3173
807 endmenu !! 3174 config BINFMT_ELF32
>> 3175 bool
>> 3176 default y if MIPS32_O32 || MIPS32_N32
>> 3177 select ELFCORE
808 3178
809 menu "Power management options" 3179 menu "Power management options"
810 3180
811 config ARCH_HIBERNATION_POSSIBLE 3181 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3182 def_bool y
>> 3183 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3184
>> 3185 config ARCH_SUSPEND_POSSIBLE
>> 3186 def_bool y
>> 3187 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3188
814 source "kernel/power/Kconfig" 3189 source "kernel/power/Kconfig"
815 3190
816 endmenu 3191 endmenu
>> 3192
>> 3193 config MIPS_EXTERNAL_TIMER
>> 3194 bool
>> 3195
>> 3196 menu "CPU Power Management"
>> 3197
>> 3198 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3199 source "drivers/cpufreq/Kconfig"
>> 3200 endif
>> 3201
>> 3202 source "drivers/cpuidle/Kconfig"
>> 3203
>> 3204 endmenu
>> 3205
>> 3206 source "drivers/firmware/Kconfig"
>> 3207
>> 3208 source "arch/mips/kvm/Kconfig"
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