1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_BINFMT_ELF_STATE
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_DISCARD_MEMBLOCK
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_HAS_ELF_RANDOMIZE
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_SUPPORTS_UPROBES
11 select ARCH_HAS_KCOV !! 11 select ARCH_USE_BUILTIN_BSWAP
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if <<
14 select ARCH_HAS_DMA_SET_UNCACHED if MM <<
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 13 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 14 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 15 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 16 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 17 select CLONE_BACKWARDS
24 select COMMON_CLK !! 18 select CPU_PM if CPU_IDLE
25 select DMA_NONCOHERENT_MMAP if MMU !! 19 select DMA_DIRECT_OPS
26 select GENERIC_ATOMIC64 !! 20 select GENERIC_ATOMIC64 if !64BIT
>> 21 select GENERIC_CLOCKEVENTS
>> 22 select GENERIC_CMOS_UPDATE
>> 23 select GENERIC_CPU_AUTOPROBE
>> 24 select GENERIC_IOMAP
>> 25 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 26 select GENERIC_IRQ_SHOW
>> 27 select GENERIC_LIB_ASHLDI3
>> 28 select GENERIC_LIB_ASHRDI3
28 select GENERIC_LIB_CMPDI2 29 select GENERIC_LIB_CMPDI2
29 select GENERIC_LIB_MULDI3 !! 30 select GENERIC_LIB_LSHRDI3
30 select GENERIC_LIB_UCMPDI2 31 select GENERIC_LIB_UCMPDI2
31 select GENERIC_PCI_IOMAP !! 32 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
32 select GENERIC_SCHED_CLOCK !! 33 select GENERIC_SMP_IDLE_THREAD
33 select GENERIC_IOREMAP if MMU !! 34 select GENERIC_TIME_VSYSCALL
34 select HAVE_ARCH_AUDITSYSCALL !! 35 select HANDLE_DOMAIN_IRQ
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 36 select HAVE_ARCH_COMPILER_H
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 37 select HAVE_ARCH_JUMP_LABEL
37 select HAVE_ARCH_KCSAN !! 38 select HAVE_ARCH_KGDB
>> 39 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 40 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 41 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 42 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 43 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 44 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 45 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 46 select HAVE_CONTEXT_TRACKING
>> 47 select HAVE_COPY_THREAD_TLS
>> 48 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 49 select HAVE_DEBUG_KMEMLEAK
>> 50 select HAVE_DEBUG_STACKOVERFLOW
43 select HAVE_DMA_CONTIGUOUS 51 select HAVE_DMA_CONTIGUOUS
>> 52 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 53 select HAVE_EXIT_THREAD
>> 54 select HAVE_FTRACE_MCOUNT_RECORD
>> 55 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 56 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 57 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 58 select HAVE_IDE
>> 59 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 60 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 61 select HAVE_KPROBES
50 select HAVE_PCI !! 62 select HAVE_KRETPROBES
>> 63 select HAVE_MEMBLOCK_NODE_MAP
>> 64 select HAVE_MOD_ARCH_SPECIFIC
>> 65 select HAVE_NMI
>> 66 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 67 select HAVE_PERF_EVENTS
>> 68 select HAVE_REGS_AND_STACK_ACCESS_API
>> 69 select HAVE_RSEQ
52 select HAVE_STACKPROTECTOR 70 select HAVE_STACKPROTECTOR
53 select HAVE_SYSCALL_TRACEPOINTS 71 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 72 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
55 select IRQ_DOMAIN !! 73 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 74 select MODULES_USE_ELF_RELA if MODULES && 64BIT
57 select MODULES_USE_ELF_RELA !! 75 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 76 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 77 select RTC_LIB
>> 78 select SYSCTL_EXCEPTION_TRACE
>> 79 select VIRT_TO_BUS
>> 80
>> 81 menu "Machine selection"
>> 82
>> 83 choice
>> 84 prompt "System type"
>> 85 default MIPS_GENERIC
>> 86
>> 87 config MIPS_GENERIC
>> 88 bool "Generic board-agnostic MIPS kernel"
>> 89 select BOOT_RAW
>> 90 select BUILTIN_DTB
>> 91 select CEVT_R4K
>> 92 select CLKSRC_MIPS_GIC
>> 93 select COMMON_CLK
>> 94 select CPU_MIPSR2_IRQ_VI
>> 95 select CPU_MIPSR2_IRQ_EI
>> 96 select CSRC_R4K
>> 97 select DMA_PERDEV_COHERENT
>> 98 select HW_HAS_PCI
>> 99 select IRQ_MIPS_CPU
>> 100 select LIBFDT
>> 101 select MIPS_AUTO_PFN_OFFSET
>> 102 select MIPS_CPU_SCACHE
>> 103 select MIPS_GIC
>> 104 select MIPS_L1_CACHE_SHIFT_7
>> 105 select NO_EXCEPT_FILL
>> 106 select PCI_DRIVERS_GENERIC
>> 107 select PINCTRL
>> 108 select SMP_UP if SMP
>> 109 select SWAP_IO_SPACE
>> 110 select SYS_HAS_CPU_MIPS32_R1
>> 111 select SYS_HAS_CPU_MIPS32_R2
>> 112 select SYS_HAS_CPU_MIPS32_R6
>> 113 select SYS_HAS_CPU_MIPS64_R1
>> 114 select SYS_HAS_CPU_MIPS64_R2
>> 115 select SYS_HAS_CPU_MIPS64_R6
>> 116 select SYS_SUPPORTS_32BIT_KERNEL
>> 117 select SYS_SUPPORTS_64BIT_KERNEL
>> 118 select SYS_SUPPORTS_BIG_ENDIAN
>> 119 select SYS_SUPPORTS_HIGHMEM
>> 120 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 121 select SYS_SUPPORTS_MICROMIPS
>> 122 select SYS_SUPPORTS_MIPS_CPS
>> 123 select SYS_SUPPORTS_MIPS16
>> 124 select SYS_SUPPORTS_MULTITHREADING
>> 125 select SYS_SUPPORTS_RELOCATABLE
>> 126 select SYS_SUPPORTS_SMARTMIPS
>> 127 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 128 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 129 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 130 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 131 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 132 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 133 select USE_OF
>> 134 select UHI_BOOT
>> 135 help
>> 136 Select this to build a kernel which aims to support multiple boards,
>> 137 generally using a flattened device tree passed from the bootloader
>> 138 using the boot protocol defined in the UHI (Unified Hosting
>> 139 Interface) specification.
>> 140
>> 141 config MIPS_ALCHEMY
>> 142 bool "Alchemy processor based machines"
>> 143 select PHYS_ADDR_T_64BIT
>> 144 select CEVT_R4K
>> 145 select CSRC_R4K
>> 146 select IRQ_MIPS_CPU
>> 147 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 148 select SYS_HAS_CPU_MIPS32_R1
>> 149 select SYS_SUPPORTS_32BIT_KERNEL
>> 150 select SYS_SUPPORTS_APM_EMULATION
>> 151 select GPIOLIB
>> 152 select SYS_SUPPORTS_ZBOOT
>> 153 select COMMON_CLK
>> 154
>> 155 config AR7
>> 156 bool "Texas Instruments AR7"
>> 157 select BOOT_ELF32
>> 158 select DMA_NONCOHERENT
>> 159 select CEVT_R4K
>> 160 select CSRC_R4K
>> 161 select IRQ_MIPS_CPU
>> 162 select NO_EXCEPT_FILL
>> 163 select SWAP_IO_SPACE
>> 164 select SYS_HAS_CPU_MIPS32_R1
>> 165 select SYS_HAS_EARLY_PRINTK
>> 166 select SYS_SUPPORTS_32BIT_KERNEL
>> 167 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 168 select SYS_SUPPORTS_MIPS16
>> 169 select SYS_SUPPORTS_ZBOOT_UART16550
>> 170 select GPIOLIB
>> 171 select VLYNQ
>> 172 select HAVE_CLK
>> 173 help
>> 174 Support for the Texas Instruments AR7 System-on-a-Chip
>> 175 family: TNETD7100, 7200 and 7300.
>> 176
>> 177 config ATH25
>> 178 bool "Atheros AR231x/AR531x SoC support"
>> 179 select CEVT_R4K
>> 180 select CSRC_R4K
>> 181 select DMA_NONCOHERENT
>> 182 select IRQ_MIPS_CPU
>> 183 select IRQ_DOMAIN
>> 184 select SYS_HAS_CPU_MIPS32_R1
>> 185 select SYS_SUPPORTS_BIG_ENDIAN
>> 186 select SYS_SUPPORTS_32BIT_KERNEL
>> 187 select SYS_HAS_EARLY_PRINTK
>> 188 help
>> 189 Support for Atheros AR231x and Atheros AR531x based boards
>> 190
>> 191 config ATH79
>> 192 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 193 select ARCH_HAS_RESET_CONTROLLER
>> 194 select BOOT_RAW
>> 195 select CEVT_R4K
>> 196 select CSRC_R4K
>> 197 select DMA_NONCOHERENT
>> 198 select GPIOLIB
>> 199 select PINCTRL
>> 200 select HAVE_CLK
>> 201 select COMMON_CLK
>> 202 select CLKDEV_LOOKUP
>> 203 select IRQ_MIPS_CPU
>> 204 select MIPS_MACHINE
>> 205 select SYS_HAS_CPU_MIPS32_R2
>> 206 select SYS_HAS_EARLY_PRINTK
>> 207 select SYS_SUPPORTS_32BIT_KERNEL
>> 208 select SYS_SUPPORTS_BIG_ENDIAN
>> 209 select SYS_SUPPORTS_MIPS16
>> 210 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 211 select USE_OF
>> 212 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 213 help
>> 214 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 215
>> 216 config BMIPS_GENERIC
>> 217 bool "Broadcom Generic BMIPS kernel"
>> 218 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 219 select ARCH_HAS_PHYS_TO_DMA
>> 220 select BOOT_RAW
>> 221 select NO_EXCEPT_FILL
>> 222 select USE_OF
>> 223 select CEVT_R4K
>> 224 select CSRC_R4K
>> 225 select SYNC_R4K
>> 226 select COMMON_CLK
>> 227 select BCM6345_L1_IRQ
>> 228 select BCM7038_L1_IRQ
>> 229 select BCM7120_L2_IRQ
>> 230 select BRCMSTB_L2_IRQ
>> 231 select IRQ_MIPS_CPU
>> 232 select DMA_NONCOHERENT
>> 233 select SYS_SUPPORTS_32BIT_KERNEL
>> 234 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 235 select SYS_SUPPORTS_BIG_ENDIAN
>> 236 select SYS_SUPPORTS_HIGHMEM
>> 237 select SYS_HAS_CPU_BMIPS32_3300
>> 238 select SYS_HAS_CPU_BMIPS4350
>> 239 select SYS_HAS_CPU_BMIPS4380
>> 240 select SYS_HAS_CPU_BMIPS5000
>> 241 select SWAP_IO_SPACE
>> 242 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 243 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 244 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 245 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 246 select HARDIRQS_SW_RESEND
>> 247 help
>> 248 Build a generic DT-based kernel image that boots on select
>> 249 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 250 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 251 must be set appropriately for your board.
>> 252
>> 253 config BCM47XX
>> 254 bool "Broadcom BCM47XX based boards"
>> 255 select BOOT_RAW
>> 256 select CEVT_R4K
>> 257 select CSRC_R4K
>> 258 select DMA_NONCOHERENT
>> 259 select HW_HAS_PCI
>> 260 select IRQ_MIPS_CPU
>> 261 select SYS_HAS_CPU_MIPS32_R1
>> 262 select NO_EXCEPT_FILL
>> 263 select SYS_SUPPORTS_32BIT_KERNEL
>> 264 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 265 select SYS_SUPPORTS_MIPS16
>> 266 select SYS_SUPPORTS_ZBOOT
>> 267 select SYS_HAS_EARLY_PRINTK
>> 268 select USE_GENERIC_EARLY_PRINTK_8250
>> 269 select GPIOLIB
>> 270 select LEDS_GPIO_REGISTER
>> 271 select BCM47XX_NVRAM
>> 272 select BCM47XX_SPROM
>> 273 select BCM47XX_SSB if !BCM47XX_BCMA
>> 274 help
>> 275 Support for BCM47XX based boards
>> 276
>> 277 config BCM63XX
>> 278 bool "Broadcom BCM63XX based boards"
>> 279 select BOOT_RAW
>> 280 select CEVT_R4K
>> 281 select CSRC_R4K
>> 282 select SYNC_R4K
>> 283 select DMA_NONCOHERENT
>> 284 select IRQ_MIPS_CPU
>> 285 select SYS_SUPPORTS_32BIT_KERNEL
>> 286 select SYS_SUPPORTS_BIG_ENDIAN
>> 287 select SYS_HAS_EARLY_PRINTK
>> 288 select SWAP_IO_SPACE
>> 289 select GPIOLIB
>> 290 select HAVE_CLK
>> 291 select MIPS_L1_CACHE_SHIFT_4
>> 292 select CLKDEV_LOOKUP
>> 293 help
>> 294 Support for BCM63XX based boards
>> 295
>> 296 config MIPS_COBALT
>> 297 bool "Cobalt Server"
>> 298 select CEVT_R4K
>> 299 select CSRC_R4K
>> 300 select CEVT_GT641XX
>> 301 select DMA_NONCOHERENT
>> 302 select HW_HAS_PCI
>> 303 select I8253
>> 304 select I8259
>> 305 select IRQ_MIPS_CPU
>> 306 select IRQ_GT641XX
>> 307 select PCI_GT64XXX_PCI0
>> 308 select PCI
>> 309 select SYS_HAS_CPU_NEVADA
>> 310 select SYS_HAS_EARLY_PRINTK
>> 311 select SYS_SUPPORTS_32BIT_KERNEL
>> 312 select SYS_SUPPORTS_64BIT_KERNEL
>> 313 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 314 select USE_GENERIC_EARLY_PRINTK_8250
>> 315
>> 316 config MACH_DECSTATION
>> 317 bool "DECstations"
>> 318 select BOOT_ELF32
>> 319 select CEVT_DS1287
>> 320 select CEVT_R4K if CPU_R4X00
>> 321 select CSRC_IOASIC
>> 322 select CSRC_R4K if CPU_R4X00
>> 323 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 324 select CPU_R4000_WORKAROUNDS if 64BIT
>> 325 select CPU_R4400_WORKAROUNDS if 64BIT
>> 326 select DMA_NONCOHERENT
>> 327 select NO_IOPORT_MAP
>> 328 select IRQ_MIPS_CPU
>> 329 select SYS_HAS_CPU_R3000
>> 330 select SYS_HAS_CPU_R4X00
>> 331 select SYS_SUPPORTS_32BIT_KERNEL
>> 332 select SYS_SUPPORTS_64BIT_KERNEL
>> 333 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 334 select SYS_SUPPORTS_128HZ
>> 335 select SYS_SUPPORTS_256HZ
>> 336 select SYS_SUPPORTS_1024HZ
>> 337 select MIPS_L1_CACHE_SHIFT_4
>> 338 help
>> 339 This enables support for DEC's MIPS based workstations. For details
>> 340 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 341 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 342
>> 343 If you have one of the following DECstation Models you definitely
>> 344 want to choose R4xx0 for the CPU Type:
>> 345
>> 346 DECstation 5000/50
>> 347 DECstation 5000/150
>> 348 DECstation 5000/260
>> 349 DECsystem 5900/260
>> 350
>> 351 otherwise choose R3000.
>> 352
>> 353 config MACH_JAZZ
>> 354 bool "Jazz family of machines"
>> 355 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 356 select ARCH_MIGHT_HAVE_PC_SERIO
>> 357 select FW_ARC
>> 358 select FW_ARC32
>> 359 select ARCH_MAY_HAVE_PC_FDC
>> 360 select CEVT_R4K
>> 361 select CSRC_R4K
>> 362 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 363 select GENERIC_ISA_DMA
>> 364 select HAVE_PCSPKR_PLATFORM
>> 365 select IRQ_MIPS_CPU
>> 366 select I8253
>> 367 select I8259
>> 368 select ISA
>> 369 select SYS_HAS_CPU_R4X00
>> 370 select SYS_SUPPORTS_32BIT_KERNEL
>> 371 select SYS_SUPPORTS_64BIT_KERNEL
>> 372 select SYS_SUPPORTS_100HZ
>> 373 help
>> 374 This a family of machines based on the MIPS R4030 chipset which was
>> 375 used by several vendors to build RISC/os and Windows NT workstations.
>> 376 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 377 Olivetti M700-10 workstations.
>> 378
>> 379 config MACH_INGENIC
>> 380 bool "Ingenic SoC based machines"
>> 381 select SYS_SUPPORTS_32BIT_KERNEL
>> 382 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 383 select SYS_SUPPORTS_ZBOOT_UART16550
>> 384 select DMA_NONCOHERENT
>> 385 select IRQ_MIPS_CPU
>> 386 select PINCTRL
>> 387 select GPIOLIB
>> 388 select COMMON_CLK
>> 389 select GENERIC_IRQ_CHIP
>> 390 select BUILTIN_DTB
>> 391 select USE_OF
>> 392 select LIBFDT
>> 393
>> 394 config LANTIQ
>> 395 bool "Lantiq based platforms"
>> 396 select DMA_NONCOHERENT
>> 397 select IRQ_MIPS_CPU
>> 398 select CEVT_R4K
>> 399 select CSRC_R4K
>> 400 select SYS_HAS_CPU_MIPS32_R1
>> 401 select SYS_HAS_CPU_MIPS32_R2
>> 402 select SYS_SUPPORTS_BIG_ENDIAN
>> 403 select SYS_SUPPORTS_32BIT_KERNEL
>> 404 select SYS_SUPPORTS_MIPS16
>> 405 select SYS_SUPPORTS_MULTITHREADING
>> 406 select SYS_SUPPORTS_VPE_LOADER
>> 407 select SYS_HAS_EARLY_PRINTK
>> 408 select GPIOLIB
>> 409 select SWAP_IO_SPACE
>> 410 select BOOT_RAW
>> 411 select CLKDEV_LOOKUP
>> 412 select USE_OF
>> 413 select PINCTRL
>> 414 select PINCTRL_LANTIQ
>> 415 select ARCH_HAS_RESET_CONTROLLER
>> 416 select RESET_CONTROLLER
>> 417
>> 418 config LASAT
>> 419 bool "LASAT Networks platforms"
>> 420 select CEVT_R4K
>> 421 select CRC32
>> 422 select CSRC_R4K
>> 423 select DMA_NONCOHERENT
>> 424 select SYS_HAS_EARLY_PRINTK
>> 425 select HW_HAS_PCI
>> 426 select IRQ_MIPS_CPU
>> 427 select PCI_GT64XXX_PCI0
>> 428 select MIPS_NILE4
>> 429 select R5000_CPU_SCACHE
>> 430 select SYS_HAS_CPU_R5000
>> 431 select SYS_SUPPORTS_32BIT_KERNEL
>> 432 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 433 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 434
>> 435 config MACH_LOONGSON32
>> 436 bool "Loongson-1 family of machines"
>> 437 select SYS_SUPPORTS_ZBOOT
>> 438 help
>> 439 This enables support for the Loongson-1 family of machines.
>> 440
>> 441 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 442 the Institute of Computing Technology (ICT), Chinese Academy of
>> 443 Sciences (CAS).
>> 444
>> 445 config MACH_LOONGSON64
>> 446 bool "Loongson-2/3 family of machines"
>> 447 select SYS_SUPPORTS_ZBOOT
>> 448 help
>> 449 This enables the support of Loongson-2/3 family of machines.
>> 450
>> 451 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 452 family of multi-core CPUs. They are both 64-bit general-purpose
>> 453 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 454 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 455 in the People's Republic of China. The chief architect is Professor
>> 456 Weiwu Hu.
>> 457
>> 458 config MACH_PISTACHIO
>> 459 bool "IMG Pistachio SoC based boards"
>> 460 select BOOT_ELF32
>> 461 select BOOT_RAW
>> 462 select CEVT_R4K
>> 463 select CLKSRC_MIPS_GIC
>> 464 select COMMON_CLK
>> 465 select CSRC_R4K
>> 466 select DMA_NONCOHERENT
>> 467 select GPIOLIB
>> 468 select IRQ_MIPS_CPU
>> 469 select LIBFDT
>> 470 select MFD_SYSCON
>> 471 select MIPS_CPU_SCACHE
>> 472 select MIPS_GIC
>> 473 select PINCTRL
>> 474 select REGULATOR
>> 475 select SYS_HAS_CPU_MIPS32_R2
>> 476 select SYS_SUPPORTS_32BIT_KERNEL
>> 477 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 478 select SYS_SUPPORTS_MIPS_CPS
>> 479 select SYS_SUPPORTS_MULTITHREADING
>> 480 select SYS_SUPPORTS_RELOCATABLE
>> 481 select SYS_SUPPORTS_ZBOOT
>> 482 select SYS_HAS_EARLY_PRINTK
>> 483 select USE_GENERIC_EARLY_PRINTK_8250
>> 484 select USE_OF
>> 485 help
>> 486 This enables support for the IMG Pistachio SoC platform.
>> 487
>> 488 config MIPS_MALTA
>> 489 bool "MIPS Malta board"
>> 490 select ARCH_MAY_HAVE_PC_FDC
>> 491 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 492 select ARCH_MIGHT_HAVE_PC_SERIO
>> 493 select BOOT_ELF32
>> 494 select BOOT_RAW
>> 495 select BUILTIN_DTB
>> 496 select CEVT_R4K
>> 497 select CSRC_R4K
>> 498 select CLKSRC_MIPS_GIC
>> 499 select COMMON_CLK
>> 500 select DMA_MAYBE_COHERENT
>> 501 select GENERIC_ISA_DMA
>> 502 select HAVE_PCSPKR_PLATFORM
>> 503 select IRQ_MIPS_CPU
>> 504 select MIPS_GIC
>> 505 select HW_HAS_PCI
>> 506 select I8253
>> 507 select I8259
>> 508 select MIPS_BONITO64
>> 509 select MIPS_CPU_SCACHE
>> 510 select MIPS_L1_CACHE_SHIFT_6
>> 511 select PCI_GT64XXX_PCI0
>> 512 select MIPS_MSC
>> 513 select SMP_UP if SMP
>> 514 select SWAP_IO_SPACE
>> 515 select SYS_HAS_CPU_MIPS32_R1
>> 516 select SYS_HAS_CPU_MIPS32_R2
>> 517 select SYS_HAS_CPU_MIPS32_R3_5
>> 518 select SYS_HAS_CPU_MIPS32_R5
>> 519 select SYS_HAS_CPU_MIPS32_R6
>> 520 select SYS_HAS_CPU_MIPS64_R1
>> 521 select SYS_HAS_CPU_MIPS64_R2
>> 522 select SYS_HAS_CPU_MIPS64_R6
>> 523 select SYS_HAS_CPU_NEVADA
>> 524 select SYS_HAS_CPU_RM7000
>> 525 select SYS_SUPPORTS_32BIT_KERNEL
>> 526 select SYS_SUPPORTS_64BIT_KERNEL
>> 527 select SYS_SUPPORTS_BIG_ENDIAN
>> 528 select SYS_SUPPORTS_HIGHMEM
>> 529 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 530 select SYS_SUPPORTS_MICROMIPS
>> 531 select SYS_SUPPORTS_MIPS_CMP
>> 532 select SYS_SUPPORTS_MIPS_CPS
>> 533 select SYS_SUPPORTS_MIPS16
>> 534 select SYS_SUPPORTS_MULTITHREADING
>> 535 select SYS_SUPPORTS_SMARTMIPS
>> 536 select SYS_SUPPORTS_VPE_LOADER
>> 537 select SYS_SUPPORTS_ZBOOT
>> 538 select SYS_SUPPORTS_RELOCATABLE
>> 539 select USE_OF
>> 540 select LIBFDT
>> 541 select ZONE_DMA32 if 64BIT
>> 542 select BUILTIN_DTB
>> 543 select LIBFDT
>> 544 help
>> 545 This enables support for the MIPS Technologies Malta evaluation
>> 546 board.
>> 547
>> 548 config MACH_PIC32
>> 549 bool "Microchip PIC32 Family"
>> 550 help
>> 551 This enables support for the Microchip PIC32 family of platforms.
>> 552
>> 553 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 554 microcontrollers.
>> 555
>> 556 config NEC_MARKEINS
>> 557 bool "NEC EMMA2RH Mark-eins board"
>> 558 select SOC_EMMA2RH
>> 559 select HW_HAS_PCI
>> 560 help
>> 561 This enables support for the NEC Electronics Mark-eins boards.
>> 562
>> 563 config MACH_VR41XX
>> 564 bool "NEC VR4100 series based machines"
>> 565 select CEVT_R4K
>> 566 select CSRC_R4K
>> 567 select SYS_HAS_CPU_VR41XX
>> 568 select SYS_SUPPORTS_MIPS16
>> 569 select GPIOLIB
>> 570
>> 571 config NXP_STB220
>> 572 bool "NXP STB220 board"
>> 573 select SOC_PNX833X
>> 574 help
>> 575 Support for NXP Semiconductors STB220 Development Board.
>> 576
>> 577 config NXP_STB225
>> 578 bool "NXP 225 board"
>> 579 select SOC_PNX833X
>> 580 select SOC_PNX8335
>> 581 help
>> 582 Support for NXP Semiconductors STB225 Development Board.
>> 583
>> 584 config PMC_MSP
>> 585 bool "PMC-Sierra MSP chipsets"
>> 586 select CEVT_R4K
>> 587 select CSRC_R4K
>> 588 select DMA_NONCOHERENT
>> 589 select SWAP_IO_SPACE
>> 590 select NO_EXCEPT_FILL
>> 591 select BOOT_RAW
>> 592 select SYS_HAS_CPU_MIPS32_R1
>> 593 select SYS_HAS_CPU_MIPS32_R2
>> 594 select SYS_SUPPORTS_32BIT_KERNEL
>> 595 select SYS_SUPPORTS_BIG_ENDIAN
>> 596 select SYS_SUPPORTS_MIPS16
>> 597 select IRQ_MIPS_CPU
>> 598 select SERIAL_8250
>> 599 select SERIAL_8250_CONSOLE
>> 600 select USB_EHCI_BIG_ENDIAN_MMIO
>> 601 select USB_EHCI_BIG_ENDIAN_DESC
>> 602 help
>> 603 This adds support for the PMC-Sierra family of Multi-Service
>> 604 Processor System-On-A-Chips. These parts include a number
>> 605 of integrated peripherals, interfaces and DSPs in addition to
>> 606 a variety of MIPS cores.
>> 607
>> 608 config RALINK
>> 609 bool "Ralink based machines"
>> 610 select CEVT_R4K
>> 611 select CSRC_R4K
>> 612 select BOOT_RAW
>> 613 select DMA_NONCOHERENT
>> 614 select IRQ_MIPS_CPU
>> 615 select USE_OF
>> 616 select SYS_HAS_CPU_MIPS32_R1
>> 617 select SYS_HAS_CPU_MIPS32_R2
>> 618 select SYS_SUPPORTS_32BIT_KERNEL
>> 619 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 620 select SYS_SUPPORTS_MIPS16
>> 621 select SYS_HAS_EARLY_PRINTK
>> 622 select CLKDEV_LOOKUP
>> 623 select ARCH_HAS_RESET_CONTROLLER
>> 624 select RESET_CONTROLLER
>> 625
>> 626 config SGI_IP22
>> 627 bool "SGI IP22 (Indy/Indigo2)"
>> 628 select FW_ARC
>> 629 select FW_ARC32
>> 630 select ARCH_MIGHT_HAVE_PC_SERIO
>> 631 select BOOT_ELF32
>> 632 select CEVT_R4K
>> 633 select CSRC_R4K
>> 634 select DEFAULT_SGI_PARTITION
>> 635 select DMA_NONCOHERENT
>> 636 select HW_HAS_EISA
>> 637 select I8253
>> 638 select I8259
>> 639 select IP22_CPU_SCACHE
>> 640 select IRQ_MIPS_CPU
>> 641 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 642 select SGI_HAS_I8042
>> 643 select SGI_HAS_INDYDOG
>> 644 select SGI_HAS_HAL2
>> 645 select SGI_HAS_SEEQ
>> 646 select SGI_HAS_WD93
>> 647 select SGI_HAS_ZILOG
>> 648 select SWAP_IO_SPACE
>> 649 select SYS_HAS_CPU_R4X00
>> 650 select SYS_HAS_CPU_R5000
>> 651 #
>> 652 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 653 # memory during early boot on some machines.
>> 654 #
>> 655 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 656 # for a more details discussion
>> 657 #
>> 658 # select SYS_HAS_EARLY_PRINTK
>> 659 select SYS_SUPPORTS_32BIT_KERNEL
>> 660 select SYS_SUPPORTS_64BIT_KERNEL
>> 661 select SYS_SUPPORTS_BIG_ENDIAN
>> 662 select MIPS_L1_CACHE_SHIFT_7
>> 663 help
>> 664 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 665 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 666 that runs on these, say Y here.
>> 667
>> 668 config SGI_IP27
>> 669 bool "SGI IP27 (Origin200/2000)"
>> 670 select ARCH_HAS_PHYS_TO_DMA
>> 671 select FW_ARC
>> 672 select FW_ARC64
>> 673 select BOOT_ELF64
>> 674 select DEFAULT_SGI_PARTITION
>> 675 select SYS_HAS_EARLY_PRINTK
>> 676 select HW_HAS_PCI
>> 677 select NR_CPUS_DEFAULT_64
>> 678 select SYS_HAS_CPU_R10000
>> 679 select SYS_SUPPORTS_64BIT_KERNEL
>> 680 select SYS_SUPPORTS_BIG_ENDIAN
>> 681 select SYS_SUPPORTS_NUMA
>> 682 select SYS_SUPPORTS_SMP
>> 683 select MIPS_L1_CACHE_SHIFT_7
>> 684 help
>> 685 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 686 workstations. To compile a Linux kernel that runs on these, say Y
>> 687 here.
>> 688
>> 689 config SGI_IP28
>> 690 bool "SGI IP28 (Indigo2 R10k)"
>> 691 select FW_ARC
>> 692 select FW_ARC64
>> 693 select ARCH_MIGHT_HAVE_PC_SERIO
>> 694 select BOOT_ELF64
>> 695 select CEVT_R4K
>> 696 select CSRC_R4K
>> 697 select DEFAULT_SGI_PARTITION
>> 698 select DMA_NONCOHERENT
>> 699 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 700 select IRQ_MIPS_CPU
>> 701 select HW_HAS_EISA
>> 702 select I8253
>> 703 select I8259
>> 704 select SGI_HAS_I8042
>> 705 select SGI_HAS_INDYDOG
>> 706 select SGI_HAS_HAL2
>> 707 select SGI_HAS_SEEQ
>> 708 select SGI_HAS_WD93
>> 709 select SGI_HAS_ZILOG
>> 710 select SWAP_IO_SPACE
>> 711 select SYS_HAS_CPU_R10000
>> 712 #
>> 713 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 714 # memory during early boot on some machines.
>> 715 #
>> 716 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 717 # for a more details discussion
>> 718 #
>> 719 # select SYS_HAS_EARLY_PRINTK
>> 720 select SYS_SUPPORTS_64BIT_KERNEL
>> 721 select SYS_SUPPORTS_BIG_ENDIAN
>> 722 select MIPS_L1_CACHE_SHIFT_7
>> 723 help
>> 724 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 725 kernel that runs on these, say Y here.
>> 726
>> 727 config SGI_IP32
>> 728 bool "SGI IP32 (O2)"
>> 729 select ARCH_HAS_PHYS_TO_DMA
>> 730 select FW_ARC
>> 731 select FW_ARC32
>> 732 select BOOT_ELF32
>> 733 select CEVT_R4K
>> 734 select CSRC_R4K
>> 735 select DMA_NONCOHERENT
>> 736 select HW_HAS_PCI
>> 737 select IRQ_MIPS_CPU
>> 738 select R5000_CPU_SCACHE
>> 739 select RM7000_CPU_SCACHE
>> 740 select SYS_HAS_CPU_R5000
>> 741 select SYS_HAS_CPU_R10000 if BROKEN
>> 742 select SYS_HAS_CPU_RM7000
>> 743 select SYS_HAS_CPU_NEVADA
>> 744 select SYS_SUPPORTS_64BIT_KERNEL
>> 745 select SYS_SUPPORTS_BIG_ENDIAN
>> 746 help
>> 747 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 748
>> 749 config SIBYTE_CRHINE
>> 750 bool "Sibyte BCM91120C-CRhine"
>> 751 select BOOT_ELF32
>> 752 select SIBYTE_BCM1120
>> 753 select SWAP_IO_SPACE
>> 754 select SYS_HAS_CPU_SB1
>> 755 select SYS_SUPPORTS_BIG_ENDIAN
>> 756 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 757
>> 758 config SIBYTE_CARMEL
>> 759 bool "Sibyte BCM91120x-Carmel"
>> 760 select BOOT_ELF32
>> 761 select SIBYTE_BCM1120
>> 762 select SWAP_IO_SPACE
>> 763 select SYS_HAS_CPU_SB1
>> 764 select SYS_SUPPORTS_BIG_ENDIAN
>> 765 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 766
>> 767 config SIBYTE_CRHONE
>> 768 bool "Sibyte BCM91125C-CRhone"
>> 769 select BOOT_ELF32
>> 770 select SIBYTE_BCM1125
>> 771 select SWAP_IO_SPACE
>> 772 select SYS_HAS_CPU_SB1
>> 773 select SYS_SUPPORTS_BIG_ENDIAN
>> 774 select SYS_SUPPORTS_HIGHMEM
>> 775 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 776
>> 777 config SIBYTE_RHONE
>> 778 bool "Sibyte BCM91125E-Rhone"
>> 779 select BOOT_ELF32
>> 780 select SIBYTE_BCM1125H
>> 781 select SWAP_IO_SPACE
>> 782 select SYS_HAS_CPU_SB1
>> 783 select SYS_SUPPORTS_BIG_ENDIAN
>> 784 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 785
>> 786 config SIBYTE_SWARM
>> 787 bool "Sibyte BCM91250A-SWARM"
>> 788 select BOOT_ELF32
>> 789 select HAVE_PATA_PLATFORM
>> 790 select SIBYTE_SB1250
>> 791 select SWAP_IO_SPACE
>> 792 select SYS_HAS_CPU_SB1
>> 793 select SYS_SUPPORTS_BIG_ENDIAN
>> 794 select SYS_SUPPORTS_HIGHMEM
>> 795 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 796 select ZONE_DMA32 if 64BIT
>> 797 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 798
>> 799 config SIBYTE_LITTLESUR
>> 800 bool "Sibyte BCM91250C2-LittleSur"
>> 801 select BOOT_ELF32
>> 802 select HAVE_PATA_PLATFORM
>> 803 select SIBYTE_SB1250
>> 804 select SWAP_IO_SPACE
>> 805 select SYS_HAS_CPU_SB1
>> 806 select SYS_SUPPORTS_BIG_ENDIAN
>> 807 select SYS_SUPPORTS_HIGHMEM
>> 808 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 809
>> 810 config SIBYTE_SENTOSA
>> 811 bool "Sibyte BCM91250E-Sentosa"
>> 812 select BOOT_ELF32
>> 813 select SIBYTE_SB1250
>> 814 select SWAP_IO_SPACE
>> 815 select SYS_HAS_CPU_SB1
>> 816 select SYS_SUPPORTS_BIG_ENDIAN
>> 817 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 818 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 819
>> 820 config SIBYTE_BIGSUR
>> 821 bool "Sibyte BCM91480B-BigSur"
>> 822 select BOOT_ELF32
>> 823 select NR_CPUS_DEFAULT_4
>> 824 select SIBYTE_BCM1x80
>> 825 select SWAP_IO_SPACE
>> 826 select SYS_HAS_CPU_SB1
>> 827 select SYS_SUPPORTS_BIG_ENDIAN
>> 828 select SYS_SUPPORTS_HIGHMEM
>> 829 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 830 select ZONE_DMA32 if 64BIT
>> 831 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 832
>> 833 config SNI_RM
>> 834 bool "SNI RM200/300/400"
>> 835 select FW_ARC if CPU_LITTLE_ENDIAN
>> 836 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 837 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 838 select ARCH_MAY_HAVE_PC_FDC
>> 839 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 840 select ARCH_MIGHT_HAVE_PC_SERIO
>> 841 select BOOT_ELF32
>> 842 select CEVT_R4K
>> 843 select CSRC_R4K
>> 844 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 845 select DMA_NONCOHERENT
>> 846 select GENERIC_ISA_DMA
>> 847 select HAVE_PCSPKR_PLATFORM
>> 848 select HW_HAS_EISA
>> 849 select HW_HAS_PCI
>> 850 select IRQ_MIPS_CPU
>> 851 select I8253
>> 852 select I8259
>> 853 select ISA
>> 854 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 855 select SYS_HAS_CPU_R4X00
>> 856 select SYS_HAS_CPU_R5000
>> 857 select SYS_HAS_CPU_R10000
>> 858 select R5000_CPU_SCACHE
>> 859 select SYS_HAS_EARLY_PRINTK
>> 860 select SYS_SUPPORTS_32BIT_KERNEL
>> 861 select SYS_SUPPORTS_64BIT_KERNEL
>> 862 select SYS_SUPPORTS_BIG_ENDIAN
>> 863 select SYS_SUPPORTS_HIGHMEM
>> 864 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 865 help
>> 866 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 867 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 868 Technology and now in turn merged with Fujitsu. Say Y here to
>> 869 support this machine type.
>> 870
>> 871 config MACH_TX39XX
>> 872 bool "Toshiba TX39 series based machines"
>> 873
>> 874 config MACH_TX49XX
>> 875 bool "Toshiba TX49 series based machines"
>> 876
>> 877 config MIKROTIK_RB532
>> 878 bool "Mikrotik RB532 boards"
>> 879 select CEVT_R4K
>> 880 select CSRC_R4K
>> 881 select DMA_NONCOHERENT
>> 882 select HW_HAS_PCI
>> 883 select IRQ_MIPS_CPU
>> 884 select SYS_HAS_CPU_MIPS32_R1
>> 885 select SYS_SUPPORTS_32BIT_KERNEL
>> 886 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 887 select SWAP_IO_SPACE
>> 888 select BOOT_RAW
>> 889 select GPIOLIB
>> 890 select MIPS_L1_CACHE_SHIFT_4
>> 891 help
>> 892 Support the Mikrotik(tm) RouterBoard 532 series,
>> 893 based on the IDT RC32434 SoC.
>> 894
>> 895 config CAVIUM_OCTEON_SOC
>> 896 bool "Cavium Networks Octeon SoC based boards"
>> 897 select CEVT_R4K
>> 898 select ARCH_HAS_PHYS_TO_DMA
>> 899 select HAS_RAPIDIO
>> 900 select PHYS_ADDR_T_64BIT
>> 901 select SYS_SUPPORTS_64BIT_KERNEL
>> 902 select SYS_SUPPORTS_BIG_ENDIAN
>> 903 select EDAC_SUPPORT
>> 904 select EDAC_ATOMIC_SCRUB
>> 905 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 906 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 907 select SYS_HAS_EARLY_PRINTK
>> 908 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 909 select HW_HAS_PCI
>> 910 select ZONE_DMA32
>> 911 select HOLES_IN_ZONE
>> 912 select GPIOLIB
>> 913 select LIBFDT
>> 914 select USE_OF
>> 915 select ARCH_SPARSEMEM_ENABLE
>> 916 select SYS_SUPPORTS_SMP
>> 917 select NR_CPUS_DEFAULT_64
>> 918 select MIPS_NR_CPU_NR_MAP_1024
>> 919 select BUILTIN_DTB
>> 920 select MTD_COMPLEX_MAPPINGS
>> 921 select SWIOTLB
>> 922 select SYS_SUPPORTS_RELOCATABLE
>> 923 help
>> 924 This option supports all of the Octeon reference boards from Cavium
>> 925 Networks. It builds a kernel that dynamically determines the Octeon
>> 926 CPU type and supports all known board reference implementations.
>> 927 Some of the supported boards are:
>> 928 EBT3000
>> 929 EBH3000
>> 930 EBH3100
>> 931 Thunder
>> 932 Kodama
>> 933 Hikari
>> 934 Say Y here for most Octeon reference boards.
>> 935
>> 936 config NLM_XLR_BOARD
>> 937 bool "Netlogic XLR/XLS based systems"
>> 938 select BOOT_ELF32
>> 939 select NLM_COMMON
>> 940 select SYS_HAS_CPU_XLR
>> 941 select SYS_SUPPORTS_SMP
>> 942 select HW_HAS_PCI
>> 943 select SWAP_IO_SPACE
>> 944 select SYS_SUPPORTS_32BIT_KERNEL
>> 945 select SYS_SUPPORTS_64BIT_KERNEL
>> 946 select PHYS_ADDR_T_64BIT
>> 947 select SYS_SUPPORTS_BIG_ENDIAN
>> 948 select SYS_SUPPORTS_HIGHMEM
>> 949 select NR_CPUS_DEFAULT_32
>> 950 select CEVT_R4K
>> 951 select CSRC_R4K
>> 952 select IRQ_MIPS_CPU
>> 953 select ZONE_DMA32 if 64BIT
>> 954 select SYNC_R4K
>> 955 select SYS_HAS_EARLY_PRINTK
>> 956 select SYS_SUPPORTS_ZBOOT
>> 957 select SYS_SUPPORTS_ZBOOT_UART16550
>> 958 help
>> 959 Support for systems based on Netlogic XLR and XLS processors.
>> 960 Say Y here if you have a XLR or XLS based board.
>> 961
>> 962 config NLM_XLP_BOARD
>> 963 bool "Netlogic XLP based systems"
>> 964 select BOOT_ELF32
>> 965 select NLM_COMMON
>> 966 select SYS_HAS_CPU_XLP
>> 967 select SYS_SUPPORTS_SMP
>> 968 select HW_HAS_PCI
>> 969 select SYS_SUPPORTS_32BIT_KERNEL
>> 970 select SYS_SUPPORTS_64BIT_KERNEL
>> 971 select PHYS_ADDR_T_64BIT
>> 972 select GPIOLIB
>> 973 select SYS_SUPPORTS_BIG_ENDIAN
>> 974 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 975 select SYS_SUPPORTS_HIGHMEM
>> 976 select NR_CPUS_DEFAULT_32
>> 977 select CEVT_R4K
>> 978 select CSRC_R4K
>> 979 select IRQ_MIPS_CPU
>> 980 select ZONE_DMA32 if 64BIT
>> 981 select SYNC_R4K
>> 982 select SYS_HAS_EARLY_PRINTK
>> 983 select USE_OF
>> 984 select SYS_SUPPORTS_ZBOOT
>> 985 select SYS_SUPPORTS_ZBOOT_UART16550
>> 986 help
>> 987 This board is based on Netlogic XLP Processor.
>> 988 Say Y here if you have a XLP based board.
>> 989
>> 990 config MIPS_PARAVIRT
>> 991 bool "Para-Virtualized guest system"
>> 992 select CEVT_R4K
>> 993 select CSRC_R4K
>> 994 select SYS_SUPPORTS_64BIT_KERNEL
>> 995 select SYS_SUPPORTS_32BIT_KERNEL
>> 996 select SYS_SUPPORTS_BIG_ENDIAN
>> 997 select SYS_SUPPORTS_SMP
>> 998 select NR_CPUS_DEFAULT_4
>> 999 select SYS_HAS_EARLY_PRINTK
>> 1000 select SYS_HAS_CPU_MIPS32_R2
>> 1001 select SYS_HAS_CPU_MIPS64_R2
>> 1002 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1003 select HW_HAS_PCI
>> 1004 select SWAP_IO_SPACE
60 help 1005 help
61 Xtensa processors are 32-bit RISC ma !! 1006 This option supports guest running under ????
62 primarily for embedded systems. The !! 1007
63 configurable and extensible. The Li !! 1008 endchoice
64 architecture supports all processor !! 1009
65 with reasonable minimum requirements !! 1010 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 1011 source "arch/mips/ath25/Kconfig"
>> 1012 source "arch/mips/ath79/Kconfig"
>> 1013 source "arch/mips/bcm47xx/Kconfig"
>> 1014 source "arch/mips/bcm63xx/Kconfig"
>> 1015 source "arch/mips/bmips/Kconfig"
>> 1016 source "arch/mips/generic/Kconfig"
>> 1017 source "arch/mips/jazz/Kconfig"
>> 1018 source "arch/mips/jz4740/Kconfig"
>> 1019 source "arch/mips/lantiq/Kconfig"
>> 1020 source "arch/mips/lasat/Kconfig"
>> 1021 source "arch/mips/pic32/Kconfig"
>> 1022 source "arch/mips/pistachio/Kconfig"
>> 1023 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1024 source "arch/mips/ralink/Kconfig"
>> 1025 source "arch/mips/sgi-ip27/Kconfig"
>> 1026 source "arch/mips/sibyte/Kconfig"
>> 1027 source "arch/mips/txx9/Kconfig"
>> 1028 source "arch/mips/vr41xx/Kconfig"
>> 1029 source "arch/mips/cavium-octeon/Kconfig"
>> 1030 source "arch/mips/loongson32/Kconfig"
>> 1031 source "arch/mips/loongson64/Kconfig"
>> 1032 source "arch/mips/netlogic/Kconfig"
>> 1033 source "arch/mips/paravirt/Kconfig"
>> 1034
>> 1035 endmenu
>> 1036
>> 1037 config RWSEM_GENERIC_SPINLOCK
>> 1038 bool
>> 1039 default y
>> 1040
>> 1041 config RWSEM_XCHGADD_ALGORITHM
>> 1042 bool
67 1043
68 config GENERIC_HWEIGHT 1044 config GENERIC_HWEIGHT
69 def_bool y !! 1045 bool
>> 1046 default y
70 1047
71 config ARCH_HAS_ILOG2_U32 !! 1048 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1049 bool
>> 1050 default y
73 1051
74 config ARCH_HAS_ILOG2_U64 !! 1052 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1053 bool
>> 1054 default y
76 1055
77 config ARCH_MTD_XIP !! 1056 #
78 def_bool y !! 1057 # Select some configuration options automatically based on user selections.
>> 1058 #
>> 1059 config FW_ARC
>> 1060 bool
>> 1061
>> 1062 config ARCH_MAY_HAVE_PC_FDC
>> 1063 bool
>> 1064
>> 1065 config BOOT_RAW
>> 1066 bool
>> 1067
>> 1068 config CEVT_BCM1480
>> 1069 bool
>> 1070
>> 1071 config CEVT_DS1287
>> 1072 bool
>> 1073
>> 1074 config CEVT_GT641XX
>> 1075 bool
>> 1076
>> 1077 config CEVT_R4K
>> 1078 bool
>> 1079
>> 1080 config CEVT_SB1250
>> 1081 bool
>> 1082
>> 1083 config CEVT_TXX9
>> 1084 bool
>> 1085
>> 1086 config CSRC_BCM1480
>> 1087 bool
>> 1088
>> 1089 config CSRC_IOASIC
>> 1090 bool
>> 1091
>> 1092 config CSRC_R4K
>> 1093 bool
>> 1094
>> 1095 config CSRC_SB1250
>> 1096 bool
>> 1097
>> 1098 config MIPS_CLOCK_VSYSCALL
>> 1099 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1100
>> 1101 config GPIO_TXX9
>> 1102 select GPIOLIB
>> 1103 bool
>> 1104
>> 1105 config FW_CFE
>> 1106 bool
>> 1107
>> 1108 config ARCH_SUPPORTS_UPROBES
>> 1109 bool
>> 1110
>> 1111 config DMA_MAYBE_COHERENT
>> 1112 select ARCH_HAS_DMA_COHERENCE_H
>> 1113 select DMA_NONCOHERENT
>> 1114 bool
>> 1115
>> 1116 config DMA_PERDEV_COHERENT
>> 1117 bool
>> 1118 select DMA_NONCOHERENT
>> 1119
>> 1120 config DMA_NONCOHERENT
>> 1121 bool
>> 1122 select ARCH_HAS_DMA_MMAP_PGPROT
>> 1123 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1124 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1125 select NEED_DMA_MAP_STATE
>> 1126 select ARCH_HAS_DMA_COHERENT_TO_PFN
>> 1127 select DMA_NONCOHERENT_CACHE_SYNC
>> 1128
>> 1129 config SYS_HAS_EARLY_PRINTK
>> 1130 bool
>> 1131
>> 1132 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1133 bool
>> 1134
>> 1135 config MIPS_BONITO64
>> 1136 bool
>> 1137
>> 1138 config MIPS_MSC
>> 1139 bool
>> 1140
>> 1141 config MIPS_NILE4
>> 1142 bool
>> 1143
>> 1144 config SYNC_R4K
>> 1145 bool
>> 1146
>> 1147 config MIPS_MACHINE
>> 1148 def_bool n
79 1149
80 config NO_IOPORT_MAP 1150 config NO_IOPORT_MAP
81 def_bool n 1151 def_bool n
82 1152
83 config HZ !! 1153 config GENERIC_CSUM
84 int !! 1154 bool
85 default 100 !! 1155 default y if !CPU_HAS_LOAD_STORE_LR
86 1156
87 config LOCKDEP_SUPPORT !! 1157 config GENERIC_ISA_DMA
88 def_bool y !! 1158 bool
>> 1159 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1160 select ISA_DMA_API
89 1161
90 config STACKTRACE_SUPPORT !! 1162 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1163 bool
>> 1164 select GENERIC_ISA_DMA
>> 1165
>> 1166 config ISA_DMA_API
>> 1167 bool
>> 1168
>> 1169 config HOLES_IN_ZONE
>> 1170 bool
>> 1171
>> 1172 config SYS_SUPPORTS_RELOCATABLE
>> 1173 bool
>> 1174 help
>> 1175 Selected if the platform supports relocating the kernel.
>> 1176 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1177 to allow access to command line and entropy sources.
>> 1178
>> 1179 config MIPS_CBPF_JIT
91 def_bool y 1180 def_bool y
>> 1181 depends on BPF_JIT && HAVE_CBPF_JIT
92 1182
93 config MMU !! 1183 config MIPS_EBPF_JIT
94 def_bool n !! 1184 def_bool y
95 select PFAULT !! 1185 depends on BPF_JIT && HAVE_EBPF_JIT
96 1186
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1187
100 config KASAN_SHADOW_OFFSET !! 1188 #
101 hex !! 1189 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1190 # answer,so we try hard to limit the available choices. Also the use of a
>> 1191 # choice statement should be more obvious to the user.
>> 1192 #
>> 1193 choice
>> 1194 prompt "Endianness selection"
>> 1195 help
>> 1196 Some MIPS machines can be configured for either little or big endian
>> 1197 byte order. These modes require different kernels and a different
>> 1198 Linux distribution. In general there is one preferred byteorder for a
>> 1199 particular system but some systems are just as commonly used in the
>> 1200 one or the other endianness.
103 1201
104 config CPU_BIG_ENDIAN 1202 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1203 bool "Big endian"
>> 1204 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1205
107 config CPU_LITTLE_ENDIAN 1206 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1207 bool "Little endian"
>> 1208 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1209
110 config CC_HAVE_CALL0_ABI !! 1210 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1211
113 menu "Processor type and features" !! 1212 config EXPORT_UASM
>> 1213 bool
114 1214
115 choice !! 1215 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1216 bool
117 default XTENSA_VARIANT_FSF <<
118 1217
119 config XTENSA_VARIANT_FSF !! 1218 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1219 bool
121 select MMU <<
122 1220
123 config XTENSA_VARIANT_DC232B !! 1221 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1222 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1223
130 config XTENSA_VARIANT_DC233C !! 1224 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1225 bool
132 select MMU !! 1226 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1227 default y
134 help !! 1228
135 This variant refers to Tensilica's D !! 1229 config MIPS_HUGE_TLB_SUPPORT
>> 1230 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1231
>> 1232 config IRQ_CPU_RM7K
>> 1233 bool
>> 1234
>> 1235 config IRQ_MSP_SLP
>> 1236 bool
>> 1237
>> 1238 config IRQ_MSP_CIC
>> 1239 bool
>> 1240
>> 1241 config IRQ_TXX9
>> 1242 bool
>> 1243
>> 1244 config IRQ_GT641XX
>> 1245 bool
>> 1246
>> 1247 config PCI_GT64XXX_PCI0
>> 1248 bool
>> 1249
>> 1250 config NO_EXCEPT_FILL
>> 1251 bool
>> 1252
>> 1253 config SOC_EMMA2RH
>> 1254 bool
>> 1255 select CEVT_R4K
>> 1256 select CSRC_R4K
>> 1257 select DMA_NONCOHERENT
>> 1258 select IRQ_MIPS_CPU
>> 1259 select SWAP_IO_SPACE
>> 1260 select SYS_HAS_CPU_R5500
>> 1261 select SYS_SUPPORTS_32BIT_KERNEL
>> 1262 select SYS_SUPPORTS_64BIT_KERNEL
>> 1263 select SYS_SUPPORTS_BIG_ENDIAN
>> 1264
>> 1265 config SOC_PNX833X
>> 1266 bool
>> 1267 select CEVT_R4K
>> 1268 select CSRC_R4K
>> 1269 select IRQ_MIPS_CPU
>> 1270 select DMA_NONCOHERENT
>> 1271 select SYS_HAS_CPU_MIPS32_R2
>> 1272 select SYS_SUPPORTS_32BIT_KERNEL
>> 1273 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1274 select SYS_SUPPORTS_BIG_ENDIAN
>> 1275 select SYS_SUPPORTS_MIPS16
>> 1276 select CPU_MIPSR2_IRQ_VI
>> 1277
>> 1278 config SOC_PNX8335
>> 1279 bool
>> 1280 select SOC_PNX833X
>> 1281
>> 1282 config MIPS_SPRAM
>> 1283 bool
>> 1284
>> 1285 config SWAP_IO_SPACE
>> 1286 bool
>> 1287
>> 1288 config SGI_HAS_INDYDOG
>> 1289 bool
>> 1290
>> 1291 config SGI_HAS_HAL2
>> 1292 bool
>> 1293
>> 1294 config SGI_HAS_SEEQ
>> 1295 bool
>> 1296
>> 1297 config SGI_HAS_WD93
>> 1298 bool
>> 1299
>> 1300 config SGI_HAS_ZILOG
>> 1301 bool
>> 1302
>> 1303 config SGI_HAS_I8042
>> 1304 bool
>> 1305
>> 1306 config DEFAULT_SGI_PARTITION
>> 1307 bool
>> 1308
>> 1309 config FW_ARC32
>> 1310 bool
>> 1311
>> 1312 config FW_SNIPROM
>> 1313 bool
>> 1314
>> 1315 config BOOT_ELF32
>> 1316 bool
>> 1317
>> 1318 config MIPS_L1_CACHE_SHIFT_4
>> 1319 bool
>> 1320
>> 1321 config MIPS_L1_CACHE_SHIFT_5
>> 1322 bool
>> 1323
>> 1324 config MIPS_L1_CACHE_SHIFT_6
>> 1325 bool
>> 1326
>> 1327 config MIPS_L1_CACHE_SHIFT_7
>> 1328 bool
>> 1329
>> 1330 config MIPS_L1_CACHE_SHIFT
>> 1331 int
>> 1332 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1333 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1334 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1335 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1336 default "5"
>> 1337
>> 1338 config HAVE_STD_PC_SERIAL_PORT
>> 1339 bool
>> 1340
>> 1341 config ARC_CONSOLE
>> 1342 bool "ARC console support"
>> 1343 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1344
>> 1345 config ARC_MEMORY
>> 1346 bool
>> 1347 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1348 default y
>> 1349
>> 1350 config ARC_PROMLIB
>> 1351 bool
>> 1352 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1353 default y
>> 1354
>> 1355 config FW_ARC64
>> 1356 bool
>> 1357
>> 1358 config BOOT_ELF64
>> 1359 bool
>> 1360
>> 1361 menu "CPU selection"
136 1362
137 config XTENSA_VARIANT_CUSTOM !! 1363 choice
138 bool "Custom Xtensa processor configur !! 1364 prompt "CPU type"
139 select HAVE_XTENSA_GPIO32 !! 1365 default CPU_R4X00
>> 1366
>> 1367 config CPU_LOONGSON3
>> 1368 bool "Loongson 3 CPU"
>> 1369 depends on SYS_HAS_CPU_LOONGSON3
>> 1370 select ARCH_HAS_PHYS_TO_DMA
>> 1371 select CPU_SUPPORTS_64BIT_KERNEL
>> 1372 select CPU_SUPPORTS_HIGHMEM
>> 1373 select CPU_SUPPORTS_HUGEPAGES
>> 1374 select CPU_HAS_LOAD_STORE_LR
>> 1375 select WEAK_ORDERING
>> 1376 select WEAK_REORDERING_BEYOND_LLSC
>> 1377 select MIPS_PGD_C0_CONTEXT
>> 1378 select MIPS_L1_CACHE_SHIFT_6
>> 1379 select GPIOLIB
>> 1380 select SWIOTLB
140 help 1381 help
141 Select this variant to use a custom !! 1382 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1383 set with many extensions.
143 endchoice <<
144 1384
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1385 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1386 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1387 default n
>> 1388 select CPU_MIPSR2
>> 1389 select CPU_HAS_PREFETCH
>> 1390 depends on CPU_LOONGSON3
>> 1391 help
>> 1392 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1393 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1394 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1395 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1396 Fast TLB refill support, etc.
>> 1397
>> 1398 This option enable those enhancements which are not probed at run
>> 1399 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1400 please say 'N' here. If you want a high-performance kernel to run on
>> 1401 new Loongson 3 machines only, please say 'Y' here.
>> 1402
>> 1403 config CPU_LOONGSON2E
>> 1404 bool "Loongson 2E"
>> 1405 depends on SYS_HAS_CPU_LOONGSON2E
>> 1406 select CPU_LOONGSON2
>> 1407 help
>> 1408 The Loongson 2E processor implements the MIPS III instruction set
>> 1409 with many extensions.
>> 1410
>> 1411 It has an internal FPGA northbridge, which is compatible to
>> 1412 bonito64.
>> 1413
>> 1414 config CPU_LOONGSON2F
>> 1415 bool "Loongson 2F"
>> 1416 depends on SYS_HAS_CPU_LOONGSON2F
>> 1417 select CPU_LOONGSON2
>> 1418 select GPIOLIB
>> 1419 help
>> 1420 The Loongson 2F processor implements the MIPS III instruction set
>> 1421 with many extensions.
>> 1422
>> 1423 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1424 have a similar programming interface with FPGA northbridge used in
>> 1425 Loongson2E.
>> 1426
>> 1427 config CPU_LOONGSON1B
>> 1428 bool "Loongson 1B"
>> 1429 depends on SYS_HAS_CPU_LOONGSON1B
>> 1430 select CPU_LOONGSON1
>> 1431 select LEDS_GPIO_REGISTER
>> 1432 help
>> 1433 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1434 Release 1 instruction set and part of the MIPS32 Release 2
>> 1435 instruction set.
>> 1436
>> 1437 config CPU_LOONGSON1C
>> 1438 bool "Loongson 1C"
>> 1439 depends on SYS_HAS_CPU_LOONGSON1C
>> 1440 select CPU_LOONGSON1
>> 1441 select LEDS_GPIO_REGISTER
>> 1442 help
>> 1443 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1444 Release 1 instruction set and part of the MIPS32 Release 2
>> 1445 instruction set.
>> 1446
>> 1447 config CPU_MIPS32_R1
>> 1448 bool "MIPS32 Release 1"
>> 1449 depends on SYS_HAS_CPU_MIPS32_R1
>> 1450 select CPU_HAS_PREFETCH
>> 1451 select CPU_HAS_LOAD_STORE_LR
>> 1452 select CPU_SUPPORTS_32BIT_KERNEL
>> 1453 select CPU_SUPPORTS_HIGHMEM
>> 1454 help
>> 1455 Choose this option to build a kernel for release 1 or later of the
>> 1456 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1457 MIPS processor are based on a MIPS32 processor. If you know the
>> 1458 specific type of processor in your system, choose those that one
>> 1459 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1460 Release 2 of the MIPS32 architecture is available since several
>> 1461 years so chances are you even have a MIPS32 Release 2 processor
>> 1462 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1463 performance.
>> 1464
>> 1465 config CPU_MIPS32_R2
>> 1466 bool "MIPS32 Release 2"
>> 1467 depends on SYS_HAS_CPU_MIPS32_R2
>> 1468 select CPU_HAS_PREFETCH
>> 1469 select CPU_HAS_LOAD_STORE_LR
>> 1470 select CPU_SUPPORTS_32BIT_KERNEL
>> 1471 select CPU_SUPPORTS_HIGHMEM
>> 1472 select CPU_SUPPORTS_MSA
>> 1473 select HAVE_KVM
>> 1474 help
>> 1475 Choose this option to build a kernel for release 2 or later of the
>> 1476 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1477 MIPS processor are based on a MIPS32 processor. If you know the
>> 1478 specific type of processor in your system, choose those that one
>> 1479 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1480
>> 1481 config CPU_MIPS32_R6
>> 1482 bool "MIPS32 Release 6"
>> 1483 depends on SYS_HAS_CPU_MIPS32_R6
>> 1484 select CPU_HAS_PREFETCH
>> 1485 select CPU_SUPPORTS_32BIT_KERNEL
>> 1486 select CPU_SUPPORTS_HIGHMEM
>> 1487 select CPU_SUPPORTS_MSA
>> 1488 select HAVE_KVM
>> 1489 select MIPS_O32_FP64_SUPPORT
>> 1490 help
>> 1491 Choose this option to build a kernel for release 6 or later of the
>> 1492 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1493 family, are based on a MIPS32r6 processor. If you own an older
>> 1494 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1495
>> 1496 config CPU_MIPS64_R1
>> 1497 bool "MIPS64 Release 1"
>> 1498 depends on SYS_HAS_CPU_MIPS64_R1
>> 1499 select CPU_HAS_PREFETCH
>> 1500 select CPU_HAS_LOAD_STORE_LR
>> 1501 select CPU_SUPPORTS_32BIT_KERNEL
>> 1502 select CPU_SUPPORTS_64BIT_KERNEL
>> 1503 select CPU_SUPPORTS_HIGHMEM
>> 1504 select CPU_SUPPORTS_HUGEPAGES
>> 1505 help
>> 1506 Choose this option to build a kernel for release 1 or later of the
>> 1507 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1508 MIPS processor are based on a MIPS64 processor. If you know the
>> 1509 specific type of processor in your system, choose those that one
>> 1510 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1511 Release 2 of the MIPS64 architecture is available since several
>> 1512 years so chances are you even have a MIPS64 Release 2 processor
>> 1513 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1514 performance.
>> 1515
>> 1516 config CPU_MIPS64_R2
>> 1517 bool "MIPS64 Release 2"
>> 1518 depends on SYS_HAS_CPU_MIPS64_R2
>> 1519 select CPU_HAS_PREFETCH
>> 1520 select CPU_HAS_LOAD_STORE_LR
>> 1521 select CPU_SUPPORTS_32BIT_KERNEL
>> 1522 select CPU_SUPPORTS_64BIT_KERNEL
>> 1523 select CPU_SUPPORTS_HIGHMEM
>> 1524 select CPU_SUPPORTS_HUGEPAGES
>> 1525 select CPU_SUPPORTS_MSA
>> 1526 select HAVE_KVM
>> 1527 help
>> 1528 Choose this option to build a kernel for release 2 or later of the
>> 1529 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1530 MIPS processor are based on a MIPS64 processor. If you know the
>> 1531 specific type of processor in your system, choose those that one
>> 1532 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1533
>> 1534 config CPU_MIPS64_R6
>> 1535 bool "MIPS64 Release 6"
>> 1536 depends on SYS_HAS_CPU_MIPS64_R6
>> 1537 select CPU_HAS_PREFETCH
>> 1538 select CPU_SUPPORTS_32BIT_KERNEL
>> 1539 select CPU_SUPPORTS_64BIT_KERNEL
>> 1540 select CPU_SUPPORTS_HIGHMEM
>> 1541 select CPU_SUPPORTS_MSA
>> 1542 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1543 select HAVE_KVM
>> 1544 help
>> 1545 Choose this option to build a kernel for release 6 or later of the
>> 1546 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1547 family, are based on a MIPS64r6 processor. If you own an older
>> 1548 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1549
>> 1550 config CPU_R3000
>> 1551 bool "R3000"
>> 1552 depends on SYS_HAS_CPU_R3000
>> 1553 select CPU_HAS_WB
>> 1554 select CPU_HAS_LOAD_STORE_LR
>> 1555 select CPU_SUPPORTS_32BIT_KERNEL
>> 1556 select CPU_SUPPORTS_HIGHMEM
>> 1557 help
>> 1558 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1559 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1560 *not* work on R4000 machines and vice versa. However, since most
>> 1561 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1562 might be a safe bet. If the resulting kernel does not work,
>> 1563 try to recompile with R3000.
>> 1564
>> 1565 config CPU_TX39XX
>> 1566 bool "R39XX"
>> 1567 depends on SYS_HAS_CPU_TX39XX
>> 1568 select CPU_SUPPORTS_32BIT_KERNEL
>> 1569 select CPU_HAS_LOAD_STORE_LR
>> 1570
>> 1571 config CPU_VR41XX
>> 1572 bool "R41xx"
>> 1573 depends on SYS_HAS_CPU_VR41XX
>> 1574 select CPU_SUPPORTS_32BIT_KERNEL
>> 1575 select CPU_SUPPORTS_64BIT_KERNEL
>> 1576 select CPU_HAS_LOAD_STORE_LR
>> 1577 help
>> 1578 The options selects support for the NEC VR4100 series of processors.
>> 1579 Only choose this option if you have one of these processors as a
>> 1580 kernel built with this option will not run on any other type of
>> 1581 processor or vice versa.
>> 1582
>> 1583 config CPU_R4300
>> 1584 bool "R4300"
>> 1585 depends on SYS_HAS_CPU_R4300
>> 1586 select CPU_SUPPORTS_32BIT_KERNEL
>> 1587 select CPU_SUPPORTS_64BIT_KERNEL
>> 1588 select CPU_HAS_LOAD_STORE_LR
>> 1589 help
>> 1590 MIPS Technologies R4300-series processors.
>> 1591
>> 1592 config CPU_R4X00
>> 1593 bool "R4x00"
>> 1594 depends on SYS_HAS_CPU_R4X00
>> 1595 select CPU_SUPPORTS_32BIT_KERNEL
>> 1596 select CPU_SUPPORTS_64BIT_KERNEL
>> 1597 select CPU_SUPPORTS_HUGEPAGES
>> 1598 select CPU_HAS_LOAD_STORE_LR
>> 1599 help
>> 1600 MIPS Technologies R4000-series processors other than 4300, including
>> 1601 the R4000, R4400, R4600, and 4700.
>> 1602
>> 1603 config CPU_TX49XX
>> 1604 bool "R49XX"
>> 1605 depends on SYS_HAS_CPU_TX49XX
>> 1606 select CPU_HAS_PREFETCH
>> 1607 select CPU_HAS_LOAD_STORE_LR
>> 1608 select CPU_SUPPORTS_32BIT_KERNEL
>> 1609 select CPU_SUPPORTS_64BIT_KERNEL
>> 1610 select CPU_SUPPORTS_HUGEPAGES
>> 1611
>> 1612 config CPU_R5000
>> 1613 bool "R5000"
>> 1614 depends on SYS_HAS_CPU_R5000
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HUGEPAGES
>> 1618 select CPU_HAS_LOAD_STORE_LR
>> 1619 help
>> 1620 MIPS Technologies R5000-series processors other than the Nevada.
>> 1621
>> 1622 config CPU_R5432
>> 1623 bool "R5432"
>> 1624 depends on SYS_HAS_CPU_R5432
>> 1625 select CPU_SUPPORTS_32BIT_KERNEL
>> 1626 select CPU_SUPPORTS_64BIT_KERNEL
>> 1627 select CPU_SUPPORTS_HUGEPAGES
>> 1628 select CPU_HAS_LOAD_STORE_LR
>> 1629
>> 1630 config CPU_R5500
>> 1631 bool "R5500"
>> 1632 depends on SYS_HAS_CPU_R5500
>> 1633 select CPU_SUPPORTS_32BIT_KERNEL
>> 1634 select CPU_SUPPORTS_64BIT_KERNEL
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 select CPU_HAS_LOAD_STORE_LR
>> 1637 help
>> 1638 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1639 instruction set.
>> 1640
>> 1641 config CPU_NEVADA
>> 1642 bool "RM52xx"
>> 1643 depends on SYS_HAS_CPU_NEVADA
>> 1644 select CPU_SUPPORTS_32BIT_KERNEL
>> 1645 select CPU_SUPPORTS_64BIT_KERNEL
>> 1646 select CPU_SUPPORTS_HUGEPAGES
>> 1647 select CPU_HAS_LOAD_STORE_LR
>> 1648 help
>> 1649 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1650
>> 1651 config CPU_R8000
>> 1652 bool "R8000"
>> 1653 depends on SYS_HAS_CPU_R8000
>> 1654 select CPU_HAS_PREFETCH
>> 1655 select CPU_HAS_LOAD_STORE_LR
>> 1656 select CPU_SUPPORTS_64BIT_KERNEL
>> 1657 help
>> 1658 MIPS Technologies R8000 processors. Note these processors are
>> 1659 uncommon and the support for them is incomplete.
>> 1660
>> 1661 config CPU_R10000
>> 1662 bool "R10000"
>> 1663 depends on SYS_HAS_CPU_R10000
>> 1664 select CPU_HAS_PREFETCH
>> 1665 select CPU_HAS_LOAD_STORE_LR
>> 1666 select CPU_SUPPORTS_32BIT_KERNEL
>> 1667 select CPU_SUPPORTS_64BIT_KERNEL
>> 1668 select CPU_SUPPORTS_HIGHMEM
>> 1669 select CPU_SUPPORTS_HUGEPAGES
>> 1670 help
>> 1671 MIPS Technologies R10000-series processors.
>> 1672
>> 1673 config CPU_RM7000
>> 1674 bool "RM7000"
>> 1675 depends on SYS_HAS_CPU_RM7000
>> 1676 select CPU_HAS_PREFETCH
>> 1677 select CPU_HAS_LOAD_STORE_LR
>> 1678 select CPU_SUPPORTS_32BIT_KERNEL
>> 1679 select CPU_SUPPORTS_64BIT_KERNEL
>> 1680 select CPU_SUPPORTS_HIGHMEM
>> 1681 select CPU_SUPPORTS_HUGEPAGES
>> 1682
>> 1683 config CPU_SB1
>> 1684 bool "SB1"
>> 1685 depends on SYS_HAS_CPU_SB1
>> 1686 select CPU_HAS_LOAD_STORE_LR
>> 1687 select CPU_SUPPORTS_32BIT_KERNEL
>> 1688 select CPU_SUPPORTS_64BIT_KERNEL
>> 1689 select CPU_SUPPORTS_HIGHMEM
>> 1690 select CPU_SUPPORTS_HUGEPAGES
>> 1691 select WEAK_ORDERING
>> 1692
>> 1693 config CPU_CAVIUM_OCTEON
>> 1694 bool "Cavium Octeon processor"
>> 1695 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1696 select CPU_HAS_PREFETCH
>> 1697 select CPU_HAS_LOAD_STORE_LR
>> 1698 select CPU_SUPPORTS_64BIT_KERNEL
>> 1699 select WEAK_ORDERING
>> 1700 select CPU_SUPPORTS_HIGHMEM
>> 1701 select CPU_SUPPORTS_HUGEPAGES
>> 1702 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1703 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1704 select MIPS_L1_CACHE_SHIFT_7
>> 1705 select HAVE_KVM
>> 1706 help
>> 1707 The Cavium Octeon processor is a highly integrated chip containing
>> 1708 many ethernet hardware widgets for networking tasks. The processor
>> 1709 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1710 Full details can be found at http://www.caviumnetworks.com.
>> 1711
>> 1712 config CPU_BMIPS
>> 1713 bool "Broadcom BMIPS"
>> 1714 depends on SYS_HAS_CPU_BMIPS
>> 1715 select CPU_MIPS32
>> 1716 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1717 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1718 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1719 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1720 select CPU_SUPPORTS_32BIT_KERNEL
>> 1721 select DMA_NONCOHERENT
>> 1722 select IRQ_MIPS_CPU
>> 1723 select SWAP_IO_SPACE
>> 1724 select WEAK_ORDERING
>> 1725 select CPU_SUPPORTS_HIGHMEM
>> 1726 select CPU_HAS_PREFETCH
>> 1727 select CPU_HAS_LOAD_STORE_LR
>> 1728 select CPU_SUPPORTS_CPUFREQ
>> 1729 select MIPS_EXTERNAL_TIMER
>> 1730 help
>> 1731 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1732
>> 1733 config CPU_XLR
>> 1734 bool "Netlogic XLR SoC"
>> 1735 depends on SYS_HAS_CPU_XLR
>> 1736 select CPU_HAS_LOAD_STORE_LR
>> 1737 select CPU_SUPPORTS_32BIT_KERNEL
>> 1738 select CPU_SUPPORTS_64BIT_KERNEL
>> 1739 select CPU_SUPPORTS_HIGHMEM
>> 1740 select CPU_SUPPORTS_HUGEPAGES
>> 1741 select WEAK_ORDERING
>> 1742 select WEAK_REORDERING_BEYOND_LLSC
>> 1743 help
>> 1744 Netlogic Microsystems XLR/XLS processors.
>> 1745
>> 1746 config CPU_XLP
>> 1747 bool "Netlogic XLP SoC"
>> 1748 depends on SYS_HAS_CPU_XLP
>> 1749 select CPU_SUPPORTS_32BIT_KERNEL
>> 1750 select CPU_SUPPORTS_64BIT_KERNEL
>> 1751 select CPU_SUPPORTS_HIGHMEM
>> 1752 select WEAK_ORDERING
>> 1753 select WEAK_REORDERING_BEYOND_LLSC
>> 1754 select CPU_HAS_PREFETCH
>> 1755 select CPU_HAS_LOAD_STORE_LR
>> 1756 select CPU_MIPSR2
>> 1757 select CPU_SUPPORTS_HUGEPAGES
>> 1758 select MIPS_ASID_BITS_VARIABLE
173 help 1759 help
174 Enable if core variant has Performan !! 1760 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1761 endchoice
176 <<
177 If unsure, say N. <<
178 1762
179 config XTENSA_FAKE_NMI !! 1763 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1764 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1765 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1766 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1767 help
>> 1768 Choose this option to build a kernel for release 2 or later of the
>> 1769 MIPS32 architecture including features from the 3.5 release such as
>> 1770 support for Enhanced Virtual Addressing (EVA).
>> 1771
>> 1772 config CPU_MIPS32_3_5_EVA
>> 1773 bool "Enhanced Virtual Addressing (EVA)"
>> 1774 depends on CPU_MIPS32_3_5_FEATURES
>> 1775 select EVA
>> 1776 default y
>> 1777 help
>> 1778 Choose this option if you want to enable the Enhanced Virtual
>> 1779 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1780 One of its primary benefits is an increase in the maximum size
>> 1781 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1782
>> 1783 config CPU_MIPS32_R5_FEATURES
>> 1784 bool "MIPS32 Release 5 Features"
>> 1785 depends on SYS_HAS_CPU_MIPS32_R5
>> 1786 depends on CPU_MIPS32_R2
>> 1787 help
>> 1788 Choose this option to build a kernel for release 2 or later of the
>> 1789 MIPS32 architecture including features from release 5 such as
>> 1790 support for Extended Physical Addressing (XPA).
>> 1791
>> 1792 config CPU_MIPS32_R5_XPA
>> 1793 bool "Extended Physical Addressing (XPA)"
>> 1794 depends on CPU_MIPS32_R5_FEATURES
>> 1795 depends on !EVA
>> 1796 depends on !PAGE_SIZE_4KB
>> 1797 depends on SYS_SUPPORTS_HIGHMEM
>> 1798 select XPA
>> 1799 select HIGHMEM
>> 1800 select PHYS_ADDR_T_64BIT
182 default n 1801 default n
183 help 1802 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1803 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1804 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1805 benefit is to increase physical addressing equal to or greater
>> 1806 than 40 bits. Note that this has the side effect of turning on
>> 1807 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1808 If unsure, say 'N' here.
186 1809
187 If there are other interrupts at or !! 1810 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1811 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1812 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1813
193 If unsure, say N. !! 1814 config CPU_JUMP_WORKAROUNDS
>> 1815 bool
194 1816
195 config PFAULT !! 1817 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1818 bool "Loongson 2F Workarounds"
197 default y 1819 default y
>> 1820 select CPU_NOP_WORKAROUNDS
>> 1821 select CPU_JUMP_WORKAROUNDS
198 help 1822 help
199 Handle protection faults. MMU config !! 1823 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1824 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1825 unexpectedly. For more information please refer to the gas
>> 1826 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1827
>> 1828 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1829 are needed. The workarounds have no significant side effect on them
>> 1830 but may decrease the performance of the system so this option should
>> 1831 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1832 systems.
202 1833
203 If unsure, say Y. !! 1834 If unsure, please say Y.
>> 1835 endif # CPU_LOONGSON2F
204 1836
205 config XTENSA_UNALIGNED_USER !! 1837 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1838 bool
207 help !! 1839 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1840 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1841 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1842 select HAVE_KERNEL_LZMA
>> 1843 select HAVE_KERNEL_LZO
>> 1844 select HAVE_KERNEL_XZ
211 1845
212 Say Y here to enable unaligned memor !! 1846 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1847 bool
>> 1848 select SYS_SUPPORTS_ZBOOT
213 1849
214 config XTENSA_LOAD_STORE !! 1850 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1851 bool
216 help !! 1852 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1853
223 Say Y here to enable exception handl !! 1854 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1855 bool
>> 1856 select CPU_SUPPORTS_32BIT_KERNEL
>> 1857 select CPU_SUPPORTS_64BIT_KERNEL
>> 1858 select CPU_SUPPORTS_HIGHMEM
>> 1859 select CPU_SUPPORTS_HUGEPAGES
>> 1860 select ARCH_HAS_PHYS_TO_DMA
>> 1861 select CPU_HAS_LOAD_STORE_LR
225 1862
226 config HAVE_SMP !! 1863 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1864 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1865 select CPU_MIPS32
229 select XTENSA_MX !! 1866 select CPU_MIPSR1
230 help !! 1867 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1868 select CPU_HAS_LOAD_STORE_LR
232 supports Multiprocessing. Multiproce !! 1869 select CPU_SUPPORTS_32BIT_KERNEL
233 the CPU core definition and currentl !! 1870 select CPU_SUPPORTS_HIGHMEM
>> 1871 select CPU_SUPPORTS_CPUFREQ
234 1872
235 Multiprocessor support is implemente !! 1873 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1874 select SMP_UP if SMP
>> 1875 bool
237 1876
238 The MX interrupt distributer adds In !! 1877 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1878 bool
240 like the open cores ethernet driver !! 1879 select SYS_SUPPORTS_SMP
>> 1880 select SYS_SUPPORTS_HOTPLUG_CPU
241 1881
242 You still have to select "Enable SMP !! 1882 config CPU_BMIPS4380
>> 1883 bool
>> 1884 select MIPS_L1_CACHE_SHIFT_6
>> 1885 select SYS_SUPPORTS_SMP
>> 1886 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1887 select CPU_HAS_RIXI
243 1888
244 config SMP !! 1889 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1890 bool
246 depends on HAVE_SMP !! 1891 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1892 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1893 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1894 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1895 select CPU_HAS_RIXI
251 1896
252 config NR_CPUS !! 1897 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1898 bool
254 int "Maximum number of CPUs (2-32)" !! 1899 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1900 select CPU_HAS_RIXI
256 default "4" <<
257 1901
258 config HOTPLUG_CPU !! 1902 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1903 bool
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 1904
265 Say N if you want to disable CPU hot !! 1905 config SYS_HAS_CPU_LOONGSON2F
>> 1906 bool
>> 1907 select CPU_SUPPORTS_CPUFREQ
>> 1908 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1909 select CPU_SUPPORTS_UNCACHED_ACCELERATED
266 1910
267 config SECONDARY_RESET_VECTOR !! 1911 config SYS_HAS_CPU_LOONGSON1B
268 bool "Secondary cores use alternative !! 1912 bool
269 default y !! 1913
270 depends on HAVE_SMP !! 1914 config SYS_HAS_CPU_LOONGSON1C
>> 1915 bool
>> 1916
>> 1917 config SYS_HAS_CPU_MIPS32_R1
>> 1918 bool
>> 1919
>> 1920 config SYS_HAS_CPU_MIPS32_R2
>> 1921 bool
>> 1922
>> 1923 config SYS_HAS_CPU_MIPS32_R3_5
>> 1924 bool
>> 1925
>> 1926 config SYS_HAS_CPU_MIPS32_R5
>> 1927 bool
>> 1928
>> 1929 config SYS_HAS_CPU_MIPS32_R6
>> 1930 bool
>> 1931
>> 1932 config SYS_HAS_CPU_MIPS64_R1
>> 1933 bool
>> 1934
>> 1935 config SYS_HAS_CPU_MIPS64_R2
>> 1936 bool
>> 1937
>> 1938 config SYS_HAS_CPU_MIPS64_R6
>> 1939 bool
>> 1940
>> 1941 config SYS_HAS_CPU_R3000
>> 1942 bool
>> 1943
>> 1944 config SYS_HAS_CPU_TX39XX
>> 1945 bool
>> 1946
>> 1947 config SYS_HAS_CPU_VR41XX
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_R4300
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_R4X00
>> 1954 bool
>> 1955
>> 1956 config SYS_HAS_CPU_TX49XX
>> 1957 bool
>> 1958
>> 1959 config SYS_HAS_CPU_R5000
>> 1960 bool
>> 1961
>> 1962 config SYS_HAS_CPU_R5432
>> 1963 bool
>> 1964
>> 1965 config SYS_HAS_CPU_R5500
>> 1966 bool
>> 1967
>> 1968 config SYS_HAS_CPU_NEVADA
>> 1969 bool
>> 1970
>> 1971 config SYS_HAS_CPU_R8000
>> 1972 bool
>> 1973
>> 1974 config SYS_HAS_CPU_R10000
>> 1975 bool
>> 1976
>> 1977 config SYS_HAS_CPU_RM7000
>> 1978 bool
>> 1979
>> 1980 config SYS_HAS_CPU_SB1
>> 1981 bool
>> 1982
>> 1983 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1984 bool
>> 1985
>> 1986 config SYS_HAS_CPU_BMIPS
>> 1987 bool
>> 1988
>> 1989 config SYS_HAS_CPU_BMIPS32_3300
>> 1990 bool
>> 1991 select SYS_HAS_CPU_BMIPS
>> 1992
>> 1993 config SYS_HAS_CPU_BMIPS4350
>> 1994 bool
>> 1995 select SYS_HAS_CPU_BMIPS
>> 1996
>> 1997 config SYS_HAS_CPU_BMIPS4380
>> 1998 bool
>> 1999 select SYS_HAS_CPU_BMIPS
>> 2000
>> 2001 config SYS_HAS_CPU_BMIPS5000
>> 2002 bool
>> 2003 select SYS_HAS_CPU_BMIPS
>> 2004
>> 2005 config SYS_HAS_CPU_XLR
>> 2006 bool
>> 2007
>> 2008 config SYS_HAS_CPU_XLP
>> 2009 bool
>> 2010
>> 2011 #
>> 2012 # CPU may reorder R->R, R->W, W->R, W->W
>> 2013 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2014 #
>> 2015 config WEAK_ORDERING
>> 2016 bool
>> 2017
>> 2018 #
>> 2019 # CPU may reorder reads and writes beyond LL/SC
>> 2020 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2021 #
>> 2022 config WEAK_REORDERING_BEYOND_LLSC
>> 2023 bool
>> 2024 endmenu
>> 2025
>> 2026 #
>> 2027 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2028 #
>> 2029 config CPU_MIPS32
>> 2030 bool
>> 2031 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2032
>> 2033 config CPU_MIPS64
>> 2034 bool
>> 2035 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2036
>> 2037 #
>> 2038 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2039 #
>> 2040 config CPU_MIPSR1
>> 2041 bool
>> 2042 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2043
>> 2044 config CPU_MIPSR2
>> 2045 bool
>> 2046 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2047 select CPU_HAS_RIXI
>> 2048 select MIPS_SPRAM
>> 2049
>> 2050 config CPU_MIPSR6
>> 2051 bool
>> 2052 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2053 select CPU_HAS_RIXI
>> 2054 select HAVE_ARCH_BITREVERSE
>> 2055 select MIPS_ASID_BITS_VARIABLE
>> 2056 select MIPS_CRC_SUPPORT
>> 2057 select MIPS_SPRAM
>> 2058
>> 2059 config EVA
>> 2060 bool
>> 2061
>> 2062 config XPA
>> 2063 bool
>> 2064
>> 2065 config SYS_SUPPORTS_32BIT_KERNEL
>> 2066 bool
>> 2067 config SYS_SUPPORTS_64BIT_KERNEL
>> 2068 bool
>> 2069 config CPU_SUPPORTS_32BIT_KERNEL
>> 2070 bool
>> 2071 config CPU_SUPPORTS_64BIT_KERNEL
>> 2072 bool
>> 2073 config CPU_SUPPORTS_CPUFREQ
>> 2074 bool
>> 2075 config CPU_SUPPORTS_ADDRWINCFG
>> 2076 bool
>> 2077 config CPU_SUPPORTS_HUGEPAGES
>> 2078 bool
>> 2079 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2080 bool
>> 2081 config MIPS_PGD_C0_CONTEXT
>> 2082 bool
>> 2083 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2084
>> 2085 #
>> 2086 # Set to y for ptrace access to watch registers.
>> 2087 #
>> 2088 config HARDWARE_WATCHPOINTS
>> 2089 bool
>> 2090 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2091
>> 2092 menu "Kernel type"
>> 2093
>> 2094 choice
>> 2095 prompt "Kernel code model"
271 help 2096 help
272 Secondary cores may be configured to !! 2097 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2098 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2099 large memory. You will only be presented a single option in this
>> 2100 menu if your system does not support both 32-bit and 64-bit kernels.
275 2101
276 config FAST_SYSCALL_XTENSA !! 2102 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2103 bool "32-bit kernel"
278 default n !! 2104 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2105 select TRAD_SIGNALS
279 help 2106 help
280 fast_syscall_xtensa is a syscall tha !! 2107 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2108
283 This syscall is deprecated. It may h !! 2109 config 64BIT
284 invalid arguments. It is provided on !! 2110 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2111 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2112 help
>> 2113 Select this option if you want to build a 64-bit kernel.
286 2114
287 If unsure, say N. !! 2115 endchoice
288 2116
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2117 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2118 bool "KVM Guest Kernel"
291 default n !! 2119 depends on BROKEN_ON_SMP
>> 2120 help
>> 2121 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2122 mode.
>> 2123
>> 2124 config KVM_GUEST_TIMER_FREQ
>> 2125 int "Count/Compare Timer Frequency (MHz)"
>> 2126 depends on KVM_GUEST
>> 2127 default 100
292 help 2128 help
293 fast_syscall_spill_registers is a sy !! 2129 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2130 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2131 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2132
297 invalid arguments. It is provided on !! 2133 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2134 bool "48 bits virtual memory"
>> 2135 depends on 64BIT
>> 2136 help
>> 2137 Support a maximum at least 48 bits of application virtual
>> 2138 memory. Default is 40 bits or less, depending on the CPU.
>> 2139 For page sizes 16k and above, this option results in a small
>> 2140 memory overhead for page tables. For 4k page size, a fourth
>> 2141 level of page tables is added which imposes both a memory
>> 2142 overhead as well as slower TLB fault handling.
299 2143
300 If unsure, say N. 2144 If unsure, say N.
301 2145
302 choice 2146 choice
303 prompt "Kernel ABI" !! 2147 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2148 default PAGE_SIZE_4KB
305 help !! 2149
306 Select ABI for the kernel code. This !! 2150 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2151 bool "4kB"
308 kernel/userspace ABI is possible and !! 2152 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2153 help
310 In case both kernel and userspace su !! 2154 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2155 R3000-family processors this is the only available page size. Using
312 build. !! 2156 4kB page size will minimize memory consumption and is therefore
313 !! 2157 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2158
315 !! 2159 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2160 bool "8kB"
317 bool "Default ABI" !! 2161 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2162 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2163 help
320 selected for the toolchain. !! 2164 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2165 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2166 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2167 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2168
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2169 config PAGE_SIZE_16KB
326 help !! 2170 bool "16kB"
327 Select this option to compile kernel !! 2171 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2172 help
329 When this option is not selected the !! 2173 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2174 the price of higher memory consumption. This option is available on
>> 2175 all non-R3000 family processors. Note that you will need a suitable
>> 2176 Linux distribution to support this.
>> 2177
>> 2178 config PAGE_SIZE_32KB
>> 2179 bool "32kB"
>> 2180 depends on CPU_CAVIUM_OCTEON
>> 2181 depends on !MIPS_VA_BITS_48
>> 2182 help
>> 2183 Using 32kB page size will result in higher performance kernel at
>> 2184 the price of higher memory consumption. This option is available
>> 2185 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2186 distribution to support this.
>> 2187
>> 2188 config PAGE_SIZE_64KB
>> 2189 bool "64kB"
>> 2190 depends on !CPU_R3000 && !CPU_TX39XX
>> 2191 help
>> 2192 Using 64kB page size will result in higher performance kernel at
>> 2193 the price of higher memory consumption. This option is available on
>> 2194 all non-R3000 family processor. Not that at the time of this
>> 2195 writing this option is still high experimental.
331 2196
332 endchoice 2197 endchoice
333 2198
334 config USER_ABI_CALL0 !! 2199 config FORCE_MAX_ZONEORDER
>> 2200 int "Maximum zone order"
>> 2201 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2202 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2203 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2204 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2205 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2206 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2207 range 11 64
>> 2208 default "11"
>> 2209 help
>> 2210 The kernel memory allocator divides physically contiguous memory
>> 2211 blocks into "zones", where each zone is a power of two number of
>> 2212 pages. This option selects the largest power of two that the kernel
>> 2213 keeps in the memory allocator. If you need to allocate very large
>> 2214 blocks of physically contiguous memory, then you may need to
>> 2215 increase this value.
>> 2216
>> 2217 This config option is actually maximum order plus one. For example,
>> 2218 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2219
>> 2220 The page size is not necessarily 4KB. Keep this in mind
>> 2221 when choosing a value for this option.
>> 2222
>> 2223 config BOARD_SCACHE
335 bool 2224 bool
336 2225
337 choice !! 2226 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2227 bool
339 default USER_ABI_DEFAULT !! 2228 select BOARD_SCACHE
>> 2229
>> 2230 #
>> 2231 # Support for a MIPS32 / MIPS64 style S-caches
>> 2232 #
>> 2233 config MIPS_CPU_SCACHE
>> 2234 bool
>> 2235 select BOARD_SCACHE
>> 2236
>> 2237 config R5000_CPU_SCACHE
>> 2238 bool
>> 2239 select BOARD_SCACHE
>> 2240
>> 2241 config RM7000_CPU_SCACHE
>> 2242 bool
>> 2243 select BOARD_SCACHE
>> 2244
>> 2245 config SIBYTE_DMA_PAGEOPS
>> 2246 bool "Use DMA to clear/copy pages"
>> 2247 depends on CPU_SB1
340 help 2248 help
341 Select supported userspace ABI. !! 2249 Instead of using the CPU to zero and copy pages, use a Data Mover
>> 2250 channel. These DMA channels are otherwise unused by the standard
>> 2251 SiByte Linux port. Seems to give a small performance benefit.
>> 2252
>> 2253 config CPU_HAS_PREFETCH
>> 2254 bool
>> 2255
>> 2256 config CPU_GENERIC_DUMP_TLB
>> 2257 bool
>> 2258 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
>> 2259
>> 2260 config CPU_R4K_FPU
>> 2261 bool
>> 2262 default y if !(CPU_R3000 || CPU_TX39XX)
>> 2263
>> 2264 config CPU_R4K_CACHE_TLB
>> 2265 bool
>> 2266 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2267
>> 2268 config MIPS_MT_SMP
>> 2269 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2270 default y
>> 2271 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2272 select CPU_MIPSR2_IRQ_VI
>> 2273 select CPU_MIPSR2_IRQ_EI
>> 2274 select SYNC_R4K
>> 2275 select MIPS_MT
>> 2276 select SMP
>> 2277 select SMP_UP
>> 2278 select SYS_SUPPORTS_SMP
>> 2279 select SYS_SUPPORTS_SCHED_SMT
>> 2280 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2281 help
>> 2282 This is a kernel model which is known as SMVP. This is supported
>> 2283 on cores with the MT ASE and uses the available VPEs to implement
>> 2284 virtual processors which supports SMP. This is equivalent to the
>> 2285 Intel Hyperthreading feature. For further information go to
>> 2286 <http://www.imgtec.com/mips/mips-multithreading.asp>.
342 2287
343 If unsure, choose the default ABI. !! 2288 config MIPS_MT
>> 2289 bool
344 2290
345 config USER_ABI_DEFAULT !! 2291 config SCHED_SMT
346 bool "Default ABI only" !! 2292 bool "SMT (multithreading) scheduler support"
>> 2293 depends on SYS_SUPPORTS_SCHED_SMT
>> 2294 default n
347 help 2295 help
348 Assume default userspace ABI. For XE !! 2296 SMT scheduler support improves the CPU scheduler's decision making
349 call0 ABI binaries may be run on suc !! 2297 when dealing with MIPS MT enabled cores at a cost of slightly
350 will not work correctly for them. !! 2298 increased overhead in some places. If unsure say N here.
>> 2299
>> 2300 config SYS_SUPPORTS_SCHED_SMT
>> 2301 bool
351 2302
352 config USER_ABI_CALL0_ONLY !! 2303 config SYS_SUPPORTS_MULTITHREADING
353 bool "Call0 ABI only" !! 2304 bool
354 select USER_ABI_CALL0 !! 2305
>> 2306 config MIPS_MT_FPAFF
>> 2307 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2308 default y
>> 2309 depends on MIPS_MT_SMP
>> 2310
>> 2311 config MIPSR2_TO_R6_EMULATOR
>> 2312 bool "MIPS R2-to-R6 emulator"
>> 2313 depends on CPU_MIPSR6
>> 2314 default y
355 help 2315 help
356 Select this option to support only c !! 2316 Choose this option if you want to run non-R6 MIPS userland code.
357 Windowed ABI binaries will crash wit !! 2317 Even if you say 'Y' here, the emulator will still be disabled by
358 an illegal instruction exception on !! 2318 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2319 The only reason this is a build-time option is to save ~14K from the
>> 2320 final kernel image.
359 2321
360 Choose this option if you're plannin !! 2322 config SYS_SUPPORTS_VPE_LOADER
361 built with call0 ABI. !! 2323 bool
>> 2324 depends on SYS_SUPPORTS_MULTITHREADING
>> 2325 help
>> 2326 Indicates that the platform supports the VPE loader, and provides
>> 2327 physical_memsize.
362 2328
363 config USER_ABI_CALL0_PROBE !! 2329 config MIPS_VPE_LOADER
364 bool "Support both windowed and call0 !! 2330 bool "VPE loader support."
365 select USER_ABI_CALL0 !! 2331 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2332 select CPU_MIPSR2_IRQ_VI
>> 2333 select CPU_MIPSR2_IRQ_EI
>> 2334 select MIPS_MT
366 help 2335 help
367 Select this option to support both w !! 2336 Includes a loader for loading an elf relocatable object
368 ABIs. When enabled all processes are !! 2337 onto another VPE and running it.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 2338
373 This option should be enabled for th !! 2339 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2340 bool
>> 2341 default "y"
>> 2342 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2343
376 Note that Xtensa ISA does not guaran !! 2344 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2345 bool
378 PS.WOE is disabled, check whether th !! 2346 default "y"
>> 2347 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2348
380 endchoice !! 2349 config MIPS_VPE_LOADER_TOM
>> 2350 bool "Load VPE program into memory hidden from linux"
>> 2351 depends on MIPS_VPE_LOADER
>> 2352 default y
>> 2353 help
>> 2354 The loader can use memory that is present but has been hidden from
>> 2355 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2356 you to ensure the amount you put in the option and the space your
>> 2357 program requires is less or equal to the amount physically present.
>> 2358
>> 2359 config MIPS_VPE_APSP_API
>> 2360 bool "Enable support for AP/SP API (RTLX)"
>> 2361 depends on MIPS_VPE_LOADER
381 2362
382 endmenu !! 2363 config MIPS_VPE_APSP_API_CMP
>> 2364 bool
>> 2365 default "y"
>> 2366 depends on MIPS_VPE_APSP_API && MIPS_CMP
383 2367
384 config XTENSA_CALIBRATE_CCOUNT !! 2368 config MIPS_VPE_APSP_API_MT
385 def_bool n !! 2369 bool
>> 2370 default "y"
>> 2371 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2372
>> 2373 config MIPS_CMP
>> 2374 bool "MIPS CMP framework support (DEPRECATED)"
>> 2375 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2376 select SMP
>> 2377 select SYNC_R4K
>> 2378 select SYS_SUPPORTS_SMP
>> 2379 select WEAK_ORDERING
>> 2380 default n
386 help 2381 help
387 On some platforms (XT2000, for examp !! 2382 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2383 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2384 its ability to start secondary CPUs.
>> 2385
>> 2386 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2387 instead of this.
>> 2388
>> 2389 config MIPS_CPS
>> 2390 bool "MIPS Coherent Processing System support"
>> 2391 depends on SYS_SUPPORTS_MIPS_CPS
>> 2392 select MIPS_CM
>> 2393 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2394 select SMP
>> 2395 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2396 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2397 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2398 select SYS_SUPPORTS_SMP
>> 2399 select WEAK_ORDERING
>> 2400 help
>> 2401 Select this if you wish to run an SMP kernel across multiple cores
>> 2402 within a MIPS Coherent Processing System. When this option is
>> 2403 enabled the kernel will probe for other cores and boot them with
>> 2404 no external assistance. It is safe to enable this when hardware
>> 2405 support is unavailable.
390 2406
391 config SERIAL_CONSOLE !! 2407 config MIPS_CPS_PM
392 def_bool n !! 2408 depends on MIPS_CPS
>> 2409 bool
393 2410
394 config PLATFORM_HAVE_XIP !! 2411 config MIPS_CM
395 def_bool n !! 2412 bool
>> 2413 select MIPS_CPC
>> 2414
>> 2415 config MIPS_CPC
>> 2416 bool
>> 2417
>> 2418 config SB1_PASS_2_WORKAROUNDS
>> 2419 bool
>> 2420 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2421 default y
>> 2422
>> 2423 config SB1_PASS_2_1_WORKAROUNDS
>> 2424 bool
>> 2425 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2426 default y
396 2427
397 menu "Platform options" <<
398 2428
399 choice 2429 choice
400 prompt "Xtensa System Type" !! 2430 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS !! 2431
>> 2432 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2433 bool "None"
>> 2434 help
>> 2435 Select this if you want neither microMIPS nor SmartMIPS support
402 2436
403 config XTENSA_PLATFORM_ISS !! 2437 config CPU_HAS_SMARTMIPS
404 bool "ISS" !! 2438 depends on SYS_SUPPORTS_SMARTMIPS
405 select XTENSA_CALIBRATE_CCOUNT !! 2439 bool "SmartMIPS"
406 select SERIAL_CONSOLE !! 2440 help
407 help !! 2441 SmartMIPS is a extension of the MIPS32 architecture aimed at
408 ISS is an acronym for Tensilica's In !! 2442 increased security at both hardware and software level for
409 !! 2443 smartcards. Enabling this option will allow proper use of the
410 config XTENSA_PLATFORM_XT2000 !! 2444 SmartMIPS instructions by Linux applications. However a kernel with
411 bool "XT2000" !! 2445 this option will not work on a MIPS core without SmartMIPS core. If
412 help !! 2446 you don't know you probably don't have SmartMIPS and should say N
413 XT2000 is the name of Tensilica's fe !! 2447 here.
414 This hardware is capable of running !! 2448
415 !! 2449 config CPU_MICROMIPS
416 config XTENSA_PLATFORM_XTFPGA !! 2450 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
417 bool "XTFPGA" !! 2451 bool "microMIPS"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2452 help
424 XTFPGA is the name of Tensilica boar !! 2453 When this option is enabled the kernel will be built using the
425 This hardware is capable of running !! 2454 microMIPS ISA
426 2455
427 endchoice 2456 endchoice
428 2457
429 config PLATFORM_NR_IRQS !! 2458 config CPU_HAS_MSA
430 int !! 2459 bool "Support for the MIPS SIMD Architecture"
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2460 depends on CPU_SUPPORTS_MSA
432 default 0 !! 2461 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2462 help
>> 2463 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2464 and a set of SIMD instructions to operate on them. When this option
>> 2465 is enabled the kernel will support allocating & switching MSA
>> 2466 vector register contexts. If you know that your kernel will only be
>> 2467 running on CPUs which do not support MSA or that your userland will
>> 2468 not be making use of it then you may wish to say N here to reduce
>> 2469 the size & complexity of your kernel.
433 2470
434 config XTENSA_CPU_CLOCK !! 2471 If unsure, say Y.
435 int "CPU clock rate [MHz]" <<
436 depends on !XTENSA_CALIBRATE_CCOUNT <<
437 default 16 <<
438 2472
439 config GENERIC_CALIBRATE_DELAY !! 2473 config CPU_HAS_WB
440 bool "Auto calibration of the BogoMIPS !! 2474 bool
441 help <<
442 The BogoMIPS value can easily be der <<
443 2475
444 config CMDLINE_BOOL !! 2476 config XKS01
445 bool "Default bootloader kernel argume !! 2477 bool
446 2478
447 config CMDLINE !! 2479 config CPU_HAS_RIXI
448 string "Initial kernel command string" !! 2480 bool
449 depends on CMDLINE_BOOL <<
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2481
458 config USE_OF !! 2482 config CPU_HAS_LOAD_STORE_LR
459 bool "Flattened Device Tree support" !! 2483 bool
460 select OF <<
461 select OF_EARLY_FLATTREE <<
462 help 2484 help
463 Include support for flattened device !! 2485 CPU has support for unaligned load and store instructions:
>> 2486 LWL, LWR, SWL, SWR (Load/store word left/right).
>> 2487 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
>> 2488
>> 2489 #
>> 2490 # Vectored interrupt mode is an R2 feature
>> 2491 #
>> 2492 config CPU_MIPSR2_IRQ_VI
>> 2493 bool
464 2494
465 config BUILTIN_DTB_SOURCE !! 2495 #
466 string "DTB to build into the kernel i !! 2496 # Extended interrupt mode is an R2 feature
467 depends on OF !! 2497 #
>> 2498 config CPU_MIPSR2_IRQ_EI
>> 2499 bool
468 2500
469 config PARSE_BOOTPARAM !! 2501 config CPU_HAS_SYNC
470 bool "Parse bootparam block" !! 2502 bool
>> 2503 depends on !CPU_R3000
471 default y 2504 default y
472 help <<
473 Parse parameters passed to the kerne <<
474 be disabled if the kernel is known t <<
475 2505
476 If unsure, say Y. !! 2506 #
>> 2507 # CPU non-features
>> 2508 #
>> 2509 config CPU_DADDI_WORKAROUNDS
>> 2510 bool
477 2511
478 choice !! 2512 config CPU_R4000_WORKAROUNDS
479 prompt "Semihosting interface" !! 2513 bool
480 default XTENSA_SIMCALL_ISS !! 2514 select CPU_R4400_WORKAROUNDS
481 depends on XTENSA_PLATFORM_ISS <<
482 help <<
483 Choose semihosting interface that wi <<
484 block device and networking. <<
485 2515
486 config XTENSA_SIMCALL_ISS !! 2516 config CPU_R4400_WORKAROUNDS
487 bool "simcall" !! 2517 bool
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2518
492 config XTENSA_SIMCALL_GDBIO !! 2519 config MIPS_ASID_SHIFT
493 bool "GDBIO" !! 2520 int
>> 2521 default 6 if CPU_R3000 || CPU_TX39XX
>> 2522 default 4 if CPU_R8000
>> 2523 default 0
>> 2524
>> 2525 config MIPS_ASID_BITS
>> 2526 int
>> 2527 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2528 default 6 if CPU_R3000 || CPU_TX39XX
>> 2529 default 8
>> 2530
>> 2531 config MIPS_ASID_BITS_VARIABLE
>> 2532 bool
>> 2533
>> 2534 config MIPS_CRC_SUPPORT
>> 2535 bool
>> 2536
>> 2537 #
>> 2538 # - Highmem only makes sense for the 32-bit kernel.
>> 2539 # - The current highmem code will only work properly on physically indexed
>> 2540 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2541 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2542 # moment we protect the user and offer the highmem option only on machines
>> 2543 # where it's known to be safe. This will not offer highmem on a few systems
>> 2544 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2545 # indexed CPUs but we're playing safe.
>> 2546 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2547 # know they might have memory configurations that could make use of highmem
>> 2548 # support.
>> 2549 #
>> 2550 config HIGHMEM
>> 2551 bool "High Memory Support"
>> 2552 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2553
>> 2554 config CPU_SUPPORTS_HIGHMEM
>> 2555 bool
>> 2556
>> 2557 config SYS_SUPPORTS_HIGHMEM
>> 2558 bool
>> 2559
>> 2560 config SYS_SUPPORTS_SMARTMIPS
>> 2561 bool
>> 2562
>> 2563 config SYS_SUPPORTS_MICROMIPS
>> 2564 bool
>> 2565
>> 2566 config SYS_SUPPORTS_MIPS16
>> 2567 bool
494 help 2568 help
495 Use break instruction. It is availab !! 2569 This option must be set if a kernel might be executed on a MIPS16-
496 is attached to it via JTAG. !! 2570 enabled CPU even if MIPS16 is not actually being used. In other
>> 2571 words, it makes the kernel MIPS16-tolerant.
497 2572
498 endchoice !! 2573 config CPU_SUPPORTS_MSA
>> 2574 bool
499 2575
500 config BLK_DEV_SIMDISK !! 2576 config ARCH_FLATMEM_ENABLE
501 tristate "Host file-based simulated bl !! 2577 def_bool y
502 default n !! 2578 depends on !NUMA && !CPU_LOONGSON2
503 depends on XTENSA_PLATFORM_ISS && BLOC !! 2579
>> 2580 config ARCH_DISCONTIGMEM_ENABLE
>> 2581 bool
>> 2582 default y if SGI_IP27
504 help 2583 help
505 Create block devices that map to fil !! 2584 Say Y to support efficient handling of discontiguous physical memory,
506 Device binding to host file may be c !! 2585 for architectures which are either NUMA (Non-Uniform Memory Access)
507 interface provided the device is not !! 2586 or have huge holes in the physical address space for other reasons.
508 !! 2587 See <file:Documentation/vm/numa.rst> for more.
509 config BLK_DEV_SIMDISK_COUNT !! 2588
510 int "Number of host file-based simulat !! 2589 config ARCH_SPARSEMEM_ENABLE
511 range 1 10 !! 2590 bool
512 depends on BLK_DEV_SIMDISK !! 2591 select SPARSEMEM_STATIC
513 default 2 !! 2592
>> 2593 config NUMA
>> 2594 bool "NUMA Support"
>> 2595 depends on SYS_SUPPORTS_NUMA
>> 2596 help
>> 2597 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2598 Access). This option improves performance on systems with more
>> 2599 than two nodes; on two node systems it is generally better to
>> 2600 leave it disabled; on single node systems disable this option
>> 2601 disabled.
>> 2602
>> 2603 config SYS_SUPPORTS_NUMA
>> 2604 bool
>> 2605
>> 2606 config RELOCATABLE
>> 2607 bool "Relocatable kernel"
>> 2608 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2609 help
>> 2610 This builds a kernel image that retains relocation information
>> 2611 so it can be loaded someplace besides the default 1MB.
>> 2612 The relocations make the kernel binary about 15% larger,
>> 2613 but are discarded at runtime
>> 2614
>> 2615 config RELOCATION_TABLE_SIZE
>> 2616 hex "Relocation table size"
>> 2617 depends on RELOCATABLE
>> 2618 range 0x0 0x01000000
>> 2619 default "0x00100000"
>> 2620 ---help---
>> 2621 A table of relocation data will be appended to the kernel binary
>> 2622 and parsed at boot to fix up the relocated kernel.
>> 2623
>> 2624 This option allows the amount of space reserved for the table to be
>> 2625 adjusted, although the default of 1Mb should be ok in most cases.
>> 2626
>> 2627 The build will fail and a valid size suggested if this is too small.
>> 2628
>> 2629 If unsure, leave at the default value.
>> 2630
>> 2631 config RANDOMIZE_BASE
>> 2632 bool "Randomize the address of the kernel image"
>> 2633 depends on RELOCATABLE
>> 2634 ---help---
>> 2635 Randomizes the physical and virtual address at which the
>> 2636 kernel image is loaded, as a security feature that
>> 2637 deters exploit attempts relying on knowledge of the location
>> 2638 of kernel internals.
>> 2639
>> 2640 Entropy is generated using any coprocessor 0 registers available.
>> 2641
>> 2642 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2643
>> 2644 If unsure, say N.
>> 2645
>> 2646 config RANDOMIZE_BASE_MAX_OFFSET
>> 2647 hex "Maximum kASLR offset" if EXPERT
>> 2648 depends on RANDOMIZE_BASE
>> 2649 range 0x0 0x40000000 if EVA || 64BIT
>> 2650 range 0x0 0x08000000
>> 2651 default "0x01000000"
>> 2652 ---help---
>> 2653 When kASLR is active, this provides the maximum offset that will
>> 2654 be applied to the kernel image. It should be set according to the
>> 2655 amount of physical RAM available in the target system minus
>> 2656 PHYSICAL_START and must be a power of 2.
>> 2657
>> 2658 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2659 EVA or 64-bit. The default is 16Mb.
>> 2660
>> 2661 config NODES_SHIFT
>> 2662 int
>> 2663 default "6"
>> 2664 depends on NEED_MULTIPLE_NODES
>> 2665
>> 2666 config HW_PERF_EVENTS
>> 2667 bool "Enable hardware performance counter support for perf events"
>> 2668 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
>> 2669 default y
514 help 2670 help
515 This is the default minimal number o !! 2671 Enable hardware performance counter support for perf events. If
516 Kernel/module parameter 'simdisk_cou !! 2672 disabled, perf events will use software events only.
517 value at runtime. More file names (b !! 2673
518 specified as parameters, simdisk_cou !! 2674 config SMP
519 !! 2675 bool "Multi-Processing support"
520 config SIMDISK0_FILENAME !! 2676 depends on SYS_SUPPORTS_SMP
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2677 help
541 There's a 2x16 LCD on most of XTFPGA !! 2678 This enables support for systems with more than one CPU. If you have
542 progress messages there during bootu !! 2679 a system with only one CPU, say N. If you have a system with more
543 during board bringup. !! 2680 than one CPU, say Y.
>> 2681
>> 2682 If you say N here, the kernel will run on uni- and multiprocessor
>> 2683 machines, but will use only one CPU of a multiprocessor machine. If
>> 2684 you say Y here, the kernel will run on many, but not all,
>> 2685 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2686 will run faster if you say N here.
544 2687
545 If unsure, say N. !! 2688 People using multiprocessor machines who say Y here should also say
>> 2689 Y to "Enhanced Real Time Clock Support", below.
546 2690
547 config XTFPGA_LCD_BASE_ADDR !! 2691 See also the SMP-HOWTO available at
548 hex "XTFPGA LCD base address" !! 2692 <http://www.tldp.org/docs.html#howto>.
549 depends on XTFPGA_LCD !! 2693
550 default "0x0d0c0000" !! 2694 If you don't know what to do here, say N.
551 help !! 2695
552 Base address of the LCD controller i !! 2696 config HOTPLUG_CPU
553 Different boards from XTFPGA family !! 2697 bool "Support for hot-pluggable CPUs"
554 addresses. Please consult prototypin !! 2698 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help 2699 help
562 LCD may be connected with 4- or 8-bi !! 2700 Say Y here to allow turning CPUs off and on. CPUs can be
563 only be used with 8-bit interface. P !! 2701 controlled through /sys/devices/system/cpu.
564 guide for your board for the correct !! 2702 (Note: power management support will enable this option
565 !! 2703 automatically on SMP systems. )
566 comment "Kernel memory layout" !! 2704 Say N if you want to disable CPU hotplug.
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2705
617 If unsure, say N. !! 2706 config SMP_UP
>> 2707 bool
>> 2708
>> 2709 config SYS_SUPPORTS_MIPS_CMP
>> 2710 bool
>> 2711
>> 2712 config SYS_SUPPORTS_MIPS_CPS
>> 2713 bool
618 2714
619 config MEMMAP_CACHEATTR !! 2715 config SYS_SUPPORTS_SMP
620 hex "Cache attributes for the memory a !! 2716 bool
621 depends on !MMU !! 2717
622 default 0x22222222 !! 2718 config NR_CPUS_DEFAULT_4
623 help !! 2719 bool
624 These cache attributes are set up fo !! 2720
625 specifies cache attributes for the c !! 2721 config NR_CPUS_DEFAULT_8
626 region: bits 0..3 -- for addresses 0 !! 2722 bool
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2723
683 If unsure, leave the default value h !! 2724 config NR_CPUS_DEFAULT_16
>> 2725 bool
>> 2726
>> 2727 config NR_CPUS_DEFAULT_32
>> 2728 bool
>> 2729
>> 2730 config NR_CPUS_DEFAULT_64
>> 2731 bool
>> 2732
>> 2733 config NR_CPUS
>> 2734 int "Maximum number of CPUs (2-256)"
>> 2735 range 2 256
>> 2736 depends on SMP
>> 2737 default "4" if NR_CPUS_DEFAULT_4
>> 2738 default "8" if NR_CPUS_DEFAULT_8
>> 2739 default "16" if NR_CPUS_DEFAULT_16
>> 2740 default "32" if NR_CPUS_DEFAULT_32
>> 2741 default "64" if NR_CPUS_DEFAULT_64
>> 2742 help
>> 2743 This allows you to specify the maximum number of CPUs which this
>> 2744 kernel will support. The maximum supported value is 32 for 32-bit
>> 2745 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2746 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2747 and 2 for all others.
>> 2748
>> 2749 This is purely to save memory - each supported CPU adds
>> 2750 approximately eight kilobytes to the kernel image. For best
>> 2751 performance should round up your number of processors to the next
>> 2752 power of two.
>> 2753
>> 2754 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2755 bool
>> 2756
>> 2757 config MIPS_NR_CPU_NR_MAP_1024
>> 2758 bool
>> 2759
>> 2760 config MIPS_NR_CPU_NR_MAP
>> 2761 int
>> 2762 depends on SMP
>> 2763 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2764 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2765
>> 2766 #
>> 2767 # Timer Interrupt Frequency Configuration
>> 2768 #
684 2769
685 choice 2770 choice
686 prompt "Relocatable vectors location" !! 2771 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2772 default HZ_250
688 help 2773 help
689 Choose whether relocatable vectors a !! 2774 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2775
691 configurations without VECBASE regis !! 2776 config HZ_24
692 placed at their hardware-defined loc !! 2777 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2778
694 config XTENSA_VECTORS_IN_TEXT !! 2779 config HZ_48
695 bool "Merge relocatable vectors into k !! 2780 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2781
697 help !! 2782 config HZ_100
698 This option puts relocatable vectors !! 2783 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2784
700 This is a safe choice for most confi !! 2785 config HZ_128
701 !! 2786 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2787
703 bool "Put relocatable vectors at fixed !! 2788 config HZ_250
704 help !! 2789 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2790
706 Vectors are merged with the .init da !! 2791 config HZ_256
707 are copied into their designated loc !! 2792 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2793
709 XIP-aware MTD support. !! 2794 config HZ_1000
>> 2795 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2796
>> 2797 config HZ_1024
>> 2798 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2799
711 endchoice 2800 endchoice
712 2801
713 config VECTORS_ADDR !! 2802 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2803 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2804
729 config PLATFORM_WANT_DEFAULT_MEM !! 2805 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2806 bool
>> 2807
>> 2808 config SYS_SUPPORTS_100HZ
>> 2809 bool
>> 2810
>> 2811 config SYS_SUPPORTS_128HZ
>> 2812 bool
>> 2813
>> 2814 config SYS_SUPPORTS_250HZ
>> 2815 bool
731 2816
732 config DEFAULT_MEM_START !! 2817 config SYS_SUPPORTS_256HZ
733 hex !! 2818 bool
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2819
735 default 0x60000000 if PLATFORM_WANT_DE !! 2820 config SYS_SUPPORTS_1000HZ
736 default 0x00000000 !! 2821 bool
>> 2822
>> 2823 config SYS_SUPPORTS_1024HZ
>> 2824 bool
>> 2825
>> 2826 config SYS_SUPPORTS_ARBIT_HZ
>> 2827 bool
>> 2828 default y if !SYS_SUPPORTS_24HZ && \
>> 2829 !SYS_SUPPORTS_48HZ && \
>> 2830 !SYS_SUPPORTS_100HZ && \
>> 2831 !SYS_SUPPORTS_128HZ && \
>> 2832 !SYS_SUPPORTS_250HZ && \
>> 2833 !SYS_SUPPORTS_256HZ && \
>> 2834 !SYS_SUPPORTS_1000HZ && \
>> 2835 !SYS_SUPPORTS_1024HZ
>> 2836
>> 2837 config HZ
>> 2838 int
>> 2839 default 24 if HZ_24
>> 2840 default 48 if HZ_48
>> 2841 default 100 if HZ_100
>> 2842 default 128 if HZ_128
>> 2843 default 250 if HZ_250
>> 2844 default 256 if HZ_256
>> 2845 default 1000 if HZ_1000
>> 2846 default 1024 if HZ_1024
>> 2847
>> 2848 config SCHED_HRTICK
>> 2849 def_bool HIGH_RES_TIMERS
>> 2850
>> 2851 config KEXEC
>> 2852 bool "Kexec system call"
>> 2853 select KEXEC_CORE
>> 2854 help
>> 2855 kexec is a system call that implements the ability to shutdown your
>> 2856 current kernel, and to start another kernel. It is like a reboot
>> 2857 but it is independent of the system firmware. And like a reboot
>> 2858 you can start any kernel with it, not just Linux.
>> 2859
>> 2860 The name comes from the similarity to the exec system call.
>> 2861
>> 2862 It is an ongoing process to be certain the hardware in a machine
>> 2863 is properly shutdown, so do not be surprised if this code does not
>> 2864 initially work for you. As of this writing the exact hardware
>> 2865 interface is strongly in flux, so no good recommendation can be
>> 2866 made.
>> 2867
>> 2868 config CRASH_DUMP
>> 2869 bool "Kernel crash dumps"
>> 2870 help
>> 2871 Generate crash dump after being started by kexec.
>> 2872 This should be normally only set in special crash dump kernels
>> 2873 which are loaded in the main kernel with kexec-tools into
>> 2874 a specially reserved region and then later executed after
>> 2875 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2876 to a memory address not used by the main kernel or firmware using
>> 2877 PHYSICAL_START.
>> 2878
>> 2879 config PHYSICAL_START
>> 2880 hex "Physical address where the kernel is loaded"
>> 2881 default "0xffffffff84000000"
>> 2882 depends on CRASH_DUMP
>> 2883 help
>> 2884 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2885 If you plan to use kernel for capturing the crash dump change
>> 2886 this value to start of the reserved region (the "X" value as
>> 2887 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2888 passed to the panic-ed kernel).
>> 2889
>> 2890 config SECCOMP
>> 2891 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2892 depends on PROC_FS
>> 2893 default y
737 help 2894 help
738 This is the base address used for bo !! 2895 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2896 that may need to compute untrusted bytecode during their
>> 2897 execution. By using pipes or other transports made available to
>> 2898 the process as file descriptors supporting the read/write
>> 2899 syscalls, it's possible to isolate those applications in
>> 2900 their own address space using seccomp. Once seccomp is
>> 2901 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2902 and the task is only allowed to execute a few safe syscalls
>> 2903 defined by each seccomp mode.
>> 2904
>> 2905 If unsure, say Y. Only embedded should say N here.
>> 2906
>> 2907 config MIPS_O32_FP64_SUPPORT
>> 2908 bool "Support for O32 binaries using 64-bit FP"
>> 2909 depends on 32BIT || MIPS32_O32
>> 2910 help
>> 2911 When this is enabled, the kernel will support use of 64-bit floating
>> 2912 point registers with binaries using the O32 ABI along with the
>> 2913 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2914 32-bit MIPS systems this support is at the cost of increasing the
>> 2915 size and complexity of the compiled FPU emulator. Thus if you are
>> 2916 running a MIPS32 system and know that none of your userland binaries
>> 2917 will require 64-bit floating point, you may wish to reduce the size
>> 2918 of your kernel & potentially improve FP emulation performance by
>> 2919 saying N here.
>> 2920
>> 2921 Although binutils currently supports use of this flag the details
>> 2922 concerning its effect upon the O32 ABI in userland are still being
>> 2923 worked on. In order to avoid userland becoming dependant upon current
>> 2924 behaviour before the details have been finalised, this option should
>> 2925 be considered experimental and only enabled by those working upon
>> 2926 said details.
740 2927
741 If unsure, leave the default value h !! 2928 If unsure, say N.
>> 2929
>> 2930 config USE_OF
>> 2931 bool
>> 2932 select OF
>> 2933 select OF_EARLY_FLATTREE
>> 2934 select IRQ_DOMAIN
>> 2935
>> 2936 config UHI_BOOT
>> 2937 bool
>> 2938
>> 2939 config BUILTIN_DTB
>> 2940 bool
742 2941
743 choice 2942 choice
744 prompt "KSEG layout" !! 2943 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2944 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2945
>> 2946 config MIPS_NO_APPENDED_DTB
>> 2947 bool "None"
>> 2948 help
>> 2949 Do not enable appended dtb support.
>> 2950
>> 2951 config MIPS_ELF_APPENDED_DTB
>> 2952 bool "vmlinux"
>> 2953 help
>> 2954 With this option, the boot code will look for a device tree binary
>> 2955 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2956 it is empty and the DTB can be appended using binutils command
>> 2957 objcopy:
>> 2958
>> 2959 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2960
>> 2961 This is meant as a backward compatiblity convenience for those
>> 2962 systems with a bootloader that can't be upgraded to accommodate
>> 2963 the documented boot protocol using a device tree.
>> 2964
>> 2965 config MIPS_RAW_APPENDED_DTB
>> 2966 bool "vmlinux.bin or vmlinuz.bin"
>> 2967 help
>> 2968 With this option, the boot code will look for a device tree binary
>> 2969 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2970 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2971
>> 2972 This is meant as a backward compatibility convenience for those
>> 2973 systems with a bootloader that can't be upgraded to accommodate
>> 2974 the documented boot protocol using a device tree.
>> 2975
>> 2976 Beware that there is very little in terms of protection against
>> 2977 this option being confused by leftover garbage in memory that might
>> 2978 look like a DTB header after a reboot if no actual DTB is appended
>> 2979 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2980 if you don't intend to always append a DTB.
772 endchoice 2981 endchoice
773 2982
774 config HIGHMEM !! 2983 choice
775 bool "High Memory Support" !! 2984 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2985 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2986 !MIPS_MALTA && \
>> 2987 !CAVIUM_OCTEON_SOC
>> 2988 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2989
>> 2990 config MIPS_CMDLINE_FROM_DTB
>> 2991 depends on USE_OF
>> 2992 bool "Dtb kernel arguments if available"
>> 2993
>> 2994 config MIPS_CMDLINE_DTB_EXTEND
>> 2995 depends on USE_OF
>> 2996 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2997
>> 2998 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2999 bool "Bootloader kernel arguments if available"
>> 3000
>> 3001 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3002 depends on CMDLINE_BOOL
>> 3003 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3004 endchoice
>> 3005
>> 3006 endmenu
>> 3007
>> 3008 config LOCKDEP_SUPPORT
>> 3009 bool
>> 3010 default y
>> 3011
>> 3012 config STACKTRACE_SUPPORT
>> 3013 bool
>> 3014 default y
>> 3015
>> 3016 config HAVE_LATENCYTOP_SUPPORT
>> 3017 bool
>> 3018 default y
>> 3019
>> 3020 config PGTABLE_LEVELS
>> 3021 int
>> 3022 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3023 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3024 default 2
>> 3025
>> 3026 config MIPS_AUTO_PFN_OFFSET
>> 3027 bool
>> 3028
>> 3029 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3030
>> 3031 config HW_HAS_EISA
>> 3032 bool
>> 3033 config HW_HAS_PCI
>> 3034 bool
>> 3035
>> 3036 config PCI
>> 3037 bool "Support for PCI controller"
>> 3038 depends on HW_HAS_PCI
>> 3039 select PCI_DOMAINS
>> 3040 help
>> 3041 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3042 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3043 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3044 say Y, otherwise N.
>> 3045
>> 3046 config HT_PCI
>> 3047 bool "Support for HT-linked PCI"
>> 3048 default y
>> 3049 depends on CPU_LOONGSON3
>> 3050 select PCI
>> 3051 select PCI_DOMAINS
>> 3052 help
>> 3053 Loongson family machines use Hyper-Transport bus for inter-core
>> 3054 connection and device connection. The PCI bus is a subordinate
>> 3055 linked at HT. Choose Y for Loongson-3 based machines.
>> 3056
>> 3057 config PCI_DOMAINS
>> 3058 bool
>> 3059
>> 3060 config PCI_DOMAINS_GENERIC
>> 3061 bool
>> 3062
>> 3063 config PCI_DRIVERS_GENERIC
>> 3064 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3065 bool
>> 3066
>> 3067 config PCI_DRIVERS_LEGACY
>> 3068 def_bool !PCI_DRIVERS_GENERIC
>> 3069 select NO_GENERIC_PCI_IOPORT_MAP
>> 3070
>> 3071 source "drivers/pci/Kconfig"
>> 3072
>> 3073 #
>> 3074 # ISA support is now enabled via select. Too many systems still have the one
>> 3075 # or other ISA chip on the board that users don't know about so don't expect
>> 3076 # users to choose the right thing ...
>> 3077 #
>> 3078 config ISA
>> 3079 bool
>> 3080
>> 3081 config EISA
>> 3082 bool "EISA support"
>> 3083 depends on HW_HAS_EISA
>> 3084 select ISA
>> 3085 select GENERIC_ISA_DMA
>> 3086 ---help---
>> 3087 The Extended Industry Standard Architecture (EISA) bus was
>> 3088 developed as an open alternative to the IBM MicroChannel bus.
>> 3089
>> 3090 The EISA bus provided some of the features of the IBM MicroChannel
>> 3091 bus while maintaining backward compatibility with cards made for
>> 3092 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3093 1995 when it was made obsolete by the PCI bus.
>> 3094
>> 3095 Say Y here if you are building a kernel for an EISA-based machine.
>> 3096
>> 3097 Otherwise, say N.
>> 3098
>> 3099 source "drivers/eisa/Kconfig"
>> 3100
>> 3101 config TC
>> 3102 bool "TURBOchannel support"
>> 3103 depends on MACH_DECSTATION
>> 3104 help
>> 3105 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3106 processors. TURBOchannel programming specifications are available
>> 3107 at:
>> 3108 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3109 and:
>> 3110 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3111 Linux driver support status is documented at:
>> 3112 <http://www.linux-mips.org/wiki/DECstation>
>> 3113
>> 3114 config MMU
>> 3115 bool
>> 3116 default y
>> 3117
>> 3118 config ARCH_MMAP_RND_BITS_MIN
>> 3119 default 12 if 64BIT
>> 3120 default 8
>> 3121
>> 3122 config ARCH_MMAP_RND_BITS_MAX
>> 3123 default 18 if 64BIT
>> 3124 default 15
>> 3125
>> 3126 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3127 default 8
>> 3128
>> 3129 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3130 default 15
>> 3131
>> 3132 config I8253
>> 3133 bool
>> 3134 select CLKSRC_I8253
>> 3135 select CLKEVT_I8253
>> 3136 select MIPS_EXTERNAL_TIMER
>> 3137
>> 3138 config ZONE_DMA
>> 3139 bool
>> 3140
>> 3141 config ZONE_DMA32
>> 3142 bool
>> 3143
>> 3144 source "drivers/pcmcia/Kconfig"
>> 3145
>> 3146 config HAS_RAPIDIO
>> 3147 bool
>> 3148 default n
>> 3149
>> 3150 config RAPIDIO
>> 3151 tristate "RapidIO support"
>> 3152 depends on HAS_RAPIDIO || PCI
778 help 3153 help
779 Linux can use the full amount of RAM !! 3154 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3155 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3156
782 at 0xd0000000 (cached) and 0xd800000 !! 3157 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3158
784 all of it can be "permanently mapped !! 3159 endmenu
785 The physical memory that's not perma !! 3160
786 "high memory". !! 3161 config TRAD_SIGNALS
787 !! 3162 bool
788 If you are compiling a kernel which !! 3163
789 machine with more than 128 MB total !! 3164 config MIPS32_COMPAT
790 N here. !! 3165 bool
>> 3166
>> 3167 config COMPAT
>> 3168 bool
>> 3169
>> 3170 config SYSVIPC_COMPAT
>> 3171 bool
>> 3172
>> 3173 config MIPS32_O32
>> 3174 bool "Kernel support for o32 binaries"
>> 3175 depends on 64BIT
>> 3176 select ARCH_WANT_OLD_COMPAT_IPC
>> 3177 select COMPAT
>> 3178 select MIPS32_COMPAT
>> 3179 select SYSVIPC_COMPAT if SYSVIPC
>> 3180 help
>> 3181 Select this option if you want to run o32 binaries. These are pure
>> 3182 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3183 existing binaries are in this format.
791 3184
792 If unsure, say Y. 3185 If unsure, say Y.
793 3186
794 config ARCH_FORCE_MAX_ORDER !! 3187 config MIPS32_N32
795 int "Order of maximal physically conti !! 3188 bool "Kernel support for n32 binaries"
796 default "10" !! 3189 depends on 64BIT
797 help !! 3190 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
798 The kernel page allocator limits the !! 3191 select COMPAT
799 contiguous allocations. The limit is !! 3192 select MIPS32_COMPAT
800 defines the maximal power of two of !! 3193 select SYSVIPC_COMPAT if SYSVIPC
801 allocated as a single contiguous blo !! 3194 help
802 overriding the default setting when !! 3195 Select this option if you want to run n32 binaries. These are
803 large blocks of physically contiguou !! 3196 64-bit binaries using 32-bit quantities for addressing and certain
>> 3197 data that would normally be 64-bit. They are used in special
>> 3198 cases.
804 3199
805 Don't change if unsure. !! 3200 If unsure, say N.
806 3201
807 endmenu !! 3202 config BINFMT_ELF32
>> 3203 bool
>> 3204 default y if MIPS32_O32 || MIPS32_N32
>> 3205 select ELFCORE
808 3206
809 menu "Power management options" 3207 menu "Power management options"
810 3208
811 config ARCH_HIBERNATION_POSSIBLE 3209 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3210 def_bool y
>> 3211 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3212
>> 3213 config ARCH_SUSPEND_POSSIBLE
>> 3214 def_bool y
>> 3215 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3216
814 source "kernel/power/Kconfig" 3217 source "kernel/power/Kconfig"
815 3218
816 endmenu 3219 endmenu
>> 3220
>> 3221 config MIPS_EXTERNAL_TIMER
>> 3222 bool
>> 3223
>> 3224 menu "CPU Power Management"
>> 3225
>> 3226 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3227 source "drivers/cpufreq/Kconfig"
>> 3228 endif
>> 3229
>> 3230 source "drivers/cpuidle/Kconfig"
>> 3231
>> 3232 endmenu
>> 3233
>> 3234 source "drivers/firmware/Kconfig"
>> 3235
>> 3236 source "arch/mips/kvm/Kconfig"
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