1 # SPDX-License-Identifier: GPL-2.0 !! 1 config MIPS
2 config XTENSA !! 2 bool
3 def_bool y !! 3 default y
4 select ARCH_32BIT_OFF_T !! 4 select ARCH_SUPPORTS_UPROBES
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_MIGHT_HAVE_PC_PARPORT
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_MIGHT_HAVE_PC_SERIO
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_USE_BUILTIN_BSWAP
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select HAVE_CONTEXT_TRACKING
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select HAVE_GENERIC_DMA_COHERENT
11 select ARCH_HAS_KCOV !! 11 select HAVE_IDE
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select HAVE_IRQ_EXIT_ON_IRQ_STACK
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 select HAVE_OPROFILE
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 14 select HAVE_PERF_EVENTS
15 select ARCH_HAS_STRNCPY_FROM_USER if ! !! 15 select PERF_USE_VMALLOC
16 select ARCH_HAS_STRNLEN_USER !! 16 select HAVE_ARCH_COMPILER_H
17 select ARCH_NEED_CMPXCHG_1_EMU !! 17 select HAVE_ARCH_KGDB
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS <<
20 select ARCH_USE_QUEUED_SPINLOCKS <<
21 select ARCH_WANT_IPC_PARSE_VERSION <<
22 select BUILDTIME_TABLE_SORT <<
23 select CLONE_BACKWARDS <<
24 select COMMON_CLK <<
25 select DMA_NONCOHERENT_MMAP if MMU <<
26 select GENERIC_ATOMIC64 <<
27 select GENERIC_IRQ_SHOW <<
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP <<
32 select GENERIC_SCHED_CLOCK <<
33 select GENERIC_IOREMAP if MMU <<
34 select HAVE_ARCH_AUDITSYSCALL <<
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
36 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
37 select HAVE_ARCH_KCSAN <<
38 select HAVE_ARCH_SECCOMP_FILTER 18 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 19 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 20 select HAVE_CBPF_JIT if !CPU_MICROMIPS
41 select HAVE_CONTEXT_TRACKING_USER <<
42 select HAVE_DEBUG_KMEMLEAK <<
43 select HAVE_DMA_CONTIGUOUS <<
44 select HAVE_EXIT_THREAD <<
45 select HAVE_FUNCTION_TRACER 21 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 22 select HAVE_DYNAMIC_FTRACE
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 23 select HAVE_FTRACE_MCOUNT_RECORD
48 select HAVE_IRQ_TIME_ACCOUNTING !! 24 select HAVE_C_RECORDMCOUNT
49 select HAVE_PAGE_SIZE_4KB !! 25 select HAVE_FUNCTION_GRAPH_TRACER
50 select HAVE_PCI !! 26 select HAVE_KPROBES
51 select HAVE_PERF_EVENTS !! 27 select HAVE_KRETPROBES
52 select HAVE_STACKPROTECTOR !! 28 select HAVE_SYSCALL_TRACEPOINTS
>> 29 select HAVE_DEBUG_KMEMLEAK
53 select HAVE_SYSCALL_TRACEPOINTS 30 select HAVE_SYSCALL_TRACEPOINTS
>> 31 select ARCH_HAS_ELF_RANDOMIZE
>> 32 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
>> 33 select RTC_LIB if !MACH_LOONGSON64
>> 34 select GENERIC_ATOMIC64 if !64BIT
>> 35 select HAVE_DMA_CONTIGUOUS
>> 36 select HAVE_DMA_API_DEBUG
>> 37 select GENERIC_IRQ_PROBE
>> 38 select GENERIC_IRQ_SHOW
>> 39 select GENERIC_PCI_IOMAP
>> 40 select HAVE_ARCH_JUMP_LABEL
>> 41 select ARCH_WANT_IPC_PARSE_VERSION
>> 42 select IRQ_FORCED_THREADING
>> 43 select HAVE_MEMBLOCK
>> 44 select HAVE_MEMBLOCK_NODE_MAP
>> 45 select ARCH_DISCARD_MEMBLOCK
>> 46 select GENERIC_SMP_IDLE_THREAD
>> 47 select BUILDTIME_EXTABLE_SORT
>> 48 select GENERIC_CLOCKEVENTS
>> 49 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
>> 50 select GENERIC_CMOS_UPDATE
>> 51 select HAVE_MOD_ARCH_SPECIFIC
>> 52 select HAVE_NMI
>> 53 select VIRT_TO_BUS
>> 54 select MODULES_USE_ELF_REL if MODULES
>> 55 select MODULES_USE_ELF_RELA if MODULES && 64BIT
>> 56 select CLONE_BACKWARDS
>> 57 select HAVE_DEBUG_STACKOVERFLOW
>> 58 select HAVE_CC_STACKPROTECTOR
>> 59 select CPU_PM if CPU_IDLE
>> 60 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
>> 61 select ARCH_BINFMT_ELF_STATE
>> 62 select SYSCTL_EXCEPTION_TRACE
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN 63 select HAVE_VIRT_CPU_ACCOUNTING_GEN
>> 64 select HAVE_IRQ_TIME_ACCOUNTING
>> 65 select GENERIC_TIME_VSYSCALL
>> 66 select ARCH_CLOCKSOURCE_DATA
>> 67 select HANDLE_DOMAIN_IRQ
>> 68 select HAVE_EXIT_THREAD
>> 69 select HAVE_REGS_AND_STACK_ACCESS_API
>> 70 select HAVE_ARCH_HARDENED_USERCOPY
>> 71
>> 72 menu "Machine selection"
>> 73
>> 74 choice
>> 75 prompt "System type"
>> 76 default SGI_IP22
>> 77
>> 78 config MIPS_GENERIC
>> 79 bool "Generic board-agnostic MIPS kernel"
>> 80 select BOOT_RAW
>> 81 select BUILTIN_DTB
>> 82 select CEVT_R4K
>> 83 select CLKSRC_MIPS_GIC
>> 84 select COMMON_CLK
>> 85 select CPU_MIPSR2_IRQ_VI
>> 86 select CPU_MIPSR2_IRQ_EI
>> 87 select CSRC_R4K
>> 88 select DMA_PERDEV_COHERENT
>> 89 select HW_HAS_PCI
>> 90 select IRQ_MIPS_CPU
>> 91 select LIBFDT
>> 92 select MIPS_CPU_SCACHE
>> 93 select MIPS_GIC
>> 94 select MIPS_L1_CACHE_SHIFT_7
>> 95 select NO_EXCEPT_FILL
>> 96 select PCI_DRIVERS_GENERIC
>> 97 select PINCTRL
>> 98 select SMP_UP if SMP
>> 99 select SWAP_IO_SPACE
>> 100 select SYS_HAS_CPU_MIPS32_R1
>> 101 select SYS_HAS_CPU_MIPS32_R2
>> 102 select SYS_HAS_CPU_MIPS32_R6
>> 103 select SYS_HAS_CPU_MIPS64_R1
>> 104 select SYS_HAS_CPU_MIPS64_R2
>> 105 select SYS_HAS_CPU_MIPS64_R6
>> 106 select SYS_SUPPORTS_32BIT_KERNEL
>> 107 select SYS_SUPPORTS_64BIT_KERNEL
>> 108 select SYS_SUPPORTS_BIG_ENDIAN
>> 109 select SYS_SUPPORTS_HIGHMEM
>> 110 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 111 select SYS_SUPPORTS_MICROMIPS
>> 112 select SYS_SUPPORTS_MIPS_CPS
>> 113 select SYS_SUPPORTS_MIPS16
>> 114 select SYS_SUPPORTS_MULTITHREADING
>> 115 select SYS_SUPPORTS_RELOCATABLE
>> 116 select SYS_SUPPORTS_SMARTMIPS
>> 117 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 118 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 119 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 120 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 121 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 122 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 123 select USE_OF
>> 124 help
>> 125 Select this to build a kernel which aims to support multiple boards,
>> 126 generally using a flattened device tree passed from the bootloader
>> 127 using the boot protocol defined in the UHI (Unified Hosting
>> 128 Interface) specification.
>> 129
>> 130 config MIPS_ALCHEMY
>> 131 bool "Alchemy processor based machines"
>> 132 select ARCH_PHYS_ADDR_T_64BIT
>> 133 select CEVT_R4K
>> 134 select CSRC_R4K
>> 135 select IRQ_MIPS_CPU
>> 136 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 137 select SYS_HAS_CPU_MIPS32_R1
>> 138 select SYS_SUPPORTS_32BIT_KERNEL
>> 139 select SYS_SUPPORTS_APM_EMULATION
>> 140 select GPIOLIB
>> 141 select SYS_SUPPORTS_ZBOOT
>> 142 select COMMON_CLK
>> 143
>> 144 config AR7
>> 145 bool "Texas Instruments AR7"
>> 146 select BOOT_ELF32
>> 147 select DMA_NONCOHERENT
>> 148 select CEVT_R4K
>> 149 select CSRC_R4K
>> 150 select IRQ_MIPS_CPU
>> 151 select NO_EXCEPT_FILL
>> 152 select SWAP_IO_SPACE
>> 153 select SYS_HAS_CPU_MIPS32_R1
>> 154 select SYS_HAS_EARLY_PRINTK
>> 155 select SYS_SUPPORTS_32BIT_KERNEL
>> 156 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 157 select SYS_SUPPORTS_MIPS16
>> 158 select SYS_SUPPORTS_ZBOOT_UART16550
>> 159 select GPIOLIB
>> 160 select VLYNQ
>> 161 select HAVE_CLK
>> 162 help
>> 163 Support for the Texas Instruments AR7 System-on-a-Chip
>> 164 family: TNETD7100, 7200 and 7300.
>> 165
>> 166 config ATH25
>> 167 bool "Atheros AR231x/AR531x SoC support"
>> 168 select CEVT_R4K
>> 169 select CSRC_R4K
>> 170 select DMA_NONCOHERENT
>> 171 select IRQ_MIPS_CPU
55 select IRQ_DOMAIN 172 select IRQ_DOMAIN
56 select LOCK_MM_AND_FIND_VMA !! 173 select SYS_HAS_CPU_MIPS32_R1
57 select MODULES_USE_ELF_RELA !! 174 select SYS_SUPPORTS_BIG_ENDIAN
58 select PERF_USE_VMALLOC !! 175 select SYS_SUPPORTS_32BIT_KERNEL
59 select TRACE_IRQFLAGS_SUPPORT !! 176 select SYS_HAS_EARLY_PRINTK
>> 177 help
>> 178 Support for Atheros AR231x and Atheros AR531x based boards
>> 179
>> 180 config ATH79
>> 181 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 182 select ARCH_HAS_RESET_CONTROLLER
>> 183 select BOOT_RAW
>> 184 select CEVT_R4K
>> 185 select CSRC_R4K
>> 186 select DMA_NONCOHERENT
>> 187 select GPIOLIB
>> 188 select HAVE_CLK
>> 189 select COMMON_CLK
>> 190 select CLKDEV_LOOKUP
>> 191 select IRQ_MIPS_CPU
>> 192 select MIPS_MACHINE
>> 193 select SYS_HAS_CPU_MIPS32_R2
>> 194 select SYS_HAS_EARLY_PRINTK
>> 195 select SYS_SUPPORTS_32BIT_KERNEL
>> 196 select SYS_SUPPORTS_BIG_ENDIAN
>> 197 select SYS_SUPPORTS_MIPS16
>> 198 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 199 select USE_OF
>> 200 help
>> 201 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 202
>> 203 config BMIPS_GENERIC
>> 204 bool "Broadcom Generic BMIPS kernel"
>> 205 select BOOT_RAW
>> 206 select NO_EXCEPT_FILL
>> 207 select USE_OF
>> 208 select CEVT_R4K
>> 209 select CSRC_R4K
>> 210 select SYNC_R4K
>> 211 select COMMON_CLK
>> 212 select BCM6345_L1_IRQ
>> 213 select BCM7038_L1_IRQ
>> 214 select BCM7120_L2_IRQ
>> 215 select BRCMSTB_L2_IRQ
>> 216 select IRQ_MIPS_CPU
>> 217 select DMA_NONCOHERENT
>> 218 select SYS_SUPPORTS_32BIT_KERNEL
>> 219 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 220 select SYS_SUPPORTS_BIG_ENDIAN
>> 221 select SYS_SUPPORTS_HIGHMEM
>> 222 select SYS_HAS_CPU_BMIPS32_3300
>> 223 select SYS_HAS_CPU_BMIPS4350
>> 224 select SYS_HAS_CPU_BMIPS4380
>> 225 select SYS_HAS_CPU_BMIPS5000
>> 226 select SWAP_IO_SPACE
>> 227 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 228 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 229 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 230 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 231 help
>> 232 Build a generic DT-based kernel image that boots on select
>> 233 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 234 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 235 must be set appropriately for your board.
>> 236
>> 237 config BCM47XX
>> 238 bool "Broadcom BCM47XX based boards"
>> 239 select BOOT_RAW
>> 240 select CEVT_R4K
>> 241 select CSRC_R4K
>> 242 select DMA_NONCOHERENT
>> 243 select HW_HAS_PCI
>> 244 select IRQ_MIPS_CPU
>> 245 select SYS_HAS_CPU_MIPS32_R1
>> 246 select NO_EXCEPT_FILL
>> 247 select SYS_SUPPORTS_32BIT_KERNEL
>> 248 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 249 select SYS_SUPPORTS_MIPS16
>> 250 select SYS_HAS_EARLY_PRINTK
>> 251 select USE_GENERIC_EARLY_PRINTK_8250
>> 252 select GPIOLIB
>> 253 select LEDS_GPIO_REGISTER
>> 254 select BCM47XX_NVRAM
>> 255 select BCM47XX_SPROM
>> 256 help
>> 257 Support for BCM47XX based boards
>> 258
>> 259 config BCM63XX
>> 260 bool "Broadcom BCM63XX based boards"
>> 261 select BOOT_RAW
>> 262 select CEVT_R4K
>> 263 select CSRC_R4K
>> 264 select SYNC_R4K
>> 265 select DMA_NONCOHERENT
>> 266 select IRQ_MIPS_CPU
>> 267 select SYS_SUPPORTS_32BIT_KERNEL
>> 268 select SYS_SUPPORTS_BIG_ENDIAN
>> 269 select SYS_HAS_EARLY_PRINTK
>> 270 select SYS_HAS_CPU_BMIPS32_3300
>> 271 select SYS_HAS_CPU_BMIPS4350
>> 272 select SYS_HAS_CPU_BMIPS4380
>> 273 select SWAP_IO_SPACE
>> 274 select GPIOLIB
>> 275 select HAVE_CLK
>> 276 select MIPS_L1_CACHE_SHIFT_4
>> 277 help
>> 278 Support for BCM63XX based boards
>> 279
>> 280 config MIPS_COBALT
>> 281 bool "Cobalt Server"
>> 282 select CEVT_R4K
>> 283 select CSRC_R4K
>> 284 select CEVT_GT641XX
>> 285 select DMA_NONCOHERENT
>> 286 select HW_HAS_PCI
>> 287 select I8253
>> 288 select I8259
>> 289 select IRQ_MIPS_CPU
>> 290 select IRQ_GT641XX
>> 291 select PCI_GT64XXX_PCI0
>> 292 select PCI
>> 293 select SYS_HAS_CPU_NEVADA
>> 294 select SYS_HAS_EARLY_PRINTK
>> 295 select SYS_SUPPORTS_32BIT_KERNEL
>> 296 select SYS_SUPPORTS_64BIT_KERNEL
>> 297 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 298 select USE_GENERIC_EARLY_PRINTK_8250
>> 299
>> 300 config MACH_DECSTATION
>> 301 bool "DECstations"
>> 302 select BOOT_ELF32
>> 303 select CEVT_DS1287
>> 304 select CEVT_R4K if CPU_R4X00
>> 305 select CSRC_IOASIC
>> 306 select CSRC_R4K if CPU_R4X00
>> 307 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 308 select CPU_R4000_WORKAROUNDS if 64BIT
>> 309 select CPU_R4400_WORKAROUNDS if 64BIT
>> 310 select DMA_NONCOHERENT
>> 311 select NO_IOPORT_MAP
>> 312 select IRQ_MIPS_CPU
>> 313 select SYS_HAS_CPU_R3000
>> 314 select SYS_HAS_CPU_R4X00
>> 315 select SYS_SUPPORTS_32BIT_KERNEL
>> 316 select SYS_SUPPORTS_64BIT_KERNEL
>> 317 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 318 select SYS_SUPPORTS_128HZ
>> 319 select SYS_SUPPORTS_256HZ
>> 320 select SYS_SUPPORTS_1024HZ
>> 321 select MIPS_L1_CACHE_SHIFT_4
>> 322 help
>> 323 This enables support for DEC's MIPS based workstations. For details
>> 324 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 325 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 326
>> 327 If you have one of the following DECstation Models you definitely
>> 328 want to choose R4xx0 for the CPU Type:
>> 329
>> 330 DECstation 5000/50
>> 331 DECstation 5000/150
>> 332 DECstation 5000/260
>> 333 DECsystem 5900/260
>> 334
>> 335 otherwise choose R3000.
>> 336
>> 337 config MACH_JAZZ
>> 338 bool "Jazz family of machines"
>> 339 select FW_ARC
>> 340 select FW_ARC32
>> 341 select ARCH_MAY_HAVE_PC_FDC
>> 342 select CEVT_R4K
>> 343 select CSRC_R4K
>> 344 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 345 select GENERIC_ISA_DMA
>> 346 select HAVE_PCSPKR_PLATFORM
>> 347 select IRQ_MIPS_CPU
>> 348 select I8253
>> 349 select I8259
>> 350 select ISA
>> 351 select SYS_HAS_CPU_R4X00
>> 352 select SYS_SUPPORTS_32BIT_KERNEL
>> 353 select SYS_SUPPORTS_64BIT_KERNEL
>> 354 select SYS_SUPPORTS_100HZ
>> 355 help
>> 356 This a family of machines based on the MIPS R4030 chipset which was
>> 357 used by several vendors to build RISC/os and Windows NT workstations.
>> 358 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 359 Olivetti M700-10 workstations.
>> 360
>> 361 config MACH_INGENIC
>> 362 bool "Ingenic SoC based machines"
>> 363 select SYS_SUPPORTS_32BIT_KERNEL
>> 364 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 365 select SYS_SUPPORTS_ZBOOT_UART16550
>> 366 select DMA_NONCOHERENT
>> 367 select IRQ_MIPS_CPU
>> 368 select GPIOLIB
>> 369 select COMMON_CLK
>> 370 select GENERIC_IRQ_CHIP
>> 371 select BUILTIN_DTB
>> 372 select USE_OF
>> 373 select LIBFDT
>> 374
>> 375 config LANTIQ
>> 376 bool "Lantiq based platforms"
>> 377 select DMA_NONCOHERENT
>> 378 select IRQ_MIPS_CPU
>> 379 select CEVT_R4K
>> 380 select CSRC_R4K
>> 381 select SYS_HAS_CPU_MIPS32_R1
>> 382 select SYS_HAS_CPU_MIPS32_R2
>> 383 select SYS_SUPPORTS_BIG_ENDIAN
>> 384 select SYS_SUPPORTS_32BIT_KERNEL
>> 385 select SYS_SUPPORTS_MIPS16
>> 386 select SYS_SUPPORTS_MULTITHREADING
>> 387 select SYS_HAS_EARLY_PRINTK
>> 388 select GPIOLIB
>> 389 select SWAP_IO_SPACE
>> 390 select BOOT_RAW
>> 391 select CLKDEV_LOOKUP
>> 392 select USE_OF
>> 393 select PINCTRL
>> 394 select PINCTRL_LANTIQ
>> 395 select ARCH_HAS_RESET_CONTROLLER
>> 396 select RESET_CONTROLLER
>> 397
>> 398 config LASAT
>> 399 bool "LASAT Networks platforms"
>> 400 select CEVT_R4K
>> 401 select CRC32
>> 402 select CSRC_R4K
>> 403 select DMA_NONCOHERENT
>> 404 select SYS_HAS_EARLY_PRINTK
>> 405 select HW_HAS_PCI
>> 406 select IRQ_MIPS_CPU
>> 407 select PCI_GT64XXX_PCI0
>> 408 select MIPS_NILE4
>> 409 select R5000_CPU_SCACHE
>> 410 select SYS_HAS_CPU_R5000
>> 411 select SYS_SUPPORTS_32BIT_KERNEL
>> 412 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 413 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 414
>> 415 config MACH_LOONGSON32
>> 416 bool "Loongson-1 family of machines"
>> 417 select SYS_SUPPORTS_ZBOOT
>> 418 help
>> 419 This enables support for the Loongson-1 family of machines.
>> 420
>> 421 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 422 the Institute of Computing Technology (ICT), Chinese Academy of
>> 423 Sciences (CAS).
>> 424
>> 425 config MACH_LOONGSON64
>> 426 bool "Loongson-2/3 family of machines"
>> 427 select SYS_SUPPORTS_ZBOOT
>> 428 help
>> 429 This enables the support of Loongson-2/3 family of machines.
>> 430
>> 431 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 432 family of multi-core CPUs. They are both 64-bit general-purpose
>> 433 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 434 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 435 in the People's Republic of China. The chief architect is Professor
>> 436 Weiwu Hu.
>> 437
>> 438 config MACH_PISTACHIO
>> 439 bool "IMG Pistachio SoC based boards"
>> 440 select BOOT_ELF32
>> 441 select BOOT_RAW
>> 442 select CEVT_R4K
>> 443 select CLKSRC_MIPS_GIC
>> 444 select COMMON_CLK
>> 445 select CSRC_R4K
>> 446 select DMA_NONCOHERENT
>> 447 select GPIOLIB
>> 448 select IRQ_MIPS_CPU
>> 449 select LIBFDT
>> 450 select MFD_SYSCON
>> 451 select MIPS_CPU_SCACHE
>> 452 select MIPS_GIC
>> 453 select PINCTRL
>> 454 select REGULATOR
>> 455 select SYS_HAS_CPU_MIPS32_R2
>> 456 select SYS_SUPPORTS_32BIT_KERNEL
>> 457 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 458 select SYS_SUPPORTS_MIPS_CPS
>> 459 select SYS_SUPPORTS_MULTITHREADING
>> 460 select SYS_SUPPORTS_RELOCATABLE
>> 461 select SYS_SUPPORTS_ZBOOT
>> 462 select SYS_HAS_EARLY_PRINTK
>> 463 select USE_GENERIC_EARLY_PRINTK_8250
>> 464 select USE_OF
>> 465 help
>> 466 This enables support for the IMG Pistachio SoC platform.
>> 467
>> 468 config MACH_XILFPGA
>> 469 bool "MIPSfpga Xilinx based boards"
>> 470 select BOOT_ELF32
>> 471 select BOOT_RAW
>> 472 select BUILTIN_DTB
>> 473 select CEVT_R4K
>> 474 select COMMON_CLK
>> 475 select CSRC_R4K
>> 476 select GPIOLIB
>> 477 select IRQ_MIPS_CPU
>> 478 select LIBFDT
>> 479 select MIPS_CPU_SCACHE
>> 480 select SYS_HAS_EARLY_PRINTK
>> 481 select SYS_HAS_CPU_MIPS32_R2
>> 482 select SYS_SUPPORTS_32BIT_KERNEL
>> 483 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 484 select SYS_SUPPORTS_ZBOOT_UART16550
>> 485 select USE_OF
>> 486 select USE_GENERIC_EARLY_PRINTK_8250
>> 487 help
>> 488 This enables support for the IMG University Program MIPSfpga platform.
>> 489
>> 490 config MIPS_MALTA
>> 491 bool "MIPS Malta board"
>> 492 select ARCH_MAY_HAVE_PC_FDC
>> 493 select BOOT_ELF32
>> 494 select BOOT_RAW
>> 495 select BUILTIN_DTB
>> 496 select CEVT_R4K
>> 497 select CSRC_R4K
>> 498 select CLKSRC_MIPS_GIC
>> 499 select COMMON_CLK
>> 500 select DMA_MAYBE_COHERENT
>> 501 select GENERIC_ISA_DMA
>> 502 select HAVE_PCSPKR_PLATFORM
>> 503 select IRQ_MIPS_CPU
>> 504 select MIPS_GIC
>> 505 select HW_HAS_PCI
>> 506 select I8253
>> 507 select I8259
>> 508 select MIPS_BONITO64
>> 509 select MIPS_CPU_SCACHE
>> 510 select MIPS_L1_CACHE_SHIFT_6
>> 511 select PCI_GT64XXX_PCI0
>> 512 select MIPS_MSC
>> 513 select SMP_UP if SMP
>> 514 select SWAP_IO_SPACE
>> 515 select SYS_HAS_CPU_MIPS32_R1
>> 516 select SYS_HAS_CPU_MIPS32_R2
>> 517 select SYS_HAS_CPU_MIPS32_R3_5
>> 518 select SYS_HAS_CPU_MIPS32_R5
>> 519 select SYS_HAS_CPU_MIPS32_R6
>> 520 select SYS_HAS_CPU_MIPS64_R1
>> 521 select SYS_HAS_CPU_MIPS64_R2
>> 522 select SYS_HAS_CPU_MIPS64_R6
>> 523 select SYS_HAS_CPU_NEVADA
>> 524 select SYS_HAS_CPU_RM7000
>> 525 select SYS_SUPPORTS_32BIT_KERNEL
>> 526 select SYS_SUPPORTS_64BIT_KERNEL
>> 527 select SYS_SUPPORTS_BIG_ENDIAN
>> 528 select SYS_SUPPORTS_HIGHMEM
>> 529 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 530 select SYS_SUPPORTS_MICROMIPS
>> 531 select SYS_SUPPORTS_MIPS_CMP
>> 532 select SYS_SUPPORTS_MIPS_CPS
>> 533 select SYS_SUPPORTS_MIPS16
>> 534 select SYS_SUPPORTS_MULTITHREADING
>> 535 select SYS_SUPPORTS_SMARTMIPS
>> 536 select SYS_SUPPORTS_ZBOOT
>> 537 select SYS_SUPPORTS_RELOCATABLE
>> 538 select USE_OF
>> 539 select LIBFDT
>> 540 select ZONE_DMA32 if 64BIT
>> 541 select BUILTIN_DTB
>> 542 select LIBFDT
>> 543 help
>> 544 This enables support for the MIPS Technologies Malta evaluation
>> 545 board.
>> 546
>> 547 config MACH_PIC32
>> 548 bool "Microchip PIC32 Family"
>> 549 help
>> 550 This enables support for the Microchip PIC32 family of platforms.
>> 551
>> 552 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 553 microcontrollers.
>> 554
>> 555 config NEC_MARKEINS
>> 556 bool "NEC EMMA2RH Mark-eins board"
>> 557 select SOC_EMMA2RH
>> 558 select HW_HAS_PCI
>> 559 help
>> 560 This enables support for the NEC Electronics Mark-eins boards.
>> 561
>> 562 config MACH_VR41XX
>> 563 bool "NEC VR4100 series based machines"
>> 564 select CEVT_R4K
>> 565 select CSRC_R4K
>> 566 select SYS_HAS_CPU_VR41XX
>> 567 select SYS_SUPPORTS_MIPS16
>> 568 select GPIOLIB
>> 569
>> 570 config NXP_STB220
>> 571 bool "NXP STB220 board"
>> 572 select SOC_PNX833X
>> 573 help
>> 574 Support for NXP Semiconductors STB220 Development Board.
>> 575
>> 576 config NXP_STB225
>> 577 bool "NXP 225 board"
>> 578 select SOC_PNX833X
>> 579 select SOC_PNX8335
>> 580 help
>> 581 Support for NXP Semiconductors STB225 Development Board.
>> 582
>> 583 config PMC_MSP
>> 584 bool "PMC-Sierra MSP chipsets"
>> 585 select CEVT_R4K
>> 586 select CSRC_R4K
>> 587 select DMA_NONCOHERENT
>> 588 select SWAP_IO_SPACE
>> 589 select NO_EXCEPT_FILL
>> 590 select BOOT_RAW
>> 591 select SYS_HAS_CPU_MIPS32_R1
>> 592 select SYS_HAS_CPU_MIPS32_R2
>> 593 select SYS_SUPPORTS_32BIT_KERNEL
>> 594 select SYS_SUPPORTS_BIG_ENDIAN
>> 595 select SYS_SUPPORTS_MIPS16
>> 596 select IRQ_MIPS_CPU
>> 597 select SERIAL_8250
>> 598 select SERIAL_8250_CONSOLE
>> 599 select USB_EHCI_BIG_ENDIAN_MMIO
>> 600 select USB_EHCI_BIG_ENDIAN_DESC
>> 601 help
>> 602 This adds support for the PMC-Sierra family of Multi-Service
>> 603 Processor System-On-A-Chips. These parts include a number
>> 604 of integrated peripherals, interfaces and DSPs in addition to
>> 605 a variety of MIPS cores.
>> 606
>> 607 config RALINK
>> 608 bool "Ralink based machines"
>> 609 select CEVT_R4K
>> 610 select CSRC_R4K
>> 611 select BOOT_RAW
>> 612 select DMA_NONCOHERENT
>> 613 select IRQ_MIPS_CPU
>> 614 select USE_OF
>> 615 select SYS_HAS_CPU_MIPS32_R1
>> 616 select SYS_HAS_CPU_MIPS32_R2
>> 617 select SYS_SUPPORTS_32BIT_KERNEL
>> 618 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 619 select SYS_SUPPORTS_MIPS16
>> 620 select SYS_HAS_EARLY_PRINTK
>> 621 select CLKDEV_LOOKUP
>> 622 select ARCH_HAS_RESET_CONTROLLER
>> 623 select RESET_CONTROLLER
>> 624
>> 625 config SGI_IP22
>> 626 bool "SGI IP22 (Indy/Indigo2)"
>> 627 select FW_ARC
>> 628 select FW_ARC32
>> 629 select BOOT_ELF32
>> 630 select CEVT_R4K
>> 631 select CSRC_R4K
>> 632 select DEFAULT_SGI_PARTITION
>> 633 select DMA_NONCOHERENT
>> 634 select HW_HAS_EISA
>> 635 select I8253
>> 636 select I8259
>> 637 select IP22_CPU_SCACHE
>> 638 select IRQ_MIPS_CPU
>> 639 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 640 select SGI_HAS_I8042
>> 641 select SGI_HAS_INDYDOG
>> 642 select SGI_HAS_HAL2
>> 643 select SGI_HAS_SEEQ
>> 644 select SGI_HAS_WD93
>> 645 select SGI_HAS_ZILOG
>> 646 select SWAP_IO_SPACE
>> 647 select SYS_HAS_CPU_R4X00
>> 648 select SYS_HAS_CPU_R5000
>> 649 #
>> 650 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 651 # memory during early boot on some machines.
>> 652 #
>> 653 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 654 # for a more details discussion
>> 655 #
>> 656 # select SYS_HAS_EARLY_PRINTK
>> 657 select SYS_SUPPORTS_32BIT_KERNEL
>> 658 select SYS_SUPPORTS_64BIT_KERNEL
>> 659 select SYS_SUPPORTS_BIG_ENDIAN
>> 660 select MIPS_L1_CACHE_SHIFT_7
>> 661 help
>> 662 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 663 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 664 that runs on these, say Y here.
>> 665
>> 666 config SGI_IP27
>> 667 bool "SGI IP27 (Origin200/2000)"
>> 668 select FW_ARC
>> 669 select FW_ARC64
>> 670 select BOOT_ELF64
>> 671 select DEFAULT_SGI_PARTITION
>> 672 select DMA_COHERENT
>> 673 select SYS_HAS_EARLY_PRINTK
>> 674 select HW_HAS_PCI
>> 675 select NR_CPUS_DEFAULT_64
>> 676 select SYS_HAS_CPU_R10000
>> 677 select SYS_SUPPORTS_64BIT_KERNEL
>> 678 select SYS_SUPPORTS_BIG_ENDIAN
>> 679 select SYS_SUPPORTS_NUMA
>> 680 select SYS_SUPPORTS_SMP
>> 681 select MIPS_L1_CACHE_SHIFT_7
>> 682 help
>> 683 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 684 workstations. To compile a Linux kernel that runs on these, say Y
>> 685 here.
>> 686
>> 687 config SGI_IP28
>> 688 bool "SGI IP28 (Indigo2 R10k)"
>> 689 select FW_ARC
>> 690 select FW_ARC64
>> 691 select BOOT_ELF64
>> 692 select CEVT_R4K
>> 693 select CSRC_R4K
>> 694 select DEFAULT_SGI_PARTITION
>> 695 select DMA_NONCOHERENT
>> 696 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 697 select IRQ_MIPS_CPU
>> 698 select HW_HAS_EISA
>> 699 select I8253
>> 700 select I8259
>> 701 select SGI_HAS_I8042
>> 702 select SGI_HAS_INDYDOG
>> 703 select SGI_HAS_HAL2
>> 704 select SGI_HAS_SEEQ
>> 705 select SGI_HAS_WD93
>> 706 select SGI_HAS_ZILOG
>> 707 select SWAP_IO_SPACE
>> 708 select SYS_HAS_CPU_R10000
>> 709 #
>> 710 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 711 # memory during early boot on some machines.
>> 712 #
>> 713 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 714 # for a more details discussion
>> 715 #
>> 716 # select SYS_HAS_EARLY_PRINTK
>> 717 select SYS_SUPPORTS_64BIT_KERNEL
>> 718 select SYS_SUPPORTS_BIG_ENDIAN
>> 719 select MIPS_L1_CACHE_SHIFT_7
>> 720 help
>> 721 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 722 kernel that runs on these, say Y here.
>> 723
>> 724 config SGI_IP32
>> 725 bool "SGI IP32 (O2)"
>> 726 select FW_ARC
>> 727 select FW_ARC32
>> 728 select BOOT_ELF32
>> 729 select CEVT_R4K
>> 730 select CSRC_R4K
>> 731 select DMA_NONCOHERENT
>> 732 select HW_HAS_PCI
>> 733 select IRQ_MIPS_CPU
>> 734 select R5000_CPU_SCACHE
>> 735 select RM7000_CPU_SCACHE
>> 736 select SYS_HAS_CPU_R5000
>> 737 select SYS_HAS_CPU_R10000 if BROKEN
>> 738 select SYS_HAS_CPU_RM7000
>> 739 select SYS_HAS_CPU_NEVADA
>> 740 select SYS_SUPPORTS_64BIT_KERNEL
>> 741 select SYS_SUPPORTS_BIG_ENDIAN
>> 742 help
>> 743 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 744
>> 745 config SIBYTE_CRHINE
>> 746 bool "Sibyte BCM91120C-CRhine"
>> 747 select BOOT_ELF32
>> 748 select DMA_COHERENT
>> 749 select SIBYTE_BCM1120
>> 750 select SWAP_IO_SPACE
>> 751 select SYS_HAS_CPU_SB1
>> 752 select SYS_SUPPORTS_BIG_ENDIAN
>> 753 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 754
>> 755 config SIBYTE_CARMEL
>> 756 bool "Sibyte BCM91120x-Carmel"
>> 757 select BOOT_ELF32
>> 758 select DMA_COHERENT
>> 759 select SIBYTE_BCM1120
>> 760 select SWAP_IO_SPACE
>> 761 select SYS_HAS_CPU_SB1
>> 762 select SYS_SUPPORTS_BIG_ENDIAN
>> 763 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 764
>> 765 config SIBYTE_CRHONE
>> 766 bool "Sibyte BCM91125C-CRhone"
>> 767 select BOOT_ELF32
>> 768 select DMA_COHERENT
>> 769 select SIBYTE_BCM1125
>> 770 select SWAP_IO_SPACE
>> 771 select SYS_HAS_CPU_SB1
>> 772 select SYS_SUPPORTS_BIG_ENDIAN
>> 773 select SYS_SUPPORTS_HIGHMEM
>> 774 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 775
>> 776 config SIBYTE_RHONE
>> 777 bool "Sibyte BCM91125E-Rhone"
>> 778 select BOOT_ELF32
>> 779 select DMA_COHERENT
>> 780 select SIBYTE_BCM1125H
>> 781 select SWAP_IO_SPACE
>> 782 select SYS_HAS_CPU_SB1
>> 783 select SYS_SUPPORTS_BIG_ENDIAN
>> 784 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 785
>> 786 config SIBYTE_SWARM
>> 787 bool "Sibyte BCM91250A-SWARM"
>> 788 select BOOT_ELF32
>> 789 select DMA_COHERENT
>> 790 select HAVE_PATA_PLATFORM
>> 791 select SIBYTE_SB1250
>> 792 select SWAP_IO_SPACE
>> 793 select SYS_HAS_CPU_SB1
>> 794 select SYS_SUPPORTS_BIG_ENDIAN
>> 795 select SYS_SUPPORTS_HIGHMEM
>> 796 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 797 select ZONE_DMA32 if 64BIT
>> 798
>> 799 config SIBYTE_LITTLESUR
>> 800 bool "Sibyte BCM91250C2-LittleSur"
>> 801 select BOOT_ELF32
>> 802 select DMA_COHERENT
>> 803 select HAVE_PATA_PLATFORM
>> 804 select SIBYTE_SB1250
>> 805 select SWAP_IO_SPACE
>> 806 select SYS_HAS_CPU_SB1
>> 807 select SYS_SUPPORTS_BIG_ENDIAN
>> 808 select SYS_SUPPORTS_HIGHMEM
>> 809 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 810 select ZONE_DMA32 if 64BIT
>> 811
>> 812 config SIBYTE_SENTOSA
>> 813 bool "Sibyte BCM91250E-Sentosa"
>> 814 select BOOT_ELF32
>> 815 select DMA_COHERENT
>> 816 select SIBYTE_SB1250
>> 817 select SWAP_IO_SPACE
>> 818 select SYS_HAS_CPU_SB1
>> 819 select SYS_SUPPORTS_BIG_ENDIAN
>> 820 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 821
>> 822 config SIBYTE_BIGSUR
>> 823 bool "Sibyte BCM91480B-BigSur"
>> 824 select BOOT_ELF32
>> 825 select DMA_COHERENT
>> 826 select NR_CPUS_DEFAULT_4
>> 827 select SIBYTE_BCM1x80
>> 828 select SWAP_IO_SPACE
>> 829 select SYS_HAS_CPU_SB1
>> 830 select SYS_SUPPORTS_BIG_ENDIAN
>> 831 select SYS_SUPPORTS_HIGHMEM
>> 832 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 833 select ZONE_DMA32 if 64BIT
>> 834
>> 835 config SNI_RM
>> 836 bool "SNI RM200/300/400"
>> 837 select FW_ARC if CPU_LITTLE_ENDIAN
>> 838 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 839 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 840 select ARCH_MAY_HAVE_PC_FDC
>> 841 select BOOT_ELF32
>> 842 select CEVT_R4K
>> 843 select CSRC_R4K
>> 844 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 845 select DMA_NONCOHERENT
>> 846 select GENERIC_ISA_DMA
>> 847 select HAVE_PCSPKR_PLATFORM
>> 848 select HW_HAS_EISA
>> 849 select HW_HAS_PCI
>> 850 select IRQ_MIPS_CPU
>> 851 select I8253
>> 852 select I8259
>> 853 select ISA
>> 854 select MIPS_L1_CACHE_SHIFT_6
>> 855 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 856 select SYS_HAS_CPU_R4X00
>> 857 select SYS_HAS_CPU_R5000
>> 858 select SYS_HAS_CPU_R10000
>> 859 select R5000_CPU_SCACHE
>> 860 select SYS_HAS_EARLY_PRINTK
>> 861 select SYS_SUPPORTS_32BIT_KERNEL
>> 862 select SYS_SUPPORTS_64BIT_KERNEL
>> 863 select SYS_SUPPORTS_BIG_ENDIAN
>> 864 select SYS_SUPPORTS_HIGHMEM
>> 865 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 866 help
>> 867 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 868 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 869 Technology and now in turn merged with Fujitsu. Say Y here to
>> 870 support this machine type.
>> 871
>> 872 config MACH_TX39XX
>> 873 bool "Toshiba TX39 series based machines"
>> 874
>> 875 config MACH_TX49XX
>> 876 bool "Toshiba TX49 series based machines"
>> 877
>> 878 config MIKROTIK_RB532
>> 879 bool "Mikrotik RB532 boards"
>> 880 select CEVT_R4K
>> 881 select CSRC_R4K
>> 882 select DMA_NONCOHERENT
>> 883 select HW_HAS_PCI
>> 884 select IRQ_MIPS_CPU
>> 885 select SYS_HAS_CPU_MIPS32_R1
>> 886 select SYS_SUPPORTS_32BIT_KERNEL
>> 887 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 888 select SWAP_IO_SPACE
>> 889 select BOOT_RAW
>> 890 select GPIOLIB
>> 891 select MIPS_L1_CACHE_SHIFT_4
>> 892 help
>> 893 Support the Mikrotik(tm) RouterBoard 532 series,
>> 894 based on the IDT RC32434 SoC.
>> 895
>> 896 config CAVIUM_OCTEON_SOC
>> 897 bool "Cavium Networks Octeon SoC based boards"
>> 898 select CEVT_R4K
>> 899 select ARCH_PHYS_ADDR_T_64BIT
>> 900 select DMA_COHERENT
>> 901 select SYS_SUPPORTS_64BIT_KERNEL
>> 902 select SYS_SUPPORTS_BIG_ENDIAN
>> 903 select EDAC_SUPPORT
>> 904 select EDAC_ATOMIC_SCRUB
>> 905 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 906 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 907 select SYS_HAS_EARLY_PRINTK
>> 908 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 909 select HW_HAS_PCI
>> 910 select ZONE_DMA32
>> 911 select HOLES_IN_ZONE
>> 912 select GPIOLIB
>> 913 select LIBFDT
>> 914 select USE_OF
>> 915 select ARCH_SPARSEMEM_ENABLE
>> 916 select SYS_SUPPORTS_SMP
>> 917 select NR_CPUS_DEFAULT_16
>> 918 select BUILTIN_DTB
>> 919 select MTD_COMPLEX_MAPPINGS
>> 920 help
>> 921 This option supports all of the Octeon reference boards from Cavium
>> 922 Networks. It builds a kernel that dynamically determines the Octeon
>> 923 CPU type and supports all known board reference implementations.
>> 924 Some of the supported boards are:
>> 925 EBT3000
>> 926 EBH3000
>> 927 EBH3100
>> 928 Thunder
>> 929 Kodama
>> 930 Hikari
>> 931 Say Y here for most Octeon reference boards.
>> 932
>> 933 config NLM_XLR_BOARD
>> 934 bool "Netlogic XLR/XLS based systems"
>> 935 select BOOT_ELF32
>> 936 select NLM_COMMON
>> 937 select SYS_HAS_CPU_XLR
>> 938 select SYS_SUPPORTS_SMP
>> 939 select HW_HAS_PCI
>> 940 select SWAP_IO_SPACE
>> 941 select SYS_SUPPORTS_32BIT_KERNEL
>> 942 select SYS_SUPPORTS_64BIT_KERNEL
>> 943 select ARCH_PHYS_ADDR_T_64BIT
>> 944 select SYS_SUPPORTS_BIG_ENDIAN
>> 945 select SYS_SUPPORTS_HIGHMEM
>> 946 select DMA_COHERENT
>> 947 select NR_CPUS_DEFAULT_32
>> 948 select CEVT_R4K
>> 949 select CSRC_R4K
>> 950 select IRQ_MIPS_CPU
>> 951 select ZONE_DMA32 if 64BIT
>> 952 select SYNC_R4K
>> 953 select SYS_HAS_EARLY_PRINTK
>> 954 select SYS_SUPPORTS_ZBOOT
>> 955 select SYS_SUPPORTS_ZBOOT_UART16550
>> 956 help
>> 957 Support for systems based on Netlogic XLR and XLS processors.
>> 958 Say Y here if you have a XLR or XLS based board.
>> 959
>> 960 config NLM_XLP_BOARD
>> 961 bool "Netlogic XLP based systems"
>> 962 select BOOT_ELF32
>> 963 select NLM_COMMON
>> 964 select SYS_HAS_CPU_XLP
>> 965 select SYS_SUPPORTS_SMP
>> 966 select HW_HAS_PCI
>> 967 select SYS_SUPPORTS_32BIT_KERNEL
>> 968 select SYS_SUPPORTS_64BIT_KERNEL
>> 969 select ARCH_PHYS_ADDR_T_64BIT
>> 970 select GPIOLIB
>> 971 select SYS_SUPPORTS_BIG_ENDIAN
>> 972 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 973 select SYS_SUPPORTS_HIGHMEM
>> 974 select DMA_COHERENT
>> 975 select NR_CPUS_DEFAULT_32
>> 976 select CEVT_R4K
>> 977 select CSRC_R4K
>> 978 select IRQ_MIPS_CPU
>> 979 select ZONE_DMA32 if 64BIT
>> 980 select SYNC_R4K
>> 981 select SYS_HAS_EARLY_PRINTK
>> 982 select USE_OF
>> 983 select SYS_SUPPORTS_ZBOOT
>> 984 select SYS_SUPPORTS_ZBOOT_UART16550
>> 985 help
>> 986 This board is based on Netlogic XLP Processor.
>> 987 Say Y here if you have a XLP based board.
>> 988
>> 989 config MIPS_PARAVIRT
>> 990 bool "Para-Virtualized guest system"
>> 991 select CEVT_R4K
>> 992 select CSRC_R4K
>> 993 select DMA_COHERENT
>> 994 select SYS_SUPPORTS_64BIT_KERNEL
>> 995 select SYS_SUPPORTS_32BIT_KERNEL
>> 996 select SYS_SUPPORTS_BIG_ENDIAN
>> 997 select SYS_SUPPORTS_SMP
>> 998 select NR_CPUS_DEFAULT_4
>> 999 select SYS_HAS_EARLY_PRINTK
>> 1000 select SYS_HAS_CPU_MIPS32_R2
>> 1001 select SYS_HAS_CPU_MIPS64_R2
>> 1002 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1003 select HW_HAS_PCI
>> 1004 select SWAP_IO_SPACE
60 help 1005 help
61 Xtensa processors are 32-bit RISC ma !! 1006 This option supports guest running under ????
62 primarily for embedded systems. The <<
63 configurable and extensible. The Li <<
64 architecture supports all processor <<
65 with reasonable minimum requirements <<
66 a home page at <http://www.linux-xte <<
67 1007
68 config GENERIC_HWEIGHT !! 1008 endchoice
69 def_bool y !! 1009
>> 1010 source "arch/mips/alchemy/Kconfig"
>> 1011 source "arch/mips/ath25/Kconfig"
>> 1012 source "arch/mips/ath79/Kconfig"
>> 1013 source "arch/mips/bcm47xx/Kconfig"
>> 1014 source "arch/mips/bcm63xx/Kconfig"
>> 1015 source "arch/mips/bmips/Kconfig"
>> 1016 source "arch/mips/generic/Kconfig"
>> 1017 source "arch/mips/jazz/Kconfig"
>> 1018 source "arch/mips/jz4740/Kconfig"
>> 1019 source "arch/mips/lantiq/Kconfig"
>> 1020 source "arch/mips/lasat/Kconfig"
>> 1021 source "arch/mips/pic32/Kconfig"
>> 1022 source "arch/mips/pistachio/Kconfig"
>> 1023 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1024 source "arch/mips/ralink/Kconfig"
>> 1025 source "arch/mips/sgi-ip27/Kconfig"
>> 1026 source "arch/mips/sibyte/Kconfig"
>> 1027 source "arch/mips/txx9/Kconfig"
>> 1028 source "arch/mips/vr41xx/Kconfig"
>> 1029 source "arch/mips/cavium-octeon/Kconfig"
>> 1030 source "arch/mips/loongson32/Kconfig"
>> 1031 source "arch/mips/loongson64/Kconfig"
>> 1032 source "arch/mips/netlogic/Kconfig"
>> 1033 source "arch/mips/paravirt/Kconfig"
>> 1034 source "arch/mips/xilfpga/Kconfig"
>> 1035
>> 1036 endmenu
>> 1037
>> 1038 config RWSEM_GENERIC_SPINLOCK
>> 1039 bool
>> 1040 default y
>> 1041
>> 1042 config RWSEM_XCHGADD_ALGORITHM
>> 1043 bool
70 1044
71 config ARCH_HAS_ILOG2_U32 1045 config ARCH_HAS_ILOG2_U32
72 def_bool n !! 1046 bool
>> 1047 default n
73 1048
74 config ARCH_HAS_ILOG2_U64 1049 config ARCH_HAS_ILOG2_U64
75 def_bool n !! 1050 bool
>> 1051 default n
76 1052
77 config ARCH_MTD_XIP !! 1053 config GENERIC_HWEIGHT
78 def_bool y !! 1054 bool
>> 1055 default y
79 1056
80 config NO_IOPORT_MAP !! 1057 config GENERIC_CALIBRATE_DELAY
81 def_bool n !! 1058 bool
>> 1059 default y
82 1060
83 config HZ !! 1061 config SCHED_OMIT_FRAME_POINTER
84 int !! 1062 bool
85 default 100 !! 1063 default y
86 1064
87 config LOCKDEP_SUPPORT !! 1065 #
88 def_bool y !! 1066 # Select some configuration options automatically based on user selections.
>> 1067 #
>> 1068 config FW_ARC
>> 1069 bool
89 1070
90 config STACKTRACE_SUPPORT !! 1071 config ARCH_MAY_HAVE_PC_FDC
91 def_bool y !! 1072 bool
92 1073
93 config MMU !! 1074 config BOOT_RAW
>> 1075 bool
>> 1076
>> 1077 config CEVT_BCM1480
>> 1078 bool
>> 1079
>> 1080 config CEVT_DS1287
>> 1081 bool
>> 1082
>> 1083 config CEVT_GT641XX
>> 1084 bool
>> 1085
>> 1086 config CEVT_R4K
>> 1087 bool
>> 1088
>> 1089 config CEVT_SB1250
>> 1090 bool
>> 1091
>> 1092 config CEVT_TXX9
>> 1093 bool
>> 1094
>> 1095 config CSRC_BCM1480
>> 1096 bool
>> 1097
>> 1098 config CSRC_IOASIC
>> 1099 bool
>> 1100
>> 1101 config CSRC_R4K
>> 1102 bool
>> 1103
>> 1104 config CSRC_SB1250
>> 1105 bool
>> 1106
>> 1107 config MIPS_CLOCK_VSYSCALL
>> 1108 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1109
>> 1110 config GPIO_TXX9
>> 1111 select GPIOLIB
>> 1112 bool
>> 1113
>> 1114 config FW_CFE
>> 1115 bool
>> 1116
>> 1117 config ARCH_DMA_ADDR_T_64BIT
>> 1118 def_bool (HIGHMEM && ARCH_PHYS_ADDR_T_64BIT) || 64BIT
>> 1119
>> 1120 config ARCH_SUPPORTS_UPROBES
>> 1121 bool
>> 1122
>> 1123 config DMA_MAYBE_COHERENT
>> 1124 select DMA_NONCOHERENT
>> 1125 bool
>> 1126
>> 1127 config DMA_PERDEV_COHERENT
>> 1128 bool
>> 1129 select DMA_MAYBE_COHERENT
>> 1130
>> 1131 config DMA_COHERENT
>> 1132 bool
>> 1133
>> 1134 config DMA_NONCOHERENT
>> 1135 bool
>> 1136 select NEED_DMA_MAP_STATE
>> 1137
>> 1138 config NEED_DMA_MAP_STATE
>> 1139 bool
>> 1140
>> 1141 config SYS_HAS_EARLY_PRINTK
>> 1142 bool
>> 1143
>> 1144 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1145 bool
>> 1146
>> 1147 config MIPS_BONITO64
>> 1148 bool
>> 1149
>> 1150 config MIPS_MSC
>> 1151 bool
>> 1152
>> 1153 config MIPS_NILE4
>> 1154 bool
>> 1155
>> 1156 config SYNC_R4K
>> 1157 bool
>> 1158
>> 1159 config MIPS_MACHINE
94 def_bool n 1160 def_bool n
95 select PFAULT <<
96 1161
97 config HAVE_XTENSA_GPIO32 !! 1162 config NO_IOPORT_MAP
98 def_bool n 1163 def_bool n
99 1164
100 config KASAN_SHADOW_OFFSET !! 1165 config GENERIC_CSUM
101 hex !! 1166 bool
102 default 0x6e400000 !! 1167
>> 1168 config GENERIC_ISA_DMA
>> 1169 bool
>> 1170 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1171 select ISA_DMA_API
>> 1172
>> 1173 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1174 bool
>> 1175 select GENERIC_ISA_DMA
>> 1176
>> 1177 config ISA_DMA_API
>> 1178 bool
>> 1179
>> 1180 config HOLES_IN_ZONE
>> 1181 bool
>> 1182
>> 1183 config SYS_SUPPORTS_RELOCATABLE
>> 1184 bool
>> 1185 help
>> 1186 Selected if the platform supports relocating the kernel.
>> 1187 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1188 to allow access to command line and entropy sources.
>> 1189
>> 1190 #
>> 1191 # Endianness selection. Sufficiently obscure so many users don't know what to
>> 1192 # answer,so we try hard to limit the available choices. Also the use of a
>> 1193 # choice statement should be more obvious to the user.
>> 1194 #
>> 1195 choice
>> 1196 prompt "Endianness selection"
>> 1197 help
>> 1198 Some MIPS machines can be configured for either little or big endian
>> 1199 byte order. These modes require different kernels and a different
>> 1200 Linux distribution. In general there is one preferred byteorder for a
>> 1201 particular system but some systems are just as commonly used in the
>> 1202 one or the other endianness.
103 1203
104 config CPU_BIG_ENDIAN 1204 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1205 bool "Big endian"
>> 1206 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1207
107 config CPU_LITTLE_ENDIAN 1208 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1209 bool "Little endian"
>> 1210 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1211
110 config CC_HAVE_CALL0_ABI !! 1212 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1213
113 menu "Processor type and features" !! 1214 config EXPORT_UASM
>> 1215 bool
114 1216
115 choice !! 1217 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1218 bool
117 default XTENSA_VARIANT_FSF <<
118 1219
119 config XTENSA_VARIANT_FSF !! 1220 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1221 bool
121 select MMU <<
122 1222
123 config XTENSA_VARIANT_DC232B !! 1223 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1224 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1225
130 config XTENSA_VARIANT_DC233C !! 1226 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1227 bool
132 select MMU !! 1228 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1229 default y
134 help !! 1230
135 This variant refers to Tensilica's D !! 1231 config MIPS_HUGE_TLB_SUPPORT
>> 1232 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1233
>> 1234 config IRQ_CPU_RM7K
>> 1235 bool
>> 1236
>> 1237 config IRQ_MSP_SLP
>> 1238 bool
>> 1239
>> 1240 config IRQ_MSP_CIC
>> 1241 bool
136 1242
137 config XTENSA_VARIANT_CUSTOM !! 1243 config IRQ_TXX9
138 bool "Custom Xtensa processor configur !! 1244 bool
139 select HAVE_XTENSA_GPIO32 !! 1245
>> 1246 config IRQ_GT641XX
>> 1247 bool
>> 1248
>> 1249 config PCI_GT64XXX_PCI0
>> 1250 bool
>> 1251
>> 1252 config NO_EXCEPT_FILL
>> 1253 bool
>> 1254
>> 1255 config SOC_EMMA2RH
>> 1256 bool
>> 1257 select CEVT_R4K
>> 1258 select CSRC_R4K
>> 1259 select DMA_NONCOHERENT
>> 1260 select IRQ_MIPS_CPU
>> 1261 select SWAP_IO_SPACE
>> 1262 select SYS_HAS_CPU_R5500
>> 1263 select SYS_SUPPORTS_32BIT_KERNEL
>> 1264 select SYS_SUPPORTS_64BIT_KERNEL
>> 1265 select SYS_SUPPORTS_BIG_ENDIAN
>> 1266
>> 1267 config SOC_PNX833X
>> 1268 bool
>> 1269 select CEVT_R4K
>> 1270 select CSRC_R4K
>> 1271 select IRQ_MIPS_CPU
>> 1272 select DMA_NONCOHERENT
>> 1273 select SYS_HAS_CPU_MIPS32_R2
>> 1274 select SYS_SUPPORTS_32BIT_KERNEL
>> 1275 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1276 select SYS_SUPPORTS_BIG_ENDIAN
>> 1277 select SYS_SUPPORTS_MIPS16
>> 1278 select CPU_MIPSR2_IRQ_VI
>> 1279
>> 1280 config SOC_PNX8335
>> 1281 bool
>> 1282 select SOC_PNX833X
>> 1283
>> 1284 config MIPS_SPRAM
>> 1285 bool
>> 1286
>> 1287 config SWAP_IO_SPACE
>> 1288 bool
>> 1289
>> 1290 config SGI_HAS_INDYDOG
>> 1291 bool
>> 1292
>> 1293 config SGI_HAS_HAL2
>> 1294 bool
>> 1295
>> 1296 config SGI_HAS_SEEQ
>> 1297 bool
>> 1298
>> 1299 config SGI_HAS_WD93
>> 1300 bool
>> 1301
>> 1302 config SGI_HAS_ZILOG
>> 1303 bool
>> 1304
>> 1305 config SGI_HAS_I8042
>> 1306 bool
>> 1307
>> 1308 config DEFAULT_SGI_PARTITION
>> 1309 bool
>> 1310
>> 1311 config FW_ARC32
>> 1312 bool
>> 1313
>> 1314 config FW_SNIPROM
>> 1315 bool
>> 1316
>> 1317 config BOOT_ELF32
>> 1318 bool
>> 1319
>> 1320 config MIPS_L1_CACHE_SHIFT_4
>> 1321 bool
>> 1322
>> 1323 config MIPS_L1_CACHE_SHIFT_5
>> 1324 bool
>> 1325
>> 1326 config MIPS_L1_CACHE_SHIFT_6
>> 1327 bool
>> 1328
>> 1329 config MIPS_L1_CACHE_SHIFT_7
>> 1330 bool
>> 1331
>> 1332 config MIPS_L1_CACHE_SHIFT
>> 1333 int
>> 1334 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1335 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1336 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1337 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1338 default "5"
>> 1339
>> 1340 config HAVE_STD_PC_SERIAL_PORT
>> 1341 bool
>> 1342
>> 1343 config ARC_CONSOLE
>> 1344 bool "ARC console support"
>> 1345 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1346
>> 1347 config ARC_MEMORY
>> 1348 bool
>> 1349 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1350 default y
>> 1351
>> 1352 config ARC_PROMLIB
>> 1353 bool
>> 1354 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1355 default y
>> 1356
>> 1357 config FW_ARC64
>> 1358 bool
>> 1359
>> 1360 config BOOT_ELF64
>> 1361 bool
>> 1362
>> 1363 menu "CPU selection"
>> 1364
>> 1365 choice
>> 1366 prompt "CPU type"
>> 1367 default CPU_R4X00
>> 1368
>> 1369 config CPU_LOONGSON3
>> 1370 bool "Loongson 3 CPU"
>> 1371 depends on SYS_HAS_CPU_LOONGSON3
>> 1372 select CPU_SUPPORTS_64BIT_KERNEL
>> 1373 select CPU_SUPPORTS_HIGHMEM
>> 1374 select CPU_SUPPORTS_HUGEPAGES
>> 1375 select WEAK_ORDERING
>> 1376 select WEAK_REORDERING_BEYOND_LLSC
>> 1377 select MIPS_PGD_C0_CONTEXT
>> 1378 select MIPS_L1_CACHE_SHIFT_6
>> 1379 select MIPS_FP_SUPPORT
>> 1380 select GPIOLIB
140 help 1381 help
141 Select this variant to use a custom !! 1382 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1383 set with many extensions.
143 endchoice <<
144 1384
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1385 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1386 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1387 default n
>> 1388 select CPU_MIPSR2
>> 1389 select CPU_HAS_PREFETCH
>> 1390 depends on CPU_LOONGSON3
>> 1391 help
>> 1392 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1393 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1394 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1395 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1396 Fast TLB refill support, etc.
>> 1397
>> 1398 This option enable those enhancements which are not probed at run
>> 1399 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1400 please say 'N' here. If you want a high-performance kernel to run on
>> 1401 new Loongson 3 machines only, please say 'Y' here.
>> 1402
>> 1403 config CPU_LOONGSON2E
>> 1404 bool "Loongson 2E"
>> 1405 depends on SYS_HAS_CPU_LOONGSON2E
>> 1406 select CPU_LOONGSON2
>> 1407 help
>> 1408 The Loongson 2E processor implements the MIPS III instruction set
>> 1409 with many extensions.
>> 1410
>> 1411 It has an internal FPGA northbridge, which is compatible to
>> 1412 bonito64.
>> 1413
>> 1414 config CPU_LOONGSON2F
>> 1415 bool "Loongson 2F"
>> 1416 depends on SYS_HAS_CPU_LOONGSON2F
>> 1417 select CPU_LOONGSON2
>> 1418 select GPIOLIB
>> 1419 help
>> 1420 The Loongson 2F processor implements the MIPS III instruction set
>> 1421 with many extensions.
>> 1422
>> 1423 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1424 have a similar programming interface with FPGA northbridge used in
>> 1425 Loongson2E.
>> 1426
>> 1427 config CPU_LOONGSON1B
>> 1428 bool "Loongson 1B"
>> 1429 depends on SYS_HAS_CPU_LOONGSON1B
>> 1430 select CPU_LOONGSON1
>> 1431 select LEDS_GPIO_REGISTER
>> 1432 help
>> 1433 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1434 release 2 instruction set.
>> 1435
>> 1436 config CPU_LOONGSON1C
>> 1437 bool "Loongson 1C"
>> 1438 depends on SYS_HAS_CPU_LOONGSON1C
>> 1439 select CPU_LOONGSON1
>> 1440 select ARCH_WANT_OPTIONAL_GPIOLIB
>> 1441 select LEDS_GPIO_REGISTER
>> 1442 help
>> 1443 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1444 release 2 instruction set.
>> 1445
>> 1446 config CPU_MIPS32_R1
>> 1447 bool "MIPS32 Release 1"
>> 1448 depends on SYS_HAS_CPU_MIPS32_R1
>> 1449 select CPU_HAS_PREFETCH
>> 1450 select CPU_SUPPORTS_32BIT_KERNEL
>> 1451 select CPU_SUPPORTS_HIGHMEM
>> 1452 help
>> 1453 Choose this option to build a kernel for release 1 or later of the
>> 1454 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1455 MIPS processor are based on a MIPS32 processor. If you know the
>> 1456 specific type of processor in your system, choose those that one
>> 1457 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1458 Release 2 of the MIPS32 architecture is available since several
>> 1459 years so chances are you even have a MIPS32 Release 2 processor
>> 1460 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1461 performance.
>> 1462
>> 1463 config CPU_MIPS32_R2
>> 1464 bool "MIPS32 Release 2"
>> 1465 depends on SYS_HAS_CPU_MIPS32_R2
>> 1466 select CPU_HAS_PREFETCH
>> 1467 select CPU_SUPPORTS_32BIT_KERNEL
>> 1468 select CPU_SUPPORTS_HIGHMEM
>> 1469 select CPU_SUPPORTS_MSA
>> 1470 select HAVE_KVM
>> 1471 help
>> 1472 Choose this option to build a kernel for release 2 or later of the
>> 1473 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1474 MIPS processor are based on a MIPS32 processor. If you know the
>> 1475 specific type of processor in your system, choose those that one
>> 1476 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1477
>> 1478 config CPU_MIPS32_R6
>> 1479 bool "MIPS32 Release 6"
>> 1480 depends on SYS_HAS_CPU_MIPS32_R6
>> 1481 select CPU_HAS_PREFETCH
>> 1482 select CPU_SUPPORTS_32BIT_KERNEL
>> 1483 select CPU_SUPPORTS_HIGHMEM
>> 1484 select CPU_SUPPORTS_MSA
>> 1485 select GENERIC_CSUM
>> 1486 select HAVE_KVM
>> 1487 select MIPS_O32_FP64_SUPPORT
>> 1488 help
>> 1489 Choose this option to build a kernel for release 6 or later of the
>> 1490 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1491 family, are based on a MIPS32r6 processor. If you own an older
>> 1492 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1493
>> 1494 config CPU_MIPS64_R1
>> 1495 bool "MIPS64 Release 1"
>> 1496 depends on SYS_HAS_CPU_MIPS64_R1
>> 1497 select CPU_HAS_PREFETCH
>> 1498 select CPU_SUPPORTS_32BIT_KERNEL
>> 1499 select CPU_SUPPORTS_64BIT_KERNEL
>> 1500 select CPU_SUPPORTS_HIGHMEM
>> 1501 select CPU_SUPPORTS_HUGEPAGES
>> 1502 help
>> 1503 Choose this option to build a kernel for release 1 or later of the
>> 1504 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1505 MIPS processor are based on a MIPS64 processor. If you know the
>> 1506 specific type of processor in your system, choose those that one
>> 1507 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1508 Release 2 of the MIPS64 architecture is available since several
>> 1509 years so chances are you even have a MIPS64 Release 2 processor
>> 1510 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1511 performance.
>> 1512
>> 1513 config CPU_MIPS64_R2
>> 1514 bool "MIPS64 Release 2"
>> 1515 depends on SYS_HAS_CPU_MIPS64_R2
>> 1516 select CPU_HAS_PREFETCH
>> 1517 select CPU_SUPPORTS_32BIT_KERNEL
>> 1518 select CPU_SUPPORTS_64BIT_KERNEL
>> 1519 select CPU_SUPPORTS_HIGHMEM
>> 1520 select CPU_SUPPORTS_HUGEPAGES
>> 1521 select CPU_SUPPORTS_MSA
>> 1522 select HAVE_KVM
>> 1523 help
>> 1524 Choose this option to build a kernel for release 2 or later of the
>> 1525 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1526 MIPS processor are based on a MIPS64 processor. If you know the
>> 1527 specific type of processor in your system, choose those that one
>> 1528 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1529
>> 1530 config CPU_MIPS64_R6
>> 1531 bool "MIPS64 Release 6"
>> 1532 depends on SYS_HAS_CPU_MIPS64_R6
>> 1533 select CPU_HAS_PREFETCH
>> 1534 select CPU_SUPPORTS_32BIT_KERNEL
>> 1535 select CPU_SUPPORTS_64BIT_KERNEL
>> 1536 select CPU_SUPPORTS_HIGHMEM
>> 1537 select CPU_SUPPORTS_MSA
>> 1538 select GENERIC_CSUM
>> 1539 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1540 select HAVE_KVM
>> 1541 help
>> 1542 Choose this option to build a kernel for release 6 or later of the
>> 1543 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1544 family, are based on a MIPS64r6 processor. If you own an older
>> 1545 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1546
>> 1547 config CPU_R3000
>> 1548 bool "R3000"
>> 1549 depends on SYS_HAS_CPU_R3000
>> 1550 select CPU_HAS_WB
>> 1551 select CPU_SUPPORTS_32BIT_KERNEL
>> 1552 select CPU_SUPPORTS_HIGHMEM
>> 1553 help
>> 1554 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1555 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1556 *not* work on R4000 machines and vice versa. However, since most
>> 1557 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1558 might be a safe bet. If the resulting kernel does not work,
>> 1559 try to recompile with R3000.
>> 1560
>> 1561 config CPU_TX39XX
>> 1562 bool "R39XX"
>> 1563 depends on SYS_HAS_CPU_TX39XX
>> 1564 select CPU_SUPPORTS_32BIT_KERNEL
>> 1565
>> 1566 config CPU_VR41XX
>> 1567 bool "R41xx"
>> 1568 depends on SYS_HAS_CPU_VR41XX
>> 1569 select CPU_SUPPORTS_32BIT_KERNEL
>> 1570 select CPU_SUPPORTS_64BIT_KERNEL
>> 1571 help
>> 1572 The options selects support for the NEC VR4100 series of processors.
>> 1573 Only choose this option if you have one of these processors as a
>> 1574 kernel built with this option will not run on any other type of
>> 1575 processor or vice versa.
>> 1576
>> 1577 config CPU_R4300
>> 1578 bool "R4300"
>> 1579 depends on SYS_HAS_CPU_R4300
>> 1580 select CPU_SUPPORTS_32BIT_KERNEL
>> 1581 select CPU_SUPPORTS_64BIT_KERNEL
>> 1582 help
>> 1583 MIPS Technologies R4300-series processors.
>> 1584
>> 1585 config CPU_R4X00
>> 1586 bool "R4x00"
>> 1587 depends on SYS_HAS_CPU_R4X00
>> 1588 select CPU_SUPPORTS_32BIT_KERNEL
>> 1589 select CPU_SUPPORTS_64BIT_KERNEL
>> 1590 select CPU_SUPPORTS_HUGEPAGES
>> 1591 help
>> 1592 MIPS Technologies R4000-series processors other than 4300, including
>> 1593 the R4000, R4400, R4600, and 4700.
>> 1594
>> 1595 config CPU_TX49XX
>> 1596 bool "R49XX"
>> 1597 depends on SYS_HAS_CPU_TX49XX
>> 1598 select CPU_HAS_PREFETCH
>> 1599 select CPU_SUPPORTS_32BIT_KERNEL
>> 1600 select CPU_SUPPORTS_64BIT_KERNEL
>> 1601 select CPU_SUPPORTS_HUGEPAGES
>> 1602
>> 1603 config CPU_R5000
>> 1604 bool "R5000"
>> 1605 depends on SYS_HAS_CPU_R5000
>> 1606 select CPU_SUPPORTS_32BIT_KERNEL
>> 1607 select CPU_SUPPORTS_64BIT_KERNEL
>> 1608 select CPU_SUPPORTS_HUGEPAGES
>> 1609 help
>> 1610 MIPS Technologies R5000-series processors other than the Nevada.
>> 1611
>> 1612 config CPU_R5432
>> 1613 bool "R5432"
>> 1614 depends on SYS_HAS_CPU_R5432
>> 1615 select CPU_SUPPORTS_32BIT_KERNEL
>> 1616 select CPU_SUPPORTS_64BIT_KERNEL
>> 1617 select CPU_SUPPORTS_HUGEPAGES
>> 1618
>> 1619 config CPU_R5500
>> 1620 bool "R5500"
>> 1621 depends on SYS_HAS_CPU_R5500
>> 1622 select CPU_SUPPORTS_32BIT_KERNEL
>> 1623 select CPU_SUPPORTS_64BIT_KERNEL
>> 1624 select CPU_SUPPORTS_HUGEPAGES
>> 1625 help
>> 1626 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1627 instruction set.
>> 1628
>> 1629 config CPU_R6000
>> 1630 bool "R6000"
>> 1631 depends on SYS_HAS_CPU_R6000
>> 1632 select CPU_SUPPORTS_32BIT_KERNEL
>> 1633 help
>> 1634 MIPS Technologies R6000 and R6000A series processors. Note these
>> 1635 processors are extremely rare and the support for them is incomplete.
>> 1636
>> 1637 config CPU_NEVADA
>> 1638 bool "RM52xx"
>> 1639 depends on SYS_HAS_CPU_NEVADA
>> 1640 select CPU_SUPPORTS_32BIT_KERNEL
>> 1641 select CPU_SUPPORTS_64BIT_KERNEL
>> 1642 select CPU_SUPPORTS_HUGEPAGES
>> 1643 help
>> 1644 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1645
>> 1646 config CPU_R8000
>> 1647 bool "R8000"
>> 1648 depends on SYS_HAS_CPU_R8000
>> 1649 select CPU_HAS_PREFETCH
>> 1650 select CPU_SUPPORTS_64BIT_KERNEL
>> 1651 help
>> 1652 MIPS Technologies R8000 processors. Note these processors are
>> 1653 uncommon and the support for them is incomplete.
>> 1654
>> 1655 config CPU_R10000
>> 1656 bool "R10000"
>> 1657 depends on SYS_HAS_CPU_R10000
>> 1658 select CPU_HAS_PREFETCH
>> 1659 select CPU_SUPPORTS_32BIT_KERNEL
>> 1660 select CPU_SUPPORTS_64BIT_KERNEL
>> 1661 select CPU_SUPPORTS_HIGHMEM
>> 1662 select CPU_SUPPORTS_HUGEPAGES
>> 1663 help
>> 1664 MIPS Technologies R10000-series processors.
>> 1665
>> 1666 config CPU_RM7000
>> 1667 bool "RM7000"
>> 1668 depends on SYS_HAS_CPU_RM7000
>> 1669 select CPU_HAS_PREFETCH
>> 1670 select CPU_SUPPORTS_32BIT_KERNEL
>> 1671 select CPU_SUPPORTS_64BIT_KERNEL
>> 1672 select CPU_SUPPORTS_HIGHMEM
>> 1673 select CPU_SUPPORTS_HUGEPAGES
>> 1674
>> 1675 config CPU_SB1
>> 1676 bool "SB1"
>> 1677 depends on SYS_HAS_CPU_SB1
>> 1678 select CPU_SUPPORTS_32BIT_KERNEL
>> 1679 select CPU_SUPPORTS_64BIT_KERNEL
>> 1680 select CPU_SUPPORTS_HIGHMEM
>> 1681 select CPU_SUPPORTS_HUGEPAGES
>> 1682 select WEAK_ORDERING
>> 1683
>> 1684 config CPU_CAVIUM_OCTEON
>> 1685 bool "Cavium Octeon processor"
>> 1686 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1687 select CPU_HAS_PREFETCH
>> 1688 select CPU_SUPPORTS_64BIT_KERNEL
>> 1689 select WEAK_ORDERING
>> 1690 select CPU_SUPPORTS_HIGHMEM
>> 1691 select CPU_SUPPORTS_HUGEPAGES
>> 1692 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1693 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1694 select MIPS_L1_CACHE_SHIFT_7
>> 1695 help
>> 1696 The Cavium Octeon processor is a highly integrated chip containing
>> 1697 many ethernet hardware widgets for networking tasks. The processor
>> 1698 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1699 Full details can be found at http://www.caviumnetworks.com.
>> 1700
>> 1701 config CPU_BMIPS
>> 1702 bool "Broadcom BMIPS"
>> 1703 depends on SYS_HAS_CPU_BMIPS
>> 1704 select CPU_MIPS32
>> 1705 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1706 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1707 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1708 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1709 select CPU_SUPPORTS_32BIT_KERNEL
>> 1710 select DMA_NONCOHERENT
>> 1711 select IRQ_MIPS_CPU
>> 1712 select SWAP_IO_SPACE
>> 1713 select WEAK_ORDERING
>> 1714 select CPU_SUPPORTS_HIGHMEM
>> 1715 select CPU_HAS_PREFETCH
>> 1716 help
>> 1717 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1718
>> 1719 config CPU_XLR
>> 1720 bool "Netlogic XLR SoC"
>> 1721 depends on SYS_HAS_CPU_XLR
>> 1722 select CPU_SUPPORTS_32BIT_KERNEL
>> 1723 select CPU_SUPPORTS_64BIT_KERNEL
>> 1724 select CPU_SUPPORTS_HIGHMEM
>> 1725 select CPU_SUPPORTS_HUGEPAGES
>> 1726 select WEAK_ORDERING
>> 1727 select WEAK_REORDERING_BEYOND_LLSC
>> 1728 help
>> 1729 Netlogic Microsystems XLR/XLS processors.
>> 1730
>> 1731 config CPU_XLP
>> 1732 bool "Netlogic XLP SoC"
>> 1733 depends on SYS_HAS_CPU_XLP
>> 1734 select CPU_SUPPORTS_32BIT_KERNEL
>> 1735 select CPU_SUPPORTS_64BIT_KERNEL
>> 1736 select CPU_SUPPORTS_HIGHMEM
>> 1737 select WEAK_ORDERING
>> 1738 select WEAK_REORDERING_BEYOND_LLSC
>> 1739 select CPU_HAS_PREFETCH
>> 1740 select CPU_MIPSR2
>> 1741 select CPU_SUPPORTS_HUGEPAGES
>> 1742 select MIPS_ASID_BITS_VARIABLE
173 help 1743 help
174 Enable if core variant has Performan !! 1744 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1745 endchoice
176 <<
177 If unsure, say N. <<
178 1746
179 config XTENSA_FAKE_NMI !! 1747 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1748 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1749 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1750 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1751 help
>> 1752 Choose this option to build a kernel for release 2 or later of the
>> 1753 MIPS32 architecture including features from the 3.5 release such as
>> 1754 support for Enhanced Virtual Addressing (EVA).
>> 1755
>> 1756 config CPU_MIPS32_3_5_EVA
>> 1757 bool "Enhanced Virtual Addressing (EVA)"
>> 1758 depends on CPU_MIPS32_3_5_FEATURES
>> 1759 select EVA
>> 1760 default y
>> 1761 help
>> 1762 Choose this option if you want to enable the Enhanced Virtual
>> 1763 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1764 One of its primary benefits is an increase in the maximum size
>> 1765 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1766
>> 1767 config CPU_MIPS32_R5_FEATURES
>> 1768 bool "MIPS32 Release 5 Features"
>> 1769 depends on SYS_HAS_CPU_MIPS32_R5
>> 1770 depends on CPU_MIPS32_R2
>> 1771 help
>> 1772 Choose this option to build a kernel for release 2 or later of the
>> 1773 MIPS32 architecture including features from release 5 such as
>> 1774 support for Extended Physical Addressing (XPA).
>> 1775
>> 1776 config CPU_MIPS32_R5_XPA
>> 1777 bool "Extended Physical Addressing (XPA)"
>> 1778 depends on CPU_MIPS32_R5_FEATURES
>> 1779 depends on !EVA
>> 1780 depends on !PAGE_SIZE_4KB
>> 1781 depends on SYS_SUPPORTS_HIGHMEM
>> 1782 select XPA
>> 1783 select HIGHMEM
>> 1784 select ARCH_PHYS_ADDR_T_64BIT
182 default n 1785 default n
183 help 1786 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1787 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1788 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1789 benefit is to increase physical addressing equal to or greater
>> 1790 than 40 bits. Note that this has the side effect of turning on
>> 1791 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1792 If unsure, say 'N' here.
186 1793
187 If there are other interrupts at or !! 1794 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1795 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1796 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1797
193 If unsure, say N. !! 1798 config CPU_JUMP_WORKAROUNDS
>> 1799 bool
194 1800
195 config PFAULT !! 1801 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1802 bool "Loongson 2F Workarounds"
197 default y 1803 default y
>> 1804 select CPU_NOP_WORKAROUNDS
>> 1805 select CPU_JUMP_WORKAROUNDS
198 help 1806 help
199 Handle protection faults. MMU config !! 1807 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1808 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1809 unexpectedly. For more information please refer to the gas
>> 1810 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1811
>> 1812 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1813 are needed. The workarounds have no significant side effect on them
>> 1814 but may decrease the performance of the system so this option should
>> 1815 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1816 systems.
202 1817
203 If unsure, say Y. !! 1818 If unsure, please say Y.
>> 1819 endif # CPU_LOONGSON2F
204 1820
205 config XTENSA_UNALIGNED_USER !! 1821 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1822 bool
207 help !! 1823 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1824 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1825 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1826 select HAVE_KERNEL_LZMA
>> 1827 select HAVE_KERNEL_LZO
>> 1828 select HAVE_KERNEL_XZ
211 1829
212 Say Y here to enable unaligned memor !! 1830 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1831 bool
>> 1832 select SYS_SUPPORTS_ZBOOT
213 1833
214 config XTENSA_LOAD_STORE !! 1834 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1835 bool
216 help !! 1836 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows !! 1837
218 instruction bus with l32r and l32i i !! 1838 config CPU_LOONGSON2
219 instructions raise an exception with !! 1839 bool
220 This makes it hard to use some confi !! 1840 select CPU_SUPPORTS_32BIT_KERNEL
221 literals in FLASH memory attached to !! 1841 select CPU_SUPPORTS_64BIT_KERNEL
>> 1842 select CPU_SUPPORTS_HIGHMEM
>> 1843 select CPU_SUPPORTS_HUGEPAGES
222 1844
223 Say Y here to enable exception handl !! 1845 config CPU_LOONGSON1
224 byte and 2-byte access to memory att !! 1846 bool
>> 1847 select CPU_MIPS32
>> 1848 select CPU_MIPSR2
>> 1849 select CPU_HAS_PREFETCH
>> 1850 select CPU_SUPPORTS_32BIT_KERNEL
>> 1851 select CPU_SUPPORTS_HIGHMEM
>> 1852 select CPU_SUPPORTS_CPUFREQ
225 1853
226 config HAVE_SMP !! 1854 config CPU_BMIPS32_3300
227 bool "System Supports SMP (MX)" !! 1855 select SMP_UP if SMP
228 depends on XTENSA_VARIANT_CUSTOM !! 1856 bool
229 select XTENSA_MX <<
230 help <<
231 This option is used to indicate that <<
232 supports Multiprocessing. Multiproce <<
233 the CPU core definition and currentl <<
234 1857
235 Multiprocessor support is implemente !! 1858 config CPU_BMIPS4350
236 interrupt controllers. !! 1859 bool
>> 1860 select SYS_SUPPORTS_SMP
>> 1861 select SYS_SUPPORTS_HOTPLUG_CPU
237 1862
238 The MX interrupt distributer adds In !! 1863 config CPU_BMIPS4380
239 and causes the IRQ numbers to be inc !! 1864 bool
240 like the open cores ethernet driver !! 1865 select MIPS_L1_CACHE_SHIFT_6
>> 1866 select SYS_SUPPORTS_SMP
>> 1867 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1868 select CPU_HAS_RIXI
241 1869
242 You still have to select "Enable SMP !! 1870 config CPU_BMIPS5000
>> 1871 bool
>> 1872 select MIPS_CPU_SCACHE
>> 1873 select MIPS_L1_CACHE_SHIFT_7
>> 1874 select SYS_SUPPORTS_SMP
>> 1875 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1876 select CPU_HAS_RIXI
243 1877
244 config SMP !! 1878 config SYS_HAS_CPU_LOONGSON3
245 bool "Enable Symmetric multi-processin !! 1879 bool
246 depends on HAVE_SMP !! 1880 select CPU_SUPPORTS_CPUFREQ
247 select GENERIC_SMP_IDLE_THREAD !! 1881 select CPU_HAS_RIXI
248 help <<
249 Enabled SMP Software; allows more th <<
250 to be activated during startup. <<
251 1882
252 config NR_CPUS !! 1883 config SYS_HAS_CPU_LOONGSON2E
253 depends on SMP !! 1884 bool
254 int "Maximum number of CPUs (2-32)" <<
255 range 2 32 <<
256 default "4" <<
257 1885
258 config HOTPLUG_CPU !! 1886 config SYS_HAS_CPU_LOONGSON2F
259 bool "Enable CPU hotplug support" !! 1887 bool
260 depends on SMP !! 1888 select CPU_SUPPORTS_CPUFREQ
261 help !! 1889 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
262 Say Y here to allow turning CPUs off !! 1890 select CPU_SUPPORTS_UNCACHED_ACCELERATED
263 controlled through /sys/devices/syst <<
264 1891
265 Say N if you want to disable CPU hot !! 1892 config SYS_HAS_CPU_LOONGSON1B
>> 1893 bool
>> 1894
>> 1895 config SYS_HAS_CPU_LOONGSON1C
>> 1896 bool
>> 1897
>> 1898 config SYS_HAS_CPU_MIPS32_R1
>> 1899 bool
>> 1900
>> 1901 config SYS_HAS_CPU_MIPS32_R2
>> 1902 bool
>> 1903
>> 1904 config SYS_HAS_CPU_MIPS32_R3_5
>> 1905 bool
>> 1906
>> 1907 config SYS_HAS_CPU_MIPS32_R5
>> 1908 bool
>> 1909
>> 1910 config SYS_HAS_CPU_MIPS32_R6
>> 1911 bool
>> 1912
>> 1913 config SYS_HAS_CPU_MIPS64_R1
>> 1914 bool
>> 1915
>> 1916 config SYS_HAS_CPU_MIPS64_R2
>> 1917 bool
>> 1918
>> 1919 config SYS_HAS_CPU_MIPS64_R6
>> 1920 bool
>> 1921
>> 1922 config SYS_HAS_CPU_R3000
>> 1923 bool
>> 1924
>> 1925 config SYS_HAS_CPU_TX39XX
>> 1926 bool
>> 1927
>> 1928 config SYS_HAS_CPU_VR41XX
>> 1929 bool
>> 1930
>> 1931 config SYS_HAS_CPU_R4300
>> 1932 bool
>> 1933
>> 1934 config SYS_HAS_CPU_R4X00
>> 1935 bool
>> 1936
>> 1937 config SYS_HAS_CPU_TX49XX
>> 1938 bool
>> 1939
>> 1940 config SYS_HAS_CPU_R5000
>> 1941 bool
>> 1942
>> 1943 config SYS_HAS_CPU_R5432
>> 1944 bool
>> 1945
>> 1946 config SYS_HAS_CPU_R5500
>> 1947 bool
>> 1948
>> 1949 config SYS_HAS_CPU_R6000
>> 1950 bool
>> 1951
>> 1952 config SYS_HAS_CPU_NEVADA
>> 1953 bool
>> 1954
>> 1955 config SYS_HAS_CPU_R8000
>> 1956 bool
>> 1957
>> 1958 config SYS_HAS_CPU_R10000
>> 1959 bool
>> 1960
>> 1961 config SYS_HAS_CPU_RM7000
>> 1962 bool
>> 1963
>> 1964 config SYS_HAS_CPU_SB1
>> 1965 bool
>> 1966
>> 1967 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 1968 bool
>> 1969
>> 1970 config SYS_HAS_CPU_BMIPS
>> 1971 bool
>> 1972
>> 1973 config SYS_HAS_CPU_BMIPS32_3300
>> 1974 bool
>> 1975 select SYS_HAS_CPU_BMIPS
>> 1976
>> 1977 config SYS_HAS_CPU_BMIPS4350
>> 1978 bool
>> 1979 select SYS_HAS_CPU_BMIPS
>> 1980
>> 1981 config SYS_HAS_CPU_BMIPS4380
>> 1982 bool
>> 1983 select SYS_HAS_CPU_BMIPS
266 1984
267 config SECONDARY_RESET_VECTOR !! 1985 config SYS_HAS_CPU_BMIPS5000
268 bool "Secondary cores use alternative !! 1986 bool
>> 1987 select SYS_HAS_CPU_BMIPS
>> 1988
>> 1989 config SYS_HAS_CPU_XLR
>> 1990 bool
>> 1991
>> 1992 config SYS_HAS_CPU_XLP
>> 1993 bool
>> 1994
>> 1995 config MIPS_MALTA_PM
>> 1996 depends on MIPS_MALTA
>> 1997 depends on PCI
>> 1998 bool
269 default y 1999 default y
270 depends on HAVE_SMP <<
271 help <<
272 Secondary cores may be configured to <<
273 or all cores may use primary reset v <<
274 Say Y here to supply handler for the <<
275 2000
276 config FAST_SYSCALL_XTENSA !! 2001 #
277 bool "Enable fast atomic syscalls" !! 2002 # CPU may reorder R->R, R->W, W->R, W->W
278 default n !! 2003 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
279 help !! 2004 #
280 fast_syscall_xtensa is a syscall tha !! 2005 config WEAK_ORDERING
281 on UP kernel when processor has no s !! 2006 bool
282 2007
283 This syscall is deprecated. It may h !! 2008 #
284 invalid arguments. It is provided on !! 2009 # CPU may reorder reads and writes beyond LL/SC
285 Only enable it if your userspace sof !! 2010 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2011 #
>> 2012 config WEAK_REORDERING_BEYOND_LLSC
>> 2013 bool
>> 2014 endmenu
286 2015
287 If unsure, say N. !! 2016 #
>> 2017 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2018 #
>> 2019 config CPU_MIPS32
>> 2020 bool
>> 2021 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
288 2022
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2023 config CPU_MIPS64
290 bool "Enable spill registers syscall" !! 2024 bool
291 default n !! 2025 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2026
>> 2027 #
>> 2028 # These two indicate the revision of the architecture, either Release 1 or Release 2
>> 2029 #
>> 2030 config CPU_MIPSR1
>> 2031 bool
>> 2032 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2033
>> 2034 config CPU_MIPSR2
>> 2035 bool
>> 2036 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2037 select CPU_HAS_RIXI
>> 2038 select MIPS_SPRAM
>> 2039
>> 2040 config CPU_MIPSR6
>> 2041 bool
>> 2042 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2043 select CPU_HAS_RIXI
>> 2044 select HAVE_ARCH_BITREVERSE
>> 2045 select MIPS_ASID_BITS_VARIABLE
>> 2046 select MIPS_SPRAM
>> 2047
>> 2048 config EVA
>> 2049 bool
>> 2050
>> 2051 config XPA
>> 2052 bool
>> 2053
>> 2054 config SYS_SUPPORTS_32BIT_KERNEL
>> 2055 bool
>> 2056 config SYS_SUPPORTS_64BIT_KERNEL
>> 2057 bool
>> 2058 config CPU_SUPPORTS_32BIT_KERNEL
>> 2059 bool
>> 2060 config CPU_SUPPORTS_64BIT_KERNEL
>> 2061 bool
>> 2062 config CPU_SUPPORTS_CPUFREQ
>> 2063 bool
>> 2064 config CPU_SUPPORTS_ADDRWINCFG
>> 2065 bool
>> 2066 config CPU_SUPPORTS_HUGEPAGES
>> 2067 bool
>> 2068 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2069 bool
>> 2070 config MIPS_PGD_C0_CONTEXT
>> 2071 bool
>> 2072 default y if 64BIT && CPU_MIPSR2 && !CPU_XLP
>> 2073
>> 2074 #
>> 2075 # Set to y for ptrace access to watch registers.
>> 2076 #
>> 2077 config HARDWARE_WATCHPOINTS
>> 2078 bool
>> 2079 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2080
>> 2081 menu "Kernel type"
>> 2082
>> 2083 choice
>> 2084 prompt "Kernel code model"
292 help 2085 help
293 fast_syscall_spill_registers is a sy !! 2086 You should only select this option if you have a workload that
294 register windows of a calling usersp !! 2087 actually benefits from 64-bit processing or if your machine has
>> 2088 large memory. You will only be presented a single option in this
>> 2089 menu if your system does not support both 32-bit and 64-bit kernels.
295 2090
296 This syscall is deprecated. It may h !! 2091 config 32BIT
297 invalid arguments. It is provided on !! 2092 bool "32-bit kernel"
298 Only enable it if your userspace sof !! 2093 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2094 select TRAD_SIGNALS
>> 2095 help
>> 2096 Select this option if you want to build a 32-bit kernel.
>> 2097
>> 2098 config 64BIT
>> 2099 bool "64-bit kernel"
>> 2100 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2101 help
>> 2102 Select this option if you want to build a 64-bit kernel.
>> 2103
>> 2104 endchoice
299 2105
>> 2106 config KVM_GUEST
>> 2107 bool "KVM Guest Kernel"
>> 2108 depends on BROKEN_ON_SMP
>> 2109 help
>> 2110 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2111 mode.
>> 2112
>> 2113 config KVM_GUEST_TIMER_FREQ
>> 2114 int "Count/Compare Timer Frequency (MHz)"
>> 2115 depends on KVM_GUEST
>> 2116 default 100
>> 2117 help
>> 2118 Set this to non-zero if building a guest kernel for KVM to skip RTC
>> 2119 emulation when determining guest CPU Frequency. Instead, the guest's
>> 2120 timer frequency is specified directly.
>> 2121
>> 2122 config MIPS_VA_BITS_48
>> 2123 bool "48 bits virtual memory"
>> 2124 depends on 64BIT
>> 2125 help
>> 2126 Support a maximum at least 48 bits of application virtual memory.
>> 2127 Default is 40 bits or less, depending on the CPU.
>> 2128 This option result in a small memory overhead for page tables.
>> 2129 This option is only supported with 16k and 64k page sizes.
300 If unsure, say N. 2130 If unsure, say N.
301 2131
302 choice 2132 choice
303 prompt "Kernel ABI" !! 2133 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2134 default PAGE_SIZE_4KB
305 help !! 2135
306 Select ABI for the kernel code. This !! 2136 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2137 bool "4kB"
308 kernel/userspace ABI is possible and !! 2138 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2139 depends on !MIPS_VA_BITS_48
310 In case both kernel and userspace su !! 2140 help
311 all register windows support code wi !! 2141 This option select the standard 4kB Linux page size. On some
312 build. !! 2142 R3000-family processors this is the only available page size. Using
313 !! 2143 4kB page size will minimize memory consumption and is therefore
314 If unsure, choose the default ABI. !! 2144 recommended for low memory systems.
315 !! 2145
316 config KERNEL_ABI_DEFAULT !! 2146 config PAGE_SIZE_8KB
317 bool "Default ABI" !! 2147 bool "8kB"
318 help !! 2148 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
319 Select this option to compile kernel !! 2149 depends on !MIPS_VA_BITS_48
320 selected for the toolchain. !! 2150 help
321 Normally cores with windowed registe !! 2151 Using 8kB page size will result in higher performance kernel at
322 cores without it use call0 ABI. !! 2152 the price of higher memory consumption. This option is available
323 !! 2153 only on R8000 and cnMIPS processors. Note that you will need a
324 config KERNEL_ABI_CALL0 !! 2154 suitable Linux distribution to support this.
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2155
326 help !! 2156 config PAGE_SIZE_16KB
327 Select this option to compile kernel !! 2157 bool "16kB"
328 toolchain that defaults to windowed !! 2158 depends on !CPU_R3000 && !CPU_TX39XX
329 When this option is not selected the !! 2159 help
330 be used for the kernel code. !! 2160 Using 16kB page size will result in higher performance kernel at
>> 2161 the price of higher memory consumption. This option is available on
>> 2162 all non-R3000 family processors. Note that you will need a suitable
>> 2163 Linux distribution to support this.
>> 2164
>> 2165 config PAGE_SIZE_32KB
>> 2166 bool "32kB"
>> 2167 depends on CPU_CAVIUM_OCTEON
>> 2168 depends on !MIPS_VA_BITS_48
>> 2169 help
>> 2170 Using 32kB page size will result in higher performance kernel at
>> 2171 the price of higher memory consumption. This option is available
>> 2172 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2173 distribution to support this.
>> 2174
>> 2175 config PAGE_SIZE_64KB
>> 2176 bool "64kB"
>> 2177 depends on !CPU_R3000 && !CPU_TX39XX && !CPU_R6000
>> 2178 help
>> 2179 Using 64kB page size will result in higher performance kernel at
>> 2180 the price of higher memory consumption. This option is available on
>> 2181 all non-R3000 family processor. Not that at the time of this
>> 2182 writing this option is still high experimental.
331 2183
332 endchoice 2184 endchoice
333 2185
334 config USER_ABI_CALL0 !! 2186 config FORCE_MAX_ZONEORDER
>> 2187 int "Maximum zone order"
>> 2188 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2189 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2190 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2191 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2192 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2193 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2194 range 11 64
>> 2195 default "11"
>> 2196 help
>> 2197 The kernel memory allocator divides physically contiguous memory
>> 2198 blocks into "zones", where each zone is a power of two number of
>> 2199 pages. This option selects the largest power of two that the kernel
>> 2200 keeps in the memory allocator. If you need to allocate very large
>> 2201 blocks of physically contiguous memory, then you may need to
>> 2202 increase this value.
>> 2203
>> 2204 This config option is actually maximum order plus one. For example,
>> 2205 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2206
>> 2207 The page size is not necessarily 4KB. Keep this in mind
>> 2208 when choosing a value for this option.
>> 2209
>> 2210 config BOARD_SCACHE
335 bool 2211 bool
336 2212
337 choice !! 2213 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2214 bool
339 default USER_ABI_DEFAULT !! 2215 select BOARD_SCACHE
340 help <<
341 Select supported userspace ABI. <<
342 2216
343 If unsure, choose the default ABI. !! 2217 #
>> 2218 # Support for a MIPS32 / MIPS64 style S-caches
>> 2219 #
>> 2220 config MIPS_CPU_SCACHE
>> 2221 bool
>> 2222 select BOARD_SCACHE
>> 2223
>> 2224 config R5000_CPU_SCACHE
>> 2225 bool
>> 2226 select BOARD_SCACHE
>> 2227
>> 2228 config RM7000_CPU_SCACHE
>> 2229 bool
>> 2230 select BOARD_SCACHE
344 2231
345 config USER_ABI_DEFAULT !! 2232 config SIBYTE_DMA_PAGEOPS
346 bool "Default ABI only" !! 2233 bool "Use DMA to clear/copy pages"
>> 2234 depends on CPU_SB1
347 help 2235 help
348 Assume default userspace ABI. For XE !! 2236 Instead of using the CPU to zero and copy pages, use a Data Mover
349 call0 ABI binaries may be run on suc !! 2237 channel. These DMA channels are otherwise unused by the standard
350 will not work correctly for them. !! 2238 SiByte Linux port. Seems to give a small performance benefit.
351 2239
352 config USER_ABI_CALL0_ONLY !! 2240 config CPU_HAS_PREFETCH
353 bool "Call0 ABI only" !! 2241 bool
354 select USER_ABI_CALL0 !! 2242
>> 2243 config CPU_GENERIC_DUMP_TLB
>> 2244 bool
>> 2245 default y if !(CPU_R3000 || CPU_R6000 || CPU_R8000 || CPU_TX39XX)
>> 2246
>> 2247 config CPU_R4K_FPU
>> 2248 bool
>> 2249 default y if !(CPU_R3000 || CPU_R6000 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2250
>> 2251 config CPU_R4K_CACHE_TLB
>> 2252 bool
>> 2253 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2254
>> 2255 config MIPS_MT_SMP
>> 2256 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2257 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6
>> 2258 select CPU_MIPSR2_IRQ_VI
>> 2259 select CPU_MIPSR2_IRQ_EI
>> 2260 select SYNC_R4K
>> 2261 select MIPS_MT
>> 2262 select SMP
>> 2263 select SMP_UP
>> 2264 select SYS_SUPPORTS_SMP
>> 2265 select SYS_SUPPORTS_SCHED_SMT
>> 2266 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2267 help
>> 2268 This is a kernel model which is known as SMVP. This is supported
>> 2269 on cores with the MT ASE and uses the available VPEs to implement
>> 2270 virtual processors which supports SMP. This is equivalent to the
>> 2271 Intel Hyperthreading feature. For further information go to
>> 2272 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2273
>> 2274 config MIPS_MT
>> 2275 bool
>> 2276
>> 2277 config SCHED_SMT
>> 2278 bool "SMT (multithreading) scheduler support"
>> 2279 depends on SYS_SUPPORTS_SCHED_SMT
>> 2280 default n
355 help 2281 help
356 Select this option to support only c !! 2282 SMT scheduler support improves the CPU scheduler's decision making
357 Windowed ABI binaries will crash wit !! 2283 when dealing with MIPS MT enabled cores at a cost of slightly
358 an illegal instruction exception on !! 2284 increased overhead in some places. If unsure say N here.
>> 2285
>> 2286 config SYS_SUPPORTS_SCHED_SMT
>> 2287 bool
>> 2288
>> 2289 config SYS_SUPPORTS_MULTITHREADING
>> 2290 bool
359 2291
360 Choose this option if you're plannin !! 2292 config MIPS_MT_FPAFF
361 built with call0 ABI. !! 2293 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2294 default y
>> 2295 depends on MIPS_MT_SMP
362 2296
363 config USER_ABI_CALL0_PROBE !! 2297 config MIPSR2_TO_R6_EMULATOR
364 bool "Support both windowed and call0 !! 2298 bool "MIPS R2-to-R6 emulator"
365 select USER_ABI_CALL0 !! 2299 depends on CPU_MIPSR6 && !SMP
>> 2300 default y
366 help 2301 help
367 Select this option to support both w !! 2302 Choose this option if you want to run non-R6 MIPS userland code.
368 ABIs. When enabled all processes are !! 2303 Even if you say 'Y' here, the emulator will still be disabled by
369 and a fast user exception handler fo !! 2304 default. You can enable it using the 'mipsr2emu' kernel option.
370 used to turn on PS.WOE bit on the fi !! 2305 The only reason this is a build-time option is to save ~14K from the
371 the userspace. !! 2306 final kernel image.
>> 2307 comment "MIPS R2-to-R6 emulator is only available for UP kernels"
>> 2308 depends on SMP && CPU_MIPSR6
>> 2309
>> 2310 config MIPS_VPE_LOADER
>> 2311 bool "VPE loader support."
>> 2312 depends on SYS_SUPPORTS_MULTITHREADING && MODULES
>> 2313 select CPU_MIPSR2_IRQ_VI
>> 2314 select CPU_MIPSR2_IRQ_EI
>> 2315 select MIPS_MT
>> 2316 help
>> 2317 Includes a loader for loading an elf relocatable object
>> 2318 onto another VPE and running it.
372 2319
373 This option should be enabled for th !! 2320 config MIPS_VPE_LOADER_CMP
374 both call0 and windowed ABIs in user !! 2321 bool
>> 2322 default "y"
>> 2323 depends on MIPS_VPE_LOADER && MIPS_CMP
375 2324
376 Note that Xtensa ISA does not guaran !! 2325 config MIPS_VPE_LOADER_MT
377 raise an illegal instruction excepti !! 2326 bool
378 PS.WOE is disabled, check whether th !! 2327 default "y"
>> 2328 depends on MIPS_VPE_LOADER && !MIPS_CMP
379 2329
380 endchoice !! 2330 config MIPS_VPE_LOADER_TOM
>> 2331 bool "Load VPE program into memory hidden from linux"
>> 2332 depends on MIPS_VPE_LOADER
>> 2333 default y
>> 2334 help
>> 2335 The loader can use memory that is present but has been hidden from
>> 2336 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2337 you to ensure the amount you put in the option and the space your
>> 2338 program requires is less or equal to the amount physically present.
381 2339
382 endmenu !! 2340 config MIPS_VPE_APSP_API
>> 2341 bool "Enable support for AP/SP API (RTLX)"
>> 2342 depends on MIPS_VPE_LOADER
>> 2343 help
383 2344
384 config XTENSA_CALIBRATE_CCOUNT !! 2345 config MIPS_VPE_APSP_API_CMP
385 def_bool n !! 2346 bool
>> 2347 default "y"
>> 2348 depends on MIPS_VPE_APSP_API && MIPS_CMP
>> 2349
>> 2350 config MIPS_VPE_APSP_API_MT
>> 2351 bool
>> 2352 default "y"
>> 2353 depends on MIPS_VPE_APSP_API && !MIPS_CMP
>> 2354
>> 2355 config MIPS_CMP
>> 2356 bool "MIPS CMP framework support (DEPRECATED)"
>> 2357 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
>> 2358 select SMP
>> 2359 select SYNC_R4K
>> 2360 select SYS_SUPPORTS_SMP
>> 2361 select WEAK_ORDERING
>> 2362 default n
386 help 2363 help
387 On some platforms (XT2000, for examp !! 2364 Select this if you are using a bootloader which implements the "CMP
388 vary. The frequency can be determin !! 2365 framework" protocol (ie. YAMON) and want your kernel to make use of
389 against a well known, fixed frequenc !! 2366 its ability to start secondary CPUs.
>> 2367
>> 2368 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2369 instead of this.
>> 2370
>> 2371 config MIPS_CPS
>> 2372 bool "MIPS Coherent Processing System support"
>> 2373 depends on SYS_SUPPORTS_MIPS_CPS
>> 2374 select MIPS_CM
>> 2375 select MIPS_CPC
>> 2376 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2377 select SMP
>> 2378 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2379 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2380 select SYS_SUPPORTS_SMP
>> 2381 select WEAK_ORDERING
>> 2382 help
>> 2383 Select this if you wish to run an SMP kernel across multiple cores
>> 2384 within a MIPS Coherent Processing System. When this option is
>> 2385 enabled the kernel will probe for other cores and boot them with
>> 2386 no external assistance. It is safe to enable this when hardware
>> 2387 support is unavailable.
>> 2388
>> 2389 config MIPS_CPS_PM
>> 2390 depends on MIPS_CPS
>> 2391 select MIPS_CPC
>> 2392 bool
390 2393
391 config SERIAL_CONSOLE !! 2394 config MIPS_CM
392 def_bool n !! 2395 bool
393 2396
394 config PLATFORM_HAVE_XIP !! 2397 config MIPS_CPC
395 def_bool n !! 2398 bool
>> 2399
>> 2400 config SB1_PASS_2_WORKAROUNDS
>> 2401 bool
>> 2402 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2403 default y
>> 2404
>> 2405 config SB1_PASS_2_1_WORKAROUNDS
>> 2406 bool
>> 2407 depends on CPU_SB1 && CPU_SB1_PASS_2
>> 2408 default y
396 2409
397 menu "Platform options" !! 2410
>> 2411 config ARCH_PHYS_ADDR_T_64BIT
>> 2412 bool
398 2413
399 choice 2414 choice
400 prompt "Xtensa System Type" !! 2415 prompt "SmartMIPS or microMIPS ASE support"
401 default XTENSA_PLATFORM_ISS !! 2416
>> 2417 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
>> 2418 bool "None"
>> 2419 help
>> 2420 Select this if you want neither microMIPS nor SmartMIPS support
402 2421
403 config XTENSA_PLATFORM_ISS !! 2422 config CPU_HAS_SMARTMIPS
404 bool "ISS" !! 2423 depends on SYS_SUPPORTS_SMARTMIPS
405 select XTENSA_CALIBRATE_CCOUNT !! 2424 bool "SmartMIPS"
406 select SERIAL_CONSOLE !! 2425 help
407 help !! 2426 SmartMIPS is a extension of the MIPS32 architecture aimed at
408 ISS is an acronym for Tensilica's In !! 2427 increased security at both hardware and software level for
409 !! 2428 smartcards. Enabling this option will allow proper use of the
410 config XTENSA_PLATFORM_XT2000 !! 2429 SmartMIPS instructions by Linux applications. However a kernel with
411 bool "XT2000" !! 2430 this option will not work on a MIPS core without SmartMIPS core. If
412 help !! 2431 you don't know you probably don't have SmartMIPS and should say N
413 XT2000 is the name of Tensilica's fe !! 2432 here.
414 This hardware is capable of running !! 2433
415 !! 2434 config CPU_MICROMIPS
416 config XTENSA_PLATFORM_XTFPGA !! 2435 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
417 bool "XTFPGA" !! 2436 bool "microMIPS"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2437 help
424 XTFPGA is the name of Tensilica boar !! 2438 When this option is enabled the kernel will be built using the
425 This hardware is capable of running !! 2439 microMIPS ISA
426 2440
427 endchoice 2441 endchoice
428 2442
429 config PLATFORM_NR_IRQS !! 2443 config CPU_HAS_MSA
>> 2444 bool "Support for the MIPS SIMD Architecture"
>> 2445 depends on CPU_SUPPORTS_MSA
>> 2446 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2447 help
>> 2448 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2449 and a set of SIMD instructions to operate on them. When this option
>> 2450 is enabled the kernel will support allocating & switching MSA
>> 2451 vector register contexts. If you know that your kernel will only be
>> 2452 running on CPUs which do not support MSA or that your userland will
>> 2453 not be making use of it then you may wish to say N here to reduce
>> 2454 the size & complexity of your kernel.
>> 2455
>> 2456 If unsure, say Y.
>> 2457
>> 2458 config CPU_HAS_WB
>> 2459 bool
>> 2460
>> 2461 config XKS01
>> 2462 bool
>> 2463
>> 2464 config CPU_HAS_RIXI
>> 2465 bool
>> 2466
>> 2467 #
>> 2468 # Vectored interrupt mode is an R2 feature
>> 2469 #
>> 2470 config CPU_MIPSR2_IRQ_VI
>> 2471 bool
>> 2472
>> 2473 #
>> 2474 # Extended interrupt mode is an R2 feature
>> 2475 #
>> 2476 config CPU_MIPSR2_IRQ_EI
>> 2477 bool
>> 2478
>> 2479 config CPU_HAS_SYNC
>> 2480 bool
>> 2481 depends on !CPU_R3000
>> 2482 default y
>> 2483
>> 2484 #
>> 2485 # CPU non-features
>> 2486 #
>> 2487 config CPU_DADDI_WORKAROUNDS
>> 2488 bool
>> 2489
>> 2490 config CPU_R4000_WORKAROUNDS
>> 2491 bool
>> 2492 select CPU_R4400_WORKAROUNDS
>> 2493
>> 2494 config CPU_R4400_WORKAROUNDS
>> 2495 bool
>> 2496
>> 2497 config MIPS_ASID_SHIFT
430 int 2498 int
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2499 default 6 if CPU_R3000 || CPU_TX39XX
>> 2500 default 4 if CPU_R8000
432 default 0 2501 default 0
433 2502
434 config XTENSA_CPU_CLOCK !! 2503 config MIPS_ASID_BITS
435 int "CPU clock rate [MHz]" !! 2504 int
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2505 default 0 if MIPS_ASID_BITS_VARIABLE
437 default 16 !! 2506 default 6 if CPU_R3000 || CPU_TX39XX
>> 2507 default 8
438 2508
439 config GENERIC_CALIBRATE_DELAY !! 2509 config MIPS_ASID_BITS_VARIABLE
440 bool "Auto calibration of the BogoMIPS !! 2510 bool
>> 2511
>> 2512 #
>> 2513 # - Highmem only makes sense for the 32-bit kernel.
>> 2514 # - The current highmem code will only work properly on physically indexed
>> 2515 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2516 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2517 # moment we protect the user and offer the highmem option only on machines
>> 2518 # where it's known to be safe. This will not offer highmem on a few systems
>> 2519 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2520 # indexed CPUs but we're playing safe.
>> 2521 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2522 # know they might have memory configurations that could make use of highmem
>> 2523 # support.
>> 2524 #
>> 2525 config HIGHMEM
>> 2526 bool "High Memory Support"
>> 2527 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2528
>> 2529 config CPU_SUPPORTS_HIGHMEM
>> 2530 bool
>> 2531
>> 2532 config SYS_SUPPORTS_HIGHMEM
>> 2533 bool
>> 2534
>> 2535 config SYS_SUPPORTS_SMARTMIPS
>> 2536 bool
>> 2537
>> 2538 config SYS_SUPPORTS_MICROMIPS
>> 2539 bool
>> 2540
>> 2541 config SYS_SUPPORTS_MIPS16
>> 2542 bool
441 help 2543 help
442 The BogoMIPS value can easily be der !! 2544 This option must be set if a kernel might be executed on a MIPS16-
>> 2545 enabled CPU even if MIPS16 is not actually being used. In other
>> 2546 words, it makes the kernel MIPS16-tolerant.
443 2547
444 config CMDLINE_BOOL !! 2548 config CPU_SUPPORTS_MSA
445 bool "Default bootloader kernel argume !! 2549 bool
446 2550
447 config CMDLINE !! 2551 config ARCH_FLATMEM_ENABLE
448 string "Initial kernel command string" !! 2552 def_bool y
449 depends on CMDLINE_BOOL !! 2553 depends on !NUMA && !CPU_LOONGSON2
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2554
458 config USE_OF !! 2555 config ARCH_DISCONTIGMEM_ENABLE
459 bool "Flattened Device Tree support" !! 2556 bool
460 select OF !! 2557 default y if SGI_IP27
461 select OF_EARLY_FLATTREE <<
462 help 2558 help
463 Include support for flattened device !! 2559 Say Y to support efficient handling of discontiguous physical memory,
>> 2560 for architectures which are either NUMA (Non-Uniform Memory Access)
>> 2561 or have huge holes in the physical address space for other reasons.
>> 2562 See <file:Documentation/vm/numa> for more.
464 2563
465 config BUILTIN_DTB_SOURCE !! 2564 config ARCH_SPARSEMEM_ENABLE
466 string "DTB to build into the kernel i !! 2565 bool
467 depends on OF !! 2566 select SPARSEMEM_STATIC
>> 2567
>> 2568 config NUMA
>> 2569 bool "NUMA Support"
>> 2570 depends on SYS_SUPPORTS_NUMA
>> 2571 help
>> 2572 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
>> 2573 Access). This option improves performance on systems with more
>> 2574 than two nodes; on two node systems it is generally better to
>> 2575 leave it disabled; on single node systems disable this option
>> 2576 disabled.
>> 2577
>> 2578 config SYS_SUPPORTS_NUMA
>> 2579 bool
>> 2580
>> 2581 config RELOCATABLE
>> 2582 bool "Relocatable kernel"
>> 2583 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6)
>> 2584 help
>> 2585 This builds a kernel image that retains relocation information
>> 2586 so it can be loaded someplace besides the default 1MB.
>> 2587 The relocations make the kernel binary about 15% larger,
>> 2588 but are discarded at runtime
>> 2589
>> 2590 config RELOCATION_TABLE_SIZE
>> 2591 hex "Relocation table size"
>> 2592 depends on RELOCATABLE
>> 2593 range 0x0 0x01000000
>> 2594 default "0x00100000"
>> 2595 ---help---
>> 2596 A table of relocation data will be appended to the kernel binary
>> 2597 and parsed at boot to fix up the relocated kernel.
>> 2598
>> 2599 This option allows the amount of space reserved for the table to be
>> 2600 adjusted, although the default of 1Mb should be ok in most cases.
>> 2601
>> 2602 The build will fail and a valid size suggested if this is too small.
>> 2603
>> 2604 If unsure, leave at the default value.
>> 2605
>> 2606 config RANDOMIZE_BASE
>> 2607 bool "Randomize the address of the kernel image"
>> 2608 depends on RELOCATABLE
>> 2609 ---help---
>> 2610 Randomizes the physical and virtual address at which the
>> 2611 kernel image is loaded, as a security feature that
>> 2612 deters exploit attempts relying on knowledge of the location
>> 2613 of kernel internals.
>> 2614
>> 2615 Entropy is generated using any coprocessor 0 registers available.
>> 2616
>> 2617 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2618
>> 2619 If unsure, say N.
>> 2620
>> 2621 config RANDOMIZE_BASE_MAX_OFFSET
>> 2622 hex "Maximum kASLR offset" if EXPERT
>> 2623 depends on RANDOMIZE_BASE
>> 2624 range 0x0 0x40000000 if EVA || 64BIT
>> 2625 range 0x0 0x08000000
>> 2626 default "0x01000000"
>> 2627 ---help---
>> 2628 When kASLR is active, this provides the maximum offset that will
>> 2629 be applied to the kernel image. It should be set according to the
>> 2630 amount of physical RAM available in the target system minus
>> 2631 PHYSICAL_START and must be a power of 2.
468 2632
469 config PARSE_BOOTPARAM !! 2633 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
470 bool "Parse bootparam block" !! 2634 EVA or 64-bit. The default is 16Mb.
>> 2635
>> 2636 config NODES_SHIFT
>> 2637 int
>> 2638 default "6"
>> 2639 depends on NEED_MULTIPLE_NODES
>> 2640
>> 2641 config HW_PERF_EVENTS
>> 2642 bool "Enable hardware performance counter support for perf events"
>> 2643 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
471 default y 2644 default y
472 help 2645 help
473 Parse parameters passed to the kerne !! 2646 Enable hardware performance counter support for perf events. If
474 be disabled if the kernel is known t !! 2647 disabled, perf events will use software events only.
475 2648
476 If unsure, say Y. !! 2649 source "mm/Kconfig"
477 2650
478 choice !! 2651 config SMP
479 prompt "Semihosting interface" !! 2652 bool "Multi-Processing support"
480 default XTENSA_SIMCALL_ISS !! 2653 depends on SYS_SUPPORTS_SMP
481 depends on XTENSA_PLATFORM_ISS <<
482 help 2654 help
483 Choose semihosting interface that wi !! 2655 This enables support for systems with more than one CPU. If you have
484 block device and networking. !! 2656 a system with only one CPU, say N. If you have a system with more
>> 2657 than one CPU, say Y.
>> 2658
>> 2659 If you say N here, the kernel will run on uni- and multiprocessor
>> 2660 machines, but will use only one CPU of a multiprocessor machine. If
>> 2661 you say Y here, the kernel will run on many, but not all,
>> 2662 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2663 will run faster if you say N here.
485 2664
486 config XTENSA_SIMCALL_ISS !! 2665 People using multiprocessor machines who say Y here should also say
487 bool "simcall" !! 2666 Y to "Enhanced Real Time Clock Support", below.
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 2667
492 config XTENSA_SIMCALL_GDBIO !! 2668 See also the SMP-HOWTO available at
493 bool "GDBIO" !! 2669 <http://www.tldp.org/docs.html#howto>.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 2670
498 endchoice !! 2671 If you don't know what to do here, say N.
499 2672
500 config BLK_DEV_SIMDISK !! 2673 config HOTPLUG_CPU
501 tristate "Host file-based simulated bl !! 2674 bool "Support for hot-pluggable CPUs"
502 default n !! 2675 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2676 help
541 There's a 2x16 LCD on most of XTFPGA !! 2677 Say Y here to allow turning CPUs off and on. CPUs can be
542 progress messages there during bootu !! 2678 controlled through /sys/devices/system/cpu.
543 during board bringup. !! 2679 (Note: power management support will enable this option
>> 2680 automatically on SMP systems. )
>> 2681 Say N if you want to disable CPU hotplug.
544 2682
545 If unsure, say N. !! 2683 config SMP_UP
>> 2684 bool
546 2685
547 config XTFPGA_LCD_BASE_ADDR !! 2686 config SYS_SUPPORTS_MIPS_CMP
548 hex "XTFPGA LCD base address" !! 2687 bool
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2688
617 If unsure, say N. !! 2689 config SYS_SUPPORTS_MIPS_CPS
>> 2690 bool
618 2691
619 config MEMMAP_CACHEATTR !! 2692 config SYS_SUPPORTS_SMP
620 hex "Cache attributes for the memory a !! 2693 bool
621 depends on !MMU !! 2694
622 default 0x22222222 !! 2695 config NR_CPUS_DEFAULT_4
623 help !! 2696 bool
624 These cache attributes are set up fo !! 2697
625 specifies cache attributes for the c !! 2698 config NR_CPUS_DEFAULT_8
626 region: bits 0..3 -- for addresses 0 !! 2699 bool
627 bits 4..7 -- for addresses 0x2000000 !! 2700
628 !! 2701 config NR_CPUS_DEFAULT_16
629 Cache attribute values are specific !! 2702 bool
630 For region protection MMUs: !! 2703
631 1: WT cached, !! 2704 config NR_CPUS_DEFAULT_32
632 2: cache bypass, !! 2705 bool
633 4: WB cached, !! 2706
634 f: illegal. !! 2707 config NR_CPUS_DEFAULT_64
635 For full MMU: !! 2708 bool
636 bit 0: executable, !! 2709
637 bit 1: writable, !! 2710 config NR_CPUS
638 bits 2..3: !! 2711 int "Maximum number of CPUs (2-256)"
639 0: cache bypass, !! 2712 range 2 256
640 1: WB cache, !! 2713 depends on SMP
641 2: WT cache, !! 2714 default "4" if NR_CPUS_DEFAULT_4
642 3: special (c and e are illegal, !! 2715 default "8" if NR_CPUS_DEFAULT_8
643 For MPU: !! 2716 default "16" if NR_CPUS_DEFAULT_16
644 0: illegal, !! 2717 default "32" if NR_CPUS_DEFAULT_32
645 1: WB cache, !! 2718 default "64" if NR_CPUS_DEFAULT_64
646 2: WB, no-write-allocate cache, !! 2719 help
647 3: WT cache, !! 2720 This allows you to specify the maximum number of CPUs which this
648 4: cache bypass. !! 2721 kernel will support. The maximum supported value is 32 for 32-bit
649 !! 2722 kernel and 64 for 64-bit kernels; the minimum value which makes
650 config KSEG_PADDR !! 2723 sense is 1 for Qemu (useful only for kernel debugging purposes)
651 hex "Physical address of the KSEG mapp !! 2724 and 2 for all others.
652 depends on INITIALIZE_XTENSA_MMU_INSID !! 2725
653 default 0x00000000 !! 2726 This is purely to save memory - each supported CPU adds
654 help !! 2727 approximately eight kilobytes to the kernel image. For best
655 This is the physical address where K !! 2728 performance should round up your number of processors to the next
656 the chosen KSEG layout help for the !! 2729 power of two.
657 Unpacked kernel image (including vec !! 2730
658 within KSEG. !! 2731 config MIPS_PERF_SHARED_TC_COUNTERS
659 Physical memory below this address i !! 2732 bool
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2733
683 If unsure, leave the default value h !! 2734 #
>> 2735 # Timer Interrupt Frequency Configuration
>> 2736 #
684 2737
685 choice 2738 choice
686 prompt "Relocatable vectors location" !! 2739 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2740 default HZ_250
688 help 2741 help
689 Choose whether relocatable vectors a !! 2742 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2743
691 configurations without VECBASE regis !! 2744 config HZ_24
692 placed at their hardware-defined loc !! 2745 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2746
694 config XTENSA_VECTORS_IN_TEXT !! 2747 config HZ_48
695 bool "Merge relocatable vectors into k !! 2748 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2749
697 help !! 2750 config HZ_100
698 This option puts relocatable vectors !! 2751 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2752
700 This is a safe choice for most confi !! 2753 config HZ_128
701 !! 2754 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2755
703 bool "Put relocatable vectors at fixed !! 2756 config HZ_250
704 help !! 2757 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2758
706 Vectors are merged with the .init da !! 2759 config HZ_256
707 are copied into their designated loc !! 2760 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2761
709 XIP-aware MTD support. !! 2762 config HZ_1000
>> 2763 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2764
>> 2765 config HZ_1024
>> 2766 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2767
711 endchoice 2768 endchoice
712 2769
713 config VECTORS_ADDR !! 2770 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2771 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2772
729 config PLATFORM_WANT_DEFAULT_MEM !! 2773 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2774 bool
>> 2775
>> 2776 config SYS_SUPPORTS_100HZ
>> 2777 bool
>> 2778
>> 2779 config SYS_SUPPORTS_128HZ
>> 2780 bool
>> 2781
>> 2782 config SYS_SUPPORTS_250HZ
>> 2783 bool
>> 2784
>> 2785 config SYS_SUPPORTS_256HZ
>> 2786 bool
>> 2787
>> 2788 config SYS_SUPPORTS_1000HZ
>> 2789 bool
>> 2790
>> 2791 config SYS_SUPPORTS_1024HZ
>> 2792 bool
731 2793
732 config DEFAULT_MEM_START !! 2794 config SYS_SUPPORTS_ARBIT_HZ
733 hex !! 2795 bool
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2796 default y if !SYS_SUPPORTS_24HZ && \
735 default 0x60000000 if PLATFORM_WANT_DE !! 2797 !SYS_SUPPORTS_48HZ && \
736 default 0x00000000 !! 2798 !SYS_SUPPORTS_100HZ && \
>> 2799 !SYS_SUPPORTS_128HZ && \
>> 2800 !SYS_SUPPORTS_250HZ && \
>> 2801 !SYS_SUPPORTS_256HZ && \
>> 2802 !SYS_SUPPORTS_1000HZ && \
>> 2803 !SYS_SUPPORTS_1024HZ
>> 2804
>> 2805 config HZ
>> 2806 int
>> 2807 default 24 if HZ_24
>> 2808 default 48 if HZ_48
>> 2809 default 100 if HZ_100
>> 2810 default 128 if HZ_128
>> 2811 default 250 if HZ_250
>> 2812 default 256 if HZ_256
>> 2813 default 1000 if HZ_1000
>> 2814 default 1024 if HZ_1024
>> 2815
>> 2816 config SCHED_HRTICK
>> 2817 def_bool HIGH_RES_TIMERS
>> 2818
>> 2819 source "kernel/Kconfig.preempt"
>> 2820
>> 2821 config KEXEC
>> 2822 bool "Kexec system call"
>> 2823 select KEXEC_CORE
>> 2824 help
>> 2825 kexec is a system call that implements the ability to shutdown your
>> 2826 current kernel, and to start another kernel. It is like a reboot
>> 2827 but it is independent of the system firmware. And like a reboot
>> 2828 you can start any kernel with it, not just Linux.
>> 2829
>> 2830 The name comes from the similarity to the exec system call.
>> 2831
>> 2832 It is an ongoing process to be certain the hardware in a machine
>> 2833 is properly shutdown, so do not be surprised if this code does not
>> 2834 initially work for you. As of this writing the exact hardware
>> 2835 interface is strongly in flux, so no good recommendation can be
>> 2836 made.
>> 2837
>> 2838 config CRASH_DUMP
>> 2839 bool "Kernel crash dumps"
>> 2840 help
>> 2841 Generate crash dump after being started by kexec.
>> 2842 This should be normally only set in special crash dump kernels
>> 2843 which are loaded in the main kernel with kexec-tools into
>> 2844 a specially reserved region and then later executed after
>> 2845 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2846 to a memory address not used by the main kernel or firmware using
>> 2847 PHYSICAL_START.
>> 2848
>> 2849 config PHYSICAL_START
>> 2850 hex "Physical address where the kernel is loaded"
>> 2851 default "0xffffffff84000000" if 64BIT
>> 2852 default "0x84000000" if 32BIT
>> 2853 depends on CRASH_DUMP
>> 2854 help
>> 2855 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2856 If you plan to use kernel for capturing the crash dump change
>> 2857 this value to start of the reserved region (the "X" value as
>> 2858 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2859 passed to the panic-ed kernel).
>> 2860
>> 2861 config SECCOMP
>> 2862 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2863 depends on PROC_FS
>> 2864 default y
737 help 2865 help
738 This is the base address used for bo !! 2866 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2867 that may need to compute untrusted bytecode during their
>> 2868 execution. By using pipes or other transports made available to
>> 2869 the process as file descriptors supporting the read/write
>> 2870 syscalls, it's possible to isolate those applications in
>> 2871 their own address space using seccomp. Once seccomp is
>> 2872 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2873 and the task is only allowed to execute a few safe syscalls
>> 2874 defined by each seccomp mode.
>> 2875
>> 2876 If unsure, say Y. Only embedded should say N here.
>> 2877
>> 2878 config MIPS_O32_FP64_SUPPORT
>> 2879 bool "Support for O32 binaries using 64-bit FP"
>> 2880 depends on 32BIT || MIPS32_O32
>> 2881 help
>> 2882 When this is enabled, the kernel will support use of 64-bit floating
>> 2883 point registers with binaries using the O32 ABI along with the
>> 2884 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2885 32-bit MIPS systems this support is at the cost of increasing the
>> 2886 size and complexity of the compiled FPU emulator. Thus if you are
>> 2887 running a MIPS32 system and know that none of your userland binaries
>> 2888 will require 64-bit floating point, you may wish to reduce the size
>> 2889 of your kernel & potentially improve FP emulation performance by
>> 2890 saying N here.
>> 2891
>> 2892 Although binutils currently supports use of this flag the details
>> 2893 concerning its effect upon the O32 ABI in userland are still being
>> 2894 worked on. In order to avoid userland becoming dependant upon current
>> 2895 behaviour before the details have been finalised, this option should
>> 2896 be considered experimental and only enabled by those working upon
>> 2897 said details.
>> 2898
>> 2899 If unsure, say N.
>> 2900
>> 2901 config USE_OF
>> 2902 bool
>> 2903 select OF
>> 2904 select OF_EARLY_FLATTREE
>> 2905 select IRQ_DOMAIN
740 2906
741 If unsure, leave the default value h !! 2907 config BUILTIN_DTB
>> 2908 bool
742 2909
743 choice 2910 choice
744 prompt "KSEG layout" !! 2911 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2912 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2913
>> 2914 config MIPS_NO_APPENDED_DTB
>> 2915 bool "None"
>> 2916 help
>> 2917 Do not enable appended dtb support.
>> 2918
>> 2919 config MIPS_ELF_APPENDED_DTB
>> 2920 bool "vmlinux"
>> 2921 help
>> 2922 With this option, the boot code will look for a device tree binary
>> 2923 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 2924 it is empty and the DTB can be appended using binutils command
>> 2925 objcopy:
>> 2926
>> 2927 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 2928
>> 2929 This is meant as a backward compatiblity convenience for those
>> 2930 systems with a bootloader that can't be upgraded to accommodate
>> 2931 the documented boot protocol using a device tree.
>> 2932
>> 2933 config MIPS_RAW_APPENDED_DTB
>> 2934 bool "vmlinux.bin or vmlinuz.bin"
>> 2935 help
>> 2936 With this option, the boot code will look for a device tree binary
>> 2937 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 2938 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 2939
>> 2940 This is meant as a backward compatibility convenience for those
>> 2941 systems with a bootloader that can't be upgraded to accommodate
>> 2942 the documented boot protocol using a device tree.
>> 2943
>> 2944 Beware that there is very little in terms of protection against
>> 2945 this option being confused by leftover garbage in memory that might
>> 2946 look like a DTB header after a reboot if no actual DTB is appended
>> 2947 to vmlinux.bin. Do not leave this option active in a production kernel
>> 2948 if you don't intend to always append a DTB.
772 endchoice 2949 endchoice
773 2950
774 config HIGHMEM !! 2951 choice
775 bool "High Memory Support" !! 2952 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 2953 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 2954 !MIPS_MALTA && \
>> 2955 !CAVIUM_OCTEON_SOC
>> 2956 default MIPS_CMDLINE_FROM_BOOTLOADER
>> 2957
>> 2958 config MIPS_CMDLINE_FROM_DTB
>> 2959 depends on USE_OF
>> 2960 bool "Dtb kernel arguments if available"
>> 2961
>> 2962 config MIPS_CMDLINE_DTB_EXTEND
>> 2963 depends on USE_OF
>> 2964 bool "Extend dtb kernel arguments with bootloader arguments"
>> 2965
>> 2966 config MIPS_CMDLINE_FROM_BOOTLOADER
>> 2967 bool "Bootloader kernel arguments if available"
>> 2968
>> 2969 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 2970 depends on CMDLINE_BOOL
>> 2971 bool "Extend builtin kernel arguments with bootloader arguments"
>> 2972 endchoice
>> 2973
>> 2974 endmenu
>> 2975
>> 2976 config LOCKDEP_SUPPORT
>> 2977 bool
>> 2978 default y
>> 2979
>> 2980 config STACKTRACE_SUPPORT
>> 2981 bool
>> 2982 default y
>> 2983
>> 2984 config HAVE_LATENCYTOP_SUPPORT
>> 2985 bool
>> 2986 default y
>> 2987
>> 2988 config PGTABLE_LEVELS
>> 2989 int
>> 2990 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 2991 default 2
>> 2992
>> 2993 source "init/Kconfig"
>> 2994
>> 2995 source "kernel/Kconfig.freezer"
>> 2996
>> 2997 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 2998
>> 2999 config HW_HAS_EISA
>> 3000 bool
>> 3001 config HW_HAS_PCI
>> 3002 bool
>> 3003
>> 3004 config PCI
>> 3005 bool "Support for PCI controller"
>> 3006 depends on HW_HAS_PCI
>> 3007 select PCI_DOMAINS
>> 3008 help
>> 3009 Find out whether you have a PCI motherboard. PCI is the name of a
>> 3010 bus system, i.e. the way the CPU talks to the other stuff inside
>> 3011 your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
>> 3012 say Y, otherwise N.
>> 3013
>> 3014 config HT_PCI
>> 3015 bool "Support for HT-linked PCI"
>> 3016 default y
>> 3017 depends on CPU_LOONGSON3
>> 3018 select PCI
>> 3019 select PCI_DOMAINS
>> 3020 help
>> 3021 Loongson family machines use Hyper-Transport bus for inter-core
>> 3022 connection and device connection. The PCI bus is a subordinate
>> 3023 linked at HT. Choose Y for Loongson-3 based machines.
>> 3024
>> 3025 config PCI_DOMAINS
>> 3026 bool
>> 3027
>> 3028 config PCI_DOMAINS_GENERIC
>> 3029 bool
>> 3030
>> 3031 config PCI_DRIVERS_GENERIC
>> 3032 select PCI_DOMAINS_GENERIC if PCI_DOMAINS
>> 3033 bool
>> 3034
>> 3035 config PCI_DRIVERS_LEGACY
>> 3036 def_bool !PCI_DRIVERS_GENERIC
>> 3037 select NO_GENERIC_PCI_IOPORT_MAP
>> 3038
>> 3039 source "drivers/pci/Kconfig"
>> 3040
>> 3041 #
>> 3042 # ISA support is now enabled via select. Too many systems still have the one
>> 3043 # or other ISA chip on the board that users don't know about so don't expect
>> 3044 # users to choose the right thing ...
>> 3045 #
>> 3046 config ISA
>> 3047 bool
>> 3048
>> 3049 config EISA
>> 3050 bool "EISA support"
>> 3051 depends on HW_HAS_EISA
>> 3052 select ISA
>> 3053 select GENERIC_ISA_DMA
>> 3054 ---help---
>> 3055 The Extended Industry Standard Architecture (EISA) bus was
>> 3056 developed as an open alternative to the IBM MicroChannel bus.
>> 3057
>> 3058 The EISA bus provided some of the features of the IBM MicroChannel
>> 3059 bus while maintaining backward compatibility with cards made for
>> 3060 the older ISA bus. The EISA bus saw limited use between 1988 and
>> 3061 1995 when it was made obsolete by the PCI bus.
>> 3062
>> 3063 Say Y here if you are building a kernel for an EISA-based machine.
>> 3064
>> 3065 Otherwise, say N.
>> 3066
>> 3067 source "drivers/eisa/Kconfig"
>> 3068
>> 3069 config TC
>> 3070 bool "TURBOchannel support"
>> 3071 depends on MACH_DECSTATION
>> 3072 help
>> 3073 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3074 processors. TURBOchannel programming specifications are available
>> 3075 at:
>> 3076 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3077 and:
>> 3078 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3079 Linux driver support status is documented at:
>> 3080 <http://www.linux-mips.org/wiki/DECstation>
>> 3081
>> 3082 config MMU
>> 3083 bool
>> 3084 default y
>> 3085
>> 3086 config I8253
>> 3087 bool
>> 3088 select CLKSRC_I8253
>> 3089 select CLKEVT_I8253
>> 3090 select MIPS_EXTERNAL_TIMER
>> 3091
>> 3092 config ZONE_DMA
>> 3093 bool
>> 3094
>> 3095 config ZONE_DMA32
>> 3096 bool
>> 3097
>> 3098 source "drivers/pcmcia/Kconfig"
>> 3099
>> 3100 config RAPIDIO
>> 3101 tristate "RapidIO support"
>> 3102 depends on PCI
>> 3103 default n
778 help 3104 help
779 Linux can use the full amount of RAM !! 3105 If you say Y here, the kernel will include drivers and
780 default. However, the default MMUv2 !! 3106 infrastructure code to support RapidIO interconnect devices.
781 lowermost 128 MB of memory linearly !! 3107
782 at 0xd0000000 (cached) and 0xd800000 !! 3108 source "drivers/rapidio/Kconfig"
783 When there are more than 128 MB memo !! 3109
784 all of it can be "permanently mapped !! 3110 endmenu
785 The physical memory that's not perma !! 3111
786 "high memory". !! 3112 menu "Executable file formats"
787 !! 3113
788 If you are compiling a kernel which !! 3114 source "fs/Kconfig.binfmt"
789 machine with more than 128 MB total !! 3115
790 N here. !! 3116 config TRAD_SIGNALS
>> 3117 bool
>> 3118
>> 3119 config MIPS32_COMPAT
>> 3120 bool
>> 3121
>> 3122 config COMPAT
>> 3123 bool
>> 3124
>> 3125 config SYSVIPC_COMPAT
>> 3126 bool
>> 3127
>> 3128 config MIPS32_O32
>> 3129 bool "Kernel support for o32 binaries"
>> 3130 depends on 64BIT
>> 3131 select ARCH_WANT_OLD_COMPAT_IPC
>> 3132 select COMPAT
>> 3133 select MIPS32_COMPAT
>> 3134 select SYSVIPC_COMPAT if SYSVIPC
>> 3135 help
>> 3136 Select this option if you want to run o32 binaries. These are pure
>> 3137 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3138 existing binaries are in this format.
791 3139
792 If unsure, say Y. 3140 If unsure, say Y.
793 3141
794 config ARCH_FORCE_MAX_ORDER !! 3142 config MIPS32_N32
795 int "Order of maximal physically conti !! 3143 bool "Kernel support for n32 binaries"
796 default "10" !! 3144 depends on 64BIT
797 help !! 3145 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
798 The kernel page allocator limits the !! 3146 select COMPAT
799 contiguous allocations. The limit is !! 3147 select MIPS32_COMPAT
800 defines the maximal power of two of !! 3148 select SYSVIPC_COMPAT if SYSVIPC
801 allocated as a single contiguous blo !! 3149 help
802 overriding the default setting when !! 3150 Select this option if you want to run n32 binaries. These are
803 large blocks of physically contiguou !! 3151 64-bit binaries using 32-bit quantities for addressing and certain
>> 3152 data that would normally be 64-bit. They are used in special
>> 3153 cases.
>> 3154
>> 3155 If unsure, say N.
804 3156
805 Don't change if unsure. !! 3157 config BINFMT_ELF32
>> 3158 bool
>> 3159 default y if MIPS32_O32 || MIPS32_N32
>> 3160 select ELFCORE
806 3161
807 endmenu 3162 endmenu
808 3163
809 menu "Power management options" 3164 menu "Power management options"
810 3165
811 config ARCH_HIBERNATION_POSSIBLE 3166 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3167 def_bool y
>> 3168 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3169
>> 3170 config ARCH_SUSPEND_POSSIBLE
>> 3171 def_bool y
>> 3172 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3173
814 source "kernel/power/Kconfig" 3174 source "kernel/power/Kconfig"
815 3175
816 endmenu 3176 endmenu
>> 3177
>> 3178 config MIPS_EXTERNAL_TIMER
>> 3179 bool
>> 3180
>> 3181 menu "CPU Power Management"
>> 3182
>> 3183 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3184 source "drivers/cpufreq/Kconfig"
>> 3185 endif
>> 3186
>> 3187 source "drivers/cpuidle/Kconfig"
>> 3188
>> 3189 endmenu
>> 3190
>> 3191 source "net/Kconfig"
>> 3192
>> 3193 source "drivers/Kconfig"
>> 3194
>> 3195 source "drivers/firmware/Kconfig"
>> 3196
>> 3197 source "fs/Kconfig"
>> 3198
>> 3199 source "arch/mips/Kconfig.debug"
>> 3200
>> 3201 source "security/Kconfig"
>> 3202
>> 3203 source "crypto/Kconfig"
>> 3204
>> 3205 source "lib/Kconfig"
>> 3206
>> 3207 source "arch/mips/kvm/Kconfig"
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