1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config MIPS
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 select ARCH_CLOCKSOURCE_DATA
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 select ARCH_DISCARD_MEMBLOCK
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 select ARCH_HAS_ELF_RANDOMIZE
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 select ARCH_HAS_UBSAN_SANITIZE_ALL
11 select ARCH_HAS_KCOV !! 11 select ARCH_SUPPORTS_UPROBES
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 select ARCH_USE_BUILTIN_BSWAP
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
14 select ARCH_HAS_DMA_SET_UNCACHED if MM <<
15 select ARCH_HAS_STRNCPY_FROM_USER if ! <<
16 select ARCH_HAS_STRNLEN_USER <<
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS 14 select ARCH_USE_QUEUED_RWLOCKS
20 select ARCH_USE_QUEUED_SPINLOCKS 15 select ARCH_USE_QUEUED_SPINLOCKS
21 select ARCH_WANT_IPC_PARSE_VERSION 16 select ARCH_WANT_IPC_PARSE_VERSION
22 select BUILDTIME_TABLE_SORT !! 17 select BUILDTIME_EXTABLE_SORT
23 select CLONE_BACKWARDS 18 select CLONE_BACKWARDS
24 select COMMON_CLK !! 19 select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
25 select DMA_NONCOHERENT_MMAP if MMU !! 20 select CPU_PM if CPU_IDLE
26 select GENERIC_ATOMIC64 !! 21 select GENERIC_ATOMIC64 if !64BIT
>> 22 select GENERIC_CLOCKEVENTS
>> 23 select GENERIC_CMOS_UPDATE
>> 24 select GENERIC_CPU_AUTOPROBE
>> 25 select GENERIC_IOMAP
>> 26 select GENERIC_IRQ_PROBE
27 select GENERIC_IRQ_SHOW 27 select GENERIC_IRQ_SHOW
>> 28 select GENERIC_ISA_DMA if EISA
>> 29 select GENERIC_LIB_ASHLDI3
>> 30 select GENERIC_LIB_ASHRDI3
28 select GENERIC_LIB_CMPDI2 31 select GENERIC_LIB_CMPDI2
29 select GENERIC_LIB_MULDI3 !! 32 select GENERIC_LIB_LSHRDI3
30 select GENERIC_LIB_UCMPDI2 33 select GENERIC_LIB_UCMPDI2
31 select GENERIC_PCI_IOMAP !! 34 select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
32 select GENERIC_SCHED_CLOCK !! 35 select GENERIC_SMP_IDLE_THREAD
33 select GENERIC_IOREMAP if MMU !! 36 select GENERIC_TIME_VSYSCALL
34 select HAVE_ARCH_AUDITSYSCALL !! 37 select HANDLE_DOMAIN_IRQ
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE !! 38 select HAVE_ARCH_COMPILER_H
36 select HAVE_ARCH_KASAN if MMU && !XIP_ !! 39 select HAVE_ARCH_JUMP_LABEL
37 select HAVE_ARCH_KCSAN !! 40 select HAVE_ARCH_KGDB
>> 41 select HAVE_ARCH_MMAP_RND_BITS if MMU
>> 42 select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
38 select HAVE_ARCH_SECCOMP_FILTER 43 select HAVE_ARCH_SECCOMP_FILTER
39 select HAVE_ARCH_TRACEHOOK 44 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS !! 45 select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES && 64BIT
41 select HAVE_CONTEXT_TRACKING_USER !! 46 select HAVE_CBPF_JIT if (!64BIT && !CPU_MICROMIPS)
>> 47 select HAVE_EBPF_JIT if (64BIT && !CPU_MICROMIPS)
>> 48 select HAVE_CONTEXT_TRACKING
>> 49 select HAVE_COPY_THREAD_TLS
>> 50 select HAVE_C_RECORDMCOUNT
42 select HAVE_DEBUG_KMEMLEAK 51 select HAVE_DEBUG_KMEMLEAK
>> 52 select HAVE_DEBUG_STACKOVERFLOW
43 select HAVE_DMA_CONTIGUOUS 53 select HAVE_DMA_CONTIGUOUS
>> 54 select HAVE_DYNAMIC_FTRACE
44 select HAVE_EXIT_THREAD 55 select HAVE_EXIT_THREAD
>> 56 select HAVE_FTRACE_MCOUNT_RECORD
>> 57 select HAVE_FUNCTION_GRAPH_TRACER
45 select HAVE_FUNCTION_TRACER 58 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 59 select HAVE_GENERIC_DMA_COHERENT
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 60 select HAVE_IDE
>> 61 select HAVE_IOREMAP_PROT
>> 62 select HAVE_IRQ_EXIT_ON_IRQ_STACK
48 select HAVE_IRQ_TIME_ACCOUNTING 63 select HAVE_IRQ_TIME_ACCOUNTING
49 select HAVE_PAGE_SIZE_4KB !! 64 select HAVE_KPROBES
50 select HAVE_PCI !! 65 select HAVE_KRETPROBES
>> 66 select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
>> 67 select HAVE_MEMBLOCK_NODE_MAP
>> 68 select HAVE_MOD_ARCH_SPECIFIC
>> 69 select HAVE_NMI
>> 70 select HAVE_OPROFILE
51 select HAVE_PERF_EVENTS 71 select HAVE_PERF_EVENTS
>> 72 select HAVE_REGS_AND_STACK_ACCESS_API
>> 73 select HAVE_RSEQ
52 select HAVE_STACKPROTECTOR 74 select HAVE_STACKPROTECTOR
53 select HAVE_SYSCALL_TRACEPOINTS 75 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 76 select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
55 select IRQ_DOMAIN !! 77 select IRQ_FORCED_THREADING
56 select LOCK_MM_AND_FIND_VMA !! 78 select ISA if EISA
57 select MODULES_USE_ELF_RELA !! 79 select MODULES_USE_ELF_RELA if MODULES && 64BIT
>> 80 select MODULES_USE_ELF_REL if MODULES
58 select PERF_USE_VMALLOC 81 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 82 select RTC_LIB
>> 83 select SYSCTL_EXCEPTION_TRACE
>> 84 select VIRT_TO_BUS
>> 85
>> 86 menu "Machine selection"
>> 87
>> 88 choice
>> 89 prompt "System type"
>> 90 default MIPS_GENERIC
>> 91
>> 92 config MIPS_GENERIC
>> 93 bool "Generic board-agnostic MIPS kernel"
>> 94 select BOOT_RAW
>> 95 select BUILTIN_DTB
>> 96 select CEVT_R4K
>> 97 select CLKSRC_MIPS_GIC
>> 98 select COMMON_CLK
>> 99 select CPU_MIPSR2_IRQ_VI
>> 100 select CPU_MIPSR2_IRQ_EI
>> 101 select CSRC_R4K
>> 102 select DMA_PERDEV_COHERENT
>> 103 select HAVE_PCI
>> 104 select IRQ_MIPS_CPU
>> 105 select LIBFDT
>> 106 select MIPS_AUTO_PFN_OFFSET
>> 107 select MIPS_CPU_SCACHE
>> 108 select MIPS_GIC
>> 109 select MIPS_L1_CACHE_SHIFT_7
>> 110 select NO_EXCEPT_FILL
>> 111 select PCI_DRIVERS_GENERIC
>> 112 select PINCTRL
>> 113 select SMP_UP if SMP
>> 114 select SWAP_IO_SPACE
>> 115 select SYS_HAS_CPU_MIPS32_R1
>> 116 select SYS_HAS_CPU_MIPS32_R2
>> 117 select SYS_HAS_CPU_MIPS32_R6
>> 118 select SYS_HAS_CPU_MIPS64_R1
>> 119 select SYS_HAS_CPU_MIPS64_R2
>> 120 select SYS_HAS_CPU_MIPS64_R6
>> 121 select SYS_SUPPORTS_32BIT_KERNEL
>> 122 select SYS_SUPPORTS_64BIT_KERNEL
>> 123 select SYS_SUPPORTS_BIG_ENDIAN
>> 124 select SYS_SUPPORTS_HIGHMEM
>> 125 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 126 select SYS_SUPPORTS_MICROMIPS
>> 127 select SYS_SUPPORTS_MIPS_CPS
>> 128 select SYS_SUPPORTS_MIPS16
>> 129 select SYS_SUPPORTS_MULTITHREADING
>> 130 select SYS_SUPPORTS_RELOCATABLE
>> 131 select SYS_SUPPORTS_SMARTMIPS
>> 132 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 133 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 134 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 135 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 136 select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 137 select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 138 select USE_OF
>> 139 select UHI_BOOT
>> 140 help
>> 141 Select this to build a kernel which aims to support multiple boards,
>> 142 generally using a flattened device tree passed from the bootloader
>> 143 using the boot protocol defined in the UHI (Unified Hosting
>> 144 Interface) specification.
>> 145
>> 146 config MIPS_ALCHEMY
>> 147 bool "Alchemy processor based machines"
>> 148 select PHYS_ADDR_T_64BIT
>> 149 select CEVT_R4K
>> 150 select CSRC_R4K
>> 151 select IRQ_MIPS_CPU
>> 152 select DMA_MAYBE_COHERENT # Au1000,1500,1100 aren't, rest is
>> 153 select SYS_HAS_CPU_MIPS32_R1
>> 154 select SYS_SUPPORTS_32BIT_KERNEL
>> 155 select SYS_SUPPORTS_APM_EMULATION
>> 156 select GPIOLIB
>> 157 select SYS_SUPPORTS_ZBOOT
>> 158 select COMMON_CLK
>> 159
>> 160 config AR7
>> 161 bool "Texas Instruments AR7"
>> 162 select BOOT_ELF32
>> 163 select DMA_NONCOHERENT
>> 164 select CEVT_R4K
>> 165 select CSRC_R4K
>> 166 select IRQ_MIPS_CPU
>> 167 select NO_EXCEPT_FILL
>> 168 select SWAP_IO_SPACE
>> 169 select SYS_HAS_CPU_MIPS32_R1
>> 170 select SYS_HAS_EARLY_PRINTK
>> 171 select SYS_SUPPORTS_32BIT_KERNEL
>> 172 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 173 select SYS_SUPPORTS_MIPS16
>> 174 select SYS_SUPPORTS_ZBOOT_UART16550
>> 175 select GPIOLIB
>> 176 select VLYNQ
>> 177 select HAVE_CLK
>> 178 help
>> 179 Support for the Texas Instruments AR7 System-on-a-Chip
>> 180 family: TNETD7100, 7200 and 7300.
>> 181
>> 182 config ATH25
>> 183 bool "Atheros AR231x/AR531x SoC support"
>> 184 select CEVT_R4K
>> 185 select CSRC_R4K
>> 186 select DMA_NONCOHERENT
>> 187 select IRQ_MIPS_CPU
>> 188 select IRQ_DOMAIN
>> 189 select SYS_HAS_CPU_MIPS32_R1
>> 190 select SYS_SUPPORTS_BIG_ENDIAN
>> 191 select SYS_SUPPORTS_32BIT_KERNEL
>> 192 select SYS_HAS_EARLY_PRINTK
>> 193 help
>> 194 Support for Atheros AR231x and Atheros AR531x based boards
>> 195
>> 196 config ATH79
>> 197 bool "Atheros AR71XX/AR724X/AR913X based boards"
>> 198 select ARCH_HAS_RESET_CONTROLLER
>> 199 select BOOT_RAW
>> 200 select CEVT_R4K
>> 201 select CSRC_R4K
>> 202 select DMA_NONCOHERENT
>> 203 select GPIOLIB
>> 204 select PINCTRL
>> 205 select HAVE_CLK
>> 206 select COMMON_CLK
>> 207 select CLKDEV_LOOKUP
>> 208 select IRQ_MIPS_CPU
>> 209 select MIPS_MACHINE
>> 210 select SYS_HAS_CPU_MIPS32_R2
>> 211 select SYS_HAS_EARLY_PRINTK
>> 212 select SYS_SUPPORTS_32BIT_KERNEL
>> 213 select SYS_SUPPORTS_BIG_ENDIAN
>> 214 select SYS_SUPPORTS_MIPS16
>> 215 select SYS_SUPPORTS_ZBOOT_UART_PROM
>> 216 select USE_OF
>> 217 select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
>> 218 help
>> 219 Support for the Atheros AR71XX/AR724X/AR913X SoCs.
>> 220
>> 221 config BMIPS_GENERIC
>> 222 bool "Broadcom Generic BMIPS kernel"
>> 223 select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
>> 224 select ARCH_HAS_PHYS_TO_DMA
>> 225 select BOOT_RAW
>> 226 select NO_EXCEPT_FILL
>> 227 select USE_OF
>> 228 select CEVT_R4K
>> 229 select CSRC_R4K
>> 230 select SYNC_R4K
>> 231 select COMMON_CLK
>> 232 select BCM6345_L1_IRQ
>> 233 select BCM7038_L1_IRQ
>> 234 select BCM7120_L2_IRQ
>> 235 select BRCMSTB_L2_IRQ
>> 236 select IRQ_MIPS_CPU
>> 237 select DMA_NONCOHERENT
>> 238 select SYS_SUPPORTS_32BIT_KERNEL
>> 239 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 240 select SYS_SUPPORTS_BIG_ENDIAN
>> 241 select SYS_SUPPORTS_HIGHMEM
>> 242 select SYS_HAS_CPU_BMIPS32_3300
>> 243 select SYS_HAS_CPU_BMIPS4350
>> 244 select SYS_HAS_CPU_BMIPS4380
>> 245 select SYS_HAS_CPU_BMIPS5000
>> 246 select SWAP_IO_SPACE
>> 247 select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 248 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 249 select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
>> 250 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 251 select HARDIRQS_SW_RESEND
>> 252 help
>> 253 Build a generic DT-based kernel image that boots on select
>> 254 BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
>> 255 box chips. Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
>> 256 must be set appropriately for your board.
>> 257
>> 258 config BCM47XX
>> 259 bool "Broadcom BCM47XX based boards"
>> 260 select BOOT_RAW
>> 261 select CEVT_R4K
>> 262 select CSRC_R4K
>> 263 select DMA_NONCOHERENT
>> 264 select HAVE_PCI
>> 265 select IRQ_MIPS_CPU
>> 266 select SYS_HAS_CPU_MIPS32_R1
>> 267 select NO_EXCEPT_FILL
>> 268 select SYS_SUPPORTS_32BIT_KERNEL
>> 269 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 270 select SYS_SUPPORTS_MIPS16
>> 271 select SYS_SUPPORTS_ZBOOT
>> 272 select SYS_HAS_EARLY_PRINTK
>> 273 select USE_GENERIC_EARLY_PRINTK_8250
>> 274 select GPIOLIB
>> 275 select LEDS_GPIO_REGISTER
>> 276 select BCM47XX_NVRAM
>> 277 select BCM47XX_SPROM
>> 278 select BCM47XX_SSB if !BCM47XX_BCMA
>> 279 help
>> 280 Support for BCM47XX based boards
>> 281
>> 282 config BCM63XX
>> 283 bool "Broadcom BCM63XX based boards"
>> 284 select BOOT_RAW
>> 285 select CEVT_R4K
>> 286 select CSRC_R4K
>> 287 select SYNC_R4K
>> 288 select DMA_NONCOHERENT
>> 289 select IRQ_MIPS_CPU
>> 290 select SYS_SUPPORTS_32BIT_KERNEL
>> 291 select SYS_SUPPORTS_BIG_ENDIAN
>> 292 select SYS_HAS_EARLY_PRINTK
>> 293 select SWAP_IO_SPACE
>> 294 select GPIOLIB
>> 295 select HAVE_CLK
>> 296 select MIPS_L1_CACHE_SHIFT_4
>> 297 select CLKDEV_LOOKUP
>> 298 help
>> 299 Support for BCM63XX based boards
>> 300
>> 301 config MIPS_COBALT
>> 302 bool "Cobalt Server"
>> 303 select CEVT_R4K
>> 304 select CSRC_R4K
>> 305 select CEVT_GT641XX
>> 306 select DMA_NONCOHERENT
>> 307 select FORCE_PCI
>> 308 select I8253
>> 309 select I8259
>> 310 select IRQ_MIPS_CPU
>> 311 select IRQ_GT641XX
>> 312 select PCI_GT64XXX_PCI0
>> 313 select SYS_HAS_CPU_NEVADA
>> 314 select SYS_HAS_EARLY_PRINTK
>> 315 select SYS_SUPPORTS_32BIT_KERNEL
>> 316 select SYS_SUPPORTS_64BIT_KERNEL
>> 317 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 318 select USE_GENERIC_EARLY_PRINTK_8250
>> 319
>> 320 config MACH_DECSTATION
>> 321 bool "DECstations"
>> 322 select BOOT_ELF32
>> 323 select CEVT_DS1287
>> 324 select CEVT_R4K if CPU_R4X00
>> 325 select CSRC_IOASIC
>> 326 select CSRC_R4K if CPU_R4X00
>> 327 select CPU_DADDI_WORKAROUNDS if 64BIT
>> 328 select CPU_R4000_WORKAROUNDS if 64BIT
>> 329 select CPU_R4400_WORKAROUNDS if 64BIT
>> 330 select DMA_NONCOHERENT
>> 331 select NO_IOPORT_MAP
>> 332 select IRQ_MIPS_CPU
>> 333 select SYS_HAS_CPU_R3000
>> 334 select SYS_HAS_CPU_R4X00
>> 335 select SYS_SUPPORTS_32BIT_KERNEL
>> 336 select SYS_SUPPORTS_64BIT_KERNEL
>> 337 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 338 select SYS_SUPPORTS_128HZ
>> 339 select SYS_SUPPORTS_256HZ
>> 340 select SYS_SUPPORTS_1024HZ
>> 341 select MIPS_L1_CACHE_SHIFT_4
>> 342 help
>> 343 This enables support for DEC's MIPS based workstations. For details
>> 344 see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
>> 345 DECstation porting pages on <http://decstation.unix-ag.org/>.
>> 346
>> 347 If you have one of the following DECstation Models you definitely
>> 348 want to choose R4xx0 for the CPU Type:
>> 349
>> 350 DECstation 5000/50
>> 351 DECstation 5000/150
>> 352 DECstation 5000/260
>> 353 DECsystem 5900/260
>> 354
>> 355 otherwise choose R3000.
>> 356
>> 357 config MACH_JAZZ
>> 358 bool "Jazz family of machines"
>> 359 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 360 select ARCH_MIGHT_HAVE_PC_SERIO
>> 361 select FW_ARC
>> 362 select FW_ARC32
>> 363 select ARCH_MAY_HAVE_PC_FDC
>> 364 select CEVT_R4K
>> 365 select CSRC_R4K
>> 366 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 367 select GENERIC_ISA_DMA
>> 368 select HAVE_PCSPKR_PLATFORM
>> 369 select IRQ_MIPS_CPU
>> 370 select I8253
>> 371 select I8259
>> 372 select ISA
>> 373 select SYS_HAS_CPU_R4X00
>> 374 select SYS_SUPPORTS_32BIT_KERNEL
>> 375 select SYS_SUPPORTS_64BIT_KERNEL
>> 376 select SYS_SUPPORTS_100HZ
>> 377 help
>> 378 This a family of machines based on the MIPS R4030 chipset which was
>> 379 used by several vendors to build RISC/os and Windows NT workstations.
>> 380 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
>> 381 Olivetti M700-10 workstations.
>> 382
>> 383 config MACH_INGENIC
>> 384 bool "Ingenic SoC based machines"
>> 385 select SYS_SUPPORTS_32BIT_KERNEL
>> 386 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 387 select SYS_SUPPORTS_ZBOOT_UART16550
>> 388 select DMA_NONCOHERENT
>> 389 select IRQ_MIPS_CPU
>> 390 select PINCTRL
>> 391 select GPIOLIB
>> 392 select COMMON_CLK
>> 393 select GENERIC_IRQ_CHIP
>> 394 select BUILTIN_DTB
>> 395 select USE_OF
>> 396 select LIBFDT
>> 397
>> 398 config LANTIQ
>> 399 bool "Lantiq based platforms"
>> 400 select DMA_NONCOHERENT
>> 401 select IRQ_MIPS_CPU
>> 402 select CEVT_R4K
>> 403 select CSRC_R4K
>> 404 select SYS_HAS_CPU_MIPS32_R1
>> 405 select SYS_HAS_CPU_MIPS32_R2
>> 406 select SYS_SUPPORTS_BIG_ENDIAN
>> 407 select SYS_SUPPORTS_32BIT_KERNEL
>> 408 select SYS_SUPPORTS_MIPS16
>> 409 select SYS_SUPPORTS_MULTITHREADING
>> 410 select SYS_SUPPORTS_VPE_LOADER
>> 411 select SYS_HAS_EARLY_PRINTK
>> 412 select GPIOLIB
>> 413 select SWAP_IO_SPACE
>> 414 select BOOT_RAW
>> 415 select CLKDEV_LOOKUP
>> 416 select USE_OF
>> 417 select PINCTRL
>> 418 select PINCTRL_LANTIQ
>> 419 select ARCH_HAS_RESET_CONTROLLER
>> 420 select RESET_CONTROLLER
>> 421
>> 422 config LASAT
>> 423 bool "LASAT Networks platforms"
>> 424 select CEVT_R4K
>> 425 select CRC32
>> 426 select CSRC_R4K
>> 427 select DMA_NONCOHERENT
>> 428 select SYS_HAS_EARLY_PRINTK
>> 429 select HAVE_PCI
>> 430 select IRQ_MIPS_CPU
>> 431 select PCI_GT64XXX_PCI0
>> 432 select MIPS_NILE4
>> 433 select R5000_CPU_SCACHE
>> 434 select SYS_HAS_CPU_R5000
>> 435 select SYS_SUPPORTS_32BIT_KERNEL
>> 436 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
>> 437 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 438
>> 439 config MACH_LOONGSON32
>> 440 bool "Loongson-1 family of machines"
>> 441 select SYS_SUPPORTS_ZBOOT
>> 442 help
>> 443 This enables support for the Loongson-1 family of machines.
>> 444
>> 445 Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
>> 446 the Institute of Computing Technology (ICT), Chinese Academy of
>> 447 Sciences (CAS).
>> 448
>> 449 config MACH_LOONGSON64
>> 450 bool "Loongson-2/3 family of machines"
>> 451 select SYS_SUPPORTS_ZBOOT
>> 452 help
>> 453 This enables the support of Loongson-2/3 family of machines.
>> 454
>> 455 Loongson-2 is a family of single-core CPUs and Loongson-3 is a
>> 456 family of multi-core CPUs. They are both 64-bit general-purpose
>> 457 MIPS-compatible CPUs. Loongson-2/3 are developed by the Institute
>> 458 of Computing Technology (ICT), Chinese Academy of Sciences (CAS)
>> 459 in the People's Republic of China. The chief architect is Professor
>> 460 Weiwu Hu.
>> 461
>> 462 config MACH_PISTACHIO
>> 463 bool "IMG Pistachio SoC based boards"
>> 464 select BOOT_ELF32
>> 465 select BOOT_RAW
>> 466 select CEVT_R4K
>> 467 select CLKSRC_MIPS_GIC
>> 468 select COMMON_CLK
>> 469 select CSRC_R4K
>> 470 select DMA_NONCOHERENT
>> 471 select GPIOLIB
>> 472 select IRQ_MIPS_CPU
>> 473 select LIBFDT
>> 474 select MFD_SYSCON
>> 475 select MIPS_CPU_SCACHE
>> 476 select MIPS_GIC
>> 477 select PINCTRL
>> 478 select REGULATOR
>> 479 select SYS_HAS_CPU_MIPS32_R2
>> 480 select SYS_SUPPORTS_32BIT_KERNEL
>> 481 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 482 select SYS_SUPPORTS_MIPS_CPS
>> 483 select SYS_SUPPORTS_MULTITHREADING
>> 484 select SYS_SUPPORTS_RELOCATABLE
>> 485 select SYS_SUPPORTS_ZBOOT
>> 486 select SYS_HAS_EARLY_PRINTK
>> 487 select USE_GENERIC_EARLY_PRINTK_8250
>> 488 select USE_OF
>> 489 help
>> 490 This enables support for the IMG Pistachio SoC platform.
>> 491
>> 492 config MIPS_MALTA
>> 493 bool "MIPS Malta board"
>> 494 select ARCH_MAY_HAVE_PC_FDC
>> 495 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 496 select ARCH_MIGHT_HAVE_PC_SERIO
>> 497 select BOOT_ELF32
>> 498 select BOOT_RAW
>> 499 select BUILTIN_DTB
>> 500 select CEVT_R4K
>> 501 select CLKSRC_MIPS_GIC
>> 502 select COMMON_CLK
>> 503 select CSRC_R4K
>> 504 select DMA_MAYBE_COHERENT
>> 505 select GENERIC_ISA_DMA
>> 506 select HAVE_PCSPKR_PLATFORM
>> 507 select HAVE_PCI
>> 508 select I8253
>> 509 select I8259
>> 510 select IRQ_MIPS_CPU
>> 511 select LIBFDT
>> 512 select MIPS_BONITO64
>> 513 select MIPS_CPU_SCACHE
>> 514 select MIPS_GIC
>> 515 select MIPS_L1_CACHE_SHIFT_6
>> 516 select MIPS_MSC
>> 517 select PCI_GT64XXX_PCI0
>> 518 select SMP_UP if SMP
>> 519 select SWAP_IO_SPACE
>> 520 select SYS_HAS_CPU_MIPS32_R1
>> 521 select SYS_HAS_CPU_MIPS32_R2
>> 522 select SYS_HAS_CPU_MIPS32_R3_5
>> 523 select SYS_HAS_CPU_MIPS32_R5
>> 524 select SYS_HAS_CPU_MIPS32_R6
>> 525 select SYS_HAS_CPU_MIPS64_R1
>> 526 select SYS_HAS_CPU_MIPS64_R2
>> 527 select SYS_HAS_CPU_MIPS64_R6
>> 528 select SYS_HAS_CPU_NEVADA
>> 529 select SYS_HAS_CPU_RM7000
>> 530 select SYS_SUPPORTS_32BIT_KERNEL
>> 531 select SYS_SUPPORTS_64BIT_KERNEL
>> 532 select SYS_SUPPORTS_BIG_ENDIAN
>> 533 select SYS_SUPPORTS_HIGHMEM
>> 534 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 535 select SYS_SUPPORTS_MICROMIPS
>> 536 select SYS_SUPPORTS_MIPS16
>> 537 select SYS_SUPPORTS_MIPS_CMP
>> 538 select SYS_SUPPORTS_MIPS_CPS
>> 539 select SYS_SUPPORTS_MULTITHREADING
>> 540 select SYS_SUPPORTS_RELOCATABLE
>> 541 select SYS_SUPPORTS_SMARTMIPS
>> 542 select SYS_SUPPORTS_VPE_LOADER
>> 543 select SYS_SUPPORTS_ZBOOT
>> 544 select USE_OF
>> 545 select ZONE_DMA32 if 64BIT
>> 546 help
>> 547 This enables support for the MIPS Technologies Malta evaluation
>> 548 board.
>> 549
>> 550 config MACH_PIC32
>> 551 bool "Microchip PIC32 Family"
>> 552 help
>> 553 This enables support for the Microchip PIC32 family of platforms.
>> 554
>> 555 Microchip PIC32 is a family of general-purpose 32 bit MIPS core
>> 556 microcontrollers.
>> 557
>> 558 config NEC_MARKEINS
>> 559 bool "NEC EMMA2RH Mark-eins board"
>> 560 select SOC_EMMA2RH
>> 561 select HAVE_PCI
>> 562 help
>> 563 This enables support for the NEC Electronics Mark-eins boards.
>> 564
>> 565 config MACH_VR41XX
>> 566 bool "NEC VR4100 series based machines"
>> 567 select CEVT_R4K
>> 568 select CSRC_R4K
>> 569 select SYS_HAS_CPU_VR41XX
>> 570 select SYS_SUPPORTS_MIPS16
>> 571 select GPIOLIB
>> 572
>> 573 config NXP_STB220
>> 574 bool "NXP STB220 board"
>> 575 select SOC_PNX833X
>> 576 help
>> 577 Support for NXP Semiconductors STB220 Development Board.
>> 578
>> 579 config NXP_STB225
>> 580 bool "NXP 225 board"
>> 581 select SOC_PNX833X
>> 582 select SOC_PNX8335
>> 583 help
>> 584 Support for NXP Semiconductors STB225 Development Board.
>> 585
>> 586 config PMC_MSP
>> 587 bool "PMC-Sierra MSP chipsets"
>> 588 select CEVT_R4K
>> 589 select CSRC_R4K
>> 590 select DMA_NONCOHERENT
>> 591 select SWAP_IO_SPACE
>> 592 select NO_EXCEPT_FILL
>> 593 select BOOT_RAW
>> 594 select SYS_HAS_CPU_MIPS32_R1
>> 595 select SYS_HAS_CPU_MIPS32_R2
>> 596 select SYS_SUPPORTS_32BIT_KERNEL
>> 597 select SYS_SUPPORTS_BIG_ENDIAN
>> 598 select SYS_SUPPORTS_MIPS16
>> 599 select IRQ_MIPS_CPU
>> 600 select SERIAL_8250
>> 601 select SERIAL_8250_CONSOLE
>> 602 select USB_EHCI_BIG_ENDIAN_MMIO
>> 603 select USB_EHCI_BIG_ENDIAN_DESC
>> 604 help
>> 605 This adds support for the PMC-Sierra family of Multi-Service
>> 606 Processor System-On-A-Chips. These parts include a number
>> 607 of integrated peripherals, interfaces and DSPs in addition to
>> 608 a variety of MIPS cores.
>> 609
>> 610 config RALINK
>> 611 bool "Ralink based machines"
>> 612 select CEVT_R4K
>> 613 select CSRC_R4K
>> 614 select BOOT_RAW
>> 615 select DMA_NONCOHERENT
>> 616 select IRQ_MIPS_CPU
>> 617 select USE_OF
>> 618 select SYS_HAS_CPU_MIPS32_R1
>> 619 select SYS_HAS_CPU_MIPS32_R2
>> 620 select SYS_SUPPORTS_32BIT_KERNEL
>> 621 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 622 select SYS_SUPPORTS_MIPS16
>> 623 select SYS_HAS_EARLY_PRINTK
>> 624 select CLKDEV_LOOKUP
>> 625 select ARCH_HAS_RESET_CONTROLLER
>> 626 select RESET_CONTROLLER
>> 627
>> 628 config SGI_IP22
>> 629 bool "SGI IP22 (Indy/Indigo2)"
>> 630 select FW_ARC
>> 631 select FW_ARC32
>> 632 select ARCH_MIGHT_HAVE_PC_SERIO
>> 633 select BOOT_ELF32
>> 634 select CEVT_R4K
>> 635 select CSRC_R4K
>> 636 select DEFAULT_SGI_PARTITION
>> 637 select DMA_NONCOHERENT
>> 638 select HAVE_EISA
>> 639 select I8253
>> 640 select I8259
>> 641 select IP22_CPU_SCACHE
>> 642 select IRQ_MIPS_CPU
>> 643 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 644 select SGI_HAS_I8042
>> 645 select SGI_HAS_INDYDOG
>> 646 select SGI_HAS_HAL2
>> 647 select SGI_HAS_SEEQ
>> 648 select SGI_HAS_WD93
>> 649 select SGI_HAS_ZILOG
>> 650 select SWAP_IO_SPACE
>> 651 select SYS_HAS_CPU_R4X00
>> 652 select SYS_HAS_CPU_R5000
>> 653 #
>> 654 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 655 # memory during early boot on some machines.
>> 656 #
>> 657 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 658 # for a more details discussion
>> 659 #
>> 660 # select SYS_HAS_EARLY_PRINTK
>> 661 select SYS_SUPPORTS_32BIT_KERNEL
>> 662 select SYS_SUPPORTS_64BIT_KERNEL
>> 663 select SYS_SUPPORTS_BIG_ENDIAN
>> 664 select MIPS_L1_CACHE_SHIFT_7
>> 665 help
>> 666 This are the SGI Indy, Challenge S and Indigo2, as well as certain
>> 667 OEM variants like the Tandem CMN B006S. To compile a Linux kernel
>> 668 that runs on these, say Y here.
>> 669
>> 670 config SGI_IP27
>> 671 bool "SGI IP27 (Origin200/2000)"
>> 672 select ARCH_HAS_PHYS_TO_DMA
>> 673 select FW_ARC
>> 674 select FW_ARC64
>> 675 select BOOT_ELF64
>> 676 select DEFAULT_SGI_PARTITION
>> 677 select SYS_HAS_EARLY_PRINTK
>> 678 select HAVE_PCI
>> 679 select NR_CPUS_DEFAULT_64
>> 680 select SYS_HAS_CPU_R10000
>> 681 select SYS_SUPPORTS_64BIT_KERNEL
>> 682 select SYS_SUPPORTS_BIG_ENDIAN
>> 683 select SYS_SUPPORTS_NUMA
>> 684 select SYS_SUPPORTS_SMP
>> 685 select MIPS_L1_CACHE_SHIFT_7
>> 686 help
>> 687 This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
>> 688 workstations. To compile a Linux kernel that runs on these, say Y
>> 689 here.
>> 690
>> 691 config SGI_IP28
>> 692 bool "SGI IP28 (Indigo2 R10k)"
>> 693 select FW_ARC
>> 694 select FW_ARC64
>> 695 select ARCH_MIGHT_HAVE_PC_SERIO
>> 696 select BOOT_ELF64
>> 697 select CEVT_R4K
>> 698 select CSRC_R4K
>> 699 select DEFAULT_SGI_PARTITION
>> 700 select DMA_NONCOHERENT
>> 701 select GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 702 select IRQ_MIPS_CPU
>> 703 select HAVE_EISA
>> 704 select I8253
>> 705 select I8259
>> 706 select SGI_HAS_I8042
>> 707 select SGI_HAS_INDYDOG
>> 708 select SGI_HAS_HAL2
>> 709 select SGI_HAS_SEEQ
>> 710 select SGI_HAS_WD93
>> 711 select SGI_HAS_ZILOG
>> 712 select SWAP_IO_SPACE
>> 713 select SYS_HAS_CPU_R10000
>> 714 #
>> 715 # Disable EARLY_PRINTK for now since it leads to overwritten prom
>> 716 # memory during early boot on some machines.
>> 717 #
>> 718 # See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
>> 719 # for a more details discussion
>> 720 #
>> 721 # select SYS_HAS_EARLY_PRINTK
>> 722 select SYS_SUPPORTS_64BIT_KERNEL
>> 723 select SYS_SUPPORTS_BIG_ENDIAN
>> 724 select MIPS_L1_CACHE_SHIFT_7
>> 725 help
>> 726 This is the SGI Indigo2 with R10000 processor. To compile a Linux
>> 727 kernel that runs on these, say Y here.
>> 728
>> 729 config SGI_IP32
>> 730 bool "SGI IP32 (O2)"
>> 731 select ARCH_HAS_PHYS_TO_DMA
>> 732 select FW_ARC
>> 733 select FW_ARC32
>> 734 select BOOT_ELF32
>> 735 select CEVT_R4K
>> 736 select CSRC_R4K
>> 737 select DMA_NONCOHERENT
>> 738 select HAVE_PCI
>> 739 select IRQ_MIPS_CPU
>> 740 select R5000_CPU_SCACHE
>> 741 select RM7000_CPU_SCACHE
>> 742 select SYS_HAS_CPU_R5000
>> 743 select SYS_HAS_CPU_R10000 if BROKEN
>> 744 select SYS_HAS_CPU_RM7000
>> 745 select SYS_HAS_CPU_NEVADA
>> 746 select SYS_SUPPORTS_64BIT_KERNEL
>> 747 select SYS_SUPPORTS_BIG_ENDIAN
>> 748 help
>> 749 If you want this kernel to run on SGI O2 workstation, say Y here.
>> 750
>> 751 config SIBYTE_CRHINE
>> 752 bool "Sibyte BCM91120C-CRhine"
>> 753 select BOOT_ELF32
>> 754 select SIBYTE_BCM1120
>> 755 select SWAP_IO_SPACE
>> 756 select SYS_HAS_CPU_SB1
>> 757 select SYS_SUPPORTS_BIG_ENDIAN
>> 758 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 759
>> 760 config SIBYTE_CARMEL
>> 761 bool "Sibyte BCM91120x-Carmel"
>> 762 select BOOT_ELF32
>> 763 select SIBYTE_BCM1120
>> 764 select SWAP_IO_SPACE
>> 765 select SYS_HAS_CPU_SB1
>> 766 select SYS_SUPPORTS_BIG_ENDIAN
>> 767 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 768
>> 769 config SIBYTE_CRHONE
>> 770 bool "Sibyte BCM91125C-CRhone"
>> 771 select BOOT_ELF32
>> 772 select SIBYTE_BCM1125
>> 773 select SWAP_IO_SPACE
>> 774 select SYS_HAS_CPU_SB1
>> 775 select SYS_SUPPORTS_BIG_ENDIAN
>> 776 select SYS_SUPPORTS_HIGHMEM
>> 777 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 778
>> 779 config SIBYTE_RHONE
>> 780 bool "Sibyte BCM91125E-Rhone"
>> 781 select BOOT_ELF32
>> 782 select SIBYTE_BCM1125H
>> 783 select SWAP_IO_SPACE
>> 784 select SYS_HAS_CPU_SB1
>> 785 select SYS_SUPPORTS_BIG_ENDIAN
>> 786 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 787
>> 788 config SIBYTE_SWARM
>> 789 bool "Sibyte BCM91250A-SWARM"
>> 790 select BOOT_ELF32
>> 791 select HAVE_PATA_PLATFORM
>> 792 select SIBYTE_SB1250
>> 793 select SWAP_IO_SPACE
>> 794 select SYS_HAS_CPU_SB1
>> 795 select SYS_SUPPORTS_BIG_ENDIAN
>> 796 select SYS_SUPPORTS_HIGHMEM
>> 797 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 798 select ZONE_DMA32 if 64BIT
>> 799 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 800
>> 801 config SIBYTE_LITTLESUR
>> 802 bool "Sibyte BCM91250C2-LittleSur"
>> 803 select BOOT_ELF32
>> 804 select HAVE_PATA_PLATFORM
>> 805 select SIBYTE_SB1250
>> 806 select SWAP_IO_SPACE
>> 807 select SYS_HAS_CPU_SB1
>> 808 select SYS_SUPPORTS_BIG_ENDIAN
>> 809 select SYS_SUPPORTS_HIGHMEM
>> 810 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 811 select ZONE_DMA32 if 64BIT
>> 812
>> 813 config SIBYTE_SENTOSA
>> 814 bool "Sibyte BCM91250E-Sentosa"
>> 815 select BOOT_ELF32
>> 816 select SIBYTE_SB1250
>> 817 select SWAP_IO_SPACE
>> 818 select SYS_HAS_CPU_SB1
>> 819 select SYS_SUPPORTS_BIG_ENDIAN
>> 820 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 821 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 822
>> 823 config SIBYTE_BIGSUR
>> 824 bool "Sibyte BCM91480B-BigSur"
>> 825 select BOOT_ELF32
>> 826 select NR_CPUS_DEFAULT_4
>> 827 select SIBYTE_BCM1x80
>> 828 select SWAP_IO_SPACE
>> 829 select SYS_HAS_CPU_SB1
>> 830 select SYS_SUPPORTS_BIG_ENDIAN
>> 831 select SYS_SUPPORTS_HIGHMEM
>> 832 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 833 select ZONE_DMA32 if 64BIT
>> 834 select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
>> 835
>> 836 config SNI_RM
>> 837 bool "SNI RM200/300/400"
>> 838 select FW_ARC if CPU_LITTLE_ENDIAN
>> 839 select FW_ARC32 if CPU_LITTLE_ENDIAN
>> 840 select FW_SNIPROM if CPU_BIG_ENDIAN
>> 841 select ARCH_MAY_HAVE_PC_FDC
>> 842 select ARCH_MIGHT_HAVE_PC_PARPORT
>> 843 select ARCH_MIGHT_HAVE_PC_SERIO
>> 844 select BOOT_ELF32
>> 845 select CEVT_R4K
>> 846 select CSRC_R4K
>> 847 select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
>> 848 select DMA_NONCOHERENT
>> 849 select GENERIC_ISA_DMA
>> 850 select HAVE_EISA
>> 851 select HAVE_PCSPKR_PLATFORM
>> 852 select HAVE_PCI
>> 853 select IRQ_MIPS_CPU
>> 854 select I8253
>> 855 select I8259
>> 856 select ISA
>> 857 select SWAP_IO_SPACE if CPU_BIG_ENDIAN
>> 858 select SYS_HAS_CPU_R4X00
>> 859 select SYS_HAS_CPU_R5000
>> 860 select SYS_HAS_CPU_R10000
>> 861 select R5000_CPU_SCACHE
>> 862 select SYS_HAS_EARLY_PRINTK
>> 863 select SYS_SUPPORTS_32BIT_KERNEL
>> 864 select SYS_SUPPORTS_64BIT_KERNEL
>> 865 select SYS_SUPPORTS_BIG_ENDIAN
>> 866 select SYS_SUPPORTS_HIGHMEM
>> 867 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 868 help
>> 869 The SNI RM200/300/400 are MIPS-based machines manufactured by
>> 870 Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
>> 871 Technology and now in turn merged with Fujitsu. Say Y here to
>> 872 support this machine type.
>> 873
>> 874 config MACH_TX39XX
>> 875 bool "Toshiba TX39 series based machines"
>> 876
>> 877 config MACH_TX49XX
>> 878 bool "Toshiba TX49 series based machines"
>> 879
>> 880 config MIKROTIK_RB532
>> 881 bool "Mikrotik RB532 boards"
>> 882 select CEVT_R4K
>> 883 select CSRC_R4K
>> 884 select DMA_NONCOHERENT
>> 885 select HAVE_PCI
>> 886 select IRQ_MIPS_CPU
>> 887 select SYS_HAS_CPU_MIPS32_R1
>> 888 select SYS_SUPPORTS_32BIT_KERNEL
>> 889 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 890 select SWAP_IO_SPACE
>> 891 select BOOT_RAW
>> 892 select GPIOLIB
>> 893 select MIPS_L1_CACHE_SHIFT_4
>> 894 help
>> 895 Support the Mikrotik(tm) RouterBoard 532 series,
>> 896 based on the IDT RC32434 SoC.
>> 897
>> 898 config CAVIUM_OCTEON_SOC
>> 899 bool "Cavium Networks Octeon SoC based boards"
>> 900 select CEVT_R4K
>> 901 select ARCH_HAS_PHYS_TO_DMA
>> 902 select HAVE_RAPIDIO
>> 903 select PHYS_ADDR_T_64BIT
>> 904 select SYS_SUPPORTS_64BIT_KERNEL
>> 905 select SYS_SUPPORTS_BIG_ENDIAN
>> 906 select EDAC_SUPPORT
>> 907 select EDAC_ATOMIC_SCRUB
>> 908 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 909 select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
>> 910 select SYS_HAS_EARLY_PRINTK
>> 911 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 912 select HAVE_PCI
>> 913 select ZONE_DMA32
>> 914 select HOLES_IN_ZONE
>> 915 select GPIOLIB
>> 916 select LIBFDT
>> 917 select USE_OF
>> 918 select ARCH_SPARSEMEM_ENABLE
>> 919 select SYS_SUPPORTS_SMP
>> 920 select NR_CPUS_DEFAULT_64
>> 921 select MIPS_NR_CPU_NR_MAP_1024
>> 922 select BUILTIN_DTB
>> 923 select MTD_COMPLEX_MAPPINGS
>> 924 select SWIOTLB
>> 925 select SYS_SUPPORTS_RELOCATABLE
>> 926 help
>> 927 This option supports all of the Octeon reference boards from Cavium
>> 928 Networks. It builds a kernel that dynamically determines the Octeon
>> 929 CPU type and supports all known board reference implementations.
>> 930 Some of the supported boards are:
>> 931 EBT3000
>> 932 EBH3000
>> 933 EBH3100
>> 934 Thunder
>> 935 Kodama
>> 936 Hikari
>> 937 Say Y here for most Octeon reference boards.
>> 938
>> 939 config NLM_XLR_BOARD
>> 940 bool "Netlogic XLR/XLS based systems"
>> 941 select BOOT_ELF32
>> 942 select NLM_COMMON
>> 943 select SYS_HAS_CPU_XLR
>> 944 select SYS_SUPPORTS_SMP
>> 945 select HAVE_PCI
>> 946 select SWAP_IO_SPACE
>> 947 select SYS_SUPPORTS_32BIT_KERNEL
>> 948 select SYS_SUPPORTS_64BIT_KERNEL
>> 949 select PHYS_ADDR_T_64BIT
>> 950 select SYS_SUPPORTS_BIG_ENDIAN
>> 951 select SYS_SUPPORTS_HIGHMEM
>> 952 select NR_CPUS_DEFAULT_32
>> 953 select CEVT_R4K
>> 954 select CSRC_R4K
>> 955 select IRQ_MIPS_CPU
>> 956 select ZONE_DMA32 if 64BIT
>> 957 select SYNC_R4K
>> 958 select SYS_HAS_EARLY_PRINTK
>> 959 select SYS_SUPPORTS_ZBOOT
>> 960 select SYS_SUPPORTS_ZBOOT_UART16550
>> 961 help
>> 962 Support for systems based on Netlogic XLR and XLS processors.
>> 963 Say Y here if you have a XLR or XLS based board.
>> 964
>> 965 config NLM_XLP_BOARD
>> 966 bool "Netlogic XLP based systems"
>> 967 select BOOT_ELF32
>> 968 select NLM_COMMON
>> 969 select SYS_HAS_CPU_XLP
>> 970 select SYS_SUPPORTS_SMP
>> 971 select HAVE_PCI
>> 972 select SYS_SUPPORTS_32BIT_KERNEL
>> 973 select SYS_SUPPORTS_64BIT_KERNEL
>> 974 select PHYS_ADDR_T_64BIT
>> 975 select GPIOLIB
>> 976 select SYS_SUPPORTS_BIG_ENDIAN
>> 977 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 978 select SYS_SUPPORTS_HIGHMEM
>> 979 select NR_CPUS_DEFAULT_32
>> 980 select CEVT_R4K
>> 981 select CSRC_R4K
>> 982 select IRQ_MIPS_CPU
>> 983 select ZONE_DMA32 if 64BIT
>> 984 select SYNC_R4K
>> 985 select SYS_HAS_EARLY_PRINTK
>> 986 select USE_OF
>> 987 select SYS_SUPPORTS_ZBOOT
>> 988 select SYS_SUPPORTS_ZBOOT_UART16550
>> 989 help
>> 990 This board is based on Netlogic XLP Processor.
>> 991 Say Y here if you have a XLP based board.
>> 992
>> 993 config MIPS_PARAVIRT
>> 994 bool "Para-Virtualized guest system"
>> 995 select CEVT_R4K
>> 996 select CSRC_R4K
>> 997 select SYS_SUPPORTS_64BIT_KERNEL
>> 998 select SYS_SUPPORTS_32BIT_KERNEL
>> 999 select SYS_SUPPORTS_BIG_ENDIAN
>> 1000 select SYS_SUPPORTS_SMP
>> 1001 select NR_CPUS_DEFAULT_4
>> 1002 select SYS_HAS_EARLY_PRINTK
>> 1003 select SYS_HAS_CPU_MIPS32_R2
>> 1004 select SYS_HAS_CPU_MIPS64_R2
>> 1005 select SYS_HAS_CPU_CAVIUM_OCTEON
>> 1006 select HAVE_PCI
>> 1007 select SWAP_IO_SPACE
60 help 1008 help
61 Xtensa processors are 32-bit RISC ma !! 1009 This option supports guest running under ????
62 primarily for embedded systems. The !! 1010
63 configurable and extensible. The Li !! 1011 endchoice
64 architecture supports all processor !! 1012
65 with reasonable minimum requirements !! 1013 source "arch/mips/alchemy/Kconfig"
66 a home page at <http://www.linux-xte !! 1014 source "arch/mips/ath25/Kconfig"
>> 1015 source "arch/mips/ath79/Kconfig"
>> 1016 source "arch/mips/bcm47xx/Kconfig"
>> 1017 source "arch/mips/bcm63xx/Kconfig"
>> 1018 source "arch/mips/bmips/Kconfig"
>> 1019 source "arch/mips/generic/Kconfig"
>> 1020 source "arch/mips/jazz/Kconfig"
>> 1021 source "arch/mips/jz4740/Kconfig"
>> 1022 source "arch/mips/lantiq/Kconfig"
>> 1023 source "arch/mips/lasat/Kconfig"
>> 1024 source "arch/mips/pic32/Kconfig"
>> 1025 source "arch/mips/pistachio/Kconfig"
>> 1026 source "arch/mips/pmcs-msp71xx/Kconfig"
>> 1027 source "arch/mips/ralink/Kconfig"
>> 1028 source "arch/mips/sgi-ip27/Kconfig"
>> 1029 source "arch/mips/sibyte/Kconfig"
>> 1030 source "arch/mips/txx9/Kconfig"
>> 1031 source "arch/mips/vr41xx/Kconfig"
>> 1032 source "arch/mips/cavium-octeon/Kconfig"
>> 1033 source "arch/mips/loongson32/Kconfig"
>> 1034 source "arch/mips/loongson64/Kconfig"
>> 1035 source "arch/mips/netlogic/Kconfig"
>> 1036 source "arch/mips/paravirt/Kconfig"
>> 1037
>> 1038 endmenu
>> 1039
>> 1040 config RWSEM_GENERIC_SPINLOCK
>> 1041 bool
>> 1042 default y
>> 1043
>> 1044 config RWSEM_XCHGADD_ALGORITHM
>> 1045 bool
67 1046
68 config GENERIC_HWEIGHT 1047 config GENERIC_HWEIGHT
69 def_bool y !! 1048 bool
>> 1049 default y
70 1050
71 config ARCH_HAS_ILOG2_U32 !! 1051 config GENERIC_CALIBRATE_DELAY
72 def_bool n !! 1052 bool
>> 1053 default y
73 1054
74 config ARCH_HAS_ILOG2_U64 !! 1055 config SCHED_OMIT_FRAME_POINTER
75 def_bool n !! 1056 bool
>> 1057 default y
76 1058
77 config ARCH_MTD_XIP !! 1059 #
78 def_bool y !! 1060 # Select some configuration options automatically based on user selections.
>> 1061 #
>> 1062 config FW_ARC
>> 1063 bool
>> 1064
>> 1065 config ARCH_MAY_HAVE_PC_FDC
>> 1066 bool
>> 1067
>> 1068 config BOOT_RAW
>> 1069 bool
>> 1070
>> 1071 config CEVT_BCM1480
>> 1072 bool
>> 1073
>> 1074 config CEVT_DS1287
>> 1075 bool
>> 1076
>> 1077 config CEVT_GT641XX
>> 1078 bool
>> 1079
>> 1080 config CEVT_R4K
>> 1081 bool
>> 1082
>> 1083 config CEVT_SB1250
>> 1084 bool
>> 1085
>> 1086 config CEVT_TXX9
>> 1087 bool
>> 1088
>> 1089 config CSRC_BCM1480
>> 1090 bool
>> 1091
>> 1092 config CSRC_IOASIC
>> 1093 bool
>> 1094
>> 1095 config CSRC_R4K
>> 1096 bool
>> 1097
>> 1098 config CSRC_SB1250
>> 1099 bool
>> 1100
>> 1101 config MIPS_CLOCK_VSYSCALL
>> 1102 def_bool CSRC_R4K || CLKSRC_MIPS_GIC
>> 1103
>> 1104 config GPIO_TXX9
>> 1105 select GPIOLIB
>> 1106 bool
>> 1107
>> 1108 config FW_CFE
>> 1109 bool
>> 1110
>> 1111 config ARCH_SUPPORTS_UPROBES
>> 1112 bool
>> 1113
>> 1114 config DMA_MAYBE_COHERENT
>> 1115 select ARCH_HAS_DMA_COHERENCE_H
>> 1116 select DMA_NONCOHERENT
>> 1117 bool
>> 1118
>> 1119 config DMA_PERDEV_COHERENT
>> 1120 bool
>> 1121 select DMA_NONCOHERENT
>> 1122
>> 1123 config DMA_NONCOHERENT
>> 1124 bool
>> 1125 select ARCH_HAS_DMA_MMAP_PGPROT
>> 1126 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
>> 1127 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 1128 select NEED_DMA_MAP_STATE
>> 1129 select ARCH_HAS_DMA_COHERENT_TO_PFN
>> 1130 select DMA_NONCOHERENT_CACHE_SYNC
>> 1131
>> 1132 config SYS_HAS_EARLY_PRINTK
>> 1133 bool
>> 1134
>> 1135 config SYS_SUPPORTS_HOTPLUG_CPU
>> 1136 bool
>> 1137
>> 1138 config MIPS_BONITO64
>> 1139 bool
>> 1140
>> 1141 config MIPS_MSC
>> 1142 bool
>> 1143
>> 1144 config MIPS_NILE4
>> 1145 bool
>> 1146
>> 1147 config SYNC_R4K
>> 1148 bool
>> 1149
>> 1150 config MIPS_MACHINE
>> 1151 def_bool n
79 1152
80 config NO_IOPORT_MAP 1153 config NO_IOPORT_MAP
81 def_bool n 1154 def_bool n
82 1155
83 config HZ !! 1156 config GENERIC_CSUM
84 int !! 1157 bool
85 default 100 !! 1158 default y if !CPU_HAS_LOAD_STORE_LR
86 1159
87 config LOCKDEP_SUPPORT !! 1160 config GENERIC_ISA_DMA
88 def_bool y !! 1161 bool
>> 1162 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
>> 1163 select ISA_DMA_API
89 1164
90 config STACKTRACE_SUPPORT !! 1165 config GENERIC_ISA_DMA_SUPPORT_BROKEN
>> 1166 bool
>> 1167 select GENERIC_ISA_DMA
>> 1168
>> 1169 config ISA_DMA_API
>> 1170 bool
>> 1171
>> 1172 config HOLES_IN_ZONE
>> 1173 bool
>> 1174
>> 1175 config SYS_SUPPORTS_RELOCATABLE
>> 1176 bool
>> 1177 help
>> 1178 Selected if the platform supports relocating the kernel.
>> 1179 The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
>> 1180 to allow access to command line and entropy sources.
>> 1181
>> 1182 config MIPS_CBPF_JIT
91 def_bool y 1183 def_bool y
>> 1184 depends on BPF_JIT && HAVE_CBPF_JIT
92 1185
93 config MMU !! 1186 config MIPS_EBPF_JIT
94 def_bool n !! 1187 def_bool y
95 select PFAULT !! 1188 depends on BPF_JIT && HAVE_EBPF_JIT
96 1189
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 1190
100 config KASAN_SHADOW_OFFSET !! 1191 #
101 hex !! 1192 # Endianness selection. Sufficiently obscure so many users don't know what to
102 default 0x6e400000 !! 1193 # answer,so we try hard to limit the available choices. Also the use of a
>> 1194 # choice statement should be more obvious to the user.
>> 1195 #
>> 1196 choice
>> 1197 prompt "Endianness selection"
>> 1198 help
>> 1199 Some MIPS machines can be configured for either little or big endian
>> 1200 byte order. These modes require different kernels and a different
>> 1201 Linux distribution. In general there is one preferred byteorder for a
>> 1202 particular system but some systems are just as commonly used in the
>> 1203 one or the other endianness.
103 1204
104 config CPU_BIG_ENDIAN 1205 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 1206 bool "Big endian"
>> 1207 depends on SYS_SUPPORTS_BIG_ENDIAN
106 1208
107 config CPU_LITTLE_ENDIAN 1209 config CPU_LITTLE_ENDIAN
108 def_bool !CPU_BIG_ENDIAN !! 1210 bool "Little endian"
>> 1211 depends on SYS_SUPPORTS_LITTLE_ENDIAN
109 1212
110 config CC_HAVE_CALL0_ABI !! 1213 endchoice
111 def_bool $(success,test "$(shell,echo <<
112 1214
113 menu "Processor type and features" !! 1215 config EXPORT_UASM
>> 1216 bool
114 1217
115 choice !! 1218 config SYS_SUPPORTS_APM_EMULATION
116 prompt "Xtensa Processor Configuration !! 1219 bool
117 default XTENSA_VARIANT_FSF <<
118 1220
119 config XTENSA_VARIANT_FSF !! 1221 config SYS_SUPPORTS_BIG_ENDIAN
120 bool "fsf - default (not generic) conf !! 1222 bool
121 select MMU <<
122 1223
123 config XTENSA_VARIANT_DC232B !! 1224 config SYS_SUPPORTS_LITTLE_ENDIAN
124 bool "dc232b - Diamond 232L Standard C !! 1225 bool
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 1226
130 config XTENSA_VARIANT_DC233C !! 1227 config SYS_SUPPORTS_HUGETLBFS
131 bool "dc233c - Diamond 233L Standard C !! 1228 bool
132 select MMU !! 1229 depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
133 select HAVE_XTENSA_GPIO32 !! 1230 default y
134 help !! 1231
135 This variant refers to Tensilica's D !! 1232 config MIPS_HUGE_TLB_SUPPORT
>> 1233 def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
>> 1234
>> 1235 config IRQ_CPU_RM7K
>> 1236 bool
>> 1237
>> 1238 config IRQ_MSP_SLP
>> 1239 bool
>> 1240
>> 1241 config IRQ_MSP_CIC
>> 1242 bool
>> 1243
>> 1244 config IRQ_TXX9
>> 1245 bool
>> 1246
>> 1247 config IRQ_GT641XX
>> 1248 bool
>> 1249
>> 1250 config PCI_GT64XXX_PCI0
>> 1251 bool
>> 1252
>> 1253 config NO_EXCEPT_FILL
>> 1254 bool
>> 1255
>> 1256 config SOC_EMMA2RH
>> 1257 bool
>> 1258 select CEVT_R4K
>> 1259 select CSRC_R4K
>> 1260 select DMA_NONCOHERENT
>> 1261 select IRQ_MIPS_CPU
>> 1262 select SWAP_IO_SPACE
>> 1263 select SYS_HAS_CPU_R5500
>> 1264 select SYS_SUPPORTS_32BIT_KERNEL
>> 1265 select SYS_SUPPORTS_64BIT_KERNEL
>> 1266 select SYS_SUPPORTS_BIG_ENDIAN
136 1267
137 config XTENSA_VARIANT_CUSTOM !! 1268 config SOC_PNX833X
138 bool "Custom Xtensa processor configur !! 1269 bool
139 select HAVE_XTENSA_GPIO32 !! 1270 select CEVT_R4K
>> 1271 select CSRC_R4K
>> 1272 select IRQ_MIPS_CPU
>> 1273 select DMA_NONCOHERENT
>> 1274 select SYS_HAS_CPU_MIPS32_R2
>> 1275 select SYS_SUPPORTS_32BIT_KERNEL
>> 1276 select SYS_SUPPORTS_LITTLE_ENDIAN
>> 1277 select SYS_SUPPORTS_BIG_ENDIAN
>> 1278 select SYS_SUPPORTS_MIPS16
>> 1279 select CPU_MIPSR2_IRQ_VI
>> 1280
>> 1281 config SOC_PNX8335
>> 1282 bool
>> 1283 select SOC_PNX833X
>> 1284
>> 1285 config MIPS_SPRAM
>> 1286 bool
>> 1287
>> 1288 config SWAP_IO_SPACE
>> 1289 bool
>> 1290
>> 1291 config SGI_HAS_INDYDOG
>> 1292 bool
>> 1293
>> 1294 config SGI_HAS_HAL2
>> 1295 bool
>> 1296
>> 1297 config SGI_HAS_SEEQ
>> 1298 bool
>> 1299
>> 1300 config SGI_HAS_WD93
>> 1301 bool
>> 1302
>> 1303 config SGI_HAS_ZILOG
>> 1304 bool
>> 1305
>> 1306 config SGI_HAS_I8042
>> 1307 bool
>> 1308
>> 1309 config DEFAULT_SGI_PARTITION
>> 1310 bool
>> 1311
>> 1312 config FW_ARC32
>> 1313 bool
>> 1314
>> 1315 config FW_SNIPROM
>> 1316 bool
>> 1317
>> 1318 config BOOT_ELF32
>> 1319 bool
>> 1320
>> 1321 config MIPS_L1_CACHE_SHIFT_4
>> 1322 bool
>> 1323
>> 1324 config MIPS_L1_CACHE_SHIFT_5
>> 1325 bool
>> 1326
>> 1327 config MIPS_L1_CACHE_SHIFT_6
>> 1328 bool
>> 1329
>> 1330 config MIPS_L1_CACHE_SHIFT_7
>> 1331 bool
>> 1332
>> 1333 config MIPS_L1_CACHE_SHIFT
>> 1334 int
>> 1335 default "7" if MIPS_L1_CACHE_SHIFT_7
>> 1336 default "6" if MIPS_L1_CACHE_SHIFT_6
>> 1337 default "5" if MIPS_L1_CACHE_SHIFT_5
>> 1338 default "4" if MIPS_L1_CACHE_SHIFT_4
>> 1339 default "5"
>> 1340
>> 1341 config HAVE_STD_PC_SERIAL_PORT
>> 1342 bool
>> 1343
>> 1344 config ARC_CONSOLE
>> 1345 bool "ARC console support"
>> 1346 depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
>> 1347
>> 1348 config ARC_MEMORY
>> 1349 bool
>> 1350 depends on MACH_JAZZ || SNI_RM || SGI_IP32
>> 1351 default y
>> 1352
>> 1353 config ARC_PROMLIB
>> 1354 bool
>> 1355 depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
>> 1356 default y
>> 1357
>> 1358 config FW_ARC64
>> 1359 bool
>> 1360
>> 1361 config BOOT_ELF64
>> 1362 bool
>> 1363
>> 1364 menu "CPU selection"
>> 1365
>> 1366 choice
>> 1367 prompt "CPU type"
>> 1368 default CPU_R4X00
>> 1369
>> 1370 config CPU_LOONGSON3
>> 1371 bool "Loongson 3 CPU"
>> 1372 depends on SYS_HAS_CPU_LOONGSON3
>> 1373 select ARCH_HAS_PHYS_TO_DMA
>> 1374 select CPU_SUPPORTS_64BIT_KERNEL
>> 1375 select CPU_SUPPORTS_HIGHMEM
>> 1376 select CPU_SUPPORTS_HUGEPAGES
>> 1377 select CPU_HAS_LOAD_STORE_LR
>> 1378 select WEAK_ORDERING
>> 1379 select WEAK_REORDERING_BEYOND_LLSC
>> 1380 select MIPS_PGD_C0_CONTEXT
>> 1381 select MIPS_L1_CACHE_SHIFT_6
>> 1382 select GPIOLIB
>> 1383 select SWIOTLB
140 help 1384 help
141 Select this variant to use a custom !! 1385 The Loongson 3 processor implements the MIPS64R2 instruction
142 You will be prompted for a processor !! 1386 set with many extensions.
143 endchoice <<
144 1387
145 config XTENSA_VARIANT_CUSTOM_NAME !! 1388 config LOONGSON3_ENHANCEMENT
146 string "Xtensa Processor Custom Core V !! 1389 bool "New Loongson 3 CPU Enhancements"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n 1390 default n
>> 1391 select CPU_MIPSR2
>> 1392 select CPU_HAS_PREFETCH
>> 1393 depends on CPU_LOONGSON3
>> 1394 help
>> 1395 New Loongson 3 CPU (since Loongson-3A R2, as opposed to Loongson-3A
>> 1396 R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
>> 1397 FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPv2 ASE, User
>> 1398 Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
>> 1399 Fast TLB refill support, etc.
>> 1400
>> 1401 This option enable those enhancements which are not probed at run
>> 1402 time. If you want a generic kernel to run on all Loongson 3 machines,
>> 1403 please say 'N' here. If you want a high-performance kernel to run on
>> 1404 new Loongson 3 machines only, please say 'Y' here.
>> 1405
>> 1406 config CPU_LOONGSON3_WORKAROUNDS
>> 1407 bool "Old Loongson 3 LLSC Workarounds"
>> 1408 default y if SMP
>> 1409 depends on CPU_LOONGSON3
>> 1410 help
>> 1411 Loongson 3 processors have the llsc issues which require workarounds.
>> 1412 Without workarounds the system may hang unexpectedly.
>> 1413
>> 1414 Newer Loongson 3 will fix these issues and no workarounds are needed.
>> 1415 The workarounds have no significant side effect on them but may
>> 1416 decrease the performance of the system so this option should be
>> 1417 disabled unless the kernel is intended to be run on old systems.
>> 1418
>> 1419 If unsure, please say Y.
>> 1420
>> 1421 config CPU_LOONGSON2E
>> 1422 bool "Loongson 2E"
>> 1423 depends on SYS_HAS_CPU_LOONGSON2E
>> 1424 select CPU_LOONGSON2
>> 1425 help
>> 1426 The Loongson 2E processor implements the MIPS III instruction set
>> 1427 with many extensions.
>> 1428
>> 1429 It has an internal FPGA northbridge, which is compatible to
>> 1430 bonito64.
>> 1431
>> 1432 config CPU_LOONGSON2F
>> 1433 bool "Loongson 2F"
>> 1434 depends on SYS_HAS_CPU_LOONGSON2F
>> 1435 select CPU_LOONGSON2
>> 1436 select GPIOLIB
>> 1437 help
>> 1438 The Loongson 2F processor implements the MIPS III instruction set
>> 1439 with many extensions.
>> 1440
>> 1441 Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
>> 1442 have a similar programming interface with FPGA northbridge used in
>> 1443 Loongson2E.
>> 1444
>> 1445 config CPU_LOONGSON1B
>> 1446 bool "Loongson 1B"
>> 1447 depends on SYS_HAS_CPU_LOONGSON1B
>> 1448 select CPU_LOONGSON1
>> 1449 select LEDS_GPIO_REGISTER
>> 1450 help
>> 1451 The Loongson 1B is a 32-bit SoC, which implements the MIPS32
>> 1452 Release 1 instruction set and part of the MIPS32 Release 2
>> 1453 instruction set.
>> 1454
>> 1455 config CPU_LOONGSON1C
>> 1456 bool "Loongson 1C"
>> 1457 depends on SYS_HAS_CPU_LOONGSON1C
>> 1458 select CPU_LOONGSON1
>> 1459 select LEDS_GPIO_REGISTER
>> 1460 help
>> 1461 The Loongson 1C is a 32-bit SoC, which implements the MIPS32
>> 1462 Release 1 instruction set and part of the MIPS32 Release 2
>> 1463 instruction set.
>> 1464
>> 1465 config CPU_MIPS32_R1
>> 1466 bool "MIPS32 Release 1"
>> 1467 depends on SYS_HAS_CPU_MIPS32_R1
>> 1468 select CPU_HAS_PREFETCH
>> 1469 select CPU_HAS_LOAD_STORE_LR
>> 1470 select CPU_SUPPORTS_32BIT_KERNEL
>> 1471 select CPU_SUPPORTS_HIGHMEM
>> 1472 help
>> 1473 Choose this option to build a kernel for release 1 or later of the
>> 1474 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1475 MIPS processor are based on a MIPS32 processor. If you know the
>> 1476 specific type of processor in your system, choose those that one
>> 1477 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1478 Release 2 of the MIPS32 architecture is available since several
>> 1479 years so chances are you even have a MIPS32 Release 2 processor
>> 1480 in which case you should choose CPU_MIPS32_R2 instead for better
>> 1481 performance.
>> 1482
>> 1483 config CPU_MIPS32_R2
>> 1484 bool "MIPS32 Release 2"
>> 1485 depends on SYS_HAS_CPU_MIPS32_R2
>> 1486 select CPU_HAS_PREFETCH
>> 1487 select CPU_HAS_LOAD_STORE_LR
>> 1488 select CPU_SUPPORTS_32BIT_KERNEL
>> 1489 select CPU_SUPPORTS_HIGHMEM
>> 1490 select CPU_SUPPORTS_MSA
>> 1491 select HAVE_KVM
>> 1492 help
>> 1493 Choose this option to build a kernel for release 2 or later of the
>> 1494 MIPS32 architecture. Most modern embedded systems with a 32-bit
>> 1495 MIPS processor are based on a MIPS32 processor. If you know the
>> 1496 specific type of processor in your system, choose those that one
>> 1497 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
>> 1498
>> 1499 config CPU_MIPS32_R6
>> 1500 bool "MIPS32 Release 6"
>> 1501 depends on SYS_HAS_CPU_MIPS32_R6
>> 1502 select CPU_HAS_PREFETCH
>> 1503 select CPU_SUPPORTS_32BIT_KERNEL
>> 1504 select CPU_SUPPORTS_HIGHMEM
>> 1505 select CPU_SUPPORTS_MSA
>> 1506 select HAVE_KVM
>> 1507 select MIPS_O32_FP64_SUPPORT
>> 1508 help
>> 1509 Choose this option to build a kernel for release 6 or later of the
>> 1510 MIPS32 architecture. New MIPS processors, starting with the Warrior
>> 1511 family, are based on a MIPS32r6 processor. If you own an older
>> 1512 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
>> 1513
>> 1514 config CPU_MIPS64_R1
>> 1515 bool "MIPS64 Release 1"
>> 1516 depends on SYS_HAS_CPU_MIPS64_R1
>> 1517 select CPU_HAS_PREFETCH
>> 1518 select CPU_HAS_LOAD_STORE_LR
>> 1519 select CPU_SUPPORTS_32BIT_KERNEL
>> 1520 select CPU_SUPPORTS_64BIT_KERNEL
>> 1521 select CPU_SUPPORTS_HIGHMEM
>> 1522 select CPU_SUPPORTS_HUGEPAGES
>> 1523 help
>> 1524 Choose this option to build a kernel for release 1 or later of the
>> 1525 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1526 MIPS processor are based on a MIPS64 processor. If you know the
>> 1527 specific type of processor in your system, choose those that one
>> 1528 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1529 Release 2 of the MIPS64 architecture is available since several
>> 1530 years so chances are you even have a MIPS64 Release 2 processor
>> 1531 in which case you should choose CPU_MIPS64_R2 instead for better
>> 1532 performance.
>> 1533
>> 1534 config CPU_MIPS64_R2
>> 1535 bool "MIPS64 Release 2"
>> 1536 depends on SYS_HAS_CPU_MIPS64_R2
>> 1537 select CPU_HAS_PREFETCH
>> 1538 select CPU_HAS_LOAD_STORE_LR
>> 1539 select CPU_SUPPORTS_32BIT_KERNEL
>> 1540 select CPU_SUPPORTS_64BIT_KERNEL
>> 1541 select CPU_SUPPORTS_HIGHMEM
>> 1542 select CPU_SUPPORTS_HUGEPAGES
>> 1543 select CPU_SUPPORTS_MSA
>> 1544 select HAVE_KVM
>> 1545 help
>> 1546 Choose this option to build a kernel for release 2 or later of the
>> 1547 MIPS64 architecture. Many modern embedded systems with a 64-bit
>> 1548 MIPS processor are based on a MIPS64 processor. If you know the
>> 1549 specific type of processor in your system, choose those that one
>> 1550 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
>> 1551
>> 1552 config CPU_MIPS64_R6
>> 1553 bool "MIPS64 Release 6"
>> 1554 depends on SYS_HAS_CPU_MIPS64_R6
>> 1555 select CPU_HAS_PREFETCH
>> 1556 select CPU_SUPPORTS_32BIT_KERNEL
>> 1557 select CPU_SUPPORTS_64BIT_KERNEL
>> 1558 select CPU_SUPPORTS_HIGHMEM
>> 1559 select CPU_SUPPORTS_MSA
>> 1560 select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
>> 1561 select HAVE_KVM
>> 1562 help
>> 1563 Choose this option to build a kernel for release 6 or later of the
>> 1564 MIPS64 architecture. New MIPS processors, starting with the Warrior
>> 1565 family, are based on a MIPS64r6 processor. If you own an older
>> 1566 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
>> 1567
>> 1568 config CPU_R3000
>> 1569 bool "R3000"
>> 1570 depends on SYS_HAS_CPU_R3000
>> 1571 select CPU_HAS_WB
>> 1572 select CPU_HAS_LOAD_STORE_LR
>> 1573 select CPU_SUPPORTS_32BIT_KERNEL
>> 1574 select CPU_SUPPORTS_HIGHMEM
>> 1575 help
>> 1576 Please make sure to pick the right CPU type. Linux/MIPS is not
>> 1577 designed to be generic, i.e. Kernels compiled for R3000 CPUs will
>> 1578 *not* work on R4000 machines and vice versa. However, since most
>> 1579 of the supported machines have an R4000 (or similar) CPU, R4x00
>> 1580 might be a safe bet. If the resulting kernel does not work,
>> 1581 try to recompile with R3000.
>> 1582
>> 1583 config CPU_TX39XX
>> 1584 bool "R39XX"
>> 1585 depends on SYS_HAS_CPU_TX39XX
>> 1586 select CPU_SUPPORTS_32BIT_KERNEL
>> 1587 select CPU_HAS_LOAD_STORE_LR
>> 1588
>> 1589 config CPU_VR41XX
>> 1590 bool "R41xx"
>> 1591 depends on SYS_HAS_CPU_VR41XX
>> 1592 select CPU_SUPPORTS_32BIT_KERNEL
>> 1593 select CPU_SUPPORTS_64BIT_KERNEL
>> 1594 select CPU_HAS_LOAD_STORE_LR
>> 1595 help
>> 1596 The options selects support for the NEC VR4100 series of processors.
>> 1597 Only choose this option if you have one of these processors as a
>> 1598 kernel built with this option will not run on any other type of
>> 1599 processor or vice versa.
>> 1600
>> 1601 config CPU_R4300
>> 1602 bool "R4300"
>> 1603 depends on SYS_HAS_CPU_R4300
>> 1604 select CPU_SUPPORTS_32BIT_KERNEL
>> 1605 select CPU_SUPPORTS_64BIT_KERNEL
>> 1606 select CPU_HAS_LOAD_STORE_LR
>> 1607 help
>> 1608 MIPS Technologies R4300-series processors.
>> 1609
>> 1610 config CPU_R4X00
>> 1611 bool "R4x00"
>> 1612 depends on SYS_HAS_CPU_R4X00
>> 1613 select CPU_SUPPORTS_32BIT_KERNEL
>> 1614 select CPU_SUPPORTS_64BIT_KERNEL
>> 1615 select CPU_SUPPORTS_HUGEPAGES
>> 1616 select CPU_HAS_LOAD_STORE_LR
>> 1617 help
>> 1618 MIPS Technologies R4000-series processors other than 4300, including
>> 1619 the R4000, R4400, R4600, and 4700.
>> 1620
>> 1621 config CPU_TX49XX
>> 1622 bool "R49XX"
>> 1623 depends on SYS_HAS_CPU_TX49XX
>> 1624 select CPU_HAS_PREFETCH
>> 1625 select CPU_HAS_LOAD_STORE_LR
>> 1626 select CPU_SUPPORTS_32BIT_KERNEL
>> 1627 select CPU_SUPPORTS_64BIT_KERNEL
>> 1628 select CPU_SUPPORTS_HUGEPAGES
>> 1629
>> 1630 config CPU_R5000
>> 1631 bool "R5000"
>> 1632 depends on SYS_HAS_CPU_R5000
>> 1633 select CPU_SUPPORTS_32BIT_KERNEL
>> 1634 select CPU_SUPPORTS_64BIT_KERNEL
>> 1635 select CPU_SUPPORTS_HUGEPAGES
>> 1636 select CPU_HAS_LOAD_STORE_LR
>> 1637 help
>> 1638 MIPS Technologies R5000-series processors other than the Nevada.
>> 1639
>> 1640 config CPU_R5432
>> 1641 bool "R5432"
>> 1642 depends on SYS_HAS_CPU_R5432
>> 1643 select CPU_SUPPORTS_32BIT_KERNEL
>> 1644 select CPU_SUPPORTS_64BIT_KERNEL
>> 1645 select CPU_SUPPORTS_HUGEPAGES
>> 1646 select CPU_HAS_LOAD_STORE_LR
>> 1647
>> 1648 config CPU_R5500
>> 1649 bool "R5500"
>> 1650 depends on SYS_HAS_CPU_R5500
>> 1651 select CPU_SUPPORTS_32BIT_KERNEL
>> 1652 select CPU_SUPPORTS_64BIT_KERNEL
>> 1653 select CPU_SUPPORTS_HUGEPAGES
>> 1654 select CPU_HAS_LOAD_STORE_LR
>> 1655 help
>> 1656 NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
>> 1657 instruction set.
>> 1658
>> 1659 config CPU_NEVADA
>> 1660 bool "RM52xx"
>> 1661 depends on SYS_HAS_CPU_NEVADA
>> 1662 select CPU_SUPPORTS_32BIT_KERNEL
>> 1663 select CPU_SUPPORTS_64BIT_KERNEL
>> 1664 select CPU_SUPPORTS_HUGEPAGES
>> 1665 select CPU_HAS_LOAD_STORE_LR
>> 1666 help
>> 1667 QED / PMC-Sierra RM52xx-series ("Nevada") processors.
>> 1668
>> 1669 config CPU_R8000
>> 1670 bool "R8000"
>> 1671 depends on SYS_HAS_CPU_R8000
>> 1672 select CPU_HAS_PREFETCH
>> 1673 select CPU_HAS_LOAD_STORE_LR
>> 1674 select CPU_SUPPORTS_64BIT_KERNEL
>> 1675 help
>> 1676 MIPS Technologies R8000 processors. Note these processors are
>> 1677 uncommon and the support for them is incomplete.
>> 1678
>> 1679 config CPU_R10000
>> 1680 bool "R10000"
>> 1681 depends on SYS_HAS_CPU_R10000
>> 1682 select CPU_HAS_PREFETCH
>> 1683 select CPU_HAS_LOAD_STORE_LR
>> 1684 select CPU_SUPPORTS_32BIT_KERNEL
>> 1685 select CPU_SUPPORTS_64BIT_KERNEL
>> 1686 select CPU_SUPPORTS_HIGHMEM
>> 1687 select CPU_SUPPORTS_HUGEPAGES
>> 1688 help
>> 1689 MIPS Technologies R10000-series processors.
>> 1690
>> 1691 config CPU_RM7000
>> 1692 bool "RM7000"
>> 1693 depends on SYS_HAS_CPU_RM7000
>> 1694 select CPU_HAS_PREFETCH
>> 1695 select CPU_HAS_LOAD_STORE_LR
>> 1696 select CPU_SUPPORTS_32BIT_KERNEL
>> 1697 select CPU_SUPPORTS_64BIT_KERNEL
>> 1698 select CPU_SUPPORTS_HIGHMEM
>> 1699 select CPU_SUPPORTS_HUGEPAGES
>> 1700
>> 1701 config CPU_SB1
>> 1702 bool "SB1"
>> 1703 depends on SYS_HAS_CPU_SB1
>> 1704 select CPU_HAS_LOAD_STORE_LR
>> 1705 select CPU_SUPPORTS_32BIT_KERNEL
>> 1706 select CPU_SUPPORTS_64BIT_KERNEL
>> 1707 select CPU_SUPPORTS_HIGHMEM
>> 1708 select CPU_SUPPORTS_HUGEPAGES
>> 1709 select WEAK_ORDERING
>> 1710
>> 1711 config CPU_CAVIUM_OCTEON
>> 1712 bool "Cavium Octeon processor"
>> 1713 depends on SYS_HAS_CPU_CAVIUM_OCTEON
>> 1714 select CPU_HAS_PREFETCH
>> 1715 select CPU_HAS_LOAD_STORE_LR
>> 1716 select CPU_SUPPORTS_64BIT_KERNEL
>> 1717 select WEAK_ORDERING
>> 1718 select CPU_SUPPORTS_HIGHMEM
>> 1719 select CPU_SUPPORTS_HUGEPAGES
>> 1720 select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1721 select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
>> 1722 select MIPS_L1_CACHE_SHIFT_7
>> 1723 select HAVE_KVM
>> 1724 help
>> 1725 The Cavium Octeon processor is a highly integrated chip containing
>> 1726 many ethernet hardware widgets for networking tasks. The processor
>> 1727 can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
>> 1728 Full details can be found at http://www.caviumnetworks.com.
>> 1729
>> 1730 config CPU_BMIPS
>> 1731 bool "Broadcom BMIPS"
>> 1732 depends on SYS_HAS_CPU_BMIPS
>> 1733 select CPU_MIPS32
>> 1734 select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
>> 1735 select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
>> 1736 select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
>> 1737 select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
>> 1738 select CPU_SUPPORTS_32BIT_KERNEL
>> 1739 select DMA_NONCOHERENT
>> 1740 select IRQ_MIPS_CPU
>> 1741 select SWAP_IO_SPACE
>> 1742 select WEAK_ORDERING
>> 1743 select CPU_SUPPORTS_HIGHMEM
>> 1744 select CPU_HAS_PREFETCH
>> 1745 select CPU_HAS_LOAD_STORE_LR
>> 1746 select CPU_SUPPORTS_CPUFREQ
>> 1747 select MIPS_EXTERNAL_TIMER
>> 1748 help
>> 1749 Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
>> 1750
>> 1751 config CPU_XLR
>> 1752 bool "Netlogic XLR SoC"
>> 1753 depends on SYS_HAS_CPU_XLR
>> 1754 select CPU_HAS_LOAD_STORE_LR
>> 1755 select CPU_SUPPORTS_32BIT_KERNEL
>> 1756 select CPU_SUPPORTS_64BIT_KERNEL
>> 1757 select CPU_SUPPORTS_HIGHMEM
>> 1758 select CPU_SUPPORTS_HUGEPAGES
>> 1759 select WEAK_ORDERING
>> 1760 select WEAK_REORDERING_BEYOND_LLSC
>> 1761 help
>> 1762 Netlogic Microsystems XLR/XLS processors.
>> 1763
>> 1764 config CPU_XLP
>> 1765 bool "Netlogic XLP SoC"
>> 1766 depends on SYS_HAS_CPU_XLP
>> 1767 select CPU_SUPPORTS_32BIT_KERNEL
>> 1768 select CPU_SUPPORTS_64BIT_KERNEL
>> 1769 select CPU_SUPPORTS_HIGHMEM
>> 1770 select WEAK_ORDERING
>> 1771 select WEAK_REORDERING_BEYOND_LLSC
>> 1772 select CPU_HAS_PREFETCH
>> 1773 select CPU_HAS_LOAD_STORE_LR
>> 1774 select CPU_MIPSR2
>> 1775 select CPU_SUPPORTS_HUGEPAGES
>> 1776 select MIPS_ASID_BITS_VARIABLE
173 help 1777 help
174 Enable if core variant has Performan !! 1778 Netlogic Microsystems XLP processors.
175 External Registers Interface. !! 1779 endchoice
176 <<
177 If unsure, say N. <<
178 1780
179 config XTENSA_FAKE_NMI !! 1781 config CPU_MIPS32_3_5_FEATURES
180 bool "Treat PMM IRQ as NMI" !! 1782 bool "MIPS32 Release 3.5 Features"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV !! 1783 depends on SYS_HAS_CPU_MIPS32_R3_5
>> 1784 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 1785 help
>> 1786 Choose this option to build a kernel for release 2 or later of the
>> 1787 MIPS32 architecture including features from the 3.5 release such as
>> 1788 support for Enhanced Virtual Addressing (EVA).
>> 1789
>> 1790 config CPU_MIPS32_3_5_EVA
>> 1791 bool "Enhanced Virtual Addressing (EVA)"
>> 1792 depends on CPU_MIPS32_3_5_FEATURES
>> 1793 select EVA
>> 1794 default y
>> 1795 help
>> 1796 Choose this option if you want to enable the Enhanced Virtual
>> 1797 Addressing (EVA) on your MIPS32 core (such as proAptiv).
>> 1798 One of its primary benefits is an increase in the maximum size
>> 1799 of lowmem (up to 3GB). If unsure, say 'N' here.
>> 1800
>> 1801 config CPU_MIPS32_R5_FEATURES
>> 1802 bool "MIPS32 Release 5 Features"
>> 1803 depends on SYS_HAS_CPU_MIPS32_R5
>> 1804 depends on CPU_MIPS32_R2
>> 1805 help
>> 1806 Choose this option to build a kernel for release 2 or later of the
>> 1807 MIPS32 architecture including features from release 5 such as
>> 1808 support for Extended Physical Addressing (XPA).
>> 1809
>> 1810 config CPU_MIPS32_R5_XPA
>> 1811 bool "Extended Physical Addressing (XPA)"
>> 1812 depends on CPU_MIPS32_R5_FEATURES
>> 1813 depends on !EVA
>> 1814 depends on !PAGE_SIZE_4KB
>> 1815 depends on SYS_SUPPORTS_HIGHMEM
>> 1816 select XPA
>> 1817 select HIGHMEM
>> 1818 select PHYS_ADDR_T_64BIT
182 default n 1819 default n
183 help 1820 help
184 If PMM IRQ is the only IRQ at EXCM l !! 1821 Choose this option if you want to enable the Extended Physical
185 treat it as NMI, which improves accu !! 1822 Addressing (XPA) on your MIPS32 core (such as P5600 series). The
>> 1823 benefit is to increase physical addressing equal to or greater
>> 1824 than 40 bits. Note that this has the side effect of turning on
>> 1825 64-bit addressing which in turn makes the PTEs 64-bit in size.
>> 1826 If unsure, say 'N' here.
186 1827
187 If there are other interrupts at or !! 1828 if CPU_LOONGSON2F
188 but not above the EXCM level, PMM IR !! 1829 config CPU_NOP_WORKAROUNDS
189 but only if these IRQs are not used. !! 1830 bool
190 saying that this is not safe, and a <<
191 actually fire. <<
192 1831
193 If unsure, say N. !! 1832 config CPU_JUMP_WORKAROUNDS
>> 1833 bool
194 1834
195 config PFAULT !! 1835 config CPU_LOONGSON2F_WORKAROUNDS
196 bool "Handle protection faults" if EXP !! 1836 bool "Loongson 2F Workarounds"
197 default y 1837 default y
>> 1838 select CPU_NOP_WORKAROUNDS
>> 1839 select CPU_JUMP_WORKAROUNDS
198 help 1840 help
199 Handle protection faults. MMU config !! 1841 Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
200 noMMU configurations may disable it !! 1842 require workarounds. Without workarounds the system may hang
201 generates protection faults or fault !! 1843 unexpectedly. For more information please refer to the gas
>> 1844 -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
>> 1845
>> 1846 Loongson 2F03 and later have fixed these issues and no workarounds
>> 1847 are needed. The workarounds have no significant side effect on them
>> 1848 but may decrease the performance of the system so this option should
>> 1849 be disabled unless the kernel is intended to be run on 2F01 or 2F02
>> 1850 systems.
202 1851
203 If unsure, say Y. !! 1852 If unsure, please say Y.
>> 1853 endif # CPU_LOONGSON2F
204 1854
205 config XTENSA_UNALIGNED_USER !! 1855 config SYS_SUPPORTS_ZBOOT
206 bool "Unaligned memory access in user !! 1856 bool
207 help !! 1857 select HAVE_KERNEL_GZIP
208 The Xtensa architecture currently do !! 1858 select HAVE_KERNEL_BZIP2
209 memory accesses in hardware but thro !! 1859 select HAVE_KERNEL_LZ4
210 Per default, unaligned memory access !! 1860 select HAVE_KERNEL_LZMA
>> 1861 select HAVE_KERNEL_LZO
>> 1862 select HAVE_KERNEL_XZ
211 1863
212 Say Y here to enable unaligned memor !! 1864 config SYS_SUPPORTS_ZBOOT_UART16550
>> 1865 bool
>> 1866 select SYS_SUPPORTS_ZBOOT
213 1867
214 config XTENSA_LOAD_STORE !! 1868 config SYS_SUPPORTS_ZBOOT_UART_PROM
215 bool "Load/store exception handler for !! 1869 bool
216 help !! 1870 select SYS_SUPPORTS_ZBOOT
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 1871
223 Say Y here to enable exception handl !! 1872 config CPU_LOONGSON2
224 byte and 2-byte access to memory att !! 1873 bool
>> 1874 select CPU_SUPPORTS_32BIT_KERNEL
>> 1875 select CPU_SUPPORTS_64BIT_KERNEL
>> 1876 select CPU_SUPPORTS_HIGHMEM
>> 1877 select CPU_SUPPORTS_HUGEPAGES
>> 1878 select ARCH_HAS_PHYS_TO_DMA
>> 1879 select CPU_HAS_LOAD_STORE_LR
225 1880
226 config HAVE_SMP !! 1881 config CPU_LOONGSON1
227 bool "System Supports SMP (MX)" !! 1882 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 1883 select CPU_MIPS32
229 select XTENSA_MX !! 1884 select CPU_MIPSR1
230 help !! 1885 select CPU_HAS_PREFETCH
231 This option is used to indicate that !! 1886 select CPU_HAS_LOAD_STORE_LR
232 supports Multiprocessing. Multiproce !! 1887 select CPU_SUPPORTS_32BIT_KERNEL
233 the CPU core definition and currentl !! 1888 select CPU_SUPPORTS_HIGHMEM
>> 1889 select CPU_SUPPORTS_CPUFREQ
234 1890
235 Multiprocessor support is implemente !! 1891 config CPU_BMIPS32_3300
236 interrupt controllers. !! 1892 select SMP_UP if SMP
>> 1893 bool
237 1894
238 The MX interrupt distributer adds In !! 1895 config CPU_BMIPS4350
239 and causes the IRQ numbers to be inc !! 1896 bool
240 like the open cores ethernet driver !! 1897 select SYS_SUPPORTS_SMP
>> 1898 select SYS_SUPPORTS_HOTPLUG_CPU
241 1899
242 You still have to select "Enable SMP !! 1900 config CPU_BMIPS4380
>> 1901 bool
>> 1902 select MIPS_L1_CACHE_SHIFT_6
>> 1903 select SYS_SUPPORTS_SMP
>> 1904 select SYS_SUPPORTS_HOTPLUG_CPU
>> 1905 select CPU_HAS_RIXI
243 1906
244 config SMP !! 1907 config CPU_BMIPS5000
245 bool "Enable Symmetric multi-processin !! 1908 bool
246 depends on HAVE_SMP !! 1909 select MIPS_CPU_SCACHE
247 select GENERIC_SMP_IDLE_THREAD !! 1910 select MIPS_L1_CACHE_SHIFT_7
248 help !! 1911 select SYS_SUPPORTS_SMP
249 Enabled SMP Software; allows more th !! 1912 select SYS_SUPPORTS_HOTPLUG_CPU
250 to be activated during startup. !! 1913 select CPU_HAS_RIXI
251 1914
252 config NR_CPUS !! 1915 config SYS_HAS_CPU_LOONGSON3
253 depends on SMP !! 1916 bool
254 int "Maximum number of CPUs (2-32)" !! 1917 select CPU_SUPPORTS_CPUFREQ
255 range 2 32 !! 1918 select CPU_HAS_RIXI
256 default "4" <<
257 1919
258 config HOTPLUG_CPU !! 1920 config SYS_HAS_CPU_LOONGSON2E
259 bool "Enable CPU hotplug support" !! 1921 bool
260 depends on SMP !! 1922
>> 1923 config SYS_HAS_CPU_LOONGSON2F
>> 1924 bool
>> 1925 select CPU_SUPPORTS_CPUFREQ
>> 1926 select CPU_SUPPORTS_ADDRWINCFG if 64BIT
>> 1927 select CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 1928
>> 1929 config SYS_HAS_CPU_LOONGSON1B
>> 1930 bool
>> 1931
>> 1932 config SYS_HAS_CPU_LOONGSON1C
>> 1933 bool
>> 1934
>> 1935 config SYS_HAS_CPU_MIPS32_R1
>> 1936 bool
>> 1937
>> 1938 config SYS_HAS_CPU_MIPS32_R2
>> 1939 bool
>> 1940
>> 1941 config SYS_HAS_CPU_MIPS32_R3_5
>> 1942 bool
>> 1943
>> 1944 config SYS_HAS_CPU_MIPS32_R5
>> 1945 bool
>> 1946
>> 1947 config SYS_HAS_CPU_MIPS32_R6
>> 1948 bool
>> 1949
>> 1950 config SYS_HAS_CPU_MIPS64_R1
>> 1951 bool
>> 1952
>> 1953 config SYS_HAS_CPU_MIPS64_R2
>> 1954 bool
>> 1955
>> 1956 config SYS_HAS_CPU_MIPS64_R6
>> 1957 bool
>> 1958
>> 1959 config SYS_HAS_CPU_R3000
>> 1960 bool
>> 1961
>> 1962 config SYS_HAS_CPU_TX39XX
>> 1963 bool
>> 1964
>> 1965 config SYS_HAS_CPU_VR41XX
>> 1966 bool
>> 1967
>> 1968 config SYS_HAS_CPU_R4300
>> 1969 bool
>> 1970
>> 1971 config SYS_HAS_CPU_R4X00
>> 1972 bool
>> 1973
>> 1974 config SYS_HAS_CPU_TX49XX
>> 1975 bool
>> 1976
>> 1977 config SYS_HAS_CPU_R5000
>> 1978 bool
>> 1979
>> 1980 config SYS_HAS_CPU_R5432
>> 1981 bool
>> 1982
>> 1983 config SYS_HAS_CPU_R5500
>> 1984 bool
>> 1985
>> 1986 config SYS_HAS_CPU_NEVADA
>> 1987 bool
>> 1988
>> 1989 config SYS_HAS_CPU_R8000
>> 1990 bool
>> 1991
>> 1992 config SYS_HAS_CPU_R10000
>> 1993 bool
>> 1994
>> 1995 config SYS_HAS_CPU_RM7000
>> 1996 bool
>> 1997
>> 1998 config SYS_HAS_CPU_SB1
>> 1999 bool
>> 2000
>> 2001 config SYS_HAS_CPU_CAVIUM_OCTEON
>> 2002 bool
>> 2003
>> 2004 config SYS_HAS_CPU_BMIPS
>> 2005 bool
>> 2006
>> 2007 config SYS_HAS_CPU_BMIPS32_3300
>> 2008 bool
>> 2009 select SYS_HAS_CPU_BMIPS
>> 2010
>> 2011 config SYS_HAS_CPU_BMIPS4350
>> 2012 bool
>> 2013 select SYS_HAS_CPU_BMIPS
>> 2014
>> 2015 config SYS_HAS_CPU_BMIPS4380
>> 2016 bool
>> 2017 select SYS_HAS_CPU_BMIPS
>> 2018
>> 2019 config SYS_HAS_CPU_BMIPS5000
>> 2020 bool
>> 2021 select SYS_HAS_CPU_BMIPS
>> 2022
>> 2023 config SYS_HAS_CPU_XLR
>> 2024 bool
>> 2025
>> 2026 config SYS_HAS_CPU_XLP
>> 2027 bool
>> 2028
>> 2029 #
>> 2030 # CPU may reorder R->R, R->W, W->R, W->W
>> 2031 # Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
>> 2032 #
>> 2033 config WEAK_ORDERING
>> 2034 bool
>> 2035
>> 2036 #
>> 2037 # CPU may reorder reads and writes beyond LL/SC
>> 2038 # CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
>> 2039 #
>> 2040 config WEAK_REORDERING_BEYOND_LLSC
>> 2041 bool
>> 2042 endmenu
>> 2043
>> 2044 #
>> 2045 # These two indicate any level of the MIPS32 and MIPS64 architecture
>> 2046 #
>> 2047 config CPU_MIPS32
>> 2048 bool
>> 2049 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
>> 2050
>> 2051 config CPU_MIPS64
>> 2052 bool
>> 2053 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
>> 2054
>> 2055 #
>> 2056 # These indicate the revision of the architecture
>> 2057 #
>> 2058 config CPU_MIPSR1
>> 2059 bool
>> 2060 default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
>> 2061
>> 2062 config CPU_MIPSR2
>> 2063 bool
>> 2064 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
>> 2065 select CPU_HAS_RIXI
>> 2066 select MIPS_SPRAM
>> 2067
>> 2068 config CPU_MIPSR6
>> 2069 bool
>> 2070 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
>> 2071 select CPU_HAS_RIXI
>> 2072 select HAVE_ARCH_BITREVERSE
>> 2073 select MIPS_ASID_BITS_VARIABLE
>> 2074 select MIPS_CRC_SUPPORT
>> 2075 select MIPS_SPRAM
>> 2076
>> 2077 config TARGET_ISA_REV
>> 2078 int
>> 2079 default 1 if CPU_MIPSR1
>> 2080 default 2 if CPU_MIPSR2
>> 2081 default 6 if CPU_MIPSR6
>> 2082 default 0
261 help 2083 help
262 Say Y here to allow turning CPUs off !! 2084 Reflects the ISA revision being targeted by the kernel build. This
263 controlled through /sys/devices/syst !! 2085 is effectively the Kconfig equivalent of MIPS_ISA_REV.
264 2086
265 Say N if you want to disable CPU hot !! 2087 config EVA
>> 2088 bool
266 2089
267 config SECONDARY_RESET_VECTOR !! 2090 config XPA
268 bool "Secondary cores use alternative !! 2091 bool
269 default y !! 2092
270 depends on HAVE_SMP !! 2093 config SYS_SUPPORTS_32BIT_KERNEL
>> 2094 bool
>> 2095 config SYS_SUPPORTS_64BIT_KERNEL
>> 2096 bool
>> 2097 config CPU_SUPPORTS_32BIT_KERNEL
>> 2098 bool
>> 2099 config CPU_SUPPORTS_64BIT_KERNEL
>> 2100 bool
>> 2101 config CPU_SUPPORTS_CPUFREQ
>> 2102 bool
>> 2103 config CPU_SUPPORTS_ADDRWINCFG
>> 2104 bool
>> 2105 config CPU_SUPPORTS_HUGEPAGES
>> 2106 bool
>> 2107 config CPU_SUPPORTS_UNCACHED_ACCELERATED
>> 2108 bool
>> 2109 config MIPS_PGD_C0_CONTEXT
>> 2110 bool
>> 2111 default y if 64BIT && (CPU_MIPSR2 || CPU_MIPSR6) && !CPU_XLP
>> 2112
>> 2113 #
>> 2114 # Set to y for ptrace access to watch registers.
>> 2115 #
>> 2116 config HARDWARE_WATCHPOINTS
>> 2117 bool
>> 2118 default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
>> 2119
>> 2120 menu "Kernel type"
>> 2121
>> 2122 choice
>> 2123 prompt "Kernel code model"
271 help 2124 help
272 Secondary cores may be configured to !! 2125 You should only select this option if you have a workload that
273 or all cores may use primary reset v !! 2126 actually benefits from 64-bit processing or if your machine has
274 Say Y here to supply handler for the !! 2127 large memory. You will only be presented a single option in this
>> 2128 menu if your system does not support both 32-bit and 64-bit kernels.
275 2129
276 config FAST_SYSCALL_XTENSA !! 2130 config 32BIT
277 bool "Enable fast atomic syscalls" !! 2131 bool "32-bit kernel"
278 default n !! 2132 depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
>> 2133 select TRAD_SIGNALS
279 help 2134 help
280 fast_syscall_xtensa is a syscall tha !! 2135 Select this option if you want to build a 32-bit kernel.
281 on UP kernel when processor has no s <<
282 2136
283 This syscall is deprecated. It may h !! 2137 config 64BIT
284 invalid arguments. It is provided on !! 2138 bool "64-bit kernel"
285 Only enable it if your userspace sof !! 2139 depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
>> 2140 help
>> 2141 Select this option if you want to build a 64-bit kernel.
286 2142
287 If unsure, say N. !! 2143 endchoice
288 2144
289 config FAST_SYSCALL_SPILL_REGISTERS !! 2145 config KVM_GUEST
290 bool "Enable spill registers syscall" !! 2146 bool "KVM Guest Kernel"
291 default n !! 2147 depends on BROKEN_ON_SMP
>> 2148 help
>> 2149 Select this option if building a guest kernel for KVM (Trap & Emulate)
>> 2150 mode.
>> 2151
>> 2152 config KVM_GUEST_TIMER_FREQ
>> 2153 int "Count/Compare Timer Frequency (MHz)"
>> 2154 depends on KVM_GUEST
>> 2155 default 100
292 help 2156 help
293 fast_syscall_spill_registers is a sy !! 2157 Set this to non-zero if building a guest kernel for KVM to skip RTC
294 register windows of a calling usersp !! 2158 emulation when determining guest CPU Frequency. Instead, the guest's
295 !! 2159 timer frequency is specified directly.
296 This syscall is deprecated. It may h !! 2160
297 invalid arguments. It is provided on !! 2161 config MIPS_VA_BITS_48
298 Only enable it if your userspace sof !! 2162 bool "48 bits virtual memory"
>> 2163 depends on 64BIT
>> 2164 help
>> 2165 Support a maximum at least 48 bits of application virtual
>> 2166 memory. Default is 40 bits or less, depending on the CPU.
>> 2167 For page sizes 16k and above, this option results in a small
>> 2168 memory overhead for page tables. For 4k page size, a fourth
>> 2169 level of page tables is added which imposes both a memory
>> 2170 overhead as well as slower TLB fault handling.
299 2171
300 If unsure, say N. 2172 If unsure, say N.
301 2173
302 choice 2174 choice
303 prompt "Kernel ABI" !! 2175 prompt "Kernel page size"
304 default KERNEL_ABI_DEFAULT !! 2176 default PAGE_SIZE_4KB
305 help !! 2177
306 Select ABI for the kernel code. This !! 2178 config PAGE_SIZE_4KB
307 supported userspace ABI and any comb !! 2179 bool "4kB"
308 kernel/userspace ABI is possible and !! 2180 depends on !CPU_LOONGSON2 && !CPU_LOONGSON3
309 !! 2181 help
310 In case both kernel and userspace su !! 2182 This option select the standard 4kB Linux page size. On some
311 all register windows support code wi !! 2183 R3000-family processors this is the only available page size. Using
312 build. !! 2184 4kB page size will minimize memory consumption and is therefore
313 !! 2185 recommended for low memory systems.
314 If unsure, choose the default ABI. !! 2186
315 !! 2187 config PAGE_SIZE_8KB
316 config KERNEL_ABI_DEFAULT !! 2188 bool "8kB"
317 bool "Default ABI" !! 2189 depends on CPU_R8000 || CPU_CAVIUM_OCTEON
318 help !! 2190 depends on !MIPS_VA_BITS_48
319 Select this option to compile kernel !! 2191 help
320 selected for the toolchain. !! 2192 Using 8kB page size will result in higher performance kernel at
321 Normally cores with windowed registe !! 2193 the price of higher memory consumption. This option is available
322 cores without it use call0 ABI. !! 2194 only on R8000 and cnMIPS processors. Note that you will need a
323 !! 2195 suitable Linux distribution to support this.
324 config KERNEL_ABI_CALL0 !! 2196
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 2197 config PAGE_SIZE_16KB
326 help !! 2198 bool "16kB"
327 Select this option to compile kernel !! 2199 depends on !CPU_R3000 && !CPU_TX39XX
328 toolchain that defaults to windowed !! 2200 help
329 When this option is not selected the !! 2201 Using 16kB page size will result in higher performance kernel at
330 be used for the kernel code. !! 2202 the price of higher memory consumption. This option is available on
>> 2203 all non-R3000 family processors. Note that you will need a suitable
>> 2204 Linux distribution to support this.
>> 2205
>> 2206 config PAGE_SIZE_32KB
>> 2207 bool "32kB"
>> 2208 depends on CPU_CAVIUM_OCTEON
>> 2209 depends on !MIPS_VA_BITS_48
>> 2210 help
>> 2211 Using 32kB page size will result in higher performance kernel at
>> 2212 the price of higher memory consumption. This option is available
>> 2213 only on cnMIPS cores. Note that you will need a suitable Linux
>> 2214 distribution to support this.
>> 2215
>> 2216 config PAGE_SIZE_64KB
>> 2217 bool "64kB"
>> 2218 depends on !CPU_R3000 && !CPU_TX39XX
>> 2219 help
>> 2220 Using 64kB page size will result in higher performance kernel at
>> 2221 the price of higher memory consumption. This option is available on
>> 2222 all non-R3000 family processor. Not that at the time of this
>> 2223 writing this option is still high experimental.
331 2224
332 endchoice 2225 endchoice
333 2226
334 config USER_ABI_CALL0 !! 2227 config FORCE_MAX_ZONEORDER
>> 2228 int "Maximum zone order"
>> 2229 range 14 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2230 default "14" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
>> 2231 range 13 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2232 default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
>> 2233 range 12 64 if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2234 default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
>> 2235 range 11 64
>> 2236 default "11"
>> 2237 help
>> 2238 The kernel memory allocator divides physically contiguous memory
>> 2239 blocks into "zones", where each zone is a power of two number of
>> 2240 pages. This option selects the largest power of two that the kernel
>> 2241 keeps in the memory allocator. If you need to allocate very large
>> 2242 blocks of physically contiguous memory, then you may need to
>> 2243 increase this value.
>> 2244
>> 2245 This config option is actually maximum order plus one. For example,
>> 2246 a value of 11 means that the largest free memory block is 2^10 pages.
>> 2247
>> 2248 The page size is not necessarily 4KB. Keep this in mind
>> 2249 when choosing a value for this option.
>> 2250
>> 2251 config BOARD_SCACHE
335 bool 2252 bool
336 2253
337 choice !! 2254 config IP22_CPU_SCACHE
338 prompt "Userspace ABI" !! 2255 bool
339 default USER_ABI_DEFAULT !! 2256 select BOARD_SCACHE
340 help <<
341 Select supported userspace ABI. <<
342 2257
343 If unsure, choose the default ABI. !! 2258 #
>> 2259 # Support for a MIPS32 / MIPS64 style S-caches
>> 2260 #
>> 2261 config MIPS_CPU_SCACHE
>> 2262 bool
>> 2263 select BOARD_SCACHE
344 2264
345 config USER_ABI_DEFAULT !! 2265 config R5000_CPU_SCACHE
346 bool "Default ABI only" !! 2266 bool
347 help !! 2267 select BOARD_SCACHE
348 Assume default userspace ABI. For XE <<
349 call0 ABI binaries may be run on suc <<
350 will not work correctly for them. <<
351 2268
352 config USER_ABI_CALL0_ONLY !! 2269 config RM7000_CPU_SCACHE
353 bool "Call0 ABI only" !! 2270 bool
354 select USER_ABI_CALL0 !! 2271 select BOARD_SCACHE
>> 2272
>> 2273 config SIBYTE_DMA_PAGEOPS
>> 2274 bool "Use DMA to clear/copy pages"
>> 2275 depends on CPU_SB1
355 help 2276 help
356 Select this option to support only c !! 2277 Instead of using the CPU to zero and copy pages, use a Data Mover
357 Windowed ABI binaries will crash wit !! 2278 channel. These DMA channels are otherwise unused by the standard
358 an illegal instruction exception on !! 2279 SiByte Linux port. Seems to give a small performance benefit.
359 2280
360 Choose this option if you're plannin !! 2281 config CPU_HAS_PREFETCH
361 built with call0 ABI. !! 2282 bool
>> 2283
>> 2284 config CPU_GENERIC_DUMP_TLB
>> 2285 bool
>> 2286 default y if !(CPU_R3000 || CPU_R8000 || CPU_TX39XX)
362 2287
363 config USER_ABI_CALL0_PROBE !! 2288 config MIPS_FP_SUPPORT
364 bool "Support both windowed and call0 !! 2289 bool "Floating Point support" if EXPERT
365 select USER_ABI_CALL0 !! 2290 default y
366 help 2291 help
367 Select this option to support both w !! 2292 Select y to include support for floating point in the kernel
368 ABIs. When enabled all processes are !! 2293 including initialization of FPU hardware, FP context save & restore
369 and a fast user exception handler fo !! 2294 and emulation of an FPU where necessary. Without this support any
370 used to turn on PS.WOE bit on the fi !! 2295 userland program attempting to use floating point instructions will
371 the userspace. !! 2296 receive a SIGILL.
372 2297
373 This option should be enabled for th !! 2298 If you know that your userland will not attempt to use floating point
374 both call0 and windowed ABIs in user !! 2299 instructions then you can say n here to shrink the kernel a little.
375 2300
376 Note that Xtensa ISA does not guaran !! 2301 If unsure, say y.
377 raise an illegal instruction excepti <<
378 PS.WOE is disabled, check whether th <<
379 2302
380 endchoice !! 2303 config CPU_R2300_FPU
>> 2304 bool
>> 2305 depends on MIPS_FP_SUPPORT
>> 2306 default y if CPU_R3000 || CPU_TX39XX
381 2307
382 endmenu !! 2308 config CPU_R4K_FPU
>> 2309 bool
>> 2310 depends on MIPS_FP_SUPPORT
>> 2311 default y if !CPU_R2300_FPU
383 2312
384 config XTENSA_CALIBRATE_CCOUNT !! 2313 config CPU_R4K_CACHE_TLB
385 def_bool n !! 2314 bool
>> 2315 default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON)
>> 2316
>> 2317 config MIPS_MT_SMP
>> 2318 bool "MIPS MT SMP support (1 TC on each available VPE)"
>> 2319 default y
>> 2320 depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
>> 2321 select CPU_MIPSR2_IRQ_VI
>> 2322 select CPU_MIPSR2_IRQ_EI
>> 2323 select SYNC_R4K
>> 2324 select MIPS_MT
>> 2325 select SMP
>> 2326 select SMP_UP
>> 2327 select SYS_SUPPORTS_SMP
>> 2328 select SYS_SUPPORTS_SCHED_SMT
>> 2329 select MIPS_PERF_SHARED_TC_COUNTERS
>> 2330 help
>> 2331 This is a kernel model which is known as SMVP. This is supported
>> 2332 on cores with the MT ASE and uses the available VPEs to implement
>> 2333 virtual processors which supports SMP. This is equivalent to the
>> 2334 Intel Hyperthreading feature. For further information go to
>> 2335 <http://www.imgtec.com/mips/mips-multithreading.asp>.
>> 2336
>> 2337 config MIPS_MT
>> 2338 bool
>> 2339
>> 2340 config SCHED_SMT
>> 2341 bool "SMT (multithreading) scheduler support"
>> 2342 depends on SYS_SUPPORTS_SCHED_SMT
>> 2343 default n
386 help 2344 help
387 On some platforms (XT2000, for examp !! 2345 SMT scheduler support improves the CPU scheduler's decision making
388 vary. The frequency can be determin !! 2346 when dealing with MIPS MT enabled cores at a cost of slightly
389 against a well known, fixed frequenc !! 2347 increased overhead in some places. If unsure say N here.
390 2348
391 config SERIAL_CONSOLE !! 2349 config SYS_SUPPORTS_SCHED_SMT
392 def_bool n !! 2350 bool
393 2351
394 config PLATFORM_HAVE_XIP !! 2352 config SYS_SUPPORTS_MULTITHREADING
395 def_bool n !! 2353 bool
396 2354
397 menu "Platform options" !! 2355 config MIPS_MT_FPAFF
>> 2356 bool "Dynamic FPU affinity for FP-intensive threads"
>> 2357 default y
>> 2358 depends on MIPS_MT_SMP
398 2359
399 choice !! 2360 config MIPSR2_TO_R6_EMULATOR
400 prompt "Xtensa System Type" !! 2361 bool "MIPS R2-to-R6 emulator"
401 default XTENSA_PLATFORM_ISS !! 2362 depends on CPU_MIPSR6
>> 2363 depends on MIPS_FP_SUPPORT
>> 2364 default y
>> 2365 help
>> 2366 Choose this option if you want to run non-R6 MIPS userland code.
>> 2367 Even if you say 'Y' here, the emulator will still be disabled by
>> 2368 default. You can enable it using the 'mipsr2emu' kernel option.
>> 2369 The only reason this is a build-time option is to save ~14K from the
>> 2370 final kernel image.
402 2371
403 config XTENSA_PLATFORM_ISS !! 2372 config SYS_SUPPORTS_VPE_LOADER
404 bool "ISS" !! 2373 bool
405 select XTENSA_CALIBRATE_CCOUNT !! 2374 depends on SYS_SUPPORTS_MULTITHREADING
406 select SERIAL_CONSOLE <<
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 <<
410 config XTENSA_PLATFORM_XT2000 <<
411 bool "XT2000" <<
412 help <<
413 XT2000 is the name of Tensilica's fe <<
414 This hardware is capable of running <<
415 <<
416 config XTENSA_PLATFORM_XTFPGA <<
417 bool "XTFPGA" <<
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 2375 help
424 XTFPGA is the name of Tensilica boar !! 2376 Indicates that the platform supports the VPE loader, and provides
425 This hardware is capable of running !! 2377 physical_memsize.
426 2378
427 endchoice !! 2379 config MIPS_VPE_LOADER
>> 2380 bool "VPE loader support."
>> 2381 depends on SYS_SUPPORTS_VPE_LOADER && MODULES
>> 2382 select CPU_MIPSR2_IRQ_VI
>> 2383 select CPU_MIPSR2_IRQ_EI
>> 2384 select MIPS_MT
>> 2385 help
>> 2386 Includes a loader for loading an elf relocatable object
>> 2387 onto another VPE and running it.
428 2388
429 config PLATFORM_NR_IRQS !! 2389 config MIPS_VPE_LOADER_CMP
430 int !! 2390 bool
431 default 3 if XTENSA_PLATFORM_XT2000 !! 2391 default "y"
432 default 0 !! 2392 depends on MIPS_VPE_LOADER && MIPS_CMP
433 2393
434 config XTENSA_CPU_CLOCK !! 2394 config MIPS_VPE_LOADER_MT
435 int "CPU clock rate [MHz]" !! 2395 bool
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 2396 default "y"
437 default 16 !! 2397 depends on MIPS_VPE_LOADER && !MIPS_CMP
438 2398
439 config GENERIC_CALIBRATE_DELAY !! 2399 config MIPS_VPE_LOADER_TOM
440 bool "Auto calibration of the BogoMIPS !! 2400 bool "Load VPE program into memory hidden from linux"
>> 2401 depends on MIPS_VPE_LOADER
>> 2402 default y
441 help 2403 help
442 The BogoMIPS value can easily be der !! 2404 The loader can use memory that is present but has been hidden from
>> 2405 Linux using the kernel command line option "mem=xxMB". It's up to
>> 2406 you to ensure the amount you put in the option and the space your
>> 2407 program requires is less or equal to the amount physically present.
>> 2408
>> 2409 config MIPS_VPE_APSP_API
>> 2410 bool "Enable support for AP/SP API (RTLX)"
>> 2411 depends on MIPS_VPE_LOADER
443 2412
444 config CMDLINE_BOOL !! 2413 config MIPS_VPE_APSP_API_CMP
445 bool "Default bootloader kernel argume !! 2414 bool
>> 2415 default "y"
>> 2416 depends on MIPS_VPE_APSP_API && MIPS_CMP
446 2417
447 config CMDLINE !! 2418 config MIPS_VPE_APSP_API_MT
448 string "Initial kernel command string" !! 2419 bool
449 depends on CMDLINE_BOOL !! 2420 default "y"
450 default "console=ttyS0,38400 root=/dev !! 2421 depends on MIPS_VPE_APSP_API && !MIPS_CMP
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 2422
458 config USE_OF !! 2423 config MIPS_CMP
459 bool "Flattened Device Tree support" !! 2424 bool "MIPS CMP framework support (DEPRECATED)"
460 select OF !! 2425 depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
461 select OF_EARLY_FLATTREE !! 2426 select SMP
>> 2427 select SYNC_R4K
>> 2428 select SYS_SUPPORTS_SMP
>> 2429 select WEAK_ORDERING
>> 2430 default n
462 help 2431 help
463 Include support for flattened device !! 2432 Select this if you are using a bootloader which implements the "CMP
>> 2433 framework" protocol (ie. YAMON) and want your kernel to make use of
>> 2434 its ability to start secondary CPUs.
>> 2435
>> 2436 Unless you have a specific need, you should use CONFIG_MIPS_CPS
>> 2437 instead of this.
>> 2438
>> 2439 config MIPS_CPS
>> 2440 bool "MIPS Coherent Processing System support"
>> 2441 depends on SYS_SUPPORTS_MIPS_CPS
>> 2442 select MIPS_CM
>> 2443 select MIPS_CPS_PM if HOTPLUG_CPU
>> 2444 select SMP
>> 2445 select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
>> 2446 select SYS_SUPPORTS_HOTPLUG_CPU
>> 2447 select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
>> 2448 select SYS_SUPPORTS_SMP
>> 2449 select WEAK_ORDERING
>> 2450 help
>> 2451 Select this if you wish to run an SMP kernel across multiple cores
>> 2452 within a MIPS Coherent Processing System. When this option is
>> 2453 enabled the kernel will probe for other cores and boot them with
>> 2454 no external assistance. It is safe to enable this when hardware
>> 2455 support is unavailable.
>> 2456
>> 2457 config MIPS_CPS_PM
>> 2458 depends on MIPS_CPS
>> 2459 bool
>> 2460
>> 2461 config MIPS_CM
>> 2462 bool
>> 2463 select MIPS_CPC
464 2464
465 config BUILTIN_DTB_SOURCE !! 2465 config MIPS_CPC
466 string "DTB to build into the kernel i !! 2466 bool
467 depends on OF <<
468 2467
469 config PARSE_BOOTPARAM !! 2468 config SB1_PASS_2_WORKAROUNDS
470 bool "Parse bootparam block" !! 2469 bool
>> 2470 depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
>> 2471 default y
>> 2472
>> 2473 config SB1_PASS_2_1_WORKAROUNDS
>> 2474 bool
>> 2475 depends on CPU_SB1 && CPU_SB1_PASS_2
471 default y 2476 default y
472 help <<
473 Parse parameters passed to the kerne <<
474 be disabled if the kernel is known t <<
475 2477
476 If unsure, say Y. <<
477 2478
478 choice 2479 choice
479 prompt "Semihosting interface" !! 2480 prompt "SmartMIPS or microMIPS ASE support"
480 default XTENSA_SIMCALL_ISS <<
481 depends on XTENSA_PLATFORM_ISS <<
482 help <<
483 Choose semihosting interface that wi <<
484 block device and networking. <<
485 2481
486 config XTENSA_SIMCALL_ISS !! 2482 config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
487 bool "simcall" !! 2483 bool "None"
488 help 2484 help
489 Use simcall instruction. simcall is !! 2485 Select this if you want neither microMIPS nor SmartMIPS support
490 it does nothing on hardware. <<
491 2486
492 config XTENSA_SIMCALL_GDBIO !! 2487 config CPU_HAS_SMARTMIPS
493 bool "GDBIO" !! 2488 depends on SYS_SUPPORTS_SMARTMIPS
>> 2489 bool "SmartMIPS"
>> 2490 help
>> 2491 SmartMIPS is a extension of the MIPS32 architecture aimed at
>> 2492 increased security at both hardware and software level for
>> 2493 smartcards. Enabling this option will allow proper use of the
>> 2494 SmartMIPS instructions by Linux applications. However a kernel with
>> 2495 this option will not work on a MIPS core without SmartMIPS core. If
>> 2496 you don't know you probably don't have SmartMIPS and should say N
>> 2497 here.
>> 2498
>> 2499 config CPU_MICROMIPS
>> 2500 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
>> 2501 bool "microMIPS"
494 help 2502 help
495 Use break instruction. It is availab !! 2503 When this option is enabled the kernel will be built using the
496 is attached to it via JTAG. !! 2504 microMIPS ISA
497 2505
498 endchoice 2506 endchoice
499 2507
500 config BLK_DEV_SIMDISK !! 2508 config CPU_HAS_MSA
501 tristate "Host file-based simulated bl !! 2509 bool "Support for the MIPS SIMD Architecture"
502 default n !! 2510 depends on CPU_SUPPORTS_MSA
503 depends on XTENSA_PLATFORM_ISS && BLOC !! 2511 depends on MIPS_FP_SUPPORT
>> 2512 depends on 64BIT || MIPS_O32_FP64_SUPPORT
>> 2513 help
>> 2514 MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
>> 2515 and a set of SIMD instructions to operate on them. When this option
>> 2516 is enabled the kernel will support allocating & switching MSA
>> 2517 vector register contexts. If you know that your kernel will only be
>> 2518 running on CPUs which do not support MSA or that your userland will
>> 2519 not be making use of it then you may wish to say N here to reduce
>> 2520 the size & complexity of your kernel.
>> 2521
>> 2522 If unsure, say Y.
>> 2523
>> 2524 config CPU_HAS_WB
>> 2525 bool
>> 2526
>> 2527 config XKS01
>> 2528 bool
>> 2529
>> 2530 config CPU_HAS_RIXI
>> 2531 bool
>> 2532
>> 2533 config CPU_HAS_LOAD_STORE_LR
>> 2534 bool
504 help 2535 help
505 Create block devices that map to fil !! 2536 CPU has support for unaligned load and store instructions:
506 Device binding to host file may be c !! 2537 LWL, LWR, SWL, SWR (Load/store word left/right).
507 interface provided the device is not !! 2538 LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit systems).
508 !! 2539
509 config BLK_DEV_SIMDISK_COUNT !! 2540 #
510 int "Number of host file-based simulat !! 2541 # Vectored interrupt mode is an R2 feature
511 range 1 10 !! 2542 #
512 depends on BLK_DEV_SIMDISK !! 2543 config CPU_MIPSR2_IRQ_VI
513 default 2 !! 2544 bool
>> 2545
>> 2546 #
>> 2547 # Extended interrupt mode is an R2 feature
>> 2548 #
>> 2549 config CPU_MIPSR2_IRQ_EI
>> 2550 bool
>> 2551
>> 2552 config CPU_HAS_SYNC
>> 2553 bool
>> 2554 depends on !CPU_R3000
>> 2555 default y
>> 2556
>> 2557 #
>> 2558 # CPU non-features
>> 2559 #
>> 2560 config CPU_DADDI_WORKAROUNDS
>> 2561 bool
>> 2562
>> 2563 config CPU_R4000_WORKAROUNDS
>> 2564 bool
>> 2565 select CPU_R4400_WORKAROUNDS
>> 2566
>> 2567 config CPU_R4400_WORKAROUNDS
>> 2568 bool
>> 2569
>> 2570 config MIPS_ASID_SHIFT
>> 2571 int
>> 2572 default 6 if CPU_R3000 || CPU_TX39XX
>> 2573 default 4 if CPU_R8000
>> 2574 default 0
>> 2575
>> 2576 config MIPS_ASID_BITS
>> 2577 int
>> 2578 default 0 if MIPS_ASID_BITS_VARIABLE
>> 2579 default 6 if CPU_R3000 || CPU_TX39XX
>> 2580 default 8
>> 2581
>> 2582 config MIPS_ASID_BITS_VARIABLE
>> 2583 bool
>> 2584
>> 2585 config MIPS_CRC_SUPPORT
>> 2586 bool
>> 2587
>> 2588 #
>> 2589 # - Highmem only makes sense for the 32-bit kernel.
>> 2590 # - The current highmem code will only work properly on physically indexed
>> 2591 # caches such as R3000, SB1, R7000 or those that look like they're virtually
>> 2592 # indexed such as R4000/R4400 SC and MC versions or R10000. So for the
>> 2593 # moment we protect the user and offer the highmem option only on machines
>> 2594 # where it's known to be safe. This will not offer highmem on a few systems
>> 2595 # such as MIPS32 and MIPS64 CPUs which may have virtual and physically
>> 2596 # indexed CPUs but we're playing safe.
>> 2597 # - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
>> 2598 # know they might have memory configurations that could make use of highmem
>> 2599 # support.
>> 2600 #
>> 2601 config HIGHMEM
>> 2602 bool "High Memory Support"
>> 2603 depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
>> 2604
>> 2605 config CPU_SUPPORTS_HIGHMEM
>> 2606 bool
>> 2607
>> 2608 config SYS_SUPPORTS_HIGHMEM
>> 2609 bool
>> 2610
>> 2611 config SYS_SUPPORTS_SMARTMIPS
>> 2612 bool
>> 2613
>> 2614 config SYS_SUPPORTS_MICROMIPS
>> 2615 bool
>> 2616
>> 2617 config SYS_SUPPORTS_MIPS16
>> 2618 bool
514 help 2619 help
515 This is the default minimal number o !! 2620 This option must be set if a kernel might be executed on a MIPS16-
516 Kernel/module parameter 'simdisk_cou !! 2621 enabled CPU even if MIPS16 is not actually being used. In other
517 value at runtime. More file names (b !! 2622 words, it makes the kernel MIPS16-tolerant.
518 specified as parameters, simdisk_cou !! 2623
519 !! 2624 config CPU_SUPPORTS_MSA
520 config SIMDISK0_FILENAME !! 2625 bool
521 string "Host filename for the first si !! 2626
522 depends on BLK_DEV_SIMDISK = y !! 2627 config ARCH_FLATMEM_ENABLE
523 default "" !! 2628 def_bool y
524 help !! 2629 depends on !NUMA && !CPU_LOONGSON2
525 Attach a first simdisk to a host fil !! 2630
526 contains a root file system. !! 2631 config ARCH_DISCONTIGMEM_ENABLE
527 !! 2632 bool
528 config SIMDISK1_FILENAME !! 2633 default y if SGI_IP27
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 2634 help
541 There's a 2x16 LCD on most of XTFPGA !! 2635 Say Y to support efficient handling of discontiguous physical memory,
542 progress messages there during bootu !! 2636 for architectures which are either NUMA (Non-Uniform Memory Access)
543 during board bringup. !! 2637 or have huge holes in the physical address space for other reasons.
>> 2638 See <file:Documentation/vm/numa.rst> for more.
544 2639
545 If unsure, say N. !! 2640 config ARCH_SPARSEMEM_ENABLE
>> 2641 bool
>> 2642 select SPARSEMEM_STATIC
546 2643
547 config XTFPGA_LCD_BASE_ADDR !! 2644 config NUMA
548 hex "XTFPGA LCD base address" !! 2645 bool "NUMA Support"
549 depends on XTFPGA_LCD !! 2646 depends on SYS_SUPPORTS_NUMA
550 default "0x0d0c0000" !! 2647 help
551 help !! 2648 Say Y to compile the kernel to support NUMA (Non-Uniform Memory
552 Base address of the LCD controller i !! 2649 Access). This option improves performance on systems with more
553 Different boards from XTFPGA family !! 2650 than two nodes; on two node systems it is generally better to
554 addresses. Please consult prototypin !! 2651 leave it disabled; on single node systems disable this option
555 the correct address. Wrong address h !! 2652 disabled.
556 !! 2653
557 config XTFPGA_LCD_8BIT_ACCESS !! 2654 config SYS_SUPPORTS_NUMA
558 bool "Use 8-bit access to XTFPGA LCD" !! 2655 bool
559 depends on XTFPGA_LCD !! 2656
560 default n !! 2657 config RELOCATABLE
>> 2658 bool "Relocatable kernel"
>> 2659 depends on SYS_SUPPORTS_RELOCATABLE && (CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_MIPS32_R6 || CPU_MIPS64_R6 || CAVIUM_OCTEON_SOC)
>> 2660 help
>> 2661 This builds a kernel image that retains relocation information
>> 2662 so it can be loaded someplace besides the default 1MB.
>> 2663 The relocations make the kernel binary about 15% larger,
>> 2664 but are discarded at runtime
>> 2665
>> 2666 config RELOCATION_TABLE_SIZE
>> 2667 hex "Relocation table size"
>> 2668 depends on RELOCATABLE
>> 2669 range 0x0 0x01000000
>> 2670 default "0x00100000"
>> 2671 ---help---
>> 2672 A table of relocation data will be appended to the kernel binary
>> 2673 and parsed at boot to fix up the relocated kernel.
>> 2674
>> 2675 This option allows the amount of space reserved for the table to be
>> 2676 adjusted, although the default of 1Mb should be ok in most cases.
>> 2677
>> 2678 The build will fail and a valid size suggested if this is too small.
>> 2679
>> 2680 If unsure, leave at the default value.
>> 2681
>> 2682 config RANDOMIZE_BASE
>> 2683 bool "Randomize the address of the kernel image"
>> 2684 depends on RELOCATABLE
>> 2685 ---help---
>> 2686 Randomizes the physical and virtual address at which the
>> 2687 kernel image is loaded, as a security feature that
>> 2688 deters exploit attempts relying on knowledge of the location
>> 2689 of kernel internals.
>> 2690
>> 2691 Entropy is generated using any coprocessor 0 registers available.
>> 2692
>> 2693 The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
>> 2694
>> 2695 If unsure, say N.
>> 2696
>> 2697 config RANDOMIZE_BASE_MAX_OFFSET
>> 2698 hex "Maximum kASLR offset" if EXPERT
>> 2699 depends on RANDOMIZE_BASE
>> 2700 range 0x0 0x40000000 if EVA || 64BIT
>> 2701 range 0x0 0x08000000
>> 2702 default "0x01000000"
>> 2703 ---help---
>> 2704 When kASLR is active, this provides the maximum offset that will
>> 2705 be applied to the kernel image. It should be set according to the
>> 2706 amount of physical RAM available in the target system minus
>> 2707 PHYSICAL_START and must be a power of 2.
>> 2708
>> 2709 This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
>> 2710 EVA or 64-bit. The default is 16Mb.
>> 2711
>> 2712 config NODES_SHIFT
>> 2713 int
>> 2714 default "6"
>> 2715 depends on NEED_MULTIPLE_NODES
>> 2716
>> 2717 config HW_PERF_EVENTS
>> 2718 bool "Enable hardware performance counter support for perf events"
>> 2719 depends on PERF_EVENTS && !OPROFILE && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_XLP || CPU_LOONGSON3)
>> 2720 default y
561 help 2721 help
562 LCD may be connected with 4- or 8-bi !! 2722 Enable hardware performance counter support for perf events. If
563 only be used with 8-bit interface. P !! 2723 disabled, perf events will use software events only.
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 2724
617 If unsure, say N. !! 2725 config SMP
>> 2726 bool "Multi-Processing support"
>> 2727 depends on SYS_SUPPORTS_SMP
>> 2728 help
>> 2729 This enables support for systems with more than one CPU. If you have
>> 2730 a system with only one CPU, say N. If you have a system with more
>> 2731 than one CPU, say Y.
>> 2732
>> 2733 If you say N here, the kernel will run on uni- and multiprocessor
>> 2734 machines, but will use only one CPU of a multiprocessor machine. If
>> 2735 you say Y here, the kernel will run on many, but not all,
>> 2736 uniprocessor machines. On a uniprocessor machine, the kernel
>> 2737 will run faster if you say N here.
>> 2738
>> 2739 People using multiprocessor machines who say Y here should also say
>> 2740 Y to "Enhanced Real Time Clock Support", below.
>> 2741
>> 2742 See also the SMP-HOWTO available at
>> 2743 <http://www.tldp.org/docs.html#howto>.
>> 2744
>> 2745 If you don't know what to do here, say N.
>> 2746
>> 2747 config HOTPLUG_CPU
>> 2748 bool "Support for hot-pluggable CPUs"
>> 2749 depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
>> 2750 help
>> 2751 Say Y here to allow turning CPUs off and on. CPUs can be
>> 2752 controlled through /sys/devices/system/cpu.
>> 2753 (Note: power management support will enable this option
>> 2754 automatically on SMP systems. )
>> 2755 Say N if you want to disable CPU hotplug.
>> 2756
>> 2757 config SMP_UP
>> 2758 bool
>> 2759
>> 2760 config SYS_SUPPORTS_MIPS_CMP
>> 2761 bool
>> 2762
>> 2763 config SYS_SUPPORTS_MIPS_CPS
>> 2764 bool
>> 2765
>> 2766 config SYS_SUPPORTS_SMP
>> 2767 bool
618 2768
619 config MEMMAP_CACHEATTR !! 2769 config NR_CPUS_DEFAULT_4
620 hex "Cache attributes for the memory a !! 2770 bool
621 depends on !MMU !! 2771
622 default 0x22222222 !! 2772 config NR_CPUS_DEFAULT_8
623 help !! 2773 bool
624 These cache attributes are set up fo !! 2774
625 specifies cache attributes for the c !! 2775 config NR_CPUS_DEFAULT_16
626 region: bits 0..3 -- for addresses 0 !! 2776 bool
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 2777
683 If unsure, leave the default value h !! 2778 config NR_CPUS_DEFAULT_32
>> 2779 bool
>> 2780
>> 2781 config NR_CPUS_DEFAULT_64
>> 2782 bool
>> 2783
>> 2784 config NR_CPUS
>> 2785 int "Maximum number of CPUs (2-256)"
>> 2786 range 2 256
>> 2787 depends on SMP
>> 2788 default "4" if NR_CPUS_DEFAULT_4
>> 2789 default "8" if NR_CPUS_DEFAULT_8
>> 2790 default "16" if NR_CPUS_DEFAULT_16
>> 2791 default "32" if NR_CPUS_DEFAULT_32
>> 2792 default "64" if NR_CPUS_DEFAULT_64
>> 2793 help
>> 2794 This allows you to specify the maximum number of CPUs which this
>> 2795 kernel will support. The maximum supported value is 32 for 32-bit
>> 2796 kernel and 64 for 64-bit kernels; the minimum value which makes
>> 2797 sense is 1 for Qemu (useful only for kernel debugging purposes)
>> 2798 and 2 for all others.
>> 2799
>> 2800 This is purely to save memory - each supported CPU adds
>> 2801 approximately eight kilobytes to the kernel image. For best
>> 2802 performance should round up your number of processors to the next
>> 2803 power of two.
>> 2804
>> 2805 config MIPS_PERF_SHARED_TC_COUNTERS
>> 2806 bool
>> 2807
>> 2808 config MIPS_NR_CPU_NR_MAP_1024
>> 2809 bool
>> 2810
>> 2811 config MIPS_NR_CPU_NR_MAP
>> 2812 int
>> 2813 depends on SMP
>> 2814 default 1024 if MIPS_NR_CPU_NR_MAP_1024
>> 2815 default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
>> 2816
>> 2817 #
>> 2818 # Timer Interrupt Frequency Configuration
>> 2819 #
684 2820
685 choice 2821 choice
686 prompt "Relocatable vectors location" !! 2822 prompt "Timer frequency"
687 default XTENSA_VECTORS_IN_TEXT !! 2823 default HZ_250
688 help 2824 help
689 Choose whether relocatable vectors a !! 2825 Allows the configuration of the timer frequency.
690 or placed separately at runtime. Thi !! 2826
691 configurations without VECBASE regis !! 2827 config HZ_24
692 placed at their hardware-defined loc !! 2828 bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
693 !! 2829
694 config XTENSA_VECTORS_IN_TEXT !! 2830 config HZ_48
695 bool "Merge relocatable vectors into k !! 2831 bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
696 depends on !MTD_XIP !! 2832
697 help !! 2833 config HZ_100
698 This option puts relocatable vectors !! 2834 bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
699 with proper alignment. !! 2835
700 This is a safe choice for most confi !! 2836 config HZ_128
701 !! 2837 bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
702 config XTENSA_VECTORS_SEPARATE !! 2838
703 bool "Put relocatable vectors at fixed !! 2839 config HZ_250
704 help !! 2840 bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
705 This option puts relocatable vectors !! 2841
706 Vectors are merged with the .init da !! 2842 config HZ_256
707 are copied into their designated loc !! 2843 bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
708 Use it to put vectors into IRAM or o !! 2844
709 XIP-aware MTD support. !! 2845 config HZ_1000
>> 2846 bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
>> 2847
>> 2848 config HZ_1024
>> 2849 bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
710 2850
711 endchoice 2851 endchoice
712 2852
713 config VECTORS_ADDR !! 2853 config SYS_SUPPORTS_24HZ
714 hex "Kernel vectors virtual address" !! 2854 bool
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 2855
729 config PLATFORM_WANT_DEFAULT_MEM !! 2856 config SYS_SUPPORTS_48HZ
730 def_bool n !! 2857 bool
>> 2858
>> 2859 config SYS_SUPPORTS_100HZ
>> 2860 bool
>> 2861
>> 2862 config SYS_SUPPORTS_128HZ
>> 2863 bool
731 2864
732 config DEFAULT_MEM_START !! 2865 config SYS_SUPPORTS_250HZ
733 hex !! 2866 bool
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M !! 2867
735 default 0x60000000 if PLATFORM_WANT_DE !! 2868 config SYS_SUPPORTS_256HZ
736 default 0x00000000 !! 2869 bool
>> 2870
>> 2871 config SYS_SUPPORTS_1000HZ
>> 2872 bool
>> 2873
>> 2874 config SYS_SUPPORTS_1024HZ
>> 2875 bool
>> 2876
>> 2877 config SYS_SUPPORTS_ARBIT_HZ
>> 2878 bool
>> 2879 default y if !SYS_SUPPORTS_24HZ && \
>> 2880 !SYS_SUPPORTS_48HZ && \
>> 2881 !SYS_SUPPORTS_100HZ && \
>> 2882 !SYS_SUPPORTS_128HZ && \
>> 2883 !SYS_SUPPORTS_250HZ && \
>> 2884 !SYS_SUPPORTS_256HZ && \
>> 2885 !SYS_SUPPORTS_1000HZ && \
>> 2886 !SYS_SUPPORTS_1024HZ
>> 2887
>> 2888 config HZ
>> 2889 int
>> 2890 default 24 if HZ_24
>> 2891 default 48 if HZ_48
>> 2892 default 100 if HZ_100
>> 2893 default 128 if HZ_128
>> 2894 default 250 if HZ_250
>> 2895 default 256 if HZ_256
>> 2896 default 1000 if HZ_1000
>> 2897 default 1024 if HZ_1024
>> 2898
>> 2899 config SCHED_HRTICK
>> 2900 def_bool HIGH_RES_TIMERS
>> 2901
>> 2902 config KEXEC
>> 2903 bool "Kexec system call"
>> 2904 select KEXEC_CORE
>> 2905 help
>> 2906 kexec is a system call that implements the ability to shutdown your
>> 2907 current kernel, and to start another kernel. It is like a reboot
>> 2908 but it is independent of the system firmware. And like a reboot
>> 2909 you can start any kernel with it, not just Linux.
>> 2910
>> 2911 The name comes from the similarity to the exec system call.
>> 2912
>> 2913 It is an ongoing process to be certain the hardware in a machine
>> 2914 is properly shutdown, so do not be surprised if this code does not
>> 2915 initially work for you. As of this writing the exact hardware
>> 2916 interface is strongly in flux, so no good recommendation can be
>> 2917 made.
>> 2918
>> 2919 config CRASH_DUMP
>> 2920 bool "Kernel crash dumps"
>> 2921 help
>> 2922 Generate crash dump after being started by kexec.
>> 2923 This should be normally only set in special crash dump kernels
>> 2924 which are loaded in the main kernel with kexec-tools into
>> 2925 a specially reserved region and then later executed after
>> 2926 a crash by kdump/kexec. The crash dump kernel must be compiled
>> 2927 to a memory address not used by the main kernel or firmware using
>> 2928 PHYSICAL_START.
>> 2929
>> 2930 config PHYSICAL_START
>> 2931 hex "Physical address where the kernel is loaded"
>> 2932 default "0xffffffff84000000"
>> 2933 depends on CRASH_DUMP
>> 2934 help
>> 2935 This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
>> 2936 If you plan to use kernel for capturing the crash dump change
>> 2937 this value to start of the reserved region (the "X" value as
>> 2938 specified in the "crashkernel=YM@XM" command line boot parameter
>> 2939 passed to the panic-ed kernel).
>> 2940
>> 2941 config SECCOMP
>> 2942 bool "Enable seccomp to safely compute untrusted bytecode"
>> 2943 depends on PROC_FS
>> 2944 default y
737 help 2945 help
738 This is the base address used for bo !! 2946 This kernel feature is useful for number crunching applications
739 in noMMU configurations. !! 2947 that may need to compute untrusted bytecode during their
>> 2948 execution. By using pipes or other transports made available to
>> 2949 the process as file descriptors supporting the read/write
>> 2950 syscalls, it's possible to isolate those applications in
>> 2951 their own address space using seccomp. Once seccomp is
>> 2952 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 2953 and the task is only allowed to execute a few safe syscalls
>> 2954 defined by each seccomp mode.
>> 2955
>> 2956 If unsure, say Y. Only embedded should say N here.
>> 2957
>> 2958 config MIPS_O32_FP64_SUPPORT
>> 2959 bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
>> 2960 depends on 32BIT || MIPS32_O32
>> 2961 help
>> 2962 When this is enabled, the kernel will support use of 64-bit floating
>> 2963 point registers with binaries using the O32 ABI along with the
>> 2964 EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
>> 2965 32-bit MIPS systems this support is at the cost of increasing the
>> 2966 size and complexity of the compiled FPU emulator. Thus if you are
>> 2967 running a MIPS32 system and know that none of your userland binaries
>> 2968 will require 64-bit floating point, you may wish to reduce the size
>> 2969 of your kernel & potentially improve FP emulation performance by
>> 2970 saying N here.
>> 2971
>> 2972 Although binutils currently supports use of this flag the details
>> 2973 concerning its effect upon the O32 ABI in userland are still being
>> 2974 worked on. In order to avoid userland becoming dependant upon current
>> 2975 behaviour before the details have been finalised, this option should
>> 2976 be considered experimental and only enabled by those working upon
>> 2977 said details.
740 2978
741 If unsure, leave the default value h !! 2979 If unsure, say N.
>> 2980
>> 2981 config USE_OF
>> 2982 bool
>> 2983 select OF
>> 2984 select OF_EARLY_FLATTREE
>> 2985 select IRQ_DOMAIN
>> 2986
>> 2987 config UHI_BOOT
>> 2988 bool
>> 2989
>> 2990 config BUILTIN_DTB
>> 2991 bool
742 2992
743 choice 2993 choice
744 prompt "KSEG layout" !! 2994 prompt "Kernel appended dtb support" if USE_OF
745 depends on MMU !! 2995 default MIPS_NO_APPENDED_DTB
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 2996
>> 2997 config MIPS_NO_APPENDED_DTB
>> 2998 bool "None"
>> 2999 help
>> 3000 Do not enable appended dtb support.
>> 3001
>> 3002 config MIPS_ELF_APPENDED_DTB
>> 3003 bool "vmlinux"
>> 3004 help
>> 3005 With this option, the boot code will look for a device tree binary
>> 3006 DTB) included in the vmlinux ELF section .appended_dtb. By default
>> 3007 it is empty and the DTB can be appended using binutils command
>> 3008 objcopy:
>> 3009
>> 3010 objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
>> 3011
>> 3012 This is meant as a backward compatiblity convenience for those
>> 3013 systems with a bootloader that can't be upgraded to accommodate
>> 3014 the documented boot protocol using a device tree.
>> 3015
>> 3016 config MIPS_RAW_APPENDED_DTB
>> 3017 bool "vmlinux.bin or vmlinuz.bin"
>> 3018 help
>> 3019 With this option, the boot code will look for a device tree binary
>> 3020 DTB) appended to raw vmlinux.bin or vmlinuz.bin.
>> 3021 (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
>> 3022
>> 3023 This is meant as a backward compatibility convenience for those
>> 3024 systems with a bootloader that can't be upgraded to accommodate
>> 3025 the documented boot protocol using a device tree.
>> 3026
>> 3027 Beware that there is very little in terms of protection against
>> 3028 this option being confused by leftover garbage in memory that might
>> 3029 look like a DTB header after a reboot if no actual DTB is appended
>> 3030 to vmlinux.bin. Do not leave this option active in a production kernel
>> 3031 if you don't intend to always append a DTB.
772 endchoice 3032 endchoice
773 3033
774 config HIGHMEM !! 3034 choice
775 bool "High Memory Support" !! 3035 prompt "Kernel command line type" if !CMDLINE_OVERRIDE
776 depends on MMU !! 3036 default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
777 select KMAP_LOCAL !! 3037 !MIPS_MALTA && \
778 help !! 3038 !CAVIUM_OCTEON_SOC
779 Linux can use the full amount of RAM !! 3039 default MIPS_CMDLINE_FROM_BOOTLOADER
780 default. However, the default MMUv2 !! 3040
781 lowermost 128 MB of memory linearly !! 3041 config MIPS_CMDLINE_FROM_DTB
782 at 0xd0000000 (cached) and 0xd800000 !! 3042 depends on USE_OF
783 When there are more than 128 MB memo !! 3043 bool "Dtb kernel arguments if available"
784 all of it can be "permanently mapped !! 3044
785 The physical memory that's not perma !! 3045 config MIPS_CMDLINE_DTB_EXTEND
786 "high memory". !! 3046 depends on USE_OF
787 !! 3047 bool "Extend dtb kernel arguments with bootloader arguments"
788 If you are compiling a kernel which !! 3048
789 machine with more than 128 MB total !! 3049 config MIPS_CMDLINE_FROM_BOOTLOADER
790 N here. !! 3050 bool "Bootloader kernel arguments if available"
>> 3051
>> 3052 config MIPS_CMDLINE_BUILTIN_EXTEND
>> 3053 depends on CMDLINE_BOOL
>> 3054 bool "Extend builtin kernel arguments with bootloader arguments"
>> 3055 endchoice
791 3056
792 If unsure, say Y. !! 3057 endmenu
>> 3058
>> 3059 config LOCKDEP_SUPPORT
>> 3060 bool
>> 3061 default y
>> 3062
>> 3063 config STACKTRACE_SUPPORT
>> 3064 bool
>> 3065 default y
>> 3066
>> 3067 config HAVE_LATENCYTOP_SUPPORT
>> 3068 bool
>> 3069 default y
>> 3070
>> 3071 config PGTABLE_LEVELS
>> 3072 int
>> 3073 default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
>> 3074 default 3 if 64BIT && !PAGE_SIZE_64KB
>> 3075 default 2
>> 3076
>> 3077 config MIPS_AUTO_PFN_OFFSET
>> 3078 bool
>> 3079
>> 3080 menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
>> 3081
>> 3082 config PCI_DRIVERS_GENERIC
>> 3083 select PCI_DOMAINS_GENERIC if PCI
>> 3084 bool
>> 3085
>> 3086 config PCI_DRIVERS_LEGACY
>> 3087 def_bool !PCI_DRIVERS_GENERIC
>> 3088 select NO_GENERIC_PCI_IOPORT_MAP
>> 3089 select PCI_DOMAINS if PCI
>> 3090
>> 3091 #
>> 3092 # ISA support is now enabled via select. Too many systems still have the one
>> 3093 # or other ISA chip on the board that users don't know about so don't expect
>> 3094 # users to choose the right thing ...
>> 3095 #
>> 3096 config ISA
>> 3097 bool
>> 3098
>> 3099 config TC
>> 3100 bool "TURBOchannel support"
>> 3101 depends on MACH_DECSTATION
>> 3102 help
>> 3103 TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
>> 3104 processors. TURBOchannel programming specifications are available
>> 3105 at:
>> 3106 <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
>> 3107 and:
>> 3108 <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
>> 3109 Linux driver support status is documented at:
>> 3110 <http://www.linux-mips.org/wiki/DECstation>
793 3111
794 config ARCH_FORCE_MAX_ORDER !! 3112 config MMU
795 int "Order of maximal physically conti !! 3113 bool
796 default "10" !! 3114 default y
797 help !! 3115
798 The kernel page allocator limits the !! 3116 config ARCH_MMAP_RND_BITS_MIN
799 contiguous allocations. The limit is !! 3117 default 12 if 64BIT
800 defines the maximal power of two of !! 3118 default 8
801 allocated as a single contiguous blo !! 3119
802 overriding the default setting when !! 3120 config ARCH_MMAP_RND_BITS_MAX
803 large blocks of physically contiguou !! 3121 default 18 if 64BIT
>> 3122 default 15
>> 3123
>> 3124 config ARCH_MMAP_RND_COMPAT_BITS_MIN
>> 3125 default 8
>> 3126
>> 3127 config ARCH_MMAP_RND_COMPAT_BITS_MAX
>> 3128 default 15
>> 3129
>> 3130 config I8253
>> 3131 bool
>> 3132 select CLKSRC_I8253
>> 3133 select CLKEVT_I8253
>> 3134 select MIPS_EXTERNAL_TIMER
>> 3135
>> 3136 config ZONE_DMA
>> 3137 bool
804 3138
805 Don't change if unsure. !! 3139 config ZONE_DMA32
>> 3140 bool
806 3141
807 endmenu 3142 endmenu
808 3143
>> 3144 config TRAD_SIGNALS
>> 3145 bool
>> 3146
>> 3147 config MIPS32_COMPAT
>> 3148 bool
>> 3149
>> 3150 config COMPAT
>> 3151 bool
>> 3152
>> 3153 config SYSVIPC_COMPAT
>> 3154 bool
>> 3155
>> 3156 config MIPS32_O32
>> 3157 bool "Kernel support for o32 binaries"
>> 3158 depends on 64BIT
>> 3159 select ARCH_WANT_OLD_COMPAT_IPC
>> 3160 select COMPAT
>> 3161 select MIPS32_COMPAT
>> 3162 select SYSVIPC_COMPAT if SYSVIPC
>> 3163 help
>> 3164 Select this option if you want to run o32 binaries. These are pure
>> 3165 32-bit binaries as used by the 32-bit Linux/MIPS port. Most of
>> 3166 existing binaries are in this format.
>> 3167
>> 3168 If unsure, say Y.
>> 3169
>> 3170 config MIPS32_N32
>> 3171 bool "Kernel support for n32 binaries"
>> 3172 depends on 64BIT
>> 3173 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
>> 3174 select COMPAT
>> 3175 select MIPS32_COMPAT
>> 3176 select SYSVIPC_COMPAT if SYSVIPC
>> 3177 help
>> 3178 Select this option if you want to run n32 binaries. These are
>> 3179 64-bit binaries using 32-bit quantities for addressing and certain
>> 3180 data that would normally be 64-bit. They are used in special
>> 3181 cases.
>> 3182
>> 3183 If unsure, say N.
>> 3184
>> 3185 config BINFMT_ELF32
>> 3186 bool
>> 3187 default y if MIPS32_O32 || MIPS32_N32
>> 3188 select ELFCORE
>> 3189
809 menu "Power management options" 3190 menu "Power management options"
810 3191
811 config ARCH_HIBERNATION_POSSIBLE 3192 config ARCH_HIBERNATION_POSSIBLE
812 def_bool y 3193 def_bool y
>> 3194 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
>> 3195
>> 3196 config ARCH_SUSPEND_POSSIBLE
>> 3197 def_bool y
>> 3198 depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
813 3199
814 source "kernel/power/Kconfig" 3200 source "kernel/power/Kconfig"
815 3201
816 endmenu 3202 endmenu
>> 3203
>> 3204 config MIPS_EXTERNAL_TIMER
>> 3205 bool
>> 3206
>> 3207 menu "CPU Power Management"
>> 3208
>> 3209 if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
>> 3210 source "drivers/cpufreq/Kconfig"
>> 3211 endif
>> 3212
>> 3213 source "drivers/cpuidle/Kconfig"
>> 3214
>> 3215 endmenu
>> 3216
>> 3217 source "drivers/firmware/Kconfig"
>> 3218
>> 3219 source "arch/mips/kvm/Kconfig"
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