1 # SPDX-License-Identifier: GPL-2.0 1 # SPDX-License-Identifier: GPL-2.0
2 config XTENSA !! 2 config ALPHA
3 def_bool y !! 3 bool
4 select ARCH_32BIT_OFF_T !! 4 default y
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 select ARCH_32BIT_USTAT_F_TINODE
6 select ARCH_HAS_BINFMT_FLAT if !MMU <<
7 select ARCH_HAS_CURRENT_STACK_POINTER 6 select ARCH_HAS_CURRENT_STACK_POINTER
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 7 select ARCH_HAS_DMA_OPS if PCI
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 8 select ARCH_MIGHT_HAVE_PC_PARPORT
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 9 select ARCH_MIGHT_HAVE_PC_SERIO
11 select ARCH_HAS_KCOV !! 10 select ARCH_NO_PREEMPT
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 11 select ARCH_NO_SG_CHAIN
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 12 select ARCH_USE_CMPXCHG_LOCKREF
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 13 select FORCE_PCI
15 select ARCH_HAS_STRNCPY_FROM_USER if ! !! 14 select PCI_DOMAINS if PCI
16 select ARCH_HAS_STRNLEN_USER !! 15 select PCI_SYSCALL if PCI
17 select ARCH_NEED_CMPXCHG_1_EMU <<
18 select ARCH_USE_MEMTEST <<
19 select ARCH_USE_QUEUED_RWLOCKS <<
20 select ARCH_USE_QUEUED_SPINLOCKS <<
21 select ARCH_WANT_IPC_PARSE_VERSION <<
22 select BUILDTIME_TABLE_SORT <<
23 select CLONE_BACKWARDS <<
24 select COMMON_CLK <<
25 select DMA_NONCOHERENT_MMAP if MMU <<
26 select GENERIC_ATOMIC64 <<
27 select GENERIC_IRQ_SHOW <<
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP <<
32 select GENERIC_SCHED_CLOCK <<
33 select GENERIC_IOREMAP if MMU <<
34 select HAVE_ARCH_AUDITSYSCALL <<
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
36 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
37 select HAVE_ARCH_KCSAN <<
38 select HAVE_ARCH_SECCOMP_FILTER <<
39 select HAVE_ARCH_TRACEHOOK <<
40 select HAVE_ASM_MODVERSIONS 16 select HAVE_ASM_MODVERSIONS
41 select HAVE_CONTEXT_TRACKING_USER !! 17 select HAVE_PAGE_SIZE_8KB
42 select HAVE_DEBUG_KMEMLEAK !! 18 select HAVE_PCSPKR_PLATFORM
43 select HAVE_DMA_CONTIGUOUS <<
44 select HAVE_EXIT_THREAD <<
45 select HAVE_FUNCTION_TRACER <<
46 select HAVE_GCC_PLUGINS if GCC_VERSION <<
47 select HAVE_HW_BREAKPOINT if PERF_EVEN <<
48 select HAVE_IRQ_TIME_ACCOUNTING <<
49 select HAVE_PAGE_SIZE_4KB <<
50 select HAVE_PCI <<
51 select HAVE_PERF_EVENTS 19 select HAVE_PERF_EVENTS
52 select HAVE_STACKPROTECTOR !! 20 select NEED_DMA_MAP_STATE
53 select HAVE_SYSCALL_TRACEPOINTS !! 21 select NEED_SG_DMA_LENGTH
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 22 select GENERIC_IRQ_PROBE
55 select IRQ_DOMAIN !! 23 select GENERIC_PCI_IOMAP
>> 24 select AUTO_IRQ_AFFINITY if SMP
>> 25 select GENERIC_IRQ_SHOW
>> 26 select ARCH_WANT_IPC_PARSE_VERSION
>> 27 select ARCH_HAVE_NMI_SAFE_CMPXCHG
>> 28 select AUDIT_ARCH
>> 29 select GENERIC_CPU_VULNERABILITIES
>> 30 select GENERIC_SMP_IDLE_THREAD
>> 31 select HAS_IOPORT
>> 32 select HAVE_ARCH_AUDITSYSCALL
>> 33 select HAVE_MOD_ARCH_SPECIFIC
56 select LOCK_MM_AND_FIND_VMA 34 select LOCK_MM_AND_FIND_VMA
57 select MODULES_USE_ELF_RELA 35 select MODULES_USE_ELF_RELA
58 select PERF_USE_VMALLOC !! 36 select ODD_RT_SIGACTION
59 select TRACE_IRQFLAGS_SUPPORT !! 37 select OLD_SIGSUSPEND
60 help !! 38 select CPU_NO_EFFICIENT_FFS if !ALPHA_EV67
61 Xtensa processors are 32-bit RISC ma !! 39 select MMU_GATHER_NO_RANGE
62 primarily for embedded systems. The !! 40 select SPARSEMEM_EXTREME if SPARSEMEM
63 configurable and extensible. The Li !! 41 select ZONE_DMA
64 architecture supports all processor !! 42 help
65 with reasonable minimum requirements !! 43 The Alpha is a 64-bit general-purpose processor designed and
66 a home page at <http://www.linux-xte !! 44 marketed by the Digital Equipment Corporation of blessed memory,
>> 45 now Hewlett-Packard. The Alpha Linux project has a home page at
>> 46 <http://www.alphalinux.org/>.
67 47
68 config GENERIC_HWEIGHT !! 48 config 64BIT
69 def_bool y 49 def_bool y
70 50
>> 51 config MMU
>> 52 bool
>> 53 default y
>> 54
71 config ARCH_HAS_ILOG2_U32 55 config ARCH_HAS_ILOG2_U32
72 def_bool n !! 56 bool
>> 57 default n
73 58
74 config ARCH_HAS_ILOG2_U64 59 config ARCH_HAS_ILOG2_U64
75 def_bool n !! 60 bool
>> 61 default n
76 62
77 config ARCH_MTD_XIP !! 63 config GENERIC_CALIBRATE_DELAY
78 def_bool y !! 64 bool
>> 65 default y
79 66
80 config NO_IOPORT_MAP !! 67 config GENERIC_ISA_DMA
81 def_bool n !! 68 bool
>> 69 default y
82 70
83 config HZ !! 71 config PGTABLE_LEVELS
84 int 72 int
85 default 100 !! 73 default 3
86 74
87 config LOCKDEP_SUPPORT !! 75 config AUDIT_ARCH
88 def_bool y !! 76 bool
89 <<
90 config STACKTRACE_SUPPORT <<
91 def_bool y <<
92 <<
93 config MMU <<
94 def_bool n <<
95 select PFAULT <<
96 <<
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 <<
100 config KASAN_SHADOW_OFFSET <<
101 hex <<
102 default 0x6e400000 <<
103 <<
104 config CPU_BIG_ENDIAN <<
105 def_bool $(success,test "$(shell,echo <<
106 77
107 config CPU_LITTLE_ENDIAN !! 78 menu "System setup"
108 def_bool !CPU_BIG_ENDIAN <<
109 79
110 config CC_HAVE_CALL0_ABI !! 80 choice
111 def_bool $(success,test "$(shell,echo !! 81 prompt "Alpha system type"
>> 82 default ALPHA_GENERIC
>> 83 help
>> 84 This is the system type of your hardware. A "generic" kernel will
>> 85 run on any supported Alpha system. However, if you configure a
>> 86 kernel for your specific system, it will be faster and smaller.
112 87
113 menu "Processor type and features" !! 88 To find out what type of Alpha system you have, you may want to
>> 89 check out the Linux/Alpha FAQ, accessible on the WWW from
>> 90 <http://www.alphalinux.org/>. In summary:
114 91
115 choice !! 92 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366
116 prompt "Xtensa Processor Configuration !! 93 DP264 DP264 / DS20 / ES40 / DS10 / DS10L
117 default XTENSA_VARIANT_FSF !! 94 LX164 AlphaPC164-LX
>> 95 Miata Personal Workstation 433/500/600 a/au
>> 96 Marvel AlphaServer ES47 / ES80 / GS1280
>> 97 Mikasa AS 1000
>> 98 Noritake AS 1000A, AS 600A, AS 800
>> 99 PC164 AlphaPC164
>> 100 Rawhide AS 1200, AS 4000, AS 4100
>> 101 Ruffian RPX164-2, AlphaPC164-UX, AlphaPC164-BX
>> 102 SX164 AlphaPC164-SX
>> 103 Sable AS 2000, AS 2100
>> 104 Shark DS 20L
>> 105 Takara Takara (OEM)
>> 106 Titan AlphaServer ES45 / DS25 / DS15
>> 107 Wildfire AlphaServer GS 40/80/160/320
118 108
119 config XTENSA_VARIANT_FSF !! 109 If you don't know what to do, choose "generic".
120 bool "fsf - default (not generic) conf <<
121 select MMU <<
122 110
123 config XTENSA_VARIANT_DC232B !! 111 config ALPHA_GENERIC
124 bool "dc232b - Diamond 232L Standard C !! 112 bool "Generic"
125 select MMU !! 113 depends on TTY
126 select HAVE_XTENSA_GPIO32 !! 114 select HAVE_EISA
127 help 115 help
128 This variant refers to Tensilica's D !! 116 A generic kernel will run on all supported Alpha hardware.
129 117
130 config XTENSA_VARIANT_DC233C !! 118 config ALPHA_ALCOR
131 bool "dc233c - Diamond 233L Standard C !! 119 bool "Alcor/Alpha-XLT"
132 select MMU !! 120 select HAVE_EISA
133 select HAVE_XTENSA_GPIO32 <<
134 help 121 help
135 This variant refers to Tensilica's D !! 122 For systems using the Digital ALCOR chipset: 5 chips (4, 64-bit data
>> 123 slices (Data Switch, DSW) - 208-pin PQFP and 1 control (Control, I/O
>> 124 Address, CIA) - a 383 pin plastic PGA). It provides a DRAM
>> 125 controller (256-bit memory bus) and a PCI interface. It also does
>> 126 all the work required to support an external Bcache and to maintain
>> 127 memory coherence when a PCI device DMAs into (or out of) memory.
136 128
137 config XTENSA_VARIANT_CUSTOM !! 129 config ALPHA_DP264
138 bool "Custom Xtensa processor configur !! 130 bool "DP264"
139 select HAVE_XTENSA_GPIO32 <<
140 help 131 help
141 Select this variant to use a custom !! 132 Various 21264 systems with the tsunami core logic chipset.
142 You will be prompted for a processor !! 133 API Networks: 264DP, UP2000(+), CS20;
143 endchoice !! 134 Compaq: DS10(E,L), XP900, XP1000, DS20(E), ES40.
144 135
145 config XTENSA_VARIANT_CUSTOM_NAME !! 136 config ALPHA_EIGER
146 string "Xtensa Processor Custom Core V !! 137 bool "Eiger"
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n <<
173 help 138 help
174 Enable if core variant has Performan !! 139 Apparently an obscure OEM single-board computer based on the
175 External Registers Interface. !! 140 Typhoon/Tsunami chipset family. Information on it is scanty.
176 <<
177 If unsure, say N. <<
178 141
179 config XTENSA_FAKE_NMI !! 142 config ALPHA_LX164
180 bool "Treat PMM IRQ as NMI" !! 143 bool "LX164"
181 depends on XTENSA_VARIANT_HAVE_PERF_EV <<
182 default n <<
183 help 144 help
184 If PMM IRQ is the only IRQ at EXCM l !! 145 A technical overview of this board is available at
185 treat it as NMI, which improves accu !! 146 <http://www.unix-ag.org/Linux-Alpha/Architectures/LX164.html>.
186 <<
187 If there are other interrupts at or <<
188 but not above the EXCM level, PMM IR <<
189 but only if these IRQs are not used. <<
190 saying that this is not safe, and a <<
191 actually fire. <<
192 <<
193 If unsure, say N. <<
194 147
195 config PFAULT !! 148 config ALPHA_MARVEL
196 bool "Handle protection faults" if EXP !! 149 bool "Marvel"
197 default y <<
198 help 150 help
199 Handle protection faults. MMU config !! 151 AlphaServer ES47 / ES80 / GS1280 based on EV7.
200 noMMU configurations may disable it <<
201 generates protection faults or fault <<
202 <<
203 If unsure, say Y. <<
204 152
205 config XTENSA_UNALIGNED_USER !! 153 config ALPHA_MIATA
206 bool "Unaligned memory access in user !! 154 bool "Miata"
>> 155 select HAVE_EISA
207 help 156 help
208 The Xtensa architecture currently do !! 157 The Digital PersonalWorkStation (PWS 433a, 433au, 500a, 500au, 600a,
209 memory accesses in hardware but thro !! 158 or 600au).
210 Per default, unaligned memory access <<
211 <<
212 Say Y here to enable unaligned memor <<
213 159
214 config XTENSA_LOAD_STORE !! 160 config ALPHA_MIKASA
215 bool "Load/store exception handler for !! 161 bool "Mikasa"
216 help 162 help
217 The Xtensa architecture only allows !! 163 AlphaServer 1000-based Alpha systems.
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 164
223 Say Y here to enable exception handl !! 165 config ALPHA_NAUTILUS
224 byte and 2-byte access to memory att !! 166 bool "Nautilus"
225 <<
226 config HAVE_SMP <<
227 bool "System Supports SMP (MX)" <<
228 depends on XTENSA_VARIANT_CUSTOM <<
229 select XTENSA_MX <<
230 help 167 help
231 This option is used to indicate that !! 168 Alpha systems based on the AMD 751 & ALI 1543C chipsets.
232 supports Multiprocessing. Multiproce <<
233 the CPU core definition and currentl <<
234 <<
235 Multiprocessor support is implemente <<
236 interrupt controllers. <<
237 169
238 The MX interrupt distributer adds In !! 170 config ALPHA_NORITAKE
239 and causes the IRQ numbers to be inc !! 171 bool "Noritake"
240 like the open cores ethernet driver !! 172 select HAVE_EISA
>> 173 help
>> 174 AlphaServer 1000A, AlphaServer 600A, and AlphaServer 800-based
>> 175 systems.
241 176
242 You still have to select "Enable SMP !! 177 config ALPHA_PC164
>> 178 bool "PC164"
243 179
244 config SMP !! 180 config ALPHA_RAWHIDE
245 bool "Enable Symmetric multi-processin !! 181 bool "Rawhide"
246 depends on HAVE_SMP !! 182 select HAVE_EISA
247 select GENERIC_SMP_IDLE_THREAD <<
248 help 183 help
249 Enabled SMP Software; allows more th !! 184 AlphaServer 1200, AlphaServer 4000 and AlphaServer 4100 machines.
250 to be activated during startup. !! 185 See HOWTO at
>> 186 <http://www.alphalinux.org/docs/rawhide/4100_install.shtml>.
251 187
252 config NR_CPUS !! 188 config ALPHA_RUFFIAN
253 depends on SMP !! 189 bool "Ruffian"
254 int "Maximum number of CPUs (2-32)" <<
255 range 2 32 <<
256 default "4" <<
257 <<
258 config HOTPLUG_CPU <<
259 bool "Enable CPU hotplug support" <<
260 depends on SMP <<
261 help 190 help
262 Say Y here to allow turning CPUs off !! 191 Samsung APC164UX. There is a page on known problems and workarounds
263 controlled through /sys/devices/syst !! 192 at <http://www.alphalinux.org/faq/FAQ-11.html>.
264 193
265 Say N if you want to disable CPU hot !! 194 config ALPHA_RX164
>> 195 bool "RX164"
266 196
267 config SECONDARY_RESET_VECTOR !! 197 config ALPHA_SX164
268 bool "Secondary cores use alternative !! 198 bool "SX164"
269 default y <<
270 depends on HAVE_SMP <<
271 help <<
272 Secondary cores may be configured to <<
273 or all cores may use primary reset v <<
274 Say Y here to supply handler for the <<
275 199
276 config FAST_SYSCALL_XTENSA !! 200 config ALPHA_SABLE
277 bool "Enable fast atomic syscalls" !! 201 bool "Sable"
278 default n !! 202 select HAVE_EISA
279 help 203 help
280 fast_syscall_xtensa is a syscall tha !! 204 Digital AlphaServer 2000 and 2100-based systems.
281 on UP kernel when processor has no s <<
282 205
283 This syscall is deprecated. It may h !! 206 config ALPHA_SHARK
284 invalid arguments. It is provided on !! 207 bool "Shark"
285 Only enable it if your userspace sof <<
286 208
287 If unsure, say N. !! 209 config ALPHA_TAKARA
288 !! 210 bool "Takara"
289 config FAST_SYSCALL_SPILL_REGISTERS <<
290 bool "Enable spill registers syscall" <<
291 default n <<
292 help 211 help
293 fast_syscall_spill_registers is a sy !! 212 Alpha 11164-based OEM single-board computer.
294 register windows of a calling usersp <<
295 213
296 This syscall is deprecated. It may h !! 214 config ALPHA_TITAN
297 invalid arguments. It is provided on !! 215 bool "Titan"
298 Only enable it if your userspace sof !! 216 help
299 !! 217 AlphaServer ES45/DS25 SMP based on EV68 and Titan chipset.
300 If unsure, say N. <<
301 218
302 choice !! 219 config ALPHA_WILDFIRE
303 prompt "Kernel ABI" !! 220 bool "Wildfire"
304 default KERNEL_ABI_DEFAULT <<
305 help 221 help
306 Select ABI for the kernel code. This !! 222 AlphaServer GS 40/80/160/320 SMP based on the EV67 core.
307 supported userspace ABI and any comb <<
308 kernel/userspace ABI is possible and <<
309 <<
310 In case both kernel and userspace su <<
311 all register windows support code wi <<
312 build. <<
313 <<
314 If unsure, choose the default ABI. <<
315 <<
316 config KERNEL_ABI_DEFAULT <<
317 bool "Default ABI" <<
318 help <<
319 Select this option to compile kernel <<
320 selected for the toolchain. <<
321 Normally cores with windowed registe <<
322 cores without it use call0 ABI. <<
323 <<
324 config KERNEL_ABI_CALL0 <<
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI <<
326 help <<
327 Select this option to compile kernel <<
328 toolchain that defaults to windowed <<
329 When this option is not selected the <<
330 be used for the kernel code. <<
331 223
332 endchoice 224 endchoice
333 225
334 config USER_ABI_CALL0 !! 226 # clear all implied options (don't want default values for those):
>> 227 # Most of these machines have ISA slots; not exactly sure which don't,
>> 228 # and this doesn't activate hordes of code, so do it always.
>> 229 config ISA
335 bool 230 bool
336 !! 231 default y
337 choice <<
338 prompt "Userspace ABI" <<
339 default USER_ABI_DEFAULT <<
340 help <<
341 Select supported userspace ABI. <<
342 <<
343 If unsure, choose the default ABI. <<
344 <<
345 config USER_ABI_DEFAULT <<
346 bool "Default ABI only" <<
347 help 232 help
348 Assume default userspace ABI. For XE !! 233 Find out whether you have ISA slots on your motherboard. ISA is the
349 call0 ABI binaries may be run on suc !! 234 name of a bus system, i.e. the way the CPU talks to the other stuff
350 will not work correctly for them. !! 235 inside your box. Other bus systems are PCI, EISA, MicroChannel
>> 236 (MCA) or VESA. ISA is an older system, now being displaced by PCI;
>> 237 newer boards don't support it. If you have ISA, say Y, otherwise N.
351 238
352 config USER_ABI_CALL0_ONLY !! 239 config ISA_DMA_API
353 bool "Call0 ABI only" !! 240 bool
354 select USER_ABI_CALL0 !! 241 default y
355 help <<
356 Select this option to support only c <<
357 Windowed ABI binaries will crash wit <<
358 an illegal instruction exception on <<
359 242
360 Choose this option if you're plannin !! 243 config ALPHA_CIA
361 built with call0 ABI. !! 244 bool
>> 245 depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR
>> 246 default y
362 247
363 config USER_ABI_CALL0_PROBE !! 248 config ALPHA_EV56
364 bool "Support both windowed and call0 !! 249 bool
365 select USER_ABI_CALL0 !! 250 default y if ALPHA_ALCOR || ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_RAWHIDE || ALPHA_SABLE
366 help <<
367 Select this option to support both w <<
368 ABIs. When enabled all processes are <<
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 251
373 This option should be enabled for th !! 252 config ALPHA_T2
374 both call0 and windowed ABIs in user !! 253 bool
>> 254 depends on ALPHA_SABLE
>> 255 default y
375 256
376 Note that Xtensa ISA does not guaran !! 257 config ALPHA_PYXIS
377 raise an illegal instruction excepti !! 258 bool
378 PS.WOE is disabled, check whether th !! 259 depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN
>> 260 default y
379 261
380 endchoice !! 262 config ALPHA_EV6
>> 263 bool
>> 264 depends on ALPHA_NAUTILUS || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_DP264 || ALPHA_EIGER || ALPHA_MARVEL
>> 265 default y
381 266
382 endmenu !! 267 config ALPHA_TSUNAMI
>> 268 bool
>> 269 depends on ALPHA_SHARK || ALPHA_DP264 || ALPHA_EIGER
>> 270 default y
383 271
384 config XTENSA_CALIBRATE_CCOUNT !! 272 config ALPHA_EV67
385 def_bool n !! 273 bool "EV67 (or later) CPU (speed > 600MHz)?" if ALPHA_DP264 || ALPHA_EIGER
>> 274 default y if ALPHA_NAUTILUS || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL
386 help 275 help
387 On some platforms (XT2000, for examp !! 276 Is this a machine based on the EV67 core? If in doubt, select N here
388 vary. The frequency can be determin !! 277 and the machine will be treated as an EV6.
389 against a well known, fixed frequenc <<
390 <<
391 config SERIAL_CONSOLE <<
392 def_bool n <<
393 <<
394 config PLATFORM_HAVE_XIP <<
395 def_bool n <<
396 278
397 menu "Platform options" !! 279 config ALPHA_MCPCIA
398 !! 280 bool
399 choice !! 281 depends on ALPHA_RAWHIDE
400 prompt "Xtensa System Type" !! 282 default y
401 default XTENSA_PLATFORM_ISS <<
402 283
403 config XTENSA_PLATFORM_ISS !! 284 config ALPHA_POLARIS
404 bool "ISS" !! 285 bool
405 select XTENSA_CALIBRATE_CCOUNT !! 286 depends on ALPHA_RX164
406 select SERIAL_CONSOLE !! 287 default y
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 <<
410 config XTENSA_PLATFORM_XT2000 <<
411 bool "XT2000" <<
412 help <<
413 XT2000 is the name of Tensilica's fe <<
414 This hardware is capable of running <<
415 <<
416 config XTENSA_PLATFORM_XTFPGA <<
417 bool "XTFPGA" <<
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help <<
424 XTFPGA is the name of Tensilica boar <<
425 This hardware is capable of running <<
426 288
427 endchoice !! 289 config ALPHA_IRONGATE
>> 290 bool
>> 291 depends on ALPHA_NAUTILUS
>> 292 default y
428 293
429 config PLATFORM_NR_IRQS !! 294 config GENERIC_HWEIGHT
430 int !! 295 bool
431 default 3 if XTENSA_PLATFORM_XT2000 !! 296 default y if !ALPHA_EV67
432 default 0 <<
433 297
434 config XTENSA_CPU_CLOCK !! 298 config ALPHA_BROKEN_IRQ_MASK
435 int "CPU clock rate [MHz]" !! 299 bool
436 depends on !XTENSA_CALIBRATE_CCOUNT !! 300 depends on ALPHA_GENERIC || ALPHA_PC164
437 default 16 !! 301 default y
438 302
439 config GENERIC_CALIBRATE_DELAY !! 303 config VGA_HOSE
440 bool "Auto calibration of the BogoMIPS !! 304 bool
>> 305 depends on VGA_CONSOLE && (ALPHA_GENERIC || ALPHA_TITAN || ALPHA_MARVEL || ALPHA_TSUNAMI)
>> 306 default y
441 help 307 help
442 The BogoMIPS value can easily be der !! 308 Support VGA on an arbitrary hose; needed for several platforms
>> 309 which always have multiple hoses, and whose consoles support it.
443 310
444 config CMDLINE_BOOL <<
445 bool "Default bootloader kernel argume <<
446 311
447 config CMDLINE !! 312 config ALPHA_QEMU
448 string "Initial kernel command string" !! 313 bool "Run under QEMU emulation"
449 depends on CMDLINE_BOOL !! 314 depends on !ALPHA_GENERIC
450 default "console=ttyS0,38400 root=/dev <<
451 help 315 help
452 On some architectures (EBSA110 and C !! 316 Assume the presence of special features supported by QEMU PALcode
453 for the boot loader to pass argument !! 317 that reduce the overhead of system emulation.
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 318
458 config USE_OF !! 319 Generic kernels will auto-detect QEMU. But when building a
459 bool "Flattened Device Tree support" !! 320 system-specific kernel, the assumption is that we want to
460 select OF !! 321 eliminate as many runtime tests as possible.
461 select OF_EARLY_FLATTREE <<
462 help <<
463 Include support for flattened device <<
464 322
465 config BUILTIN_DTB_SOURCE !! 323 If unsure, say N.
466 string "DTB to build into the kernel i <<
467 depends on OF <<
468 324
469 config PARSE_BOOTPARAM <<
470 bool "Parse bootparam block" <<
471 default y <<
472 help <<
473 Parse parameters passed to the kerne <<
474 be disabled if the kernel is known t <<
475 325
476 If unsure, say Y. !! 326 config ALPHA_SRM
>> 327 bool "Use SRM as bootloader" if ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS
>> 328 depends on TTY
>> 329 default y if ALPHA_MIKASA || ALPHA_SABLE || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL
>> 330 help
>> 331 There are two different types of booting firmware on Alphas: SRM,
>> 332 which is command line driven, and ARC, which uses menus and arrow
>> 333 keys. Details about the Linux/Alpha booting process are contained in
>> 334 the Linux/Alpha FAQ, accessible on the WWW from
>> 335 <http://www.alphalinux.org/>.
>> 336
>> 337 The usual way to load Linux on an Alpha machine is to use MILO
>> 338 (a bootloader that lets you pass command line parameters to the
>> 339 kernel just like lilo does for the x86 architecture) which can be
>> 340 loaded either from ARC or can be installed directly as a permanent
>> 341 firmware replacement from floppy (which requires changing a certain
>> 342 jumper on the motherboard). If you want to do either of these, say N
>> 343 here. If MILO doesn't work on your system (true for Jensen
>> 344 motherboards), you can bypass it altogether and boot Linux directly
>> 345 from an SRM console; say Y here in order to do that. Note that you
>> 346 won't be able to boot from an IDE disk using SRM.
477 347
478 choice !! 348 If unsure, say N.
479 prompt "Semihosting interface" <<
480 default XTENSA_SIMCALL_ISS <<
481 depends on XTENSA_PLATFORM_ISS <<
482 help <<
483 Choose semihosting interface that wi <<
484 block device and networking. <<
485 349
486 config XTENSA_SIMCALL_ISS !! 350 config ARCH_MAY_HAVE_PC_FDC
487 bool "simcall" !! 351 def_bool y
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 352
492 config XTENSA_SIMCALL_GDBIO !! 353 config SMP
493 bool "GDBIO" !! 354 bool "Symmetric multi-processing support"
>> 355 depends on ALPHA_SABLE || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL
494 help 356 help
495 Use break instruction. It is availab !! 357 This enables support for systems with more than one CPU. If you have
496 is attached to it via JTAG. !! 358 a system with only one CPU, say N. If you have a system with more
>> 359 than one CPU, say Y.
>> 360
>> 361 If you say N here, the kernel will run on uni- and multiprocessor
>> 362 machines, but will use only one CPU of a multiprocessor machine. If
>> 363 you say Y here, the kernel will run on many, but not all,
>> 364 uniprocessor machines. On a uniprocessor machine, the kernel
>> 365 will run faster if you say N here.
497 366
498 endchoice !! 367 See also the SMP-HOWTO available at
>> 368 <https://www.tldp.org/docs.html#howto>.
499 369
500 config BLK_DEV_SIMDISK !! 370 If you don't know what to do here, say N.
501 tristate "Host file-based simulated bl <<
502 default n <<
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 <<
509 config BLK_DEV_SIMDISK_COUNT <<
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 <<
520 config SIMDISK0_FILENAME <<
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 <<
528 config SIMDISK1_FILENAME <<
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 <<
536 config XTFPGA_LCD <<
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help <<
541 There's a 2x16 LCD on most of XTFPGA <<
542 progress messages there during bootu <<
543 during board bringup. <<
544 371
545 If unsure, say N. !! 372 config NR_CPUS
546 !! 373 int "Maximum number of CPUs (2-32)"
547 config XTFPGA_LCD_BASE_ADDR !! 374 range 2 32
548 hex "XTFPGA LCD base address" !! 375 depends on SMP
549 depends on XTFPGA_LCD !! 376 default "32" if ALPHA_GENERIC || ALPHA_MARVEL
550 default "0x0d0c0000" !! 377 default "4" if !ALPHA_GENERIC && !ALPHA_MARVEL
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help 378 help
562 LCD may be connected with 4- or 8-bi !! 379 MARVEL support can handle a maximum of 32 CPUs, all the others
563 only be used with 8-bit interface. P !! 380 with working support have a maximum of 4 CPUs.
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 381
617 If unsure, say N. !! 382 config ARCH_SPARSEMEM_ENABLE
>> 383 bool "Sparse Memory Support"
>> 384 help
>> 385 Say Y to support efficient handling of discontiguous physical memory,
>> 386 for systems that have huge holes in the physical address space.
>> 387
>> 388 config ALPHA_WTINT
>> 389 bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC
>> 390 default y if ALPHA_QEMU
>> 391 default n if ALPHA_EV56
>> 392 default n if !ALPHA_SRM && !ALPHA_GENERIC
>> 393 default y if SMP
>> 394 help
>> 395 The Wait for Interrupt (WTINT) PALcall attempts to place the CPU
>> 396 to sleep until the next interrupt. This may reduce the power
>> 397 consumed, and the heat produced by the computer. However, it has
>> 398 the side effect of making the cycle counter unreliable as a timing
>> 399 device across the sleep.
618 400
619 config MEMMAP_CACHEATTR !! 401 For emulation under QEMU, definitely say Y here, as we have other
620 hex "Cache attributes for the memory a !! 402 mechanisms for measuring time than the cycle counter.
621 depends on !MMU <<
622 default 0x22222222 <<
623 help <<
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 403
683 If unsure, leave the default value h !! 404 For EV4 (but not LCA), EV5 and EV56 systems, or for systems running
>> 405 MILO, sleep mode is not supported so you might as well say N here.
684 406
685 choice !! 407 For SMP systems we cannot use the cycle counter for timing anyway,
686 prompt "Relocatable vectors location" !! 408 so you might as well say Y here.
687 default XTENSA_VECTORS_IN_TEXT <<
688 help <<
689 Choose whether relocatable vectors a <<
690 or placed separately at runtime. Thi <<
691 configurations without VECBASE regis <<
692 placed at their hardware-defined loc <<
693 <<
694 config XTENSA_VECTORS_IN_TEXT <<
695 bool "Merge relocatable vectors into k <<
696 depends on !MTD_XIP <<
697 help <<
698 This option puts relocatable vectors <<
699 with proper alignment. <<
700 This is a safe choice for most confi <<
701 <<
702 config XTENSA_VECTORS_SEPARATE <<
703 bool "Put relocatable vectors at fixed <<
704 help <<
705 This option puts relocatable vectors <<
706 Vectors are merged with the .init da <<
707 are copied into their designated loc <<
708 Use it to put vectors into IRAM or o <<
709 XIP-aware MTD support. <<
710 409
711 endchoice !! 410 If unsure, say N.
712 411
713 config VECTORS_ADDR !! 412 # LARGE_VMALLOC is racy, if you *really* need it then fix it first
714 hex "Kernel vectors virtual address" !! 413 config ALPHA_LARGE_VMALLOC
715 default 0x00000000 !! 414 bool
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 <<
729 config PLATFORM_WANT_DEFAULT_MEM <<
730 def_bool n <<
731 <<
732 config DEFAULT_MEM_START <<
733 hex <<
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M <<
735 default 0x60000000 if PLATFORM_WANT_DE <<
736 default 0x00000000 <<
737 help 415 help
738 This is the base address used for bo !! 416 Process creation and other aspects of virtual memory management can
739 in noMMU configurations. !! 417 be streamlined if we restrict the kernel to one PGD for all vmalloc
>> 418 allocations. This equates to about 8GB.
>> 419
>> 420 Under normal circumstances, this is so far and above what is needed
>> 421 as to be laughable. However, there are certain applications (such
>> 422 as benchmark-grade in-kernel web serving) that can make use of as
>> 423 much vmalloc space as is available.
>> 424
>> 425 Say N unless you know you need gobs and gobs of vmalloc space.
>> 426
>> 427 config VERBOSE_MCHECK
>> 428 bool "Verbose Machine Checks"
>> 429
>> 430 config VERBOSE_MCHECK_ON
>> 431 int "Verbose Printing Mode (0=off, 1=on, 2=all)"
>> 432 depends on VERBOSE_MCHECK
>> 433 default 1
>> 434 help
>> 435 This option allows the default printing mode to be set, and then
>> 436 possibly overridden by a boot command argument.
>> 437
>> 438 For example, if one wanted the option of printing verbose
>> 439 machine checks, but wanted the default to be as if verbose
>> 440 machine check printing was turned off, then one would choose
>> 441 the printing mode to be 0. Then, upon reboot, one could add
>> 442 the boot command line "verbose_mcheck=1" to get the normal
>> 443 verbose machine check printing, or "verbose_mcheck=2" to get
>> 444 the maximum information available.
740 445
741 If unsure, leave the default value h !! 446 Take the default (1) unless you want more control or more info.
742 447
743 choice 448 choice
744 prompt "KSEG layout" !! 449 prompt "Timer interrupt frequency (HZ)?"
745 depends on MMU !! 450 default HZ_128 if ALPHA_QEMU
746 default XTENSA_KSEG_MMU_V2 !! 451 default HZ_1200 if ALPHA_RAWHIDE
747 !! 452 default HZ_1024
748 config XTENSA_KSEG_MMU_V2 !! 453 help
749 bool "MMUv2: 128MB cached + 128MB unca !! 454 The frequency at which timer interrupts occur. A high frequency
750 help !! 455 minimizes latency, whereas a low frequency minimizes overhead of
751 MMUv2 compatible kernel memory map: !! 456 process accounting. The later effect is especially significant
752 at KSEG_PADDR to 0xd0000000 with cac !! 457 when being run under QEMU.
753 without cache. !! 458
754 KSEG_PADDR must be aligned to 128MB. !! 459 Note that some Alpha hardware cannot change the interrupt frequency
755 !! 460 of the timer. If unsure, say 1024 (or 1200 for Rawhide).
756 config XTENSA_KSEG_256M !! 461
757 bool "256MB cached + 256MB uncached" !! 462 config HZ_32
758 depends on INITIALIZE_XTENSA_MMU_INSID !! 463 bool "32 Hz"
759 help !! 464 config HZ_64
760 TLB way 6 maps 256MB starting at KSE !! 465 bool "64 Hz"
761 with cache and to 0xc0000000 without !! 466 config HZ_128
762 KSEG_PADDR must be aligned to 256MB. !! 467 bool "128 Hz"
763 !! 468 config HZ_256
764 config XTENSA_KSEG_512M !! 469 bool "256 Hz"
765 bool "512MB cached + 512MB uncached" !! 470 config HZ_1024
766 depends on INITIALIZE_XTENSA_MMU_INSID !! 471 bool "1024 Hz"
767 help !! 472 config HZ_1200
768 TLB way 6 maps 512MB starting at KSE !! 473 bool "1200 Hz"
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 <<
772 endchoice 474 endchoice
773 475
774 config HIGHMEM !! 476 config HZ
775 bool "High Memory Support" !! 477 int
776 depends on MMU !! 478 default 32 if HZ_32
777 select KMAP_LOCAL !! 479 default 64 if HZ_64
778 help !! 480 default 128 if HZ_128
779 Linux can use the full amount of RAM !! 481 default 256 if HZ_256
780 default. However, the default MMUv2 !! 482 default 1200 if HZ_1200
781 lowermost 128 MB of memory linearly !! 483 default 1024
782 at 0xd0000000 (cached) and 0xd800000 !! 484
783 When there are more than 128 MB memo !! 485 config SRM_ENV
784 all of it can be "permanently mapped !! 486 tristate "SRM environment through procfs"
785 The physical memory that's not perma !! 487 depends on PROC_FS
786 "high memory". !! 488 help
787 !! 489 If you enable this option, a subdirectory inside /proc called
788 If you are compiling a kernel which !! 490 /proc/srm_environment will give you access to the all important
789 machine with more than 128 MB total !! 491 SRM environment variables (those which have a name) and also
790 N here. !! 492 to all others (by their internal number).
791 !! 493
792 If unsure, say Y. !! 494 SRM is something like a BIOS for Alpha machines. There are some
793 !! 495 other such BIOSes, like AlphaBIOS, which this driver cannot
794 config ARCH_FORCE_MAX_ORDER !! 496 support (hey, that's not SRM!).
795 int "Order of maximal physically conti !! 497
796 default "10" !! 498 Despite the fact that this driver doesn't work on all Alphas (but
797 help !! 499 only on those which have SRM as their firmware), it's save to
798 The kernel page allocator limits the !! 500 build it even if your particular machine doesn't know about SRM
799 contiguous allocations. The limit is !! 501 (or if you intend to compile a generic kernel). It will simply
800 defines the maximal power of two of !! 502 not create those subdirectory in /proc (and give you some warning,
801 allocated as a single contiguous blo !! 503 of course).
802 overriding the default setting when <<
803 large blocks of physically contiguou <<
804 504
805 Don't change if unsure. !! 505 This driver is also available as a module and will be called
>> 506 srm_env then.
806 507
807 endmenu 508 endmenu
808 509
809 menu "Power management options" !! 510 # DUMMY_CONSOLE may be defined in drivers/video/console/Kconfig
810 !! 511 # but we also need it if VGA_HOSE is set
811 config ARCH_HIBERNATION_POSSIBLE !! 512 config DUMMY_CONSOLE
812 def_bool y !! 513 bool
813 !! 514 depends on VGA_HOSE
814 source "kernel/power/Kconfig" !! 515 default y
815 <<
816 endmenu <<
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