1 # SPDX-License-Identifier: GPL-2.0 !! 1 config 64BIT
2 config XTENSA !! 2 bool "64-bit kernel" if "$(ARCH)" = "sparc"
3 def_bool y !! 3 default "$(ARCH)" = "sparc64"
4 select ARCH_32BIT_OFF_T !! 4 help
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 SPARC is a family of RISC microprocessors designed and marketed by
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 Sun Microsystems, incorporated. They are very widely found in Sun
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 workstations and clones.
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 Say yes to build a 64-bit kernel - formerly known as sparc64
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 Say no to build a 32-bit kernel - formerly known as sparc
11 select ARCH_HAS_KCOV !! 11
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 config SPARC
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 bool
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 14 default y
15 select ARCH_HAS_STRNCPY_FROM_USER if ! !! 15 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
16 select ARCH_HAS_STRNLEN_USER !! 16 select ARCH_MIGHT_HAVE_PC_SERIO
17 select ARCH_NEED_CMPXCHG_1_EMU !! 17 select OF
18 select ARCH_USE_MEMTEST !! 18 select OF_PROMTREE
19 select ARCH_USE_QUEUED_RWLOCKS !! 19 select HAVE_IDE
20 select ARCH_USE_QUEUED_SPINLOCKS !! 20 select HAVE_OPROFILE
21 select ARCH_WANT_IPC_PARSE_VERSION !! 21 select HAVE_ARCH_KGDB if !SMP || SPARC64
22 select BUILDTIME_TABLE_SORT <<
23 select CLONE_BACKWARDS <<
24 select COMMON_CLK <<
25 select DMA_NONCOHERENT_MMAP if MMU <<
26 select GENERIC_ATOMIC64 <<
27 select GENERIC_IRQ_SHOW <<
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP <<
32 select GENERIC_SCHED_CLOCK <<
33 select GENERIC_IOREMAP if MMU <<
34 select HAVE_ARCH_AUDITSYSCALL <<
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
36 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
37 select HAVE_ARCH_KCSAN <<
38 select HAVE_ARCH_SECCOMP_FILTER <<
39 select HAVE_ARCH_TRACEHOOK 22 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS <<
41 select HAVE_CONTEXT_TRACKING_USER <<
42 select HAVE_DEBUG_KMEMLEAK <<
43 select HAVE_DMA_CONTIGUOUS <<
44 select HAVE_EXIT_THREAD 23 select HAVE_EXIT_THREAD
>> 24 select SYSCTL_EXCEPTION_TRACE
>> 25 select RTC_CLASS
>> 26 select RTC_DRV_M48T59
>> 27 select RTC_SYSTOHC
>> 28 select HAVE_ARCH_JUMP_LABEL if SPARC64
>> 29 select GENERIC_IRQ_SHOW
>> 30 select ARCH_WANT_IPC_PARSE_VERSION
>> 31 select GENERIC_PCI_IOMAP
>> 32 select HAVE_NMI_WATCHDOG if SPARC64
>> 33 select HAVE_CBPF_JIT if SPARC32
>> 34 select HAVE_EBPF_JIT if SPARC64
>> 35 select HAVE_DEBUG_BUGVERBOSE
>> 36 select GENERIC_SMP_IDLE_THREAD
>> 37 select GENERIC_CLOCKEVENTS
>> 38 select GENERIC_STRNCPY_FROM_USER
>> 39 select GENERIC_STRNLEN_USER
>> 40 select MODULES_USE_ELF_RELA
>> 41 select ODD_RT_SIGACTION
>> 42 select OLD_SIGSUSPEND
>> 43 select ARCH_HAS_SG_CHAIN
>> 44 select CPU_NO_EFFICIENT_FFS
>> 45 select LOCKDEP_SMALL if LOCKDEP
>> 46 select NEED_DMA_MAP_STATE
>> 47 select NEED_SG_DMA_LENGTH
>> 48
>> 49 config SPARC32
>> 50 def_bool !64BIT
>> 51 select GENERIC_ATOMIC64
>> 52 select CLZ_TAB
>> 53 select HAVE_UID16
>> 54 select OLD_SIGACTION
>> 55
>> 56 config SPARC64
>> 57 def_bool 64BIT
45 select HAVE_FUNCTION_TRACER 58 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 59 select HAVE_FUNCTION_GRAPH_TRACER
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 60 select HAVE_KRETPROBES
48 select HAVE_IRQ_TIME_ACCOUNTING !! 61 select HAVE_KPROBES
49 select HAVE_PAGE_SIZE_4KB !! 62 select HAVE_RCU_TABLE_FREE if SMP
50 select HAVE_PCI !! 63 select HAVE_MEMBLOCK
51 select HAVE_PERF_EVENTS !! 64 select HAVE_MEMBLOCK_NODE_MAP
52 select HAVE_STACKPROTECTOR !! 65 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
>> 66 select HAVE_DYNAMIC_FTRACE
>> 67 select HAVE_FTRACE_MCOUNT_RECORD
53 select HAVE_SYSCALL_TRACEPOINTS 68 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 69 select HAVE_CONTEXT_TRACKING
55 select IRQ_DOMAIN !! 70 select HAVE_DEBUG_KMEMLEAK
56 select LOCK_MM_AND_FIND_VMA !! 71 select IOMMU_HELPER
57 select MODULES_USE_ELF_RELA !! 72 select SPARSE_IRQ
>> 73 select RTC_DRV_CMOS
>> 74 select RTC_DRV_BQ4802
>> 75 select RTC_DRV_SUN4V
>> 76 select RTC_DRV_STARFIRE
>> 77 select HAVE_PERF_EVENTS
58 select PERF_USE_VMALLOC 78 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 79 select IRQ_PREFLOW_FASTEOI
60 help !! 80 select ARCH_HAVE_NMI_SAFE_CMPXCHG
61 Xtensa processors are 32-bit RISC ma !! 81 select HAVE_C_RECORDMCOUNT
62 primarily for embedded systems. The !! 82 select NO_BOOTMEM
63 configurable and extensible. The Li !! 83 select HAVE_ARCH_AUDITSYSCALL
64 architecture supports all processor !! 84 select ARCH_SUPPORTS_ATOMIC_RMW
65 with reasonable minimum requirements !! 85 select HAVE_NMI
66 a home page at <http://www.linux-xte !! 86 select HAVE_REGS_AND_STACK_ACCESS_API
67 !! 87 select ARCH_USE_QUEUED_RWLOCKS
68 config GENERIC_HWEIGHT !! 88 select ARCH_USE_QUEUED_SPINLOCKS
69 def_bool y !! 89 select GENERIC_TIME_VSYSCALL
>> 90 select ARCH_CLOCKSOURCE_DATA
>> 91 select ARCH_HAS_PTE_SPECIAL
70 92
71 config ARCH_HAS_ILOG2_U32 !! 93 config ARCH_DEFCONFIG
72 def_bool n !! 94 string
>> 95 default "arch/sparc/configs/sparc32_defconfig" if SPARC32
>> 96 default "arch/sparc/configs/sparc64_defconfig" if SPARC64
73 97
74 config ARCH_HAS_ILOG2_U64 !! 98 config ARCH_PROC_KCORE_TEXT
75 def_bool n !! 99 def_bool y
76 100
77 config ARCH_MTD_XIP !! 101 config CPU_BIG_ENDIAN
78 def_bool y 102 def_bool y
79 103
80 config NO_IOPORT_MAP !! 104 config ARCH_ATU
81 def_bool n !! 105 bool
>> 106 default y if SPARC64
82 107
83 config HZ !! 108 config STACKTRACE_SUPPORT
84 int !! 109 bool
85 default 100 !! 110 default y if SPARC64
86 111
87 config LOCKDEP_SUPPORT 112 config LOCKDEP_SUPPORT
88 def_bool y !! 113 bool
>> 114 default y if SPARC64
89 115
90 config STACKTRACE_SUPPORT !! 116 config ARCH_HIBERNATION_POSSIBLE
91 def_bool y !! 117 def_bool y if SPARC64
92 118
93 config MMU !! 119 config AUDIT_ARCH
94 def_bool n !! 120 bool
95 select PFAULT !! 121 default y
96 122
97 config HAVE_XTENSA_GPIO32 !! 123 config HAVE_SETUP_PER_CPU_AREA
98 def_bool n !! 124 def_bool y if SPARC64
99 125
100 config KASAN_SHADOW_OFFSET !! 126 config NEED_PER_CPU_EMBED_FIRST_CHUNK
101 hex !! 127 def_bool y if SPARC64
102 default 0x6e400000 <<
103 128
104 config CPU_BIG_ENDIAN !! 129 config NEED_PER_CPU_PAGE_FIRST_CHUNK
105 def_bool $(success,test "$(shell,echo !! 130 def_bool y if SPARC64
106 131
107 config CPU_LITTLE_ENDIAN !! 132 config MMU
108 def_bool !CPU_BIG_ENDIAN !! 133 bool
>> 134 default y
109 135
110 config CC_HAVE_CALL0_ABI !! 136 config HIGHMEM
111 def_bool $(success,test "$(shell,echo !! 137 bool
>> 138 default y if SPARC32
112 139
113 menu "Processor type and features" !! 140 config ZONE_DMA
>> 141 bool
>> 142 default y if SPARC32
114 143
115 choice !! 144 config GENERIC_ISA_DMA
116 prompt "Xtensa Processor Configuration !! 145 bool
117 default XTENSA_VARIANT_FSF !! 146 default y if SPARC32
118 147
119 config XTENSA_VARIANT_FSF !! 148 config ARCH_SUPPORTS_DEBUG_PAGEALLOC
120 bool "fsf - default (not generic) conf !! 149 def_bool y if SPARC64
121 select MMU <<
122 150
123 config XTENSA_VARIANT_DC232B !! 151 config PGTABLE_LEVELS
124 bool "dc232b - Diamond 232L Standard C !! 152 default 4 if 64BIT
125 select MMU !! 153 default 3
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 154
130 config XTENSA_VARIANT_DC233C !! 155 config ARCH_SUPPORTS_UPROBES
131 bool "dc233c - Diamond 233L Standard C !! 156 def_bool y if SPARC64
132 select MMU <<
133 select HAVE_XTENSA_GPIO32 <<
134 help <<
135 This variant refers to Tensilica's D <<
136 157
137 config XTENSA_VARIANT_CUSTOM !! 158 source "init/Kconfig"
138 bool "Custom Xtensa processor configur <<
139 select HAVE_XTENSA_GPIO32 <<
140 help <<
141 Select this variant to use a custom <<
142 You will be prompted for a processor <<
143 endchoice <<
144 159
145 config XTENSA_VARIANT_CUSTOM_NAME !! 160 source "kernel/Kconfig.freezer"
146 string "Xtensa Processor Custom Core V <<
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 161
153 config XTENSA_VARIANT_NAME !! 162 menu "Processor type and features"
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n <<
173 help <<
174 Enable if core variant has Performan <<
175 External Registers Interface. <<
176 163
177 If unsure, say N. !! 164 config SMP
>> 165 bool "Symmetric multi-processing support"
>> 166 ---help---
>> 167 This enables support for systems with more than one CPU. If you have
>> 168 a system with only one CPU, say N. If you have a system with more
>> 169 than one CPU, say Y.
>> 170
>> 171 If you say N here, the kernel will run on uni- and multiprocessor
>> 172 machines, but will use only one CPU of a multiprocessor machine. If
>> 173 you say Y here, the kernel will run on many, but not all,
>> 174 uniprocessor machines. On a uniprocessor machine, the kernel
>> 175 will run faster if you say N here.
>> 176
>> 177 People using multiprocessor machines who say Y here should also say
>> 178 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
>> 179 Management" code will be disabled if you say Y here.
178 180
179 config XTENSA_FAKE_NMI !! 181 See also <file:Documentation/lockup-watchdogs.txt> and the SMP-HOWTO
180 bool "Treat PMM IRQ as NMI" !! 182 available at <http://www.tldp.org/docs.html#howto>.
181 depends on XTENSA_VARIANT_HAVE_PERF_EV <<
182 default n <<
183 help <<
184 If PMM IRQ is the only IRQ at EXCM l <<
185 treat it as NMI, which improves accu <<
186 <<
187 If there are other interrupts at or <<
188 but not above the EXCM level, PMM IR <<
189 but only if these IRQs are not used. <<
190 saying that this is not safe, and a <<
191 actually fire. <<
192 183
193 If unsure, say N. !! 184 If you don't know what to do here, say N.
194 185
195 config PFAULT !! 186 config NR_CPUS
196 bool "Handle protection faults" if EXP !! 187 int "Maximum number of CPUs"
197 default y !! 188 depends on SMP
198 help !! 189 range 2 32 if SPARC32
199 Handle protection faults. MMU config !! 190 range 2 4096 if SPARC64
200 noMMU configurations may disable it !! 191 default 32 if SPARC32
201 generates protection faults or fault !! 192 default 4096 if SPARC64
202 193
203 If unsure, say Y. !! 194 source kernel/Kconfig.hz
204 195
205 config XTENSA_UNALIGNED_USER !! 196 config RWSEM_GENERIC_SPINLOCK
206 bool "Unaligned memory access in user !! 197 bool
207 help !! 198 default y if SPARC32
208 The Xtensa architecture currently do <<
209 memory accesses in hardware but thro <<
210 Per default, unaligned memory access <<
211 199
212 Say Y here to enable unaligned memor !! 200 config RWSEM_XCHGADD_ALGORITHM
>> 201 bool
>> 202 default y if SPARC64
213 203
214 config XTENSA_LOAD_STORE !! 204 config GENERIC_HWEIGHT
215 bool "Load/store exception handler for !! 205 bool
216 help !! 206 default y
217 The Xtensa architecture only allows !! 207
218 instruction bus with l32r and l32i i !! 208 config GENERIC_CALIBRATE_DELAY
219 instructions raise an exception with !! 209 bool
220 This makes it hard to use some confi !! 210 default y
221 literals in FLASH memory attached to <<
222 211
223 Say Y here to enable exception handl !! 212 config ARCH_MAY_HAVE_PC_FDC
224 byte and 2-byte access to memory att !! 213 bool
>> 214 default y
225 215
226 config HAVE_SMP !! 216 config EMULATED_CMPXCHG
227 bool "System Supports SMP (MX)" !! 217 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 218 default y if SPARC32
229 select XTENSA_MX <<
230 help 219 help
231 This option is used to indicate that !! 220 Sparc32 does not have a CAS instruction like sparc64. cmpxchg()
232 supports Multiprocessing. Multiproce !! 221 is emulated, and therefore it is not completely atomic.
233 the CPU core definition and currentl <<
234 222
235 Multiprocessor support is implemente !! 223 # Makefile helpers
236 interrupt controllers. !! 224 config SPARC32_SMP
>> 225 bool
>> 226 default y
>> 227 depends on SPARC32 && SMP
237 228
238 The MX interrupt distributer adds In !! 229 config SPARC64_SMP
239 and causes the IRQ numbers to be inc !! 230 bool
240 like the open cores ethernet driver !! 231 default y
>> 232 depends on SPARC64 && SMP
241 233
242 You still have to select "Enable SMP !! 234 config EARLYFB
>> 235 bool "Support for early boot text console"
>> 236 default y
>> 237 depends on SPARC64
>> 238 help
>> 239 Say Y here to enable a faster early framebuffer boot console.
243 240
244 config SMP !! 241 config SECCOMP
245 bool "Enable Symmetric multi-processin !! 242 bool "Enable seccomp to safely compute untrusted bytecode"
246 depends on HAVE_SMP !! 243 depends on SPARC64 && PROC_FS
247 select GENERIC_SMP_IDLE_THREAD !! 244 default y
248 help 245 help
249 Enabled SMP Software; allows more th !! 246 This kernel feature is useful for number crunching applications
250 to be activated during startup. !! 247 that may need to compute untrusted bytecode during their
>> 248 execution. By using pipes or other transports made available to
>> 249 the process as file descriptors supporting the read/write
>> 250 syscalls, it's possible to isolate those applications in
>> 251 their own address space using seccomp. Once seccomp is
>> 252 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 253 and the task is only allowed to execute a few safe syscalls
>> 254 defined by each seccomp mode.
251 255
252 config NR_CPUS !! 256 If unsure, say Y. Only embedded should say N here.
253 depends on SMP <<
254 int "Maximum number of CPUs (2-32)" <<
255 range 2 32 <<
256 default "4" <<
257 257
258 config HOTPLUG_CPU 258 config HOTPLUG_CPU
259 bool "Enable CPU hotplug support" !! 259 bool "Support for hot-pluggable CPUs"
260 depends on SMP !! 260 depends on SPARC64 && SMP
261 help 261 help
262 Say Y here to allow turning CPUs off !! 262 Say Y here to experiment with turning CPUs off and on. CPUs
263 controlled through /sys/devices/syst !! 263 can be controlled through /sys/devices/system/cpu/cpu#.
264 <<
265 Say N if you want to disable CPU hot 264 Say N if you want to disable CPU hotplug.
266 265
267 config SECONDARY_RESET_VECTOR !! 266 if SPARC64
268 bool "Secondary cores use alternative !! 267 source "drivers/cpufreq/Kconfig"
>> 268 endif
>> 269
>> 270 config US3_MC
>> 271 tristate "UltraSPARC-III Memory Controller driver"
>> 272 depends on SPARC64
269 default y 273 default y
270 depends on HAVE_SMP <<
271 help 274 help
272 Secondary cores may be configured to !! 275 This adds a driver for the UltraSPARC-III memory controller.
273 or all cores may use primary reset v !! 276 Loading this driver allows exact mnemonic strings to be
274 Say Y here to supply handler for the !! 277 printed in the event of a memory error, so that the faulty DIMM
275 !! 278 on the motherboard can be matched to the error.
276 config FAST_SYSCALL_XTENSA <<
277 bool "Enable fast atomic syscalls" <<
278 default n <<
279 help <<
280 fast_syscall_xtensa is a syscall tha <<
281 on UP kernel when processor has no s <<
282 <<
283 This syscall is deprecated. It may h <<
284 invalid arguments. It is provided on <<
285 Only enable it if your userspace sof <<
286 279
287 If unsure, say N. !! 280 If in doubt, say Y, as this information can be very useful.
288 281
289 config FAST_SYSCALL_SPILL_REGISTERS !! 282 # Global things across all Sun machines.
290 bool "Enable spill registers syscall" !! 283 config GENERIC_LOCKBREAK
291 default n !! 284 bool
292 help !! 285 default y
293 fast_syscall_spill_registers is a sy !! 286 depends on SPARC64 && SMP && PREEMPT
294 register windows of a calling usersp <<
295 <<
296 This syscall is deprecated. It may h <<
297 invalid arguments. It is provided on <<
298 Only enable it if your userspace sof <<
299 287
300 If unsure, say N. !! 288 config NUMA
>> 289 bool "NUMA support"
>> 290 depends on SPARC64 && SMP
>> 291
>> 292 config NODES_SHIFT
>> 293 int "Maximum NUMA Nodes (as a power of 2)"
>> 294 range 4 5 if SPARC64
>> 295 default "5"
>> 296 depends on NEED_MULTIPLE_NODES
>> 297 help
>> 298 Specify the maximum number of NUMA Nodes available on the target
>> 299 system. Increases memory reserved to accommodate various tables.
>> 300
>> 301 # Some NUMA nodes have memory ranges that span
>> 302 # other nodes. Even though a pfn is valid and
>> 303 # between a node's start and end pfns, it may not
>> 304 # reside on that node. See memmap_init_zone()
>> 305 # for details.
>> 306 config NODES_SPAN_OTHER_NODES
>> 307 def_bool y
>> 308 depends on NEED_MULTIPLE_NODES
301 309
302 choice !! 310 config ARCH_SELECT_MEMORY_MODEL
303 prompt "Kernel ABI" !! 311 def_bool y if SPARC64
304 default KERNEL_ABI_DEFAULT <<
305 help <<
306 Select ABI for the kernel code. This <<
307 supported userspace ABI and any comb <<
308 kernel/userspace ABI is possible and <<
309 312
310 In case both kernel and userspace su !! 313 config ARCH_SPARSEMEM_ENABLE
311 all register windows support code wi !! 314 def_bool y if SPARC64
312 build. !! 315 select SPARSEMEM_VMEMMAP_ENABLE
313 316
314 If unsure, choose the default ABI. !! 317 config ARCH_SPARSEMEM_DEFAULT
>> 318 def_bool y if SPARC64
315 319
316 config KERNEL_ABI_DEFAULT !! 320 config FORCE_MAX_ZONEORDER
317 bool "Default ABI" !! 321 int "Maximum zone order"
>> 322 default "13"
318 help 323 help
319 Select this option to compile kernel !! 324 The kernel memory allocator divides physically contiguous memory
320 selected for the toolchain. !! 325 blocks into "zones", where each zone is a power of two number of
321 Normally cores with windowed registe !! 326 pages. This option selects the largest power of two that the kernel
322 cores without it use call0 ABI. !! 327 keeps in the memory allocator. If you need to allocate very large
>> 328 blocks of physically contiguous memory, then you may need to
>> 329 increase this value.
323 330
324 config KERNEL_ABI_CALL0 !! 331 This config option is actually maximum order plus one. For example,
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 332 a value of 13 means that the largest free memory block is 2^12 pages.
326 help <<
327 Select this option to compile kernel <<
328 toolchain that defaults to windowed <<
329 When this option is not selected the <<
330 be used for the kernel code. <<
331 333
332 endchoice !! 334 source "mm/Kconfig"
333 335
334 config USER_ABI_CALL0 !! 336 if SPARC64
335 bool !! 337 source "kernel/power/Kconfig"
>> 338 endif
336 339
337 choice !! 340 config SCHED_SMT
338 prompt "Userspace ABI" !! 341 bool "SMT (Hyperthreading) scheduler support"
339 default USER_ABI_DEFAULT !! 342 depends on SPARC64 && SMP
>> 343 default y
>> 344 help
>> 345 SMT scheduler support improves the CPU scheduler's decision making
>> 346 when dealing with SPARC cpus at a cost of slightly increased overhead
>> 347 in some places. If unsure say N here.
>> 348
>> 349 config SCHED_MC
>> 350 bool "Multi-core scheduler support"
>> 351 depends on SPARC64 && SMP
>> 352 default y
340 help 353 help
341 Select supported userspace ABI. !! 354 Multi-core scheduler support improves the CPU scheduler's decision
>> 355 making when dealing with multi-core CPU chips at a cost of slightly
>> 356 increased overhead in some places. If unsure say N here.
342 357
343 If unsure, choose the default ABI. !! 358 source "kernel/Kconfig.preempt"
344 359
345 config USER_ABI_DEFAULT !! 360 config CMDLINE_BOOL
346 bool "Default ABI only" !! 361 bool "Default bootloader kernel arguments"
347 help !! 362 depends on SPARC64
348 Assume default userspace ABI. For XE <<
349 call0 ABI binaries may be run on suc <<
350 will not work correctly for them. <<
351 363
352 config USER_ABI_CALL0_ONLY !! 364 config CMDLINE
353 bool "Call0 ABI only" !! 365 string "Initial kernel command string"
354 select USER_ABI_CALL0 !! 366 depends on CMDLINE_BOOL
>> 367 default "console=ttyS0,9600 root=/dev/sda1"
355 help 368 help
356 Select this option to support only c !! 369 Say Y here if you want to be able to pass default arguments to
357 Windowed ABI binaries will crash wit !! 370 the kernel. This will be overridden by the bootloader, if you
358 an illegal instruction exception on !! 371 use one (such as SILO). This is most useful if you want to boot
>> 372 a kernel from TFTP, and want default options to be available
>> 373 with having them passed on the command line.
359 374
360 Choose this option if you're plannin !! 375 NOTE: This option WILL override the PROM bootargs setting!
361 built with call0 ABI. <<
362 376
363 config USER_ABI_CALL0_PROBE !! 377 config SUN_PM
364 bool "Support both windowed and call0 !! 378 bool
365 select USER_ABI_CALL0 !! 379 default y if SPARC32
366 help 380 help
367 Select this option to support both w !! 381 Enable power management and CPU standby features on supported
368 ABIs. When enabled all processes are !! 382 SPARC platforms.
369 and a fast user exception handler fo <<
370 used to turn on PS.WOE bit on the fi <<
371 the userspace. <<
372 <<
373 This option should be enabled for th <<
374 both call0 and windowed ABIs in user <<
375 383
376 Note that Xtensa ISA does not guaran !! 384 config SPARC_LED
377 raise an illegal instruction excepti !! 385 tristate "Sun4m LED driver"
378 PS.WOE is disabled, check whether th !! 386 depends on SPARC32
>> 387 help
>> 388 This driver toggles the front-panel LED on sun4m systems
>> 389 in a user-specifiable manner. Its state can be probed
>> 390 by reading /proc/led and its blinking mode can be changed
>> 391 via writes to /proc/led
379 392
380 endchoice !! 393 config SERIAL_CONSOLE
>> 394 bool
>> 395 depends on SPARC32
>> 396 default y
>> 397 ---help---
>> 398 If you say Y here, it will be possible to use a serial port as the
>> 399 system console (the system console is the device which receives all
>> 400 kernel messages and warnings and which allows logins in single user
>> 401 mode). This could be useful if some terminal or printer is connected
>> 402 to that serial port.
>> 403
>> 404 Even if you say Y here, the currently visible virtual console
>> 405 (/dev/tty0) will still be used as the system console by default, but
>> 406 you can alter that using a kernel command line option such as
>> 407 "console=ttyS1". (Try "man bootparam" or see the documentation of
>> 408 your boot loader (silo) about how to pass options to the kernel at
>> 409 boot time.)
>> 410
>> 411 If you don't have a graphics card installed and you say Y here, the
>> 412 kernel will automatically use the first serial line, /dev/ttyS0, as
>> 413 system console.
381 414
382 endmenu !! 415 If unsure, say N.
383 416
384 config XTENSA_CALIBRATE_CCOUNT !! 417 config SPARC_LEON
385 def_bool n !! 418 bool "Sparc Leon processor family"
386 help !! 419 depends on SPARC32
387 On some platforms (XT2000, for examp !! 420 select USB_EHCI_BIG_ENDIAN_MMIO
388 vary. The frequency can be determin !! 421 select USB_EHCI_BIG_ENDIAN_DESC
389 against a well known, fixed frequenc !! 422 select USB_UHCI_BIG_ENDIAN_MMIO
>> 423 select USB_UHCI_BIG_ENDIAN_DESC
>> 424 ---help---
>> 425 If you say Y here if you are running on a SPARC-LEON processor.
>> 426 The LEON processor is a synthesizable VHDL model of the
>> 427 SPARC-v8 standard. LEON is part of the GRLIB collection of
>> 428 IP cores that are distributed under GPL. GRLIB can be downloaded
>> 429 from www.gaisler.com. You can download a sparc-linux cross-compilation
>> 430 toolchain at www.gaisler.com.
>> 431
>> 432 if SPARC_LEON
>> 433 menu "U-Boot options"
>> 434
>> 435 config UBOOT_LOAD_ADDR
>> 436 hex "uImage Load Address"
>> 437 default 0x40004000
>> 438 ---help---
>> 439 U-Boot kernel load address, the address in physical address space
>> 440 where u-boot will place the Linux kernel before booting it.
>> 441 This address is normally the base address of main memory + 0x4000.
>> 442
>> 443 config UBOOT_FLASH_ADDR
>> 444 hex "uImage.o Load Address"
>> 445 default 0x00080000
>> 446 ---help---
>> 447 Optional setting only affecting the uImage.o ELF-image used to
>> 448 download the uImage file to the target using a ELF-loader other than
>> 449 U-Boot. It may for example be used to download an uImage to FLASH with
>> 450 the GRMON utility before even starting u-boot.
>> 451
>> 452 config UBOOT_ENTRY_ADDR
>> 453 hex "uImage Entry Address"
>> 454 default 0xf0004000
>> 455 ---help---
>> 456 Do not change this unless you know what you're doing. This is
>> 457 hardcoded by the SPARC32 and LEON port.
390 458
391 config SERIAL_CONSOLE !! 459 This is the virtual address u-boot jumps to when booting the Linux
392 def_bool n !! 460 Kernel.
393 461
394 config PLATFORM_HAVE_XIP !! 462 endmenu
395 def_bool n !! 463 endif
396 464
397 menu "Platform options" !! 465 endmenu
398 466
399 choice !! 467 menu "Bus options (PCI etc.)"
400 prompt "Xtensa System Type" !! 468 config SBUS
401 default XTENSA_PLATFORM_ISS !! 469 bool
>> 470 default y
402 471
403 config XTENSA_PLATFORM_ISS !! 472 config SBUSCHAR
404 bool "ISS" !! 473 bool
405 select XTENSA_CALIBRATE_CCOUNT !! 474 default y
406 select SERIAL_CONSOLE <<
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 475
410 config XTENSA_PLATFORM_XT2000 !! 476 config SUN_LDOMS
411 bool "XT2000" !! 477 bool "Sun Logical Domains support"
>> 478 depends on SPARC64
412 help 479 help
413 XT2000 is the name of Tensilica's fe !! 480 Say Y here is you want to support virtual devices via
414 This hardware is capable of running !! 481 Logical Domains.
415 482
416 config XTENSA_PLATFORM_XTFPGA !! 483 config PCI
417 bool "XTFPGA" !! 484 bool "Support for PCI and PS/2 keyboard/mouse"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 485 help
424 XTFPGA is the name of Tensilica boar !! 486 Find out whether your system includes a PCI bus. PCI is the name of
425 This hardware is capable of running !! 487 a bus system, i.e. the way the CPU talks to the other stuff inside
426 !! 488 your box. If you say Y here, the kernel will include drivers and
427 endchoice !! 489 infrastructure code to support PCI bus devices.
428 490
429 config PLATFORM_NR_IRQS !! 491 CONFIG_PCI is needed for all JavaStation's (including MrCoffee),
430 int !! 492 CP-1200, JavaEngine-1, Corona, Red October, and Serengeti SGSC.
431 default 3 if XTENSA_PLATFORM_XT2000 !! 493 All of these platforms are extremely obscure, so say N if unsure.
432 default 0 <<
433 494
434 config XTENSA_CPU_CLOCK !! 495 config PCI_DOMAINS
435 int "CPU clock rate [MHz]" !! 496 def_bool PCI if SPARC64
436 depends on !XTENSA_CALIBRATE_CCOUNT <<
437 default 16 <<
438 497
439 config GENERIC_CALIBRATE_DELAY !! 498 config PCI_SYSCALL
440 bool "Auto calibration of the BogoMIPS !! 499 def_bool PCI
441 help <<
442 The BogoMIPS value can easily be der <<
443 500
444 config CMDLINE_BOOL !! 501 config PCIC_PCI
445 bool "Default bootloader kernel argume !! 502 bool
>> 503 depends on PCI && SPARC32 && !SPARC_LEON
>> 504 default y
446 505
447 config CMDLINE !! 506 config LEON_PCI
448 string "Initial kernel command string" !! 507 bool
449 depends on CMDLINE_BOOL !! 508 depends on PCI && SPARC_LEON
450 default "console=ttyS0,38400 root=/dev !! 509 default y
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 510
458 config USE_OF !! 511 config SPARC_GRPCI1
459 bool "Flattened Device Tree support" !! 512 bool "GRPCI Host Bridge Support"
460 select OF !! 513 depends on LEON_PCI
461 select OF_EARLY_FLATTREE !! 514 default y
462 help 515 help
463 Include support for flattened device !! 516 Say Y here to include the GRPCI Host Bridge Driver. The GRPCI
464 !! 517 PCI host controller is typically found in GRLIB SPARC32/LEON
465 config BUILTIN_DTB_SOURCE !! 518 systems. The driver has one property (all_pci_errors) controlled
466 string "DTB to build into the kernel i !! 519 from the bootloader that makes the GRPCI to generate interrupts
467 depends on OF !! 520 on detected PCI Parity and System errors.
468 !! 521
469 config PARSE_BOOTPARAM !! 522 config SPARC_GRPCI2
470 bool "Parse bootparam block" !! 523 bool "GRPCI2 Host Bridge Support"
>> 524 depends on LEON_PCI
471 default y 525 default y
472 help 526 help
473 Parse parameters passed to the kerne !! 527 Say Y here to include the GRPCI2 Host Bridge Driver.
474 be disabled if the kernel is known t <<
475 528
476 If unsure, say Y. !! 529 source "drivers/pci/Kconfig"
477 530
478 choice !! 531 source "drivers/pcmcia/Kconfig"
479 prompt "Semihosting interface" <<
480 default XTENSA_SIMCALL_ISS <<
481 depends on XTENSA_PLATFORM_ISS <<
482 help <<
483 Choose semihosting interface that wi <<
484 block device and networking. <<
485 532
486 config XTENSA_SIMCALL_ISS !! 533 config SUN_OPENPROMFS
487 bool "simcall" !! 534 tristate "Openprom tree appears in /proc/openprom"
488 help 535 help
489 Use simcall instruction. simcall is !! 536 If you say Y, the OpenPROM device tree will be available as a
490 it does nothing on hardware. !! 537 virtual file system, which you can mount to /proc/openprom by "mount
>> 538 -t openpromfs none /proc/openprom".
491 539
492 config XTENSA_SIMCALL_GDBIO !! 540 To compile the /proc/openprom support as a module, choose M here: the
493 bool "GDBIO" !! 541 module will be called openpromfs.
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 542
498 endchoice !! 543 Only choose N if you know in advance that you will not need to modify
499 !! 544 OpenPROM settings on the running system.
500 config BLK_DEV_SIMDISK <<
501 tristate "Host file-based simulated bl <<
502 default n <<
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 545
509 config BLK_DEV_SIMDISK_COUNT !! 546 # Makefile helpers
510 int "Number of host file-based simulat !! 547 config SPARC64_PCI
511 range 1 10 !! 548 bool
512 depends on BLK_DEV_SIMDISK !! 549 default y
513 default 2 !! 550 depends on SPARC64 && PCI
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 551
520 config SIMDISK0_FILENAME !! 552 config SPARC64_PCI_MSI
521 string "Host filename for the first si !! 553 bool
522 depends on BLK_DEV_SIMDISK = y !! 554 default y
523 default "" !! 555 depends on SPARC64_PCI && PCI_MSI
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 556
528 config SIMDISK1_FILENAME !! 557 endmenu
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 558
536 config XTFPGA_LCD !! 559 menu "Executable file formats"
537 bool "Enable XTFPGA LCD driver" <<
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help <<
541 There's a 2x16 LCD on most of XTFPGA <<
542 progress messages there during bootu <<
543 during board bringup. <<
544 560
545 If unsure, say N. !! 561 source "fs/Kconfig.binfmt"
546 562
547 config XTFPGA_LCD_BASE_ADDR !! 563 config COMPAT
548 hex "XTFPGA LCD base address" !! 564 bool
549 depends on XTFPGA_LCD !! 565 depends on SPARC64
550 default "0x0d0c0000" !! 566 default y
551 help !! 567 select COMPAT_BINFMT_ELF
552 Base address of the LCD controller i !! 568 select HAVE_UID16
553 Different boards from XTFPGA family !! 569 select ARCH_WANT_OLD_COMPAT_IPC
554 addresses. Please consult prototypin !! 570 select COMPAT_OLD_SIGACTION
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 571
617 If unsure, say N. !! 572 config SYSVIPC_COMPAT
>> 573 bool
>> 574 depends on COMPAT && SYSVIPC
>> 575 default y
618 576
619 config MEMMAP_CACHEATTR !! 577 endmenu
620 hex "Cache attributes for the memory a <<
621 depends on !MMU <<
622 default 0x22222222 <<
623 help <<
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 <<
683 If unsure, leave the default value h <<
684 <<
685 choice <<
686 prompt "Relocatable vectors location" <<
687 default XTENSA_VECTORS_IN_TEXT <<
688 help <<
689 Choose whether relocatable vectors a <<
690 or placed separately at runtime. Thi <<
691 configurations without VECBASE regis <<
692 placed at their hardware-defined loc <<
693 <<
694 config XTENSA_VECTORS_IN_TEXT <<
695 bool "Merge relocatable vectors into k <<
696 depends on !MTD_XIP <<
697 help <<
698 This option puts relocatable vectors <<
699 with proper alignment. <<
700 This is a safe choice for most confi <<
701 <<
702 config XTENSA_VECTORS_SEPARATE <<
703 bool "Put relocatable vectors at fixed <<
704 help <<
705 This option puts relocatable vectors <<
706 Vectors are merged with the .init da <<
707 are copied into their designated loc <<
708 Use it to put vectors into IRAM or o <<
709 XIP-aware MTD support. <<
710 <<
711 endchoice <<
712 <<
713 config VECTORS_ADDR <<
714 hex "Kernel vectors virtual address" <<
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 <<
729 config PLATFORM_WANT_DEFAULT_MEM <<
730 def_bool n <<
731 <<
732 config DEFAULT_MEM_START <<
733 hex <<
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M <<
735 default 0x60000000 if PLATFORM_WANT_DE <<
736 default 0x00000000 <<
737 help <<
738 This is the base address used for bo <<
739 in noMMU configurations. <<
740 <<
741 If unsure, leave the default value h <<
742 <<
743 choice <<
744 prompt "KSEG layout" <<
745 depends on MMU <<
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 578
772 endchoice !! 579 source "net/Kconfig"
773 580
774 config HIGHMEM !! 581 source "drivers/Kconfig"
775 bool "High Memory Support" <<
776 depends on MMU <<
777 select KMAP_LOCAL <<
778 help <<
779 Linux can use the full amount of RAM <<
780 default. However, the default MMUv2 <<
781 lowermost 128 MB of memory linearly <<
782 at 0xd0000000 (cached) and 0xd800000 <<
783 When there are more than 128 MB memo <<
784 all of it can be "permanently mapped <<
785 The physical memory that's not perma <<
786 "high memory". <<
787 <<
788 If you are compiling a kernel which <<
789 machine with more than 128 MB total <<
790 N here. <<
791 <<
792 If unsure, say Y. <<
793 <<
794 config ARCH_FORCE_MAX_ORDER <<
795 int "Order of maximal physically conti <<
796 default "10" <<
797 help <<
798 The kernel page allocator limits the <<
799 contiguous allocations. The limit is <<
800 defines the maximal power of two of <<
801 allocated as a single contiguous blo <<
802 overriding the default setting when <<
803 large blocks of physically contiguou <<
804 582
805 Don't change if unsure. !! 583 source "drivers/sbus/char/Kconfig"
806 584
807 endmenu !! 585 source "fs/Kconfig"
808 586
809 menu "Power management options" !! 587 source "arch/sparc/Kconfig.debug"
810 588
811 config ARCH_HIBERNATION_POSSIBLE !! 589 source "security/Kconfig"
812 def_bool y <<
813 590
814 source "kernel/power/Kconfig" !! 591 source "crypto/Kconfig"
815 592
816 endmenu !! 593 source "lib/Kconfig"
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