1 # SPDX-License-Identifier: GPL-2.0 !! 1 config 64BIT
2 config XTENSA !! 2 bool "64-bit kernel" if "$(ARCH)" = "sparc"
3 def_bool y !! 3 default "$(ARCH)" = "sparc64"
4 select ARCH_32BIT_OFF_T !! 4 help
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 SPARC is a family of RISC microprocessors designed and marketed by
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 Sun Microsystems, incorporated. They are very widely found in Sun
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 workstations and clones.
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9 Say yes to build a 64-bit kernel - formerly known as sparc64
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 Say no to build a 32-bit kernel - formerly known as sparc
11 select ARCH_HAS_KCOV !! 11
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12 config SPARC
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 bool
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 14 default y
15 select ARCH_HAS_STRNCPY_FROM_USER if ! !! 15 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
16 select ARCH_HAS_STRNLEN_USER !! 16 select ARCH_MIGHT_HAVE_PC_SERIO
17 select ARCH_NEED_CMPXCHG_1_EMU !! 17 select OF
18 select ARCH_USE_MEMTEST !! 18 select OF_PROMTREE
19 select ARCH_USE_QUEUED_RWLOCKS !! 19 select HAVE_IDE
20 select ARCH_USE_QUEUED_SPINLOCKS !! 20 select HAVE_OPROFILE
21 select ARCH_WANT_IPC_PARSE_VERSION !! 21 select HAVE_ARCH_KGDB if !SMP || SPARC64
22 select BUILDTIME_TABLE_SORT <<
23 select CLONE_BACKWARDS <<
24 select COMMON_CLK <<
25 select DMA_NONCOHERENT_MMAP if MMU <<
26 select GENERIC_ATOMIC64 <<
27 select GENERIC_IRQ_SHOW <<
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP <<
32 select GENERIC_SCHED_CLOCK <<
33 select GENERIC_IOREMAP if MMU <<
34 select HAVE_ARCH_AUDITSYSCALL <<
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
36 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
37 select HAVE_ARCH_KCSAN <<
38 select HAVE_ARCH_SECCOMP_FILTER <<
39 select HAVE_ARCH_TRACEHOOK 22 select HAVE_ARCH_TRACEHOOK
40 select HAVE_ASM_MODVERSIONS <<
41 select HAVE_CONTEXT_TRACKING_USER <<
42 select HAVE_DEBUG_KMEMLEAK <<
43 select HAVE_DMA_CONTIGUOUS <<
44 select HAVE_EXIT_THREAD 23 select HAVE_EXIT_THREAD
>> 24 select SYSCTL_EXCEPTION_TRACE
>> 25 select RTC_CLASS
>> 26 select RTC_DRV_M48T59
>> 27 select RTC_SYSTOHC
>> 28 select HAVE_ARCH_JUMP_LABEL if SPARC64
>> 29 select GENERIC_IRQ_SHOW
>> 30 select ARCH_WANT_IPC_PARSE_VERSION
>> 31 select GENERIC_PCI_IOMAP
>> 32 select HAVE_NMI_WATCHDOG if SPARC64
>> 33 select HAVE_CBPF_JIT if SPARC32
>> 34 select HAVE_EBPF_JIT if SPARC64
>> 35 select HAVE_DEBUG_BUGVERBOSE
>> 36 select GENERIC_SMP_IDLE_THREAD
>> 37 select GENERIC_CLOCKEVENTS
>> 38 select GENERIC_STRNCPY_FROM_USER
>> 39 select GENERIC_STRNLEN_USER
>> 40 select MODULES_USE_ELF_RELA
>> 41 select ODD_RT_SIGACTION
>> 42 select OLD_SIGSUSPEND
>> 43 select ARCH_HAS_SG_CHAIN
>> 44 select CPU_NO_EFFICIENT_FFS
>> 45 select LOCKDEP_SMALL if LOCKDEP
>> 46 select NEED_DMA_MAP_STATE
>> 47 select NEED_SG_DMA_LENGTH
>> 48 select HAVE_MEMBLOCK
>> 49 select NO_BOOTMEM
>> 50
>> 51 config SPARC32
>> 52 def_bool !64BIT
>> 53 select ARCH_HAS_CPU_FINALIZE_INIT if !SMP
>> 54 select ARCH_HAS_SYNC_DMA_FOR_CPU
>> 55 select DMA_NONCOHERENT_OPS
>> 56 select GENERIC_ATOMIC64
>> 57 select CLZ_TAB
>> 58 select HAVE_UID16
>> 59 select OLD_SIGACTION
>> 60
>> 61 config SPARC64
>> 62 def_bool 64BIT
45 select HAVE_FUNCTION_TRACER 63 select HAVE_FUNCTION_TRACER
46 select HAVE_GCC_PLUGINS if GCC_VERSION !! 64 select HAVE_FUNCTION_GRAPH_TRACER
47 select HAVE_HW_BREAKPOINT if PERF_EVEN !! 65 select HAVE_KRETPROBES
48 select HAVE_IRQ_TIME_ACCOUNTING !! 66 select HAVE_KPROBES
49 select HAVE_PAGE_SIZE_4KB !! 67 select HAVE_RCU_TABLE_FREE if SMP
50 select HAVE_PCI !! 68 select HAVE_MEMBLOCK_NODE_MAP
51 select HAVE_PERF_EVENTS !! 69 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
52 select HAVE_STACKPROTECTOR !! 70 select HAVE_DYNAMIC_FTRACE
>> 71 select HAVE_FTRACE_MCOUNT_RECORD
53 select HAVE_SYSCALL_TRACEPOINTS 72 select HAVE_SYSCALL_TRACEPOINTS
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 73 select HAVE_CONTEXT_TRACKING
55 select IRQ_DOMAIN !! 74 select HAVE_DEBUG_KMEMLEAK
56 select LOCK_MM_AND_FIND_VMA !! 75 select IOMMU_HELPER
57 select MODULES_USE_ELF_RELA !! 76 select SPARSE_IRQ
>> 77 select RTC_DRV_CMOS
>> 78 select RTC_DRV_BQ4802
>> 79 select RTC_DRV_SUN4V
>> 80 select RTC_DRV_STARFIRE
>> 81 select HAVE_PERF_EVENTS
58 select PERF_USE_VMALLOC 82 select PERF_USE_VMALLOC
59 select TRACE_IRQFLAGS_SUPPORT !! 83 select IRQ_PREFLOW_FASTEOI
60 help !! 84 select ARCH_HAVE_NMI_SAFE_CMPXCHG
61 Xtensa processors are 32-bit RISC ma !! 85 select HAVE_C_RECORDMCOUNT
62 primarily for embedded systems. The !! 86 select HAVE_ARCH_AUDITSYSCALL
63 configurable and extensible. The Li !! 87 select ARCH_SUPPORTS_ATOMIC_RMW
64 architecture supports all processor !! 88 select HAVE_NMI
65 with reasonable minimum requirements !! 89 select HAVE_REGS_AND_STACK_ACCESS_API
66 a home page at <http://www.linux-xte !! 90 select ARCH_USE_QUEUED_RWLOCKS
67 !! 91 select ARCH_USE_QUEUED_SPINLOCKS
68 config GENERIC_HWEIGHT !! 92 select GENERIC_TIME_VSYSCALL
69 def_bool y !! 93 select ARCH_CLOCKSOURCE_DATA
>> 94 select ARCH_HAS_PTE_SPECIAL
70 95
71 config ARCH_HAS_ILOG2_U32 !! 96 config ARCH_DEFCONFIG
72 def_bool n !! 97 string
>> 98 default "arch/sparc/configs/sparc32_defconfig" if SPARC32
>> 99 default "arch/sparc/configs/sparc64_defconfig" if SPARC64
73 100
74 config ARCH_HAS_ILOG2_U64 !! 101 config ARCH_PROC_KCORE_TEXT
75 def_bool n !! 102 def_bool y
76 103
77 config ARCH_MTD_XIP !! 104 config CPU_BIG_ENDIAN
78 def_bool y 105 def_bool y
79 106
80 config NO_IOPORT_MAP !! 107 config ARCH_ATU
81 def_bool n !! 108 bool
>> 109 default y if SPARC64
82 110
83 config HZ !! 111 config STACKTRACE_SUPPORT
84 int !! 112 bool
85 default 100 !! 113 default y if SPARC64
86 114
87 config LOCKDEP_SUPPORT 115 config LOCKDEP_SUPPORT
88 def_bool y !! 116 bool
89 !! 117 default y if SPARC64
90 config STACKTRACE_SUPPORT <<
91 def_bool y <<
92 118
93 config MMU !! 119 config ARCH_HIBERNATION_POSSIBLE
94 def_bool n !! 120 def_bool y if SPARC64
95 select PFAULT <<
96 121
97 config HAVE_XTENSA_GPIO32 !! 122 config AUDIT_ARCH
98 def_bool n !! 123 bool
>> 124 default y
99 125
100 config KASAN_SHADOW_OFFSET !! 126 config HAVE_SETUP_PER_CPU_AREA
101 hex !! 127 def_bool y if SPARC64
102 default 0x6e400000 <<
103 128
104 config CPU_BIG_ENDIAN !! 129 config NEED_PER_CPU_EMBED_FIRST_CHUNK
105 def_bool $(success,test "$(shell,echo !! 130 def_bool y if SPARC64
106 131
107 config CPU_LITTLE_ENDIAN !! 132 config NEED_PER_CPU_PAGE_FIRST_CHUNK
108 def_bool !CPU_BIG_ENDIAN !! 133 def_bool y if SPARC64
109 134
110 config CC_HAVE_CALL0_ABI !! 135 config MMU
111 def_bool $(success,test "$(shell,echo !! 136 bool
>> 137 default y
112 138
113 menu "Processor type and features" !! 139 config HIGHMEM
>> 140 bool
>> 141 default y if SPARC32
114 142
115 choice !! 143 config ZONE_DMA
116 prompt "Xtensa Processor Configuration !! 144 bool
117 default XTENSA_VARIANT_FSF !! 145 default y if SPARC32
118 146
119 config XTENSA_VARIANT_FSF !! 147 config GENERIC_ISA_DMA
120 bool "fsf - default (not generic) conf !! 148 bool
121 select MMU !! 149 default y if SPARC32
122 150
123 config XTENSA_VARIANT_DC232B !! 151 config ARCH_SUPPORTS_DEBUG_PAGEALLOC
124 bool "dc232b - Diamond 232L Standard C !! 152 def_bool y if SPARC64
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 153
130 config XTENSA_VARIANT_DC233C !! 154 config PGTABLE_LEVELS
131 bool "dc233c - Diamond 233L Standard C !! 155 default 4 if 64BIT
132 select MMU !! 156 default 3
133 select HAVE_XTENSA_GPIO32 <<
134 help <<
135 This variant refers to Tensilica's D <<
136 157
137 config XTENSA_VARIANT_CUSTOM !! 158 config ARCH_SUPPORTS_UPROBES
138 bool "Custom Xtensa processor configur !! 159 def_bool y if SPARC64
139 select HAVE_XTENSA_GPIO32 <<
140 help <<
141 Select this variant to use a custom <<
142 You will be prompted for a processor <<
143 endchoice <<
144 160
145 config XTENSA_VARIANT_CUSTOM_NAME !! 161 menu "Processor type and features"
146 string "Xtensa Processor Custom Core V <<
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 162
153 config XTENSA_VARIANT_NAME !! 163 config SMP
154 string !! 164 bool "Symmetric multi-processing support"
155 default "dc232b" !! 165 ---help---
156 default "dc233c" !! 166 This enables support for systems with more than one CPU. If you have
157 default "fsf" !! 167 a system with only one CPU, say N. If you have a system with more
158 default XTENSA_VARIANT_CUSTOM_NAME !! 168 than one CPU, say Y.
159 !! 169
160 config XTENSA_VARIANT_MMU !! 170 If you say N here, the kernel will run on uni- and multiprocessor
161 bool "Core variant has a Full MMU (TLB !! 171 machines, but will use only one CPU of a multiprocessor machine. If
162 depends on XTENSA_VARIANT_CUSTOM !! 172 you say Y here, the kernel will run on many, but not all,
163 default y !! 173 uniprocessor machines. On a uniprocessor machine, the kernel
164 select MMU !! 174 will run faster if you say N here.
165 help !! 175
166 Build a Conventional Kernel with ful !! 176 People using multiprocessor machines who say Y here should also say
167 ie: it supports a TLB with auto-load !! 177 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
168 !! 178 Management" code will be disabled if you say Y here.
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n <<
173 help <<
174 Enable if core variant has Performan <<
175 External Registers Interface. <<
176 179
177 If unsure, say N. !! 180 See also <file:Documentation/lockup-watchdogs.txt> and the SMP-HOWTO
>> 181 available at <http://www.tldp.org/docs.html#howto>.
178 182
179 config XTENSA_FAKE_NMI !! 183 If you don't know what to do here, say N.
180 bool "Treat PMM IRQ as NMI" <<
181 depends on XTENSA_VARIANT_HAVE_PERF_EV <<
182 default n <<
183 help <<
184 If PMM IRQ is the only IRQ at EXCM l <<
185 treat it as NMI, which improves accu <<
186 <<
187 If there are other interrupts at or <<
188 but not above the EXCM level, PMM IR <<
189 but only if these IRQs are not used. <<
190 saying that this is not safe, and a <<
191 actually fire. <<
192 184
193 If unsure, say N. !! 185 config NR_CPUS
>> 186 int "Maximum number of CPUs"
>> 187 depends on SMP
>> 188 range 2 32 if SPARC32
>> 189 range 2 4096 if SPARC64
>> 190 default 32 if SPARC32
>> 191 default 4096 if SPARC64
194 192
195 config PFAULT !! 193 source kernel/Kconfig.hz
196 bool "Handle protection faults" if EXP <<
197 default y <<
198 help <<
199 Handle protection faults. MMU config <<
200 noMMU configurations may disable it <<
201 generates protection faults or fault <<
202 194
203 If unsure, say Y. !! 195 config RWSEM_GENERIC_SPINLOCK
>> 196 bool
>> 197 default y if SPARC32
204 198
205 config XTENSA_UNALIGNED_USER !! 199 config RWSEM_XCHGADD_ALGORITHM
206 bool "Unaligned memory access in user !! 200 bool
207 help !! 201 default y if SPARC64
208 The Xtensa architecture currently do <<
209 memory accesses in hardware but thro <<
210 Per default, unaligned memory access <<
211 202
212 Say Y here to enable unaligned memor !! 203 config GENERIC_HWEIGHT
>> 204 bool
>> 205 default y
213 206
214 config XTENSA_LOAD_STORE !! 207 config GENERIC_CALIBRATE_DELAY
215 bool "Load/store exception handler for !! 208 bool
216 help !! 209 default y
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 210
223 Say Y here to enable exception handl !! 211 config ARCH_MAY_HAVE_PC_FDC
224 byte and 2-byte access to memory att !! 212 bool
>> 213 default y
225 214
226 config HAVE_SMP !! 215 config EMULATED_CMPXCHG
227 bool "System Supports SMP (MX)" !! 216 bool
228 depends on XTENSA_VARIANT_CUSTOM !! 217 default y if SPARC32
229 select XTENSA_MX <<
230 help 218 help
231 This option is used to indicate that !! 219 Sparc32 does not have a CAS instruction like sparc64. cmpxchg()
232 supports Multiprocessing. Multiproce !! 220 is emulated, and therefore it is not completely atomic.
233 the CPU core definition and currentl <<
234 221
235 Multiprocessor support is implemente !! 222 # Makefile helpers
236 interrupt controllers. !! 223 config SPARC32_SMP
>> 224 bool
>> 225 default y
>> 226 depends on SPARC32 && SMP
237 227
238 The MX interrupt distributer adds In !! 228 config SPARC64_SMP
239 and causes the IRQ numbers to be inc !! 229 bool
240 like the open cores ethernet driver !! 230 default y
>> 231 depends on SPARC64 && SMP
241 232
242 You still have to select "Enable SMP !! 233 config EARLYFB
>> 234 bool "Support for early boot text console"
>> 235 default y
>> 236 depends on SPARC64
>> 237 help
>> 238 Say Y here to enable a faster early framebuffer boot console.
243 239
244 config SMP !! 240 config SECCOMP
245 bool "Enable Symmetric multi-processin !! 241 bool "Enable seccomp to safely compute untrusted bytecode"
246 depends on HAVE_SMP !! 242 depends on SPARC64 && PROC_FS
247 select GENERIC_SMP_IDLE_THREAD !! 243 default y
248 help 244 help
249 Enabled SMP Software; allows more th !! 245 This kernel feature is useful for number crunching applications
250 to be activated during startup. !! 246 that may need to compute untrusted bytecode during their
>> 247 execution. By using pipes or other transports made available to
>> 248 the process as file descriptors supporting the read/write
>> 249 syscalls, it's possible to isolate those applications in
>> 250 their own address space using seccomp. Once seccomp is
>> 251 enabled via /proc/<pid>/seccomp, it cannot be disabled
>> 252 and the task is only allowed to execute a few safe syscalls
>> 253 defined by each seccomp mode.
251 254
252 config NR_CPUS !! 255 If unsure, say Y. Only embedded should say N here.
253 depends on SMP <<
254 int "Maximum number of CPUs (2-32)" <<
255 range 2 32 <<
256 default "4" <<
257 256
258 config HOTPLUG_CPU 257 config HOTPLUG_CPU
259 bool "Enable CPU hotplug support" !! 258 bool "Support for hot-pluggable CPUs"
260 depends on SMP !! 259 depends on SPARC64 && SMP
261 help 260 help
262 Say Y here to allow turning CPUs off !! 261 Say Y here to experiment with turning CPUs off and on. CPUs
263 controlled through /sys/devices/syst !! 262 can be controlled through /sys/devices/system/cpu/cpu#.
264 <<
265 Say N if you want to disable CPU hot 263 Say N if you want to disable CPU hotplug.
266 264
267 config SECONDARY_RESET_VECTOR !! 265 if SPARC64
268 bool "Secondary cores use alternative !! 266 source "drivers/cpufreq/Kconfig"
>> 267 endif
>> 268
>> 269 config US3_MC
>> 270 tristate "UltraSPARC-III Memory Controller driver"
>> 271 depends on SPARC64
269 default y 272 default y
270 depends on HAVE_SMP <<
271 help 273 help
272 Secondary cores may be configured to !! 274 This adds a driver for the UltraSPARC-III memory controller.
273 or all cores may use primary reset v !! 275 Loading this driver allows exact mnemonic strings to be
274 Say Y here to supply handler for the !! 276 printed in the event of a memory error, so that the faulty DIMM
>> 277 on the motherboard can be matched to the error.
275 278
276 config FAST_SYSCALL_XTENSA !! 279 If in doubt, say Y, as this information can be very useful.
277 bool "Enable fast atomic syscalls" !! 280
278 default n !! 281 # Global things across all Sun machines.
279 help !! 282 config GENERIC_LOCKBREAK
280 fast_syscall_xtensa is a syscall tha !! 283 bool
281 on UP kernel when processor has no s !! 284 default y
>> 285 depends on SPARC64 && SMP && PREEMPT
282 286
283 This syscall is deprecated. It may h !! 287 config NUMA
284 invalid arguments. It is provided on !! 288 bool "NUMA support"
285 Only enable it if your userspace sof !! 289 depends on SPARC64 && SMP
>> 290
>> 291 config NODES_SHIFT
>> 292 int "Maximum NUMA Nodes (as a power of 2)"
>> 293 range 4 5 if SPARC64
>> 294 default "5"
>> 295 depends on NEED_MULTIPLE_NODES
>> 296 help
>> 297 Specify the maximum number of NUMA Nodes available on the target
>> 298 system. Increases memory reserved to accommodate various tables.
>> 299
>> 300 # Some NUMA nodes have memory ranges that span
>> 301 # other nodes. Even though a pfn is valid and
>> 302 # between a node's start and end pfns, it may not
>> 303 # reside on that node. See memmap_init_zone()
>> 304 # for details.
>> 305 config NODES_SPAN_OTHER_NODES
>> 306 def_bool y
>> 307 depends on NEED_MULTIPLE_NODES
286 308
287 If unsure, say N. !! 309 config ARCH_SELECT_MEMORY_MODEL
>> 310 def_bool y if SPARC64
288 311
289 config FAST_SYSCALL_SPILL_REGISTERS !! 312 config ARCH_SPARSEMEM_ENABLE
290 bool "Enable spill registers syscall" !! 313 def_bool y if SPARC64
291 default n !! 314 select SPARSEMEM_VMEMMAP_ENABLE
292 help <<
293 fast_syscall_spill_registers is a sy <<
294 register windows of a calling usersp <<
295 <<
296 This syscall is deprecated. It may h <<
297 invalid arguments. It is provided on <<
298 Only enable it if your userspace sof <<
299 315
300 If unsure, say N. !! 316 config ARCH_SPARSEMEM_DEFAULT
>> 317 def_bool y if SPARC64
301 318
302 choice !! 319 config FORCE_MAX_ZONEORDER
303 prompt "Kernel ABI" !! 320 int "Maximum zone order"
304 default KERNEL_ABI_DEFAULT !! 321 default "13"
305 help 322 help
306 Select ABI for the kernel code. This !! 323 The kernel memory allocator divides physically contiguous memory
307 supported userspace ABI and any comb !! 324 blocks into "zones", where each zone is a power of two number of
308 kernel/userspace ABI is possible and !! 325 pages. This option selects the largest power of two that the kernel
>> 326 keeps in the memory allocator. If you need to allocate very large
>> 327 blocks of physically contiguous memory, then you may need to
>> 328 increase this value.
309 329
310 In case both kernel and userspace su !! 330 This config option is actually maximum order plus one. For example,
311 all register windows support code wi !! 331 a value of 13 means that the largest free memory block is 2^12 pages.
312 build. <<
313 332
314 If unsure, choose the default ABI. !! 333 if SPARC64 || COMPILE_TEST
>> 334 source "kernel/power/Kconfig"
>> 335 endif
315 336
316 config KERNEL_ABI_DEFAULT !! 337 config SCHED_SMT
317 bool "Default ABI" !! 338 bool "SMT (Hyperthreading) scheduler support"
>> 339 depends on SPARC64 && SMP
>> 340 default y
318 help 341 help
319 Select this option to compile kernel !! 342 SMT scheduler support improves the CPU scheduler's decision making
320 selected for the toolchain. !! 343 when dealing with SPARC cpus at a cost of slightly increased overhead
321 Normally cores with windowed registe !! 344 in some places. If unsure say N here.
322 cores without it use call0 ABI. !! 345
323 !! 346 config SCHED_MC
324 config KERNEL_ABI_CALL0 !! 347 bool "Multi-core scheduler support"
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 348 depends on SPARC64 && SMP
>> 349 default y
326 help 350 help
327 Select this option to compile kernel !! 351 Multi-core scheduler support improves the CPU scheduler's decision
328 toolchain that defaults to windowed !! 352 making when dealing with multi-core CPU chips at a cost of slightly
329 When this option is not selected the !! 353 increased overhead in some places. If unsure say N here.
330 be used for the kernel code. <<
331 354
332 endchoice !! 355 config CMDLINE_BOOL
333 !! 356 bool "Default bootloader kernel arguments"
334 config USER_ABI_CALL0 !! 357 depends on SPARC64
335 bool <<
336 358
337 choice !! 359 config CMDLINE
338 prompt "Userspace ABI" !! 360 string "Initial kernel command string"
339 default USER_ABI_DEFAULT !! 361 depends on CMDLINE_BOOL
>> 362 default "console=ttyS0,9600 root=/dev/sda1"
340 help 363 help
341 Select supported userspace ABI. !! 364 Say Y here if you want to be able to pass default arguments to
342 !! 365 the kernel. This will be overridden by the bootloader, if you
343 If unsure, choose the default ABI. !! 366 use one (such as SILO). This is most useful if you want to boot
>> 367 a kernel from TFTP, and want default options to be available
>> 368 with having them passed on the command line.
344 369
345 config USER_ABI_DEFAULT !! 370 NOTE: This option WILL override the PROM bootargs setting!
346 bool "Default ABI only" <<
347 help <<
348 Assume default userspace ABI. For XE <<
349 call0 ABI binaries may be run on suc <<
350 will not work correctly for them. <<
351 371
352 config USER_ABI_CALL0_ONLY !! 372 config SUN_PM
353 bool "Call0 ABI only" !! 373 bool
354 select USER_ABI_CALL0 !! 374 default y if SPARC32
355 help 375 help
356 Select this option to support only c !! 376 Enable power management and CPU standby features on supported
357 Windowed ABI binaries will crash wit !! 377 SPARC platforms.
358 an illegal instruction exception on <<
359 378
360 Choose this option if you're plannin !! 379 config SPARC_LED
361 built with call0 ABI. !! 380 tristate "Sun4m LED driver"
>> 381 depends on SPARC32
>> 382 help
>> 383 This driver toggles the front-panel LED on sun4m systems
>> 384 in a user-specifiable manner. Its state can be probed
>> 385 by reading /proc/led and its blinking mode can be changed
>> 386 via writes to /proc/led
362 387
363 config USER_ABI_CALL0_PROBE !! 388 config SERIAL_CONSOLE
364 bool "Support both windowed and call0 !! 389 bool
365 select USER_ABI_CALL0 !! 390 depends on SPARC32
366 help !! 391 default y
367 Select this option to support both w !! 392 ---help---
368 ABIs. When enabled all processes are !! 393 If you say Y here, it will be possible to use a serial port as the
369 and a fast user exception handler fo !! 394 system console (the system console is the device which receives all
370 used to turn on PS.WOE bit on the fi !! 395 kernel messages and warnings and which allows logins in single user
371 the userspace. !! 396 mode). This could be useful if some terminal or printer is connected
>> 397 to that serial port.
>> 398
>> 399 Even if you say Y here, the currently visible virtual console
>> 400 (/dev/tty0) will still be used as the system console by default, but
>> 401 you can alter that using a kernel command line option such as
>> 402 "console=ttyS1". (Try "man bootparam" or see the documentation of
>> 403 your boot loader (silo) about how to pass options to the kernel at
>> 404 boot time.)
>> 405
>> 406 If you don't have a graphics card installed and you say Y here, the
>> 407 kernel will automatically use the first serial line, /dev/ttyS0, as
>> 408 system console.
372 409
373 This option should be enabled for th !! 410 If unsure, say N.
374 both call0 and windowed ABIs in user <<
375 411
376 Note that Xtensa ISA does not guaran !! 412 config SPARC_LEON
377 raise an illegal instruction excepti !! 413 bool "Sparc Leon processor family"
378 PS.WOE is disabled, check whether th !! 414 depends on SPARC32
>> 415 select USB_EHCI_BIG_ENDIAN_MMIO
>> 416 select USB_EHCI_BIG_ENDIAN_DESC
>> 417 select USB_UHCI_BIG_ENDIAN_MMIO
>> 418 select USB_UHCI_BIG_ENDIAN_DESC
>> 419 ---help---
>> 420 If you say Y here if you are running on a SPARC-LEON processor.
>> 421 The LEON processor is a synthesizable VHDL model of the
>> 422 SPARC-v8 standard. LEON is part of the GRLIB collection of
>> 423 IP cores that are distributed under GPL. GRLIB can be downloaded
>> 424 from www.gaisler.com. You can download a sparc-linux cross-compilation
>> 425 toolchain at www.gaisler.com.
>> 426
>> 427 if SPARC_LEON
>> 428 menu "U-Boot options"
>> 429
>> 430 config UBOOT_LOAD_ADDR
>> 431 hex "uImage Load Address"
>> 432 default 0x40004000
>> 433 ---help---
>> 434 U-Boot kernel load address, the address in physical address space
>> 435 where u-boot will place the Linux kernel before booting it.
>> 436 This address is normally the base address of main memory + 0x4000.
>> 437
>> 438 config UBOOT_FLASH_ADDR
>> 439 hex "uImage.o Load Address"
>> 440 default 0x00080000
>> 441 ---help---
>> 442 Optional setting only affecting the uImage.o ELF-image used to
>> 443 download the uImage file to the target using a ELF-loader other than
>> 444 U-Boot. It may for example be used to download an uImage to FLASH with
>> 445 the GRMON utility before even starting u-boot.
>> 446
>> 447 config UBOOT_ENTRY_ADDR
>> 448 hex "uImage Entry Address"
>> 449 default 0xf0004000
>> 450 ---help---
>> 451 Do not change this unless you know what you're doing. This is
>> 452 hardcoded by the SPARC32 and LEON port.
379 453
380 endchoice !! 454 This is the virtual address u-boot jumps to when booting the Linux
>> 455 Kernel.
381 456
382 endmenu 457 endmenu
>> 458 endif
383 459
384 config XTENSA_CALIBRATE_CCOUNT !! 460 endmenu
385 def_bool n <<
386 help <<
387 On some platforms (XT2000, for examp <<
388 vary. The frequency can be determin <<
389 against a well known, fixed frequenc <<
390 <<
391 config SERIAL_CONSOLE <<
392 def_bool n <<
393 <<
394 config PLATFORM_HAVE_XIP <<
395 def_bool n <<
396 <<
397 menu "Platform options" <<
398 461
399 choice !! 462 menu "Bus options (PCI etc.)"
400 prompt "Xtensa System Type" !! 463 config SBUS
401 default XTENSA_PLATFORM_ISS !! 464 bool
>> 465 default y
402 466
403 config XTENSA_PLATFORM_ISS !! 467 config SBUSCHAR
404 bool "ISS" !! 468 bool
405 select XTENSA_CALIBRATE_CCOUNT !! 469 default y
406 select SERIAL_CONSOLE <<
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 470
410 config XTENSA_PLATFORM_XT2000 !! 471 config SUN_LDOMS
411 bool "XT2000" !! 472 bool "Sun Logical Domains support"
>> 473 depends on SPARC64
412 help 474 help
413 XT2000 is the name of Tensilica's fe !! 475 Say Y here is you want to support virtual devices via
414 This hardware is capable of running !! 476 Logical Domains.
415 477
416 config XTENSA_PLATFORM_XTFPGA !! 478 config PCI
417 bool "XTFPGA" !! 479 bool "Support for PCI and PS/2 keyboard/mouse"
418 select ETHOC if ETHERNET <<
419 select PLATFORM_WANT_DEFAULT_MEM if !M <<
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 480 help
424 XTFPGA is the name of Tensilica boar !! 481 Find out whether your system includes a PCI bus. PCI is the name of
425 This hardware is capable of running !! 482 a bus system, i.e. the way the CPU talks to the other stuff inside
>> 483 your box. If you say Y here, the kernel will include drivers and
>> 484 infrastructure code to support PCI bus devices.
426 485
427 endchoice !! 486 CONFIG_PCI is needed for all JavaStation's (including MrCoffee),
>> 487 CP-1200, JavaEngine-1, Corona, Red October, and Serengeti SGSC.
>> 488 All of these platforms are extremely obscure, so say N if unsure.
428 489
429 config PLATFORM_NR_IRQS !! 490 config PCI_DOMAINS
430 int !! 491 def_bool PCI if SPARC64
431 default 3 if XTENSA_PLATFORM_XT2000 <<
432 default 0 <<
433 492
434 config XTENSA_CPU_CLOCK !! 493 config PCI_SYSCALL
435 int "CPU clock rate [MHz]" !! 494 def_bool PCI
436 depends on !XTENSA_CALIBRATE_CCOUNT <<
437 default 16 <<
438 495
439 config GENERIC_CALIBRATE_DELAY !! 496 config PCIC_PCI
440 bool "Auto calibration of the BogoMIPS !! 497 bool
441 help !! 498 depends on PCI && SPARC32 && !SPARC_LEON
442 The BogoMIPS value can easily be der <<
443 <<
444 config CMDLINE_BOOL <<
445 bool "Default bootloader kernel argume <<
446 <<
447 config CMDLINE <<
448 string "Initial kernel command string" <<
449 depends on CMDLINE_BOOL <<
450 default "console=ttyS0,38400 root=/dev <<
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 <<
458 config USE_OF <<
459 bool "Flattened Device Tree support" <<
460 select OF <<
461 select OF_EARLY_FLATTREE <<
462 help <<
463 Include support for flattened device <<
464 <<
465 config BUILTIN_DTB_SOURCE <<
466 string "DTB to build into the kernel i <<
467 depends on OF <<
468 <<
469 config PARSE_BOOTPARAM <<
470 bool "Parse bootparam block" <<
471 default y 499 default y
472 help <<
473 Parse parameters passed to the kerne <<
474 be disabled if the kernel is known t <<
475 500
476 If unsure, say Y. !! 501 config LEON_PCI
477 !! 502 bool
478 choice !! 503 depends on PCI && SPARC_LEON
479 prompt "Semihosting interface" !! 504 default y
480 default XTENSA_SIMCALL_ISS <<
481 depends on XTENSA_PLATFORM_ISS <<
482 help <<
483 Choose semihosting interface that wi <<
484 block device and networking. <<
485 <<
486 config XTENSA_SIMCALL_ISS <<
487 bool "simcall" <<
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 <<
492 config XTENSA_SIMCALL_GDBIO <<
493 bool "GDBIO" <<
494 help <<
495 Use break instruction. It is availab <<
496 is attached to it via JTAG. <<
497 <<
498 endchoice <<
499 505
500 config BLK_DEV_SIMDISK !! 506 config SPARC_GRPCI1
501 tristate "Host file-based simulated bl !! 507 bool "GRPCI Host Bridge Support"
502 default n !! 508 depends on LEON_PCI
503 depends on XTENSA_PLATFORM_ISS && BLOC !! 509 default y
504 help 510 help
505 Create block devices that map to fil !! 511 Say Y here to include the GRPCI Host Bridge Driver. The GRPCI
506 Device binding to host file may be c !! 512 PCI host controller is typically found in GRLIB SPARC32/LEON
507 interface provided the device is not !! 513 systems. The driver has one property (all_pci_errors) controlled
508 !! 514 from the bootloader that makes the GRPCI to generate interrupts
509 config BLK_DEV_SIMDISK_COUNT !! 515 on detected PCI Parity and System errors.
510 int "Number of host file-based simulat !! 516
511 range 1 10 !! 517 config SPARC_GRPCI2
512 depends on BLK_DEV_SIMDISK !! 518 bool "GRPCI2 Host Bridge Support"
513 default 2 !! 519 depends on LEON_PCI
>> 520 default y
514 help 521 help
515 This is the default minimal number o !! 522 Say Y here to include the GRPCI2 Host Bridge Driver.
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 523
520 config SIMDISK0_FILENAME !! 524 source "drivers/pci/Kconfig"
521 string "Host filename for the first si <<
522 depends on BLK_DEV_SIMDISK = y <<
523 default "" <<
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 525
528 config SIMDISK1_FILENAME !! 526 source "drivers/pcmcia/Kconfig"
529 string "Host filename for the second s <<
530 depends on BLK_DEV_SIMDISK = y && BLK_ <<
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 527
536 config XTFPGA_LCD !! 528 config SUN_OPENPROMFS
537 bool "Enable XTFPGA LCD driver" !! 529 tristate "Openprom tree appears in /proc/openprom"
538 depends on XTENSA_PLATFORM_XTFPGA <<
539 default n <<
540 help 530 help
541 There's a 2x16 LCD on most of XTFPGA !! 531 If you say Y, the OpenPROM device tree will be available as a
542 progress messages there during bootu !! 532 virtual file system, which you can mount to /proc/openprom by "mount
543 during board bringup. !! 533 -t openpromfs none /proc/openprom".
544 534
545 If unsure, say N. !! 535 To compile the /proc/openprom support as a module, choose M here: the
546 !! 536 module will be called openpromfs.
547 config XTFPGA_LCD_BASE_ADDR <<
548 hex "XTFPGA LCD base address" <<
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 537
617 If unsure, say N. !! 538 Only choose N if you know in advance that you will not need to modify
>> 539 OpenPROM settings on the running system.
618 540
619 config MEMMAP_CACHEATTR !! 541 # Makefile helpers
620 hex "Cache attributes for the memory a !! 542 config SPARC64_PCI
621 depends on !MMU !! 543 bool
622 default 0x22222222 !! 544 default y
623 help !! 545 depends on SPARC64 && PCI
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 <<
683 If unsure, leave the default value h <<
684 <<
685 choice <<
686 prompt "Relocatable vectors location" <<
687 default XTENSA_VECTORS_IN_TEXT <<
688 help <<
689 Choose whether relocatable vectors a <<
690 or placed separately at runtime. Thi <<
691 configurations without VECBASE regis <<
692 placed at their hardware-defined loc <<
693 <<
694 config XTENSA_VECTORS_IN_TEXT <<
695 bool "Merge relocatable vectors into k <<
696 depends on !MTD_XIP <<
697 help <<
698 This option puts relocatable vectors <<
699 with proper alignment. <<
700 This is a safe choice for most confi <<
701 <<
702 config XTENSA_VECTORS_SEPARATE <<
703 bool "Put relocatable vectors at fixed <<
704 help <<
705 This option puts relocatable vectors <<
706 Vectors are merged with the .init da <<
707 are copied into their designated loc <<
708 Use it to put vectors into IRAM or o <<
709 XIP-aware MTD support. <<
710 <<
711 endchoice <<
712 <<
713 config VECTORS_ADDR <<
714 hex "Kernel vectors virtual address" <<
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 <<
729 config PLATFORM_WANT_DEFAULT_MEM <<
730 def_bool n <<
731 <<
732 config DEFAULT_MEM_START <<
733 hex <<
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M <<
735 default 0x60000000 if PLATFORM_WANT_DE <<
736 default 0x00000000 <<
737 help <<
738 This is the base address used for bo <<
739 in noMMU configurations. <<
740 <<
741 If unsure, leave the default value h <<
742 <<
743 choice <<
744 prompt "KSEG layout" <<
745 depends on MMU <<
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 <<
772 endchoice <<
773 <<
774 config HIGHMEM <<
775 bool "High Memory Support" <<
776 depends on MMU <<
777 select KMAP_LOCAL <<
778 help <<
779 Linux can use the full amount of RAM <<
780 default. However, the default MMUv2 <<
781 lowermost 128 MB of memory linearly <<
782 at 0xd0000000 (cached) and 0xd800000 <<
783 When there are more than 128 MB memo <<
784 all of it can be "permanently mapped <<
785 The physical memory that's not perma <<
786 "high memory". <<
787 <<
788 If you are compiling a kernel which <<
789 machine with more than 128 MB total <<
790 N here. <<
791 <<
792 If unsure, say Y. <<
793 <<
794 config ARCH_FORCE_MAX_ORDER <<
795 int "Order of maximal physically conti <<
796 default "10" <<
797 help <<
798 The kernel page allocator limits the <<
799 contiguous allocations. The limit is <<
800 defines the maximal power of two of <<
801 allocated as a single contiguous blo <<
802 overriding the default setting when <<
803 large blocks of physically contiguou <<
804 546
805 Don't change if unsure. !! 547 config SPARC64_PCI_MSI
>> 548 bool
>> 549 default y
>> 550 depends on SPARC64_PCI && PCI_MSI
806 551
807 endmenu 552 endmenu
808 553
809 menu "Power management options" !! 554 config COMPAT
810 !! 555 bool
811 config ARCH_HIBERNATION_POSSIBLE !! 556 depends on SPARC64
812 def_bool y !! 557 default y
>> 558 select COMPAT_BINFMT_ELF if BINFMT_ELF
>> 559 select HAVE_UID16
>> 560 select ARCH_WANT_OLD_COMPAT_IPC
>> 561 select COMPAT_OLD_SIGACTION
813 562
814 source "kernel/power/Kconfig" !! 563 config SYSVIPC_COMPAT
>> 564 bool
>> 565 depends on COMPAT && SYSVIPC
>> 566 default y
815 567
816 endmenu !! 568 source "drivers/sbus/char/Kconfig"
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