1 # SPDX-License-Identifier: GPL-2.0 !! 1 # SPDX-License-Identifier: GPL-2.0-only
2 config XTENSA !! 2 config 64BIT
3 def_bool y !! 3 bool "64-bit kernel" if "$(ARCH)" = "sparc"
4 select ARCH_32BIT_OFF_T !! 4 default "$(ARCH)" = "sparc64"
5 select ARCH_HAS_CPU_CACHE_ALIASING !! 5 help
6 select ARCH_HAS_BINFMT_FLAT if !MMU !! 6 SPARC is a family of RISC microprocessors designed and marketed by
7 select ARCH_HAS_CURRENT_STACK_POINTER !! 7 Sun Microsystems, incorporated. They are very widely found in Sun
8 select ARCH_HAS_DEBUG_VM_PGTABLE !! 8 workstations and clones.
9 select ARCH_HAS_DMA_PREP_COHERENT if M !! 9
10 select ARCH_HAS_GCOV_PROFILE_ALL !! 10 Say yes to build a 64-bit kernel - formerly known as sparc64
11 select ARCH_HAS_KCOV !! 11 Say no to build a 32-bit kernel - formerly known as sparc
12 select ARCH_HAS_SYNC_DMA_FOR_CPU if MM !! 12
13 select ARCH_HAS_SYNC_DMA_FOR_DEVICE if !! 13 config SPARC
14 select ARCH_HAS_DMA_SET_UNCACHED if MM !! 14 bool
15 select ARCH_HAS_STRNCPY_FROM_USER if ! !! 15 default y
16 select ARCH_HAS_STRNLEN_USER !! 16 select ARCH_MIGHT_HAVE_PC_PARPORT if SPARC64 && PCI
17 select ARCH_NEED_CMPXCHG_1_EMU !! 17 select ARCH_MIGHT_HAVE_PC_SERIO
18 select ARCH_USE_MEMTEST !! 18 select DMA_OPS
19 select ARCH_USE_QUEUED_RWLOCKS !! 19 select OF
20 select ARCH_USE_QUEUED_SPINLOCKS !! 20 select OF_PROMTREE
21 select ARCH_WANT_IPC_PARSE_VERSION <<
22 select BUILDTIME_TABLE_SORT <<
23 select CLONE_BACKWARDS <<
24 select COMMON_CLK <<
25 select DMA_NONCOHERENT_MMAP if MMU <<
26 select GENERIC_ATOMIC64 <<
27 select GENERIC_IRQ_SHOW <<
28 select GENERIC_LIB_CMPDI2 <<
29 select GENERIC_LIB_MULDI3 <<
30 select GENERIC_LIB_UCMPDI2 <<
31 select GENERIC_PCI_IOMAP <<
32 select GENERIC_SCHED_CLOCK <<
33 select GENERIC_IOREMAP if MMU <<
34 select HAVE_ARCH_AUDITSYSCALL <<
35 select HAVE_ARCH_JUMP_LABEL if !XIP_KE <<
36 select HAVE_ARCH_KASAN if MMU && !XIP_ <<
37 select HAVE_ARCH_KCSAN <<
38 select HAVE_ARCH_SECCOMP_FILTER <<
39 select HAVE_ARCH_TRACEHOOK <<
40 select HAVE_ASM_MODVERSIONS 21 select HAVE_ASM_MODVERSIONS
41 select HAVE_CONTEXT_TRACKING_USER !! 22 select HAVE_ARCH_KGDB if !SMP || SPARC64
42 select HAVE_DEBUG_KMEMLEAK !! 23 select HAVE_ARCH_TRACEHOOK
43 select HAVE_DMA_CONTIGUOUS !! 24 select HAVE_ARCH_SECCOMP if SPARC64
44 select HAVE_EXIT_THREAD 25 select HAVE_EXIT_THREAD
45 select HAVE_FUNCTION_TRACER <<
46 select HAVE_GCC_PLUGINS if GCC_VERSION <<
47 select HAVE_HW_BREAKPOINT if PERF_EVEN <<
48 select HAVE_IRQ_TIME_ACCOUNTING <<
49 select HAVE_PAGE_SIZE_4KB <<
50 select HAVE_PCI 26 select HAVE_PCI
51 select HAVE_PERF_EVENTS !! 27 select SYSCTL_EXCEPTION_TRACE
52 select HAVE_STACKPROTECTOR !! 28 select RTC_CLASS
53 select HAVE_SYSCALL_TRACEPOINTS !! 29 select RTC_DRV_M48T59
54 select HAVE_VIRT_CPU_ACCOUNTING_GEN !! 30 select RTC_SYSTOHC
55 select IRQ_DOMAIN !! 31 select HAVE_ARCH_JUMP_LABEL if SPARC64
56 select LOCK_MM_AND_FIND_VMA !! 32 select GENERIC_IRQ_SHOW
>> 33 select ARCH_WANT_IPC_PARSE_VERSION
>> 34 select GENERIC_PCI_IOMAP
>> 35 select HAS_IOPORT
>> 36 select HAVE_NMI_WATCHDOG if SPARC64
>> 37 select HAVE_CBPF_JIT if SPARC32
>> 38 select HAVE_EBPF_JIT if SPARC64
>> 39 select HAVE_DEBUG_BUGVERBOSE
>> 40 select GENERIC_SMP_IDLE_THREAD
57 select MODULES_USE_ELF_RELA 41 select MODULES_USE_ELF_RELA
58 select PERF_USE_VMALLOC !! 42 select PCI_SYSCALL if PCI
>> 43 select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
>> 44 select ODD_RT_SIGACTION
>> 45 select OLD_SIGSUSPEND
>> 46 select CPU_NO_EFFICIENT_FFS
>> 47 select LOCKDEP_SMALL if LOCKDEP
>> 48 select NEED_DMA_MAP_STATE
>> 49 select NEED_SG_DMA_LENGTH
59 select TRACE_IRQFLAGS_SUPPORT 50 select TRACE_IRQFLAGS_SUPPORT
60 help <<
61 Xtensa processors are 32-bit RISC ma <<
62 primarily for embedded systems. The <<
63 configurable and extensible. The Li <<
64 architecture supports all processor <<
65 with reasonable minimum requirements <<
66 a home page at <http://www.linux-xte <<
67 <<
68 config GENERIC_HWEIGHT <<
69 def_bool y <<
70 <<
71 config ARCH_HAS_ILOG2_U32 <<
72 def_bool n <<
73 <<
74 config ARCH_HAS_ILOG2_U64 <<
75 def_bool n <<
76 51
77 config ARCH_MTD_XIP !! 52 config SPARC32
78 def_bool y !! 53 def_bool !64BIT
79 !! 54 select ARCH_32BIT_OFF_T
80 config NO_IOPORT_MAP !! 55 select ARCH_HAS_CPU_FINALIZE_INIT if !SMP
81 def_bool n !! 56 select ARCH_HAS_SYNC_DMA_FOR_CPU
82 !! 57 select CLZ_TAB
83 config HZ !! 58 select DMA_DIRECT_REMAP
84 int !! 59 select GENERIC_ATOMIC64
85 default 100 !! 60 select HAVE_UID16
>> 61 select LOCK_MM_AND_FIND_VMA
>> 62 select OLD_SIGACTION
>> 63 select ZONE_DMA
86 64
87 config LOCKDEP_SUPPORT !! 65 config SPARC64
88 def_bool y !! 66 def_bool 64BIT
>> 67 select ALTERNATE_USER_ADDRESS_SPACE
>> 68 select HAVE_FUNCTION_TRACER
>> 69 select HAVE_FUNCTION_GRAPH_TRACER
>> 70 select HAVE_KRETPROBES
>> 71 select HAVE_KPROBES
>> 72 select MMU_GATHER_RCU_TABLE_FREE if SMP
>> 73 select MMU_GATHER_MERGE_VMAS
>> 74 select MMU_GATHER_NO_FLUSH_CACHE
>> 75 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
>> 76 select HAVE_DYNAMIC_FTRACE
>> 77 select HAVE_FTRACE_MCOUNT_RECORD
>> 78 select HAVE_SYSCALL_TRACEPOINTS
>> 79 select HAVE_CONTEXT_TRACKING_USER
>> 80 select HAVE_TIF_NOHZ
>> 81 select HAVE_DEBUG_KMEMLEAK
>> 82 select IOMMU_HELPER
>> 83 select SPARSE_IRQ
>> 84 select RTC_DRV_CMOS
>> 85 select RTC_DRV_BQ4802
>> 86 select RTC_DRV_SUN4V
>> 87 select RTC_DRV_STARFIRE
>> 88 select HAVE_PERF_EVENTS
>> 89 select PERF_USE_VMALLOC
>> 90 select ARCH_HAVE_NMI_SAFE_CMPXCHG
>> 91 select HAVE_C_RECORDMCOUNT
>> 92 select HAVE_ARCH_AUDITSYSCALL
>> 93 select ARCH_SUPPORTS_ATOMIC_RMW
>> 94 select ARCH_SUPPORTS_DEBUG_PAGEALLOC
>> 95 select HAVE_NMI
>> 96 select HAVE_REGS_AND_STACK_ACCESS_API
>> 97 select ARCH_USE_QUEUED_RWLOCKS
>> 98 select ARCH_USE_QUEUED_SPINLOCKS
>> 99 select GENERIC_TIME_VSYSCALL
>> 100 select ARCH_CLOCKSOURCE_DATA
>> 101 select ARCH_HAS_PTE_SPECIAL
>> 102 select PCI_DOMAINS if PCI
>> 103 select ARCH_HAS_GIGANTIC_PAGE
>> 104 select HAVE_SOFTIRQ_ON_OWN_STACK
>> 105 select HAVE_SETUP_PER_CPU_AREA
>> 106 select NEED_PER_CPU_EMBED_FIRST_CHUNK
>> 107 select NEED_PER_CPU_PAGE_FIRST_CHUNK
89 108
90 config STACKTRACE_SUPPORT !! 109 config ARCH_PROC_KCORE_TEXT
91 def_bool y 110 def_bool y
92 111
93 config MMU <<
94 def_bool n <<
95 select PFAULT <<
96 <<
97 config HAVE_XTENSA_GPIO32 <<
98 def_bool n <<
99 <<
100 config KASAN_SHADOW_OFFSET <<
101 hex <<
102 default 0x6e400000 <<
103 <<
104 config CPU_BIG_ENDIAN 112 config CPU_BIG_ENDIAN
105 def_bool $(success,test "$(shell,echo !! 113 def_bool y
106 <<
107 config CPU_LITTLE_ENDIAN <<
108 def_bool !CPU_BIG_ENDIAN <<
109 <<
110 config CC_HAVE_CALL0_ABI <<
111 def_bool $(success,test "$(shell,echo <<
112 114
113 menu "Processor type and features" !! 115 config ARCH_ATU
>> 116 bool
>> 117 default y if SPARC64
114 118
115 choice !! 119 config STACKTRACE_SUPPORT
116 prompt "Xtensa Processor Configuration !! 120 bool
117 default XTENSA_VARIANT_FSF !! 121 default y if SPARC64
118 <<
119 config XTENSA_VARIANT_FSF <<
120 bool "fsf - default (not generic) conf <<
121 select MMU <<
122 <<
123 config XTENSA_VARIANT_DC232B <<
124 bool "dc232b - Diamond 232L Standard C <<
125 select MMU <<
126 select HAVE_XTENSA_GPIO32 <<
127 help <<
128 This variant refers to Tensilica's D <<
129 <<
130 config XTENSA_VARIANT_DC233C <<
131 bool "dc233c - Diamond 233L Standard C <<
132 select MMU <<
133 select HAVE_XTENSA_GPIO32 <<
134 help <<
135 This variant refers to Tensilica's D <<
136 <<
137 config XTENSA_VARIANT_CUSTOM <<
138 bool "Custom Xtensa processor configur <<
139 select HAVE_XTENSA_GPIO32 <<
140 help <<
141 Select this variant to use a custom <<
142 You will be prompted for a processor <<
143 endchoice <<
144 <<
145 config XTENSA_VARIANT_CUSTOM_NAME <<
146 string "Xtensa Processor Custom Core V <<
147 depends on XTENSA_VARIANT_CUSTOM <<
148 help <<
149 Provide the name of a custom Xtensa <<
150 This CORENAME selects arch/xtensa/va <<
151 Don't forget you have to select MMU <<
152 <<
153 config XTENSA_VARIANT_NAME <<
154 string <<
155 default "dc232b" <<
156 default "dc233c" <<
157 default "fsf" <<
158 default XTENSA_VARIANT_CUSTOM_NAME <<
159 <<
160 config XTENSA_VARIANT_MMU <<
161 bool "Core variant has a Full MMU (TLB <<
162 depends on XTENSA_VARIANT_CUSTOM <<
163 default y <<
164 select MMU <<
165 help <<
166 Build a Conventional Kernel with ful <<
167 ie: it supports a TLB with auto-load <<
168 <<
169 config XTENSA_VARIANT_HAVE_PERF_EVENTS <<
170 bool "Core variant has Performance Mon <<
171 depends on XTENSA_VARIANT_CUSTOM <<
172 default n <<
173 help <<
174 Enable if core variant has Performan <<
175 External Registers Interface. <<
176 122
177 If unsure, say N. !! 123 config LOCKDEP_SUPPORT
>> 124 bool
>> 125 default y if SPARC64
178 126
179 config XTENSA_FAKE_NMI !! 127 config ARCH_HIBERNATION_POSSIBLE
180 bool "Treat PMM IRQ as NMI" !! 128 def_bool y if SPARC64
181 depends on XTENSA_VARIANT_HAVE_PERF_EV <<
182 default n <<
183 help <<
184 If PMM IRQ is the only IRQ at EXCM l <<
185 treat it as NMI, which improves accu <<
186 <<
187 If there are other interrupts at or <<
188 but not above the EXCM level, PMM IR <<
189 but only if these IRQs are not used. <<
190 saying that this is not safe, and a <<
191 actually fire. <<
192 129
193 If unsure, say N. !! 130 config AUDIT_ARCH
>> 131 bool
>> 132 default y
194 133
195 config PFAULT !! 134 config MMU
196 bool "Handle protection faults" if EXP !! 135 bool
197 default y 136 default y
198 help <<
199 Handle protection faults. MMU config <<
200 noMMU configurations may disable it <<
201 generates protection faults or fault <<
202 137
203 If unsure, say Y. !! 138 config HIGHMEM
>> 139 bool
>> 140 default y if SPARC32
>> 141 select KMAP_LOCAL
204 142
205 config XTENSA_UNALIGNED_USER !! 143 config GENERIC_ISA_DMA
206 bool "Unaligned memory access in user !! 144 bool
207 help !! 145 default y if SPARC32
208 The Xtensa architecture currently do <<
209 memory accesses in hardware but thro <<
210 Per default, unaligned memory access <<
211 146
212 Say Y here to enable unaligned memor !! 147 config PGTABLE_LEVELS
>> 148 default 4 if 64BIT
>> 149 default 3
213 150
214 config XTENSA_LOAD_STORE !! 151 config ARCH_SUPPORTS_UPROBES
215 bool "Load/store exception handler for !! 152 def_bool y if SPARC64
216 help <<
217 The Xtensa architecture only allows <<
218 instruction bus with l32r and l32i i <<
219 instructions raise an exception with <<
220 This makes it hard to use some confi <<
221 literals in FLASH memory attached to <<
222 153
223 Say Y here to enable exception handl !! 154 menu "Processor type and features"
224 byte and 2-byte access to memory att <<
225 155
226 config HAVE_SMP !! 156 config SMP
227 bool "System Supports SMP (MX)" !! 157 bool "Symmetric multi-processing support"
228 depends on XTENSA_VARIANT_CUSTOM <<
229 select XTENSA_MX <<
230 help 158 help
231 This option is used to indicate that !! 159 This enables support for systems with more than one CPU. If you have
232 supports Multiprocessing. Multiproce !! 160 a system with only one CPU, say N. If you have a system with more
233 the CPU core definition and currentl !! 161 than one CPU, say Y.
234 !! 162
235 Multiprocessor support is implemente !! 163 If you say N here, the kernel will run on uni- and multiprocessor
236 interrupt controllers. !! 164 machines, but will use only one CPU of a multiprocessor machine. If
>> 165 you say Y here, the kernel will run on many, but not all,
>> 166 uniprocessor machines. On a uniprocessor machine, the kernel
>> 167 will run faster if you say N here.
>> 168
>> 169 People using multiprocessor machines who say Y here should also say
>> 170 Y to "Enhanced Real Time Clock Support", below. The "Advanced Power
>> 171 Management" code will be disabled if you say Y here.
237 172
238 The MX interrupt distributer adds In !! 173 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
239 and causes the IRQ numbers to be inc !! 174 available at <https://www.tldp.org/docs.html#howto>.
240 like the open cores ethernet driver <<
241 175
242 You still have to select "Enable SMP !! 176 If you don't know what to do here, say N.
243 <<
244 config SMP <<
245 bool "Enable Symmetric multi-processin <<
246 depends on HAVE_SMP <<
247 select GENERIC_SMP_IDLE_THREAD <<
248 help <<
249 Enabled SMP Software; allows more th <<
250 to be activated during startup. <<
251 177
252 config NR_CPUS 178 config NR_CPUS
>> 179 int "Maximum number of CPUs"
253 depends on SMP 180 depends on SMP
254 int "Maximum number of CPUs (2-32)" !! 181 range 2 32 if SPARC32
255 range 2 32 !! 182 range 2 4096 if SPARC64
256 default "4" !! 183 default 32 if SPARC32
257 !! 184 default 4096 if SPARC64
258 config HOTPLUG_CPU <<
259 bool "Enable CPU hotplug support" <<
260 depends on SMP <<
261 help <<
262 Say Y here to allow turning CPUs off <<
263 controlled through /sys/devices/syst <<
264 185
265 Say N if you want to disable CPU hot !! 186 source "kernel/Kconfig.hz"
266 187
267 config SECONDARY_RESET_VECTOR !! 188 config GENERIC_HWEIGHT
268 bool "Secondary cores use alternative !! 189 bool
269 default y 190 default y
270 depends on HAVE_SMP <<
271 help <<
272 Secondary cores may be configured to <<
273 or all cores may use primary reset v <<
274 Say Y here to supply handler for the <<
275 <<
276 config FAST_SYSCALL_XTENSA <<
277 bool "Enable fast atomic syscalls" <<
278 default n <<
279 help <<
280 fast_syscall_xtensa is a syscall tha <<
281 on UP kernel when processor has no s <<
282 <<
283 This syscall is deprecated. It may h <<
284 invalid arguments. It is provided on <<
285 Only enable it if your userspace sof <<
286 191
287 If unsure, say N. !! 192 config GENERIC_CALIBRATE_DELAY
288 !! 193 bool
289 config FAST_SYSCALL_SPILL_REGISTERS !! 194 default y
290 bool "Enable spill registers syscall" <<
291 default n <<
292 help <<
293 fast_syscall_spill_registers is a sy <<
294 register windows of a calling usersp <<
295 <<
296 This syscall is deprecated. It may h <<
297 invalid arguments. It is provided on <<
298 Only enable it if your userspace sof <<
299 <<
300 If unsure, say N. <<
301 <<
302 choice <<
303 prompt "Kernel ABI" <<
304 default KERNEL_ABI_DEFAULT <<
305 help <<
306 Select ABI for the kernel code. This <<
307 supported userspace ABI and any comb <<
308 kernel/userspace ABI is possible and <<
309 <<
310 In case both kernel and userspace su <<
311 all register windows support code wi <<
312 build. <<
313 <<
314 If unsure, choose the default ABI. <<
315 195
316 config KERNEL_ABI_DEFAULT !! 196 config ARCH_MAY_HAVE_PC_FDC
317 bool "Default ABI" !! 197 bool
318 help !! 198 default y
319 Select this option to compile kernel <<
320 selected for the toolchain. <<
321 Normally cores with windowed registe <<
322 cores without it use call0 ABI. <<
323 199
324 config KERNEL_ABI_CALL0 !! 200 config EMULATED_CMPXCHG
325 bool "Call0 ABI" if CC_HAVE_CALL0_ABI !! 201 bool
>> 202 default y if SPARC32
326 help 203 help
327 Select this option to compile kernel !! 204 Sparc32 does not have a CAS instruction like sparc64. cmpxchg()
328 toolchain that defaults to windowed !! 205 is emulated, and therefore it is not completely atomic.
329 When this option is not selected the <<
330 be used for the kernel code. <<
331 <<
332 endchoice <<
333 206
334 config USER_ABI_CALL0 !! 207 # Makefile helpers
>> 208 config SPARC32_SMP
335 bool 209 bool
>> 210 default y
>> 211 depends on SPARC32 && SMP
336 212
337 choice !! 213 config SPARC64_SMP
338 prompt "Userspace ABI" !! 214 bool
339 default USER_ABI_DEFAULT !! 215 default y
340 help !! 216 depends on SPARC64 && SMP
341 Select supported userspace ABI. <<
342 <<
343 If unsure, choose the default ABI. <<
344 217
345 config USER_ABI_DEFAULT !! 218 config EARLYFB
346 bool "Default ABI only" !! 219 bool "Support for early boot text console"
>> 220 default y
>> 221 depends on SPARC64
347 help 222 help
348 Assume default userspace ABI. For XE !! 223 Say Y here to enable a faster early framebuffer boot console.
349 call0 ABI binaries may be run on suc <<
350 will not work correctly for them. <<
351 224
352 config USER_ABI_CALL0_ONLY !! 225 config HOTPLUG_CPU
353 bool "Call0 ABI only" !! 226 bool "Support for hot-pluggable CPUs"
354 select USER_ABI_CALL0 !! 227 depends on SPARC64 && SMP
355 help 228 help
356 Select this option to support only c !! 229 Say Y here to experiment with turning CPUs off and on. CPUs
357 Windowed ABI binaries will crash wit !! 230 can be controlled through /sys/devices/system/cpu/cpu#.
358 an illegal instruction exception on !! 231 Say N if you want to disable CPU hotplug.
359 <<
360 Choose this option if you're plannin <<
361 built with call0 ABI. <<
362 232
363 config USER_ABI_CALL0_PROBE !! 233 if SPARC64
364 bool "Support both windowed and call0 !! 234 source "drivers/cpufreq/Kconfig"
365 select USER_ABI_CALL0 !! 235 endif
>> 236
>> 237 config US3_MC
>> 238 tristate "UltraSPARC-III Memory Controller driver"
>> 239 depends on SPARC64
>> 240 default y
366 help 241 help
367 Select this option to support both w !! 242 This adds a driver for the UltraSPARC-III memory controller.
368 ABIs. When enabled all processes are !! 243 Loading this driver allows exact mnemonic strings to be
369 and a fast user exception handler fo !! 244 printed in the event of a memory error, so that the faulty DIMM
370 used to turn on PS.WOE bit on the fi !! 245 on the motherboard can be matched to the error.
371 the userspace. <<
372 246
373 This option should be enabled for th !! 247 If in doubt, say Y, as this information can be very useful.
374 both call0 and windowed ABIs in user <<
375 248
376 Note that Xtensa ISA does not guaran !! 249 # Global things across all Sun machines.
377 raise an illegal instruction excepti !! 250 config GENERIC_LOCKBREAK
378 PS.WOE is disabled, check whether th !! 251 bool
>> 252 default y
>> 253 depends on SPARC64 && SMP && PREEMPTION
379 254
380 endchoice !! 255 config NUMA
>> 256 bool "NUMA support"
>> 257 depends on SPARC64 && SMP
>> 258
>> 259 config NODES_SHIFT
>> 260 int "Maximum NUMA Nodes (as a power of 2)"
>> 261 range 4 5 if SPARC64
>> 262 default "5"
>> 263 depends on NUMA
>> 264 help
>> 265 Specify the maximum number of NUMA Nodes available on the target
>> 266 system. Increases memory reserved to accommodate various tables.
>> 267
>> 268 config ARCH_SPARSEMEM_ENABLE
>> 269 def_bool y if SPARC64
>> 270 select SPARSEMEM_VMEMMAP_ENABLE
381 271
382 endmenu !! 272 config ARCH_SPARSEMEM_DEFAULT
>> 273 def_bool y if SPARC64
383 274
384 config XTENSA_CALIBRATE_CCOUNT !! 275 config ARCH_FORCE_MAX_ORDER
385 def_bool n !! 276 int "Order of maximal physically contiguous allocations"
>> 277 default "12"
386 help 278 help
387 On some platforms (XT2000, for examp !! 279 The kernel page allocator limits the size of maximal physically
388 vary. The frequency can be determin !! 280 contiguous allocations. The limit is called MAX_ORDER and it
389 against a well known, fixed frequenc !! 281 defines the maximal power of two of number of pages that can be
390 !! 282 allocated as a single contiguous block. This option allows
391 config SERIAL_CONSOLE !! 283 overriding the default setting when ability to allocate very
392 def_bool n !! 284 large blocks of physically contiguous memory is required.
393 <<
394 config PLATFORM_HAVE_XIP <<
395 def_bool n <<
396 <<
397 menu "Platform options" <<
398 <<
399 choice <<
400 prompt "Xtensa System Type" <<
401 default XTENSA_PLATFORM_ISS <<
402 285
403 config XTENSA_PLATFORM_ISS !! 286 Don't change if unsure.
404 bool "ISS" <<
405 select XTENSA_CALIBRATE_CCOUNT <<
406 select SERIAL_CONSOLE <<
407 help <<
408 ISS is an acronym for Tensilica's In <<
409 287
410 config XTENSA_PLATFORM_XT2000 !! 288 if SPARC64 || COMPILE_TEST
411 bool "XT2000" !! 289 source "kernel/power/Kconfig"
412 help !! 290 endif
413 XT2000 is the name of Tensilica's fe <<
414 This hardware is capable of running <<
415 291
416 config XTENSA_PLATFORM_XTFPGA !! 292 config SCHED_SMT
417 bool "XTFPGA" !! 293 bool "SMT (Hyperthreading) scheduler support"
418 select ETHOC if ETHERNET !! 294 depends on SPARC64 && SMP
419 select PLATFORM_WANT_DEFAULT_MEM if !M !! 295 default y
420 select SERIAL_CONSOLE <<
421 select XTENSA_CALIBRATE_CCOUNT <<
422 select PLATFORM_HAVE_XIP <<
423 help 296 help
424 XTFPGA is the name of Tensilica boar !! 297 SMT scheduler support improves the CPU scheduler's decision making
425 This hardware is capable of running !! 298 when dealing with SPARC cpus at a cost of slightly increased overhead
426 !! 299 in some places. If unsure say N here.
427 endchoice !! 300
428 !! 301 config SCHED_MC
429 config PLATFORM_NR_IRQS !! 302 bool "Multi-core scheduler support"
430 int !! 303 depends on SPARC64 && SMP
431 default 3 if XTENSA_PLATFORM_XT2000 !! 304 default y
432 default 0 <<
433 <<
434 config XTENSA_CPU_CLOCK <<
435 int "CPU clock rate [MHz]" <<
436 depends on !XTENSA_CALIBRATE_CCOUNT <<
437 default 16 <<
438 <<
439 config GENERIC_CALIBRATE_DELAY <<
440 bool "Auto calibration of the BogoMIPS <<
441 help 305 help
442 The BogoMIPS value can easily be der !! 306 Multi-core scheduler support improves the CPU scheduler's decision
>> 307 making when dealing with multi-core CPU chips at a cost of slightly
>> 308 increased overhead in some places. If unsure say N here.
443 309
444 config CMDLINE_BOOL 310 config CMDLINE_BOOL
445 bool "Default bootloader kernel argume 311 bool "Default bootloader kernel arguments"
>> 312 depends on SPARC64
446 313
447 config CMDLINE 314 config CMDLINE
448 string "Initial kernel command string" 315 string "Initial kernel command string"
449 depends on CMDLINE_BOOL 316 depends on CMDLINE_BOOL
450 default "console=ttyS0,38400 root=/dev !! 317 default "console=ttyS0,9600 root=/dev/sda1"
451 help <<
452 On some architectures (EBSA110 and C <<
453 for the boot loader to pass argument <<
454 architectures, you should supply som <<
455 time by entering them here. As a min <<
456 memory size and the root device (e.g <<
457 <<
458 config USE_OF <<
459 bool "Flattened Device Tree support" <<
460 select OF <<
461 select OF_EARLY_FLATTREE <<
462 help 318 help
463 Include support for flattened device !! 319 Say Y here if you want to be able to pass default arguments to
>> 320 the kernel. This will be overridden by the bootloader, if you
>> 321 use one (such as SILO). This is most useful if you want to boot
>> 322 a kernel from TFTP, and want default options to be available
>> 323 with having them passed on the command line.
464 324
465 config BUILTIN_DTB_SOURCE !! 325 NOTE: This option WILL override the PROM bootargs setting!
466 string "DTB to build into the kernel i <<
467 depends on OF <<
468 326
469 config PARSE_BOOTPARAM !! 327 config SUN_PM
470 bool "Parse bootparam block" !! 328 bool
471 default y !! 329 default y if SPARC32
472 help 330 help
473 Parse parameters passed to the kerne !! 331 Enable power management and CPU standby features on supported
474 be disabled if the kernel is known t !! 332 SPARC platforms.
475 333
476 If unsure, say Y. !! 334 config SPARC_LED
>> 335 tristate "Sun4m LED driver"
>> 336 depends on SPARC32
>> 337 help
>> 338 This driver toggles the front-panel LED on sun4m systems
>> 339 in a user-specifiable manner. Its state can be probed
>> 340 by reading /proc/led and its blinking mode can be changed
>> 341 via writes to /proc/led
477 342
478 choice !! 343 config SERIAL_CONSOLE
479 prompt "Semihosting interface" !! 344 bool
480 default XTENSA_SIMCALL_ISS !! 345 depends on SPARC32
481 depends on XTENSA_PLATFORM_ISS !! 346 default y
482 help 347 help
483 Choose semihosting interface that wi !! 348 If you say Y here, it will be possible to use a serial port as the
484 block device and networking. !! 349 system console (the system console is the device which receives all
>> 350 kernel messages and warnings and which allows logins in single user
>> 351 mode). This could be useful if some terminal or printer is connected
>> 352 to that serial port.
>> 353
>> 354 Even if you say Y here, the currently visible virtual console
>> 355 (/dev/tty0) will still be used as the system console by default, but
>> 356 you can alter that using a kernel command line option such as
>> 357 "console=ttyS1". (Try "man bootparam" or see the documentation of
>> 358 your boot loader (silo) about how to pass options to the kernel at
>> 359 boot time.)
>> 360
>> 361 If you don't have a graphics card installed and you say Y here, the
>> 362 kernel will automatically use the first serial line, /dev/ttyS0, as
>> 363 system console.
485 364
486 config XTENSA_SIMCALL_ISS !! 365 If unsure, say N.
487 bool "simcall" <<
488 help <<
489 Use simcall instruction. simcall is <<
490 it does nothing on hardware. <<
491 366
492 config XTENSA_SIMCALL_GDBIO !! 367 config SPARC_LEON
493 bool "GDBIO" !! 368 bool "Sparc Leon processor family"
>> 369 depends on SPARC32
>> 370 select USB_EHCI_BIG_ENDIAN_MMIO
>> 371 select USB_EHCI_BIG_ENDIAN_DESC
>> 372 select USB_UHCI_BIG_ENDIAN_MMIO
>> 373 select USB_UHCI_BIG_ENDIAN_DESC
>> 374 help
>> 375 If you say Y here if you are running on a SPARC-LEON processor.
>> 376 The LEON processor is a synthesizable VHDL model of the
>> 377 SPARC-v8 standard. LEON is part of the GRLIB collection of
>> 378 IP cores that are distributed under GPL. GRLIB can be downloaded
>> 379 from www.gaisler.com. You can download a sparc-linux cross-compilation
>> 380 toolchain at www.gaisler.com.
>> 381
>> 382 if SPARC_LEON
>> 383 menu "U-Boot options"
>> 384
>> 385 config UBOOT_LOAD_ADDR
>> 386 hex "uImage Load Address"
>> 387 default 0x40004000
>> 388 help
>> 389 U-Boot kernel load address, the address in physical address space
>> 390 where u-boot will place the Linux kernel before booting it.
>> 391 This address is normally the base address of main memory + 0x4000.
>> 392
>> 393 config UBOOT_FLASH_ADDR
>> 394 hex "uImage.o Load Address"
>> 395 default 0x00080000
>> 396 help
>> 397 Optional setting only affecting the uImage.o ELF-image used to
>> 398 download the uImage file to the target using a ELF-loader other than
>> 399 U-Boot. It may for example be used to download an uImage to FLASH with
>> 400 the GRMON utility before even starting u-boot.
>> 401
>> 402 config UBOOT_ENTRY_ADDR
>> 403 hex "uImage Entry Address"
>> 404 default 0xf0004000
494 help 405 help
495 Use break instruction. It is availab !! 406 Do not change this unless you know what you're doing. This is
496 is attached to it via JTAG. !! 407 hardcoded by the SPARC32 and LEON port.
497 408
498 endchoice !! 409 This is the virtual address u-boot jumps to when booting the Linux
>> 410 Kernel.
499 411
500 config BLK_DEV_SIMDISK !! 412 endmenu
501 tristate "Host file-based simulated bl !! 413 endif
502 default n <<
503 depends on XTENSA_PLATFORM_ISS && BLOC <<
504 help <<
505 Create block devices that map to fil <<
506 Device binding to host file may be c <<
507 interface provided the device is not <<
508 414
509 config BLK_DEV_SIMDISK_COUNT !! 415 endmenu
510 int "Number of host file-based simulat <<
511 range 1 10 <<
512 depends on BLK_DEV_SIMDISK <<
513 default 2 <<
514 help <<
515 This is the default minimal number o <<
516 Kernel/module parameter 'simdisk_cou <<
517 value at runtime. More file names (b <<
518 specified as parameters, simdisk_cou <<
519 416
520 config SIMDISK0_FILENAME !! 417 menu "Bus options (PCI etc.)"
521 string "Host filename for the first si !! 418 config SBUS
522 depends on BLK_DEV_SIMDISK = y !! 419 bool
523 default "" !! 420 default y
524 help <<
525 Attach a first simdisk to a host fil <<
526 contains a root file system. <<
527 421
528 config SIMDISK1_FILENAME !! 422 config SBUSCHAR
529 string "Host filename for the second s !! 423 bool
530 depends on BLK_DEV_SIMDISK = y && BLK_ !! 424 default y
531 default "" <<
532 help <<
533 Another simulated disk in a host fil <<
534 storage. <<
535 425
536 config XTFPGA_LCD !! 426 config SUN_LDOMS
537 bool "Enable XTFPGA LCD driver" !! 427 bool "Sun Logical Domains support"
538 depends on XTENSA_PLATFORM_XTFPGA !! 428 depends on SPARC64
539 default n <<
540 help 429 help
541 There's a 2x16 LCD on most of XTFPGA !! 430 Say Y here is you want to support virtual devices via
542 progress messages there during bootu !! 431 Logical Domains.
543 during board bringup. <<
544 <<
545 If unsure, say N. <<
546 <<
547 config XTFPGA_LCD_BASE_ADDR <<
548 hex "XTFPGA LCD base address" <<
549 depends on XTFPGA_LCD <<
550 default "0x0d0c0000" <<
551 help <<
552 Base address of the LCD controller i <<
553 Different boards from XTFPGA family <<
554 addresses. Please consult prototypin <<
555 the correct address. Wrong address h <<
556 <<
557 config XTFPGA_LCD_8BIT_ACCESS <<
558 bool "Use 8-bit access to XTFPGA LCD" <<
559 depends on XTFPGA_LCD <<
560 default n <<
561 help <<
562 LCD may be connected with 4- or 8-bi <<
563 only be used with 8-bit interface. P <<
564 guide for your board for the correct <<
565 <<
566 comment "Kernel memory layout" <<
567 <<
568 config INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX <<
569 bool "Initialize Xtensa MMU inside the <<
570 depends on !XTENSA_VARIANT_FSF && !XTE <<
571 default y if XTENSA_VARIANT_DC233C || <<
572 help <<
573 Earlier version initialized the MMU <<
574 before jumping to _startup in head.S <<
575 it was possible to place a software <<
576 then enter your normal kernel breakp <<
577 to the kernel mappings (0XC0000000). <<
578 <<
579 This unfortunately won't work for U- <<
580 work for using KEXEC to have a hot k <<
581 KDUMP. <<
582 <<
583 So now the MMU is initialized in hea <<
584 use hardware breakpoints (gdb 'hbrea <<
585 xt-gdb can't place a Software Breakp <<
586 to mapping the MMU and after mapping <<
587 was mapped gdb wouldn't remove the b <<
588 PC wouldn't match. Since Hardware Br <<
589 Linux configurations it seems reason <<
590 and leave this older mechanism for u <<
591 not to follow Tensilica's recommenda <<
592 <<
593 Selecting this will cause U-Boot to <<
594 address at 0x00003000 instead of the <<
595 <<
596 If in doubt, say Y. <<
597 <<
598 config XIP_KERNEL <<
599 bool "Kernel Execute-In-Place from ROM <<
600 depends on PLATFORM_HAVE_XIP <<
601 help <<
602 Execute-In-Place allows the kernel t <<
603 directly addressable by the CPU, suc <<
604 space since the text section of the <<
605 to RAM. Read-write sections, such as <<
606 are still copied to RAM. The XIP ker <<
607 it has to run directly from flash, s <<
608 store it. The flash address used to <<
609 and for storing it, is configuration <<
610 say Y here, you must know the proper <<
611 store the kernel image depending on <<
612 <<
613 Also note that the make target becom <<
614 "make Image" or "make uImage". The f <<
615 ROM memory will be arch/xtensa/boot/ <<
616 <<
617 If unsure, say N. <<
618 432
619 config MEMMAP_CACHEATTR !! 433 config PCIC_PCI
620 hex "Cache attributes for the memory a !! 434 bool
621 depends on !MMU !! 435 depends on PCI && SPARC32 && !SPARC_LEON
622 default 0x22222222 !! 436 default y
623 help <<
624 These cache attributes are set up fo <<
625 specifies cache attributes for the c <<
626 region: bits 0..3 -- for addresses 0 <<
627 bits 4..7 -- for addresses 0x2000000 <<
628 <<
629 Cache attribute values are specific <<
630 For region protection MMUs: <<
631 1: WT cached, <<
632 2: cache bypass, <<
633 4: WB cached, <<
634 f: illegal. <<
635 For full MMU: <<
636 bit 0: executable, <<
637 bit 1: writable, <<
638 bits 2..3: <<
639 0: cache bypass, <<
640 1: WB cache, <<
641 2: WT cache, <<
642 3: special (c and e are illegal, <<
643 For MPU: <<
644 0: illegal, <<
645 1: WB cache, <<
646 2: WB, no-write-allocate cache, <<
647 3: WT cache, <<
648 4: cache bypass. <<
649 <<
650 config KSEG_PADDR <<
651 hex "Physical address of the KSEG mapp <<
652 depends on INITIALIZE_XTENSA_MMU_INSID <<
653 default 0x00000000 <<
654 help <<
655 This is the physical address where K <<
656 the chosen KSEG layout help for the <<
657 Unpacked kernel image (including vec <<
658 within KSEG. <<
659 Physical memory below this address i <<
660 <<
661 If unsure, leave the default value h <<
662 <<
663 config KERNEL_VIRTUAL_ADDRESS <<
664 hex "Kernel virtual address" <<
665 depends on MMU && XIP_KERNEL <<
666 default 0xd0003000 <<
667 help <<
668 This is the virtual address where th <<
669 XIP kernel may be mapped into KSEG o <<
670 provided here must match kernel load <<
671 KERNEL_LOAD_ADDRESS. <<
672 <<
673 config KERNEL_LOAD_ADDRESS <<
674 hex "Kernel load address" <<
675 default 0x60003000 if !MMU <<
676 default 0x00003000 if MMU && INITIALIZ <<
677 default 0xd0003000 if MMU && !INITIALI <<
678 help <<
679 This is the address where the kernel <<
680 It is virtual address for MMUv2 conf <<
681 for all other configurations. <<
682 <<
683 If unsure, leave the default value h <<
684 <<
685 choice <<
686 prompt "Relocatable vectors location" <<
687 default XTENSA_VECTORS_IN_TEXT <<
688 help <<
689 Choose whether relocatable vectors a <<
690 or placed separately at runtime. Thi <<
691 configurations without VECBASE regis <<
692 placed at their hardware-defined loc <<
693 <<
694 config XTENSA_VECTORS_IN_TEXT <<
695 bool "Merge relocatable vectors into k <<
696 depends on !MTD_XIP <<
697 help <<
698 This option puts relocatable vectors <<
699 with proper alignment. <<
700 This is a safe choice for most confi <<
701 <<
702 config XTENSA_VECTORS_SEPARATE <<
703 bool "Put relocatable vectors at fixed <<
704 help <<
705 This option puts relocatable vectors <<
706 Vectors are merged with the .init da <<
707 are copied into their designated loc <<
708 Use it to put vectors into IRAM or o <<
709 XIP-aware MTD support. <<
710 <<
711 endchoice <<
712 <<
713 config VECTORS_ADDR <<
714 hex "Kernel vectors virtual address" <<
715 default 0x00000000 <<
716 depends on XTENSA_VECTORS_SEPARATE <<
717 help <<
718 This is the virtual address of the ( <<
719 It must be within KSEG if MMU is use <<
720 <<
721 config XIP_DATA_ADDR <<
722 hex "XIP kernel data virtual address" <<
723 depends on XIP_KERNEL <<
724 default 0x00000000 <<
725 help <<
726 This is the virtual address where XI <<
727 It must be within KSEG if MMU is use <<
728 <<
729 config PLATFORM_WANT_DEFAULT_MEM <<
730 def_bool n <<
731 <<
732 config DEFAULT_MEM_START <<
733 hex <<
734 prompt "PAGE_OFFSET/PHYS_OFFSET" if !M <<
735 default 0x60000000 if PLATFORM_WANT_DE <<
736 default 0x00000000 <<
737 help <<
738 This is the base address used for bo <<
739 in noMMU configurations. <<
740 <<
741 If unsure, leave the default value h <<
742 <<
743 choice <<
744 prompt "KSEG layout" <<
745 depends on MMU <<
746 default XTENSA_KSEG_MMU_V2 <<
747 <<
748 config XTENSA_KSEG_MMU_V2 <<
749 bool "MMUv2: 128MB cached + 128MB unca <<
750 help <<
751 MMUv2 compatible kernel memory map: <<
752 at KSEG_PADDR to 0xd0000000 with cac <<
753 without cache. <<
754 KSEG_PADDR must be aligned to 128MB. <<
755 <<
756 config XTENSA_KSEG_256M <<
757 bool "256MB cached + 256MB uncached" <<
758 depends on INITIALIZE_XTENSA_MMU_INSID <<
759 help <<
760 TLB way 6 maps 256MB starting at KSE <<
761 with cache and to 0xc0000000 without <<
762 KSEG_PADDR must be aligned to 256MB. <<
763 <<
764 config XTENSA_KSEG_512M <<
765 bool "512MB cached + 512MB uncached" <<
766 depends on INITIALIZE_XTENSA_MMU_INSID <<
767 help <<
768 TLB way 6 maps 512MB starting at KSE <<
769 with cache and to 0xc0000000 without <<
770 KSEG_PADDR must be aligned to 256MB. <<
771 437
772 endchoice !! 438 config LEON_PCI
>> 439 bool
>> 440 depends on PCI && SPARC_LEON
>> 441 default y
773 442
774 config HIGHMEM !! 443 config SPARC_GRPCI1
775 bool "High Memory Support" !! 444 bool "GRPCI Host Bridge Support"
776 depends on MMU !! 445 depends on LEON_PCI
777 select KMAP_LOCAL !! 446 default y
778 help 447 help
779 Linux can use the full amount of RAM !! 448 Say Y here to include the GRPCI Host Bridge Driver. The GRPCI
780 default. However, the default MMUv2 !! 449 PCI host controller is typically found in GRLIB SPARC32/LEON
781 lowermost 128 MB of memory linearly !! 450 systems. The driver has one property (all_pci_errors) controlled
782 at 0xd0000000 (cached) and 0xd800000 !! 451 from the bootloader that makes the GRPCI to generate interrupts
783 When there are more than 128 MB memo !! 452 on detected PCI Parity and System errors.
784 all of it can be "permanently mapped !! 453
785 The physical memory that's not perma !! 454 config SPARC_GRPCI2
786 "high memory". !! 455 bool "GRPCI2 Host Bridge Support"
787 !! 456 depends on LEON_PCI
788 If you are compiling a kernel which !! 457 default y
789 machine with more than 128 MB total !! 458 help
790 N here. !! 459 Say Y here to include the GRPCI2 Host Bridge Driver.
791 <<
792 If unsure, say Y. <<
793 460
794 config ARCH_FORCE_MAX_ORDER !! 461 config SUN_OPENPROMFS
795 int "Order of maximal physically conti !! 462 tristate "Openprom tree appears in /proc/openprom"
796 default "10" <<
797 help 463 help
798 The kernel page allocator limits the !! 464 If you say Y, the OpenPROM device tree will be available as a
799 contiguous allocations. The limit is !! 465 virtual file system, which you can mount to /proc/openprom by "mount
800 defines the maximal power of two of !! 466 -t openpromfs none /proc/openprom".
801 allocated as a single contiguous blo <<
802 overriding the default setting when <<
803 large blocks of physically contiguou <<
804 467
805 Don't change if unsure. !! 468 To compile the /proc/openprom support as a module, choose M here: the
>> 469 module will be called openpromfs.
806 470
807 endmenu !! 471 Only choose N if you know in advance that you will not need to modify
>> 472 OpenPROM settings on the running system.
808 473
809 menu "Power management options" !! 474 # Makefile helpers
810 !! 475 config SPARC64_PCI
811 config ARCH_HIBERNATION_POSSIBLE !! 476 bool
812 def_bool y !! 477 default y
>> 478 depends on SPARC64 && PCI
813 479
814 source "kernel/power/Kconfig" !! 480 config SPARC64_PCI_MSI
>> 481 bool
>> 482 default y
>> 483 depends on SPARC64_PCI && PCI_MSI
815 484
816 endmenu 485 endmenu
>> 486
>> 487 config COMPAT
>> 488 bool
>> 489 depends on SPARC64
>> 490 default y
>> 491 select HAVE_UID16
>> 492 select ARCH_WANT_OLD_COMPAT_IPC
>> 493 select COMPAT_OLD_SIGACTION
>> 494
>> 495 source "drivers/sbus/char/Kconfig"
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