1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux 1 2 /* 3 * include/asm-xtensa/swab.h 4 * 5 * This file is subject to the terms and condi 6 * License. See the file "COPYING" in the mai 7 * for more details. 8 * 9 * Copyright (C) 2001 - 2005 Tensilica Inc. 10 */ 11 12 #ifndef _XTENSA_SWAB_H 13 #define _XTENSA_SWAB_H 14 15 #include <linux/types.h> 16 #include <linux/compiler.h> 17 18 #define __SWAB_64_THRU_32__ 19 20 static inline __attribute_const__ __u32 __arch 21 { 22 __u32 res; 23 /* instruction sequence from Xtensa ISA re 24 __asm__("ssai 8 \n\t" 25 "srli %0, %1, 16 \n\t" 26 "src %0, %0, %1 \n\t" 27 "src %0, %0, %0 \n\t" 28 "src %0, %1, %0 \n" 29 : "=&a" (res) 30 : "a" (x) 31 ); 32 return res; 33 } 34 #define __arch_swab32 __arch_swab32 35 36 static inline __attribute_const__ __u16 __arch 37 { 38 /* Given that 'short' values are signed (i 39 * we cannot assume that the upper 16-bits 40 * zero. We are careful to mask values af 41 */ 42 43 /* There exists an anomaly between xt-gcc 44 * inserts an extui instruction after putt 45 * to ensure that it uses only the least-s 46 * the result. xt-xcc doesn't use an extu 47 * __asm__ macro follows convention that t 48 * 'unsigned short' result are still zero. 49 * follow convention; indeed, it leaves ga 50 * bits of the register. 51 52 * Declaring the temporary variables 'res' 53 * types while the return type of the func 54 * forces both compilers to insert exactly 55 * (or equivalent) to mask off the upper 1 56 57 __u32 res; 58 __u32 tmp; 59 60 __asm__("extui %1, %2, 8, 8\n\t" 61 "slli %0, %2, 8 \n\t" 62 "or %0, %0, %1 \n" 63 : "=&a" (res), "=&a" (tmp) 64 : "a" (x) 65 ); 66 67 return res; 68 } 69 #define __arch_swab16 __arch_swab16 70 71 #endif /* _XTENSA_SWAB_H */ 72
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