Linux/arch/xtensa/kernel/vmlinux.lds.S

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

1 /* !! 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 * arch/xtensa/kernel/vmlinux.lds.S << 3 * << 4 * Xtensa linker script << 5 * << 6 * This file is subject to the terms and condi << 7 * License. See the file "COPYING" in the mai << 8 * for more details. << 9 * << 10 * Copyright (C) 2001 - 2008 Tensilica Inc. << 11 * << 12 * Chris Zankel <chris@zankel.net> << 13 * Marc Gauthier <marc@tensilica.com, marc@alum << 14 * Joe Taylor <joe@tensilica.com, joetylr@yahoo << 15 */ << 16 2 >> 3 #define EMITS_PT_NOTE 17 #define RO_EXCEPTION_TABLE_ALIGN 16 4 #define RO_EXCEPTION_TABLE_ALIGN 16 18 5 19 #include <asm-generic/vmlinux.lds.h> 6 #include <asm-generic/vmlinux.lds.h> 20 #include <asm/page.h> << 21 #include <asm/thread_info.h> 7 #include <asm/thread_info.h> >> 8 #include <asm/cache.h> >> 9 #include <asm/page.h> >> 10 #include <asm/setup.h> 22 11 23 #include <asm/core.h> !! 12 OUTPUT_FORMAT("elf64-alpha") 24 #include <asm/vectors.h> !! 13 OUTPUT_ARCH(alpha) 25 !! 14 ENTRY(__start) 26 OUTPUT_ARCH(xtensa) !! 15 PHDRS { text PT_LOAD; note PT_NOTE; } 27 ENTRY(_start) << 28 << 29 #ifdef __XTENSA_EB__ << 30 jiffies = jiffies_64 + 4; << 31 #else << 32 jiffies = jiffies_64; 16 jiffies = jiffies_64; 33 #endif << 34 << 35 /* Note: In the following macros, it would be << 36 vector name and section kind and construct << 37 CPP concatenation, but that does not work r << 38 string with "." produces an invalid token. << 39 warning because it thinks this is an assemb << 40 them as multiple tokens and there may or ma << 41 between them. */ << 42 << 43 /* Macro for a relocation entry */ << 44 << 45 #define RELOCATE_ENTRY(sym, section) << 46 LONG(sym ## _start); << 47 LONG(sym ## _end); << 48 LONG(LOADADDR(section)) << 49 << 50 #if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAV << 51 #define MERGED_VECTORS 1 << 52 #else << 53 #define MERGED_VECTORS 0 << 54 #endif << 55 << 56 /* << 57 * Macro to define a section for a vector. Whe << 58 * code for every vector is located with other << 59 * time head.S copies code for every vector to << 60 * to description recorded in the correspondin << 61 */ << 62 << 63 #define SECTION_VECTOR4(sym, section, addr, pr << 64 section addr : AT(((LOADADDR(prevsec) + SIZE << 65 { << 66 . = ALIGN(4); << 67 sym ## _start = ABSOLUTE(.); << 68 *(section) << 69 sym ## _end = ABSOLUTE(.); << 70 } << 71 << 72 #define SECTION_VECTOR2(section, addr) << 73 . = addr; << 74 *(section) << 75 << 76 /* << 77 * Mapping of input sections to output sectio << 78 */ << 79 << 80 SECTIONS 17 SECTIONS 81 { 18 { 82 . = KERNELOFFSET; !! 19 #ifdef CONFIG_ALPHA_LEGACY_START_ADDRESS 83 /* .text section */ !! 20 . = 0xfffffc0000310000; 84 << 85 _text = .; << 86 _stext = .; << 87 << 88 .text : << 89 { << 90 /* The HEAD_TEXT section must be the first << 91 HEAD_TEXT << 92 << 93 #if MERGED_VECTORS << 94 . = ALIGN(PAGE_SIZE); << 95 _vecbase = .; << 96 << 97 #ifdef SUPPORT_WINDOWED << 98 SECTION_VECTOR2 (.WindowVectors.text, WIND << 99 #endif << 100 #if XCHAL_EXCM_LEVEL >= 2 << 101 SECTION_VECTOR2 (.Level2InterruptVector.te << 102 #endif << 103 #if XCHAL_EXCM_LEVEL >= 3 << 104 SECTION_VECTOR2 (.Level3InterruptVector.te << 105 #endif << 106 #if XCHAL_EXCM_LEVEL >= 4 << 107 SECTION_VECTOR2 (.Level4InterruptVector.te << 108 #endif << 109 #if XCHAL_EXCM_LEVEL >= 5 << 110 SECTION_VECTOR2 (.Level5InterruptVector.te << 111 #endif << 112 #if XCHAL_EXCM_LEVEL >= 6 << 113 SECTION_VECTOR2 (.Level6InterruptVector.te << 114 #endif << 115 SECTION_VECTOR2 (.DebugInterruptVector.tex << 116 SECTION_VECTOR2 (.KernelExceptionVector.te << 117 SECTION_VECTOR2 (.UserExceptionVector.text << 118 SECTION_VECTOR2 (.DoubleExceptionVector.te << 119 << 120 *(.exception.text) << 121 *(.xiptext) << 122 #endif << 123 << 124 IRQENTRY_TEXT << 125 SOFTIRQENTRY_TEXT << 126 ENTRY_TEXT << 127 TEXT_TEXT << 128 SCHED_TEXT << 129 LOCK_TEXT << 130 *(.fixup) << 131 } << 132 _etext = .; << 133 PROVIDE (etext = .); << 134 << 135 . = ALIGN(16); << 136 << 137 RO_DATA(4096) << 138 << 139 /* Data section */ << 140 << 141 #ifdef CONFIG_XIP_KERNEL << 142 INIT_TEXT_SECTION(PAGE_SIZE) << 143 #else 21 #else 144 _sdata = .; !! 22 . = 0xfffffc0001010000; 145 RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, TH << 146 _edata = .; << 147 << 148 /* Initialization code and data: */ << 149 << 150 . = ALIGN(PAGE_SIZE); << 151 __init_begin = .; << 152 INIT_TEXT_SECTION(PAGE_SIZE) << 153 << 154 .init.data : << 155 { << 156 INIT_DATA << 157 } << 158 #endif << 159 << 160 .init.rodata : << 161 { << 162 . = ALIGN(0x4); << 163 __tagtable_begin = .; << 164 *(.taglist) << 165 __tagtable_end = .; << 166 << 167 . = ALIGN(16); << 168 __boot_reloc_table_start = ABSOLUTE(.); << 169 << 170 #if !MERGED_VECTORS << 171 #ifdef SUPPORT_WINDOWED << 172 RELOCATE_ENTRY(_WindowVectors_text, << 173 .WindowVectors.text); << 174 #endif << 175 #if XCHAL_EXCM_LEVEL >= 2 << 176 RELOCATE_ENTRY(_Level2InterruptVector_text << 177 .Level2InterruptVector.text << 178 #endif << 179 #if XCHAL_EXCM_LEVEL >= 3 << 180 RELOCATE_ENTRY(_Level3InterruptVector_text << 181 .Level3InterruptVector.text << 182 #endif << 183 #if XCHAL_EXCM_LEVEL >= 4 << 184 RELOCATE_ENTRY(_Level4InterruptVector_text << 185 .Level4InterruptVector.text << 186 #endif << 187 #if XCHAL_EXCM_LEVEL >= 5 << 188 RELOCATE_ENTRY(_Level5InterruptVector_text << 189 .Level5InterruptVector.text << 190 #endif << 191 #if XCHAL_EXCM_LEVEL >= 6 << 192 RELOCATE_ENTRY(_Level6InterruptVector_text << 193 .Level6InterruptVector.text << 194 #endif 23 #endif 195 RELOCATE_ENTRY(_KernelExceptionVector_text << 196 .KernelExceptionVector.text << 197 RELOCATE_ENTRY(_UserExceptionVector_text, << 198 .UserExceptionVector.text); << 199 RELOCATE_ENTRY(_DoubleExceptionVector_text << 200 .DoubleExceptionVector.text << 201 RELOCATE_ENTRY(_DebugInterruptVector_text, << 202 .DebugInterruptVector.text) << 203 RELOCATE_ENTRY(_exception_text, << 204 .exception.text); << 205 #ifdef CONFIG_XIP_KERNEL << 206 RELOCATE_ENTRY(_xip_text, .xiptext); << 207 #endif << 208 #endif << 209 #ifdef CONFIG_XIP_KERNEL << 210 RELOCATE_ENTRY(_xip_data, .data); << 211 RELOCATE_ENTRY(_xip_init_data, .init.data) << 212 #endif << 213 #if defined(CONFIG_SECONDARY_RESET_VECTOR) << 214 RELOCATE_ENTRY(_SecondaryResetVector_text, << 215 .SecondaryResetVector.text) << 216 #endif << 217 << 218 __boot_reloc_table_end = ABSOLUTE(.) ; << 219 << 220 INIT_SETUP(XCHAL_ICACHE_LINESIZE) << 221 INIT_CALLS << 222 CON_INITCALL << 223 INIT_RAM_FS << 224 } << 225 << 226 PERCPU_SECTION(XCHAL_ICACHE_LINESIZE) << 227 << 228 /* We need this dummy segment here */ << 229 << 230 . = ALIGN(4); << 231 .dummy : { LONG(0) } << 232 << 233 #undef LAST << 234 #define LAST .dummy << 235 << 236 #if !MERGED_VECTORS << 237 /* The vectors are relocated to the real pos << 238 << 239 #ifdef SUPPORT_WINDOWED << 240 SECTION_VECTOR4 (_WindowVectors_text, << 241 .WindowVectors.text, << 242 WINDOW_VECTORS_VADDR, << 243 LAST) << 244 #undef LAST << 245 #define LAST .WindowVectors.text << 246 #endif << 247 SECTION_VECTOR4 (_DebugInterruptVector_text, << 248 .DebugInterruptVector.text, << 249 DEBUG_VECTOR_VADDR, << 250 LAST) << 251 #undef LAST << 252 #define LAST .DebugInterruptVector.text << 253 #if XCHAL_EXCM_LEVEL >= 2 << 254 SECTION_VECTOR4 (_Level2InterruptVector_text << 255 .Level2InterruptVector.text, << 256 INTLEVEL2_VECTOR_VADDR, << 257 LAST) << 258 # undef LAST << 259 # define LAST .Level2InterruptVector.text << 260 #endif << 261 #if XCHAL_EXCM_LEVEL >= 3 << 262 SECTION_VECTOR4 (_Level3InterruptVector_text << 263 .Level3InterruptVector.text, << 264 INTLEVEL3_VECTOR_VADDR, << 265 LAST) << 266 # undef LAST << 267 # define LAST .Level3InterruptVector.text << 268 #endif << 269 #if XCHAL_EXCM_LEVEL >= 4 << 270 SECTION_VECTOR4 (_Level4InterruptVector_text << 271 .Level4InterruptVector.text, << 272 INTLEVEL4_VECTOR_VADDR, << 273 LAST) << 274 # undef LAST << 275 # define LAST .Level4InterruptVector.text << 276 #endif << 277 #if XCHAL_EXCM_LEVEL >= 5 << 278 SECTION_VECTOR4 (_Level5InterruptVector_text << 279 .Level5InterruptVector.text, << 280 INTLEVEL5_VECTOR_VADDR, << 281 LAST) << 282 # undef LAST << 283 # define LAST .Level5InterruptVector.text << 284 #endif << 285 #if XCHAL_EXCM_LEVEL >= 6 << 286 SECTION_VECTOR4 (_Level6InterruptVector_text << 287 .Level6InterruptVector.text, << 288 INTLEVEL6_VECTOR_VADDR, << 289 LAST) << 290 # undef LAST << 291 # define LAST .Level6InterruptVector.text << 292 #endif << 293 SECTION_VECTOR4 (_KernelExceptionVector_text << 294 .KernelExceptionVector.text, << 295 KERNEL_VECTOR_VADDR, << 296 LAST) << 297 #undef LAST << 298 SECTION_VECTOR4 (_UserExceptionVector_text, << 299 .UserExceptionVector.text, << 300 USER_VECTOR_VADDR, << 301 .KernelExceptionVector.text) << 302 SECTION_VECTOR4 (_DoubleExceptionVector_text << 303 .DoubleExceptionVector.text, << 304 DOUBLEEXC_VECTOR_VADDR, << 305 .UserExceptionVector.text) << 306 #define LAST .DoubleExceptionVector.text << 307 << 308 #endif << 309 #if defined(CONFIG_SECONDARY_RESET_VECTOR) << 310 << 311 SECTION_VECTOR4 (_SecondaryResetVector_text, << 312 .SecondaryResetVector.text, << 313 RESET_VECTOR1_VADDR, << 314 LAST) << 315 #undef LAST << 316 #define LAST .SecondaryResetVector.text << 317 << 318 #endif << 319 #if !MERGED_VECTORS << 320 SECTION_VECTOR4 (_exception_text, << 321 .exception.text, << 322 , << 323 LAST) << 324 #undef LAST << 325 #define LAST .exception.text << 326 SECTION_VECTOR4 (_xip_text, << 327 .xiptext, << 328 , << 329 LAST) << 330 #undef LAST << 331 #define LAST .xiptext << 332 #endif << 333 . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ << 334 << 335 .dummy1 : AT(ADDR(.dummy1)) { LONG(0) } << 336 . = ALIGN(PAGE_SIZE); << 337 << 338 #ifndef CONFIG_XIP_KERNEL << 339 __init_end = .; << 340 << 341 BSS_SECTION(0, 8192, 0) << 342 #endif << 343 << 344 _end = .; << 345 << 346 #ifdef CONFIG_XIP_KERNEL << 347 . = CONFIG_XIP_DATA_ADDR; << 348 << 349 _xip_start = .; << 350 << 351 #undef LOAD_OFFSET << 352 #define LOAD_OFFSET \ << 353 (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + << 354 << 355 _xip_data_start = .; << 356 _sdata = .; << 357 RW_DATA(XCHAL_ICACHE_LINESIZE, PAGE_SIZE, TH << 358 _edata = .; << 359 _xip_data_end = .; << 360 << 361 /* Initialization data: */ << 362 << 363 STRUCT_ALIGN(); << 364 << 365 _xip_init_data_start = .; << 366 __init_begin = .; << 367 .init.data : << 368 { << 369 INIT_DATA << 370 } << 371 _xip_init_data_end = .; << 372 __init_end = .; << 373 BSS_SECTION(0, 8192, 0) << 374 << 375 _xip_end = .; << 376 << 377 #undef LOAD_OFFSET << 378 #endif << 379 << 380 DWARF_DEBUG << 381 24 382 .xt.prop 0 : { KEEP(*(.xt.prop .xt.prop.* .g !! 25 _text = .; /* Text and read-only data */ 383 .xt.insn 0 : { KEEP(*(.xt.insn .xt.insn.* .g !! 26 .text : { 384 .xt.lit 0 : { KEEP(*(.xt.lit .xt.lit.* .g !! 27 HEAD_TEXT >> 28 TEXT_TEXT >> 29 SCHED_TEXT >> 30 LOCK_TEXT >> 31 *(.fixup) >> 32 *(.gnu.warning) >> 33 } :text >> 34 swapper_pg_dir = SWAPPER_PGD; >> 35 _etext = .; /* End of text section */ >> 36 >> 37 RO_DATA(4096) >> 38 >> 39 /* Will be freed after init */ >> 40 __init_begin = ALIGN(PAGE_SIZE); >> 41 INIT_TEXT_SECTION(PAGE_SIZE) >> 42 INIT_DATA_SECTION(16) >> 43 PERCPU_SECTION(L1_CACHE_BYTES) >> 44 /* Align to THREAD_SIZE rather than PAGE_SIZE here so any padding page >> 45 needed for the THREAD_SIZE aligned init_task gets freed after init */ >> 46 . = ALIGN(THREAD_SIZE); >> 47 __init_end = .; >> 48 /* Freed after init ends here */ >> 49 >> 50 _sdata = .; /* Start of rw data section */ >> 51 _data = .; >> 52 RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) >> 53 >> 54 .got : { >> 55 *(.got) >> 56 } >> 57 .sdata : { >> 58 *(.sdata) >> 59 } >> 60 _edata = .; /* End of data section */ >> 61 >> 62 BSS_SECTION(0, 0, 0) >> 63 _end = .; >> 64 >> 65 .mdebug 0 : { >> 66 *(.mdebug) >> 67 } >> 68 .note 0 : { >> 69 *(.note) >> 70 } >> 71 >> 72 STABS_DEBUG >> 73 DWARF_DEBUG >> 74 ELF_DETAILS 385 75 386 /* Sections to be discarded */ !! 76 DISCARDS 387 DISCARDS << 388 } 77 }

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

TOMOYO Linux Cross Reference
Linux/arch/xtensa/kernel/vmlinux.lds.S

Diff markup

Differences between /arch/xtensa/kernel/vmlinux.lds.S (Architecture m68k) and /arch/alpha/kernel/vmlinux.lds.S (Architecture alpha)

TOMOYO Linux Cross Reference Linux/arch/xtensa/kernel/vmlinux.lds.S

Diff markup

Differences between /arch/xtensa/kernel/vmlinux.lds.S (Architecture m68k) and /arch/alpha/kernel/vmlinux.lds.S (Architecture alpha)

TOMOYO Linux Cross Reference
Linux/arch/xtensa/kernel/vmlinux.lds.S