1 /* SPDX-License-Identifier: BSD-3-Clause OR GP <<
2 /********************************************* 1 /******************************************************************************
3 * 2 *
4 * Name: actbl1.h - Additional ACPI table defi !! 3 * Name: actbl1.h - ACPI 1.0 tables
5 * <<
6 * Copyright (C) 2000 - 2023, Intel Corp. <<
7 * 4 *
8 ********************************************* 5 *****************************************************************************/
9 6
10 #ifndef __ACTBL1_H__ <<
11 #define __ACTBL1_H__ <<
12 <<
13 /********************************************* <<
14 * <<
15 * Additional ACPI Tables <<
16 * <<
17 * These tables are not consumed directly by t <<
18 * included here to support device drivers and <<
19 * <<
20 ********************************************* <<
21 <<
22 /* 7 /*
23 * Values for description table header signatu !! 8 * Copyright (C) 2000 - 2003, R. Byron Moore
24 * file. Useful because they make it more diff !! 9 * All rights reserved.
25 * the wrong signature. <<
26 */ <<
27 #define ACPI_SIG_AEST "AEST" /* Arm <<
28 #define ACPI_SIG_ASF "ASF!" /* Ale <<
29 #define ACPI_SIG_ASPT "ASPT" /* AMD <<
30 #define ACPI_SIG_BERT "BERT" /* Boo <<
31 #define ACPI_SIG_BGRT "BGRT" /* Boo <<
32 #define ACPI_SIG_BOOT "BOOT" /* Sim <<
33 #define ACPI_SIG_CEDT "CEDT" /* CXL <<
34 #define ACPI_SIG_CPEP "CPEP" /* Cor <<
35 #define ACPI_SIG_CSRT "CSRT" /* Cor <<
36 #define ACPI_SIG_DBG2 "DBG2" /* Deb <<
37 #define ACPI_SIG_DBGP "DBGP" /* Deb <<
38 #define ACPI_SIG_DMAR "DMAR" /* DMA <<
39 #define ACPI_SIG_DRTM "DRTM" /* Dyn <<
40 #define ACPI_SIG_ECDT "ECDT" /* Emb <<
41 #define ACPI_SIG_EINJ "EINJ" /* Err <<
42 #define ACPI_SIG_ERST "ERST" /* Err <<
43 #define ACPI_SIG_FPDT "FPDT" /* Fir <<
44 #define ACPI_SIG_GTDT "GTDT" /* Gen <<
45 #define ACPI_SIG_HEST "HEST" /* Har <<
46 #define ACPI_SIG_HMAT "HMAT" /* Het <<
47 #define ACPI_SIG_HPET "HPET" /* Hig <<
48 #define ACPI_SIG_IBFT "IBFT" /* iSC <<
49 #define ACPI_SIG_MSCT "MSCT" /* Max <<
50 <<
51 #define ACPI_SIG_S3PT "S3PT" /* S3 <<
52 #define ACPI_SIG_PCCS "PCC" /* PCC <<
53 <<
54 #define ACPI_SIG_NBFT "NBFT" /* NVM <<
55 <<
56 /* Reserved table signatures */ <<
57 <<
58 #define ACPI_SIG_MATR "MATR" /* Mem <<
59 #define ACPI_SIG_MSDM "MSDM" /* Mic <<
60 <<
61 /* <<
62 * These tables have been seen in the field, b <<
63 */ <<
64 #ifdef ACPI_UNDEFINED_TABLES <<
65 #define ACPI_SIG_ATKG "ATKG" <<
66 #define ACPI_SIG_GSCI "GSCI" /* GMC <<
67 #define ACPI_SIG_IEIT "IEIT" <<
68 #endif <<
69 <<
70 /* <<
71 * All tables must be byte-packed to match the <<
72 * the tables are provided by the system BIOS. <<
73 */ <<
74 #pragma pack(1) <<
75 <<
76 /* <<
77 * Note: C bitfields are not used for this rea <<
78 * 10 *
79 * "Bitfields are great and easy to read, but !! 11 * Redistribution and use in source and binary forms, with or without
80 * does not specify the layout of bitfields in !! 12 * modification, are permitted provided that the following conditions
81 * essentially useless for dealing with packed !! 13 * are met:
82 * binary wire protocols." (Or ACPI tables and !! 14 * 1. Redistributions of source code must retain the above copyright
83 * this decision was a design error in C. Ritc !! 15 * notice, this list of conditions, and the following disclaimer,
84 * and stuck with it." Norman Ramsey. !! 16 * without modification.
85 * See http://stackoverflow.com/a/1053662/4166 !! 17 * 2. Redistributions in binary form must reproduce at minimum a disclaimer
>> 18 * substantially similar to the "NO WARRANTY" disclaimer below
>> 19 * ("Disclaimer") and any redistribution must be conditioned upon
>> 20 * including a substantially similar Disclaimer requirement for further
>> 21 * binary redistribution.
>> 22 * 3. Neither the names of the above-listed copyright holders nor the names
>> 23 * of any contributors may be used to endorse or promote products derived
>> 24 * from this software without specific prior written permission.
>> 25 *
>> 26 * Alternatively, this software may be distributed under the terms of the
>> 27 * GNU General Public License ("GPL") version 2 as published by the Free
>> 28 * Software Foundation.
>> 29 *
>> 30 * NO WARRANTY
>> 31 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
>> 32 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
>> 33 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
>> 34 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
>> 35 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
>> 36 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
>> 37 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
>> 38 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
>> 39 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
>> 40 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
>> 41 * POSSIBILITY OF SUCH DAMAGES.
86 */ 42 */
87 43
88 /********************************************* !! 44 #ifndef __ACTBL1_H__
89 * !! 45 #define __ACTBL1_H__
90 * Common subtable headers <<
91 * <<
92 ********************************************* <<
93 <<
94 /* Generic subtable header (used in MADT, SRAT <<
95 <<
96 struct acpi_subtable_header { <<
97 u8 type; <<
98 u8 length; <<
99 }; <<
100 <<
101 /* Subtable header for WHEA tables (EINJ, ERST <<
102 <<
103 struct acpi_whea_header { <<
104 u8 action; <<
105 u8 instruction; <<
106 u8 flags; <<
107 u8 reserved; <<
108 struct acpi_generic_address register_r <<
109 u64 value; /* Value used <<
110 u64 mask; /* Bitmask req <<
111 }; <<
112 <<
113 /* https://docs.microsoft.com/en-us/windows-ha <<
114 #define ASPT_REVISION_ID 0x01 <<
115 struct acpi_table_aspt { <<
116 struct acpi_table_header header; <<
117 u32 num_entries; <<
118 }; <<
119 <<
120 struct acpi_aspt_header { <<
121 u16 type; <<
122 u16 length; <<
123 }; <<
124 <<
125 enum acpi_aspt_type { <<
126 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, <<
127 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, <<
128 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, <<
129 }; <<
130 <<
131 /* 0: ASPT Global Registers */ <<
132 struct acpi_aspt_global_regs { <<
133 struct acpi_aspt_header header; <<
134 u32 reserved; <<
135 u64 feature_reg_addr; <<
136 u64 irq_en_reg_addr; <<
137 u64 irq_st_reg_addr; <<
138 }; <<
139 <<
140 /* 1: ASPT SEV Mailbox Registers */ <<
141 struct acpi_aspt_sev_mbox_regs { <<
142 struct acpi_aspt_header header; <<
143 u8 mbox_irq_id; <<
144 u8 reserved[3]; <<
145 u64 cmd_resp_reg_addr; <<
146 u64 cmd_buf_lo_reg_addr; <<
147 u64 cmd_buf_hi_reg_addr; <<
148 }; <<
149 <<
150 /* 2: ASPT ACPI Mailbox Registers */ <<
151 struct acpi_aspt_acpi_mbox_regs { <<
152 struct acpi_aspt_header header; <<
153 u32 reserved1; <<
154 u64 cmd_resp_reg_addr; <<
155 u64 reserved2[2]; <<
156 }; <<
157 <<
158 /********************************************* <<
159 * <<
160 * ASF - Alert Standard Format table (Signatur <<
161 * Revision 0x10 <<
162 * <<
163 * Conforms to the Alert Standard Format Speci <<
164 * <<
165 ********************************************* <<
166 <<
167 struct acpi_table_asf { <<
168 struct acpi_table_header header; <<
169 }; <<
170 <<
171 /* ASF subtable header */ <<
172 <<
173 struct acpi_asf_header { <<
174 u8 type; <<
175 u8 reserved; <<
176 u16 length; <<
177 }; <<
178 <<
179 /* Values for Type field above */ <<
180 <<
181 enum acpi_asf_type { <<
182 ACPI_ASF_TYPE_INFO = 0, <<
183 ACPI_ASF_TYPE_ALERT = 1, <<
184 ACPI_ASF_TYPE_CONTROL = 2, <<
185 ACPI_ASF_TYPE_BOOT = 3, <<
186 ACPI_ASF_TYPE_ADDRESS = 4, <<
187 ACPI_ASF_TYPE_RESERVED = 5 <<
188 }; <<
189 <<
190 /* <<
191 * ASF subtables <<
192 */ <<
193 <<
194 /* 0: ASF Information */ <<
195 <<
196 struct acpi_asf_info { <<
197 struct acpi_asf_header header; <<
198 u8 min_reset_value; <<
199 u8 min_poll_interval; <<
200 u16 system_id; <<
201 u32 mfg_id; <<
202 u8 flags; <<
203 u8 reserved2[3]; <<
204 }; <<
205 <<
206 /* Masks for Flags field above */ <<
207 <<
208 #define ACPI_ASF_SMBUS_PROTOCOLS (1) <<
209 <<
210 /* 1: ASF Alerts */ <<
211 <<
212 struct acpi_asf_alert { <<
213 struct acpi_asf_header header; <<
214 u8 assert_mask; <<
215 u8 deassert_mask; <<
216 u8 alerts; <<
217 u8 data_length; <<
218 }; <<
219 <<
220 struct acpi_asf_alert_data { <<
221 u8 address; <<
222 u8 command; <<
223 u8 mask; <<
224 u8 value; <<
225 u8 sensor_type; <<
226 u8 type; <<
227 u8 offset; <<
228 u8 source_type; <<
229 u8 severity; <<
230 u8 sensor_number; <<
231 u8 entity; <<
232 u8 instance; <<
233 }; <<
234 <<
235 /* 2: ASF Remote Control */ <<
236 <<
237 struct acpi_asf_remote { <<
238 struct acpi_asf_header header; <<
239 u8 controls; <<
240 u8 data_length; <<
241 u16 reserved2; <<
242 }; <<
243 <<
244 struct acpi_asf_control_data { <<
245 u8 function; <<
246 u8 address; <<
247 u8 command; <<
248 u8 value; <<
249 }; <<
250 <<
251 /* 3: ASF RMCP Boot Options */ <<
252 <<
253 struct acpi_asf_rmcp { <<
254 struct acpi_asf_header header; <<
255 u8 capabilities[7]; <<
256 u8 completion_code; <<
257 u32 enterprise_id; <<
258 u8 command; <<
259 u16 parameter; <<
260 u16 boot_options; <<
261 u16 oem_parameters; <<
262 }; <<
263 <<
264 /* 4: ASF Address */ <<
265 <<
266 struct acpi_asf_address { <<
267 struct acpi_asf_header header; <<
268 u8 eprom_address; <<
269 u8 devices; <<
270 }; <<
271 <<
272 /********************************************* <<
273 * <<
274 * BERT - Boot Error Record Table (ACPI 4.0) <<
275 * Version 1 <<
276 * <<
277 ********************************************* <<
278 <<
279 struct acpi_table_bert { <<
280 struct acpi_table_header header; <<
281 u32 region_length; /* Length of t <<
282 u64 address; /* Physical ad <<
283 }; <<
284 <<
285 /* Boot Error Region (not a subtable, pointed <<
286 <<
287 struct acpi_bert_region { <<
288 u32 block_status; /* Type of err <<
289 u32 raw_data_offset; /* Offset to r <<
290 u32 raw_data_length; /* Length of r <<
291 u32 data_length; /* Length of g <<
292 u32 error_severity; /* Severity co <<
293 }; <<
294 <<
295 /* Values for block_status flags above */ <<
296 <<
297 #define ACPI_BERT_UNCORRECTABLE (1 <<
298 #define ACPI_BERT_CORRECTABLE (1 <<
299 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1 <<
300 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1 <<
301 #define ACPI_BERT_ERROR_ENTRY_COUNT (0 <<
302 <<
303 /* Values for error_severity above */ <<
304 <<
305 enum acpi_bert_error_severity { <<
306 ACPI_BERT_ERROR_CORRECTABLE = 0, <<
307 ACPI_BERT_ERROR_FATAL = 1, <<
308 ACPI_BERT_ERROR_CORRECTED = 2, <<
309 ACPI_BERT_ERROR_NONE = 3, <<
310 ACPI_BERT_ERROR_RESERVED = 4 /* 4 a <<
311 }; <<
312 <<
313 /* <<
314 * Note: The generic error data that follows t <<
315 * uses the struct acpi_hest_generic_data defi <<
316 */ <<
317 <<
318 /********************************************* <<
319 * <<
320 * BGRT - Boot Graphics Resource Table (ACPI 5 <<
321 * Version 1 <<
322 * <<
323 ********************************************* <<
324 <<
325 struct acpi_table_bgrt { <<
326 struct acpi_table_header header; <<
327 u16 version; <<
328 u8 status; <<
329 u8 image_type; <<
330 u64 image_address; <<
331 u32 image_offset_x; <<
332 u32 image_offset_y; <<
333 }; <<
334 <<
335 /* Flags for Status field above */ <<
336 <<
337 #define ACPI_BGRT_DISPLAYED (1 <<
338 #define ACPI_BGRT_ORIENTATION_OFFSET (3 <<
339 <<
340 /********************************************* <<
341 * <<
342 * BOOT - Simple Boot Flag Table <<
343 * Version 1 <<
344 * <<
345 * Conforms to the "Simple Boot Flag Specifica <<
346 * <<
347 ********************************************* <<
348 <<
349 struct acpi_table_boot { <<
350 struct acpi_table_header header; <<
351 u8 cmos_index; /* Index in CM <<
352 u8 reserved[3]; <<
353 }; <<
354 <<
355 /********************************************* <<
356 * <<
357 * CDAT - Coherent Device Attribute Table <<
358 * Version 1 <<
359 * <<
360 * Conforms to the "Coherent Device Attribute <<
361 " (Revision 1.01, October 2020.) <<
362 * <<
363 ********************************************* <<
364 <<
365 struct acpi_table_cdat { <<
366 u32 length; /* Length of t <<
367 u8 revision; /* ACPI Specif <<
368 u8 checksum; /* To make sum <<
369 u8 reserved[6]; <<
370 u32 sequence; /* Used to det <<
371 }; <<
372 <<
373 /* CDAT common subtable header */ <<
374 <<
375 struct acpi_cdat_header { <<
376 u8 type; <<
377 u8 reserved; <<
378 u16 length; <<
379 }; <<
380 <<
381 /* Values for Type field above */ <<
382 <<
383 enum acpi_cdat_type { <<
384 ACPI_CDAT_TYPE_DSMAS = 0, <<
385 ACPI_CDAT_TYPE_DSLBIS = 1, <<
386 ACPI_CDAT_TYPE_DSMSCIS = 2, <<
387 ACPI_CDAT_TYPE_DSIS = 3, <<
388 ACPI_CDAT_TYPE_DSEMTS = 4, <<
389 ACPI_CDAT_TYPE_SSLBIS = 5, <<
390 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 t <<
391 }; <<
392 <<
393 /* Subtable 0: Device Scoped Memory Affinity S <<
394 <<
395 struct acpi_cdat_dsmas { <<
396 u8 dsmad_handle; <<
397 u8 flags; <<
398 u16 reserved; <<
399 u64 dpa_base_address; <<
400 u64 dpa_length; <<
401 }; <<
402 <<
403 /* Flags for subtable above */ <<
404 <<
405 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 <<
406 <<
407 /* Subtable 1: Device scoped Latency and Bandw <<
408 <<
409 struct acpi_cdat_dslbis { <<
410 u8 handle; <<
411 u8 flags; /* If Handle m <<
412 * Flags field <<
413 u8 data_type; <<
414 u8 reserved; <<
415 u64 entry_base_unit; <<
416 u16 entry[3]; <<
417 u16 reserved2; <<
418 }; <<
419 <<
420 /* Subtable 2: Device Scoped Memory Side Cache <<
421 <<
422 struct acpi_cdat_dsmscis { <<
423 u8 dsmas_handle; <<
424 u8 reserved[3]; <<
425 u64 side_cache_size; <<
426 u32 cache_attributes; <<
427 }; <<
428 <<
429 /* Subtable 3: Device Scoped Initiator Structu <<
430 <<
431 struct acpi_cdat_dsis { <<
432 u8 flags; <<
433 u8 handle; <<
434 u16 reserved; <<
435 }; <<
436 <<
437 /* Flags for above subtable */ <<
438 <<
439 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 <<
440 <<
441 /* Subtable 4: Device Scoped EFI Memory Type S <<
442 <<
443 struct acpi_cdat_dsemts { <<
444 u8 dsmas_handle; <<
445 u8 memory_type; <<
446 u16 reserved; <<
447 u64 dpa_offset; <<
448 u64 range_length; <<
449 }; <<
450 <<
451 /* Subtable 5: Switch Scoped Latency and Bandw <<
452 <<
453 struct acpi_cdat_sslbis { <<
454 u8 data_type; <<
455 u8 reserved[3]; <<
456 u64 entry_base_unit; <<
457 }; <<
458 <<
459 /* Sub-subtable for above, sslbe_entries field <<
460 <<
461 struct acpi_cdat_sslbe { <<
462 u16 portx_id; <<
463 u16 porty_id; <<
464 u16 latency_or_bandwidth; <<
465 u16 reserved; <<
466 }; <<
467 <<
468 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 <<
469 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff <<
470 <<
471 /********************************************* <<
472 * <<
473 * CEDT - CXL Early Discovery Table <<
474 * Version 1 <<
475 * <<
476 * Conforms to the "CXL Early Discovery Table" <<
477 * <<
478 ********************************************* <<
479 <<
480 struct acpi_table_cedt { <<
481 struct acpi_table_header header; <<
482 }; <<
483 <<
484 /* CEDT subtable header (Performance Record St <<
485 <<
486 struct acpi_cedt_header { <<
487 u8 type; <<
488 u8 reserved; <<
489 u16 length; <<
490 }; <<
491 <<
492 /* Values for Type field above */ <<
493 <<
494 enum acpi_cedt_type { <<
495 ACPI_CEDT_TYPE_CHBS = 0, <<
496 ACPI_CEDT_TYPE_CFMWS = 1, <<
497 ACPI_CEDT_TYPE_CXIMS = 2, <<
498 ACPI_CEDT_TYPE_RDPAS = 3, <<
499 ACPI_CEDT_TYPE_RESERVED = 4, <<
500 }; <<
501 <<
502 /* Values for version field above */ <<
503 <<
504 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) <<
505 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) <<
506 <<
507 /* Values for length field above */ <<
508 <<
509 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x200 <<
510 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x100 <<
511 <<
512 /* <<
513 * CEDT subtables <<
514 */ <<
515 <<
516 /* 0: CXL Host Bridge Structure */ <<
517 <<
518 struct acpi_cedt_chbs { <<
519 struct acpi_cedt_header header; <<
520 u32 uid; <<
521 u32 cxl_version; <<
522 u32 reserved; <<
523 u64 base; <<
524 u64 length; <<
525 }; <<
526 <<
527 /* 1: CXL Fixed Memory Window Structure */ <<
528 <<
529 struct acpi_cedt_cfmws { <<
530 struct acpi_cedt_header header; <<
531 u32 reserved1; <<
532 u64 base_hpa; <<
533 u64 window_size; <<
534 u8 interleave_ways; <<
535 u8 interleave_arithmetic; <<
536 u16 reserved2; <<
537 u32 granularity; <<
538 u16 restrictions; <<
539 u16 qtg_id; <<
540 u32 interleave_targets[]; <<
541 }; <<
542 <<
543 struct acpi_cedt_cfmws_target_element { <<
544 u32 interleave_target; <<
545 }; <<
546 <<
547 /* Values for Interleave Arithmetic field abov <<
548 <<
549 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0 <<
550 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1 <<
551 <<
552 /* Values for Restrictions field above */ <<
553 <<
554 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1 <<
555 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1 <<
556 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1 <<
557 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1 <<
558 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1 <<
559 <<
560 /* 2: CXL XOR Interleave Math Structure */ <<
561 <<
562 struct acpi_cedt_cxims { <<
563 struct acpi_cedt_header header; <<
564 u16 reserved1; <<
565 u8 hbig; <<
566 u8 nr_xormaps; <<
567 u64 xormap_list[]; <<
568 }; <<
569 <<
570 /* 3: CXL RCEC Downstream Port Association Str <<
571 <<
572 struct acpi_cedt_rdpas { <<
573 struct acpi_cedt_header header; <<
574 u16 segment; <<
575 u16 bdf; <<
576 u8 protocol; <<
577 u64 address; <<
578 }; <<
579 <<
580 /* Masks for bdf field above */ <<
581 #define ACPI_CEDT_RDPAS_BUS_MASK 0x <<
582 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x <<
583 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x <<
584 <<
585 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) <<
586 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) <<
587 <<
588 /********************************************* <<
589 * <<
590 * CPEP - Corrected Platform Error Polling tab <<
591 * Version 1 <<
592 * <<
593 ********************************************* <<
594 <<
595 struct acpi_table_cpep { <<
596 struct acpi_table_header header; <<
597 u64 reserved; <<
598 }; <<
599 <<
600 /* Subtable */ <<
601 <<
602 struct acpi_cpep_polling { <<
603 struct acpi_subtable_header header; <<
604 u8 id; /* Processor I <<
605 u8 eid; /* Processor E <<
606 u32 interval; /* Polling int <<
607 }; <<
608 <<
609 /********************************************* <<
610 * <<
611 * CSRT - Core System Resource Table <<
612 * Version 0 <<
613 * <<
614 * Conforms to the "Core System Resource Table <<
615 * <<
616 ********************************************* <<
617 <<
618 struct acpi_table_csrt { <<
619 struct acpi_table_header header; <<
620 }; <<
621 <<
622 /* Resource Group subtable */ <<
623 <<
624 struct acpi_csrt_group { <<
625 u32 length; <<
626 u32 vendor_id; <<
627 u32 subvendor_id; <<
628 u16 device_id; <<
629 u16 subdevice_id; <<
630 u16 revision; <<
631 u16 reserved; <<
632 u32 shared_info_length; <<
633 <<
634 /* Shared data immediately follows (Le <<
635 }; <<
636 <<
637 /* Shared Info subtable */ <<
638 <<
639 struct acpi_csrt_shared_info { <<
640 u16 major_version; <<
641 u16 minor_version; <<
642 u32 mmio_base_low; <<
643 u32 mmio_base_high; <<
644 u32 gsi_interrupt; <<
645 u8 interrupt_polarity; <<
646 u8 interrupt_mode; <<
647 u8 num_channels; <<
648 u8 dma_address_width; <<
649 u16 base_request_line; <<
650 u16 num_handshake_signals; <<
651 u32 max_block_size; <<
652 <<
653 /* Resource descriptors immediately fo <<
654 }; <<
655 <<
656 /* Resource Descriptor subtable */ <<
657 <<
658 struct acpi_csrt_descriptor { <<
659 u32 length; <<
660 u16 type; <<
661 u16 subtype; <<
662 u32 uid; <<
663 <<
664 /* Resource-specific information immed <<
665 }; <<
666 <<
667 /* Resource Types */ <<
668 <<
669 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 <<
670 #define ACPI_CSRT_TYPE_TIMER 0x0002 <<
671 #define ACPI_CSRT_TYPE_DMA 0x0003 <<
672 <<
673 /* Resource Subtypes */ <<
674 <<
675 #define ACPI_CSRT_XRUPT_LINE 0x0000 <<
676 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 <<
677 #define ACPI_CSRT_TIMER 0x0000 <<
678 #define ACPI_CSRT_DMA_CHANNEL 0x0000 <<
679 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 <<
680 <<
681 /********************************************* <<
682 * <<
683 * DBG2 - Debug Port Table 2 <<
684 * Version 0 (Both main table and subta <<
685 * <<
686 * Conforms to "Microsoft Debug Port Table 2 ( <<
687 * <<
688 ********************************************* <<
689 <<
690 struct acpi_table_dbg2 { <<
691 struct acpi_table_header header; <<
692 u32 info_offset; <<
693 u32 info_count; <<
694 }; <<
695 <<
696 struct acpi_dbg2_header { <<
697 u32 info_offset; <<
698 u32 info_count; <<
699 }; <<
700 <<
701 /* Debug Device Information Subtable */ <<
702 <<
703 struct acpi_dbg2_device { <<
704 u8 revision; <<
705 u16 length; <<
706 u8 register_count; /* Number of b <<
707 u16 namepath_length; <<
708 u16 namepath_offset; <<
709 u16 oem_data_length; <<
710 u16 oem_data_offset; <<
711 u16 port_type; <<
712 u16 port_subtype; <<
713 u16 reserved; <<
714 u16 base_address_offset; <<
715 u16 address_size_offset; <<
716 /* <<
717 * Data that follows: <<
718 * base_address (required) - Each i <<
719 * address_size (required) - Array <<
720 * Namepath (required) - Null te <<
721 * oem_data (optional) - Length <<
722 */ <<
723 }; <<
724 <<
725 /* Types for port_type field above */ <<
726 <<
727 #define ACPI_DBG2_SERIAL_PORT 0x8000 <<
728 #define ACPI_DBG2_1394_PORT 0x8001 <<
729 #define ACPI_DBG2_USB_PORT 0x8002 <<
730 #define ACPI_DBG2_NET_PORT 0x8003 <<
731 <<
732 /* Subtypes for port_subtype field above */ <<
733 <<
734 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 <<
735 #define ACPI_DBG2_16550_SUBSET 0x0001 <<
736 #define ACPI_DBG2_MAX311XE_SPI 0x0002 <<
737 #define ACPI_DBG2_ARM_PL011 0x0003 <<
738 #define ACPI_DBG2_MSM8X60 0x0004 <<
739 #define ACPI_DBG2_16550_NVIDIA 0x0005 <<
740 #define ACPI_DBG2_TI_OMAP 0x0006 <<
741 #define ACPI_DBG2_APM88XXXX 0x0008 <<
742 #define ACPI_DBG2_MSM8974 0x0009 <<
743 #define ACPI_DBG2_SAM5250 0x000A <<
744 #define ACPI_DBG2_INTEL_USIF 0x000B <<
745 #define ACPI_DBG2_IMX6 0x000C <<
746 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D <<
747 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E <<
748 #define ACPI_DBG2_ARM_DCC 0x000F <<
749 #define ACPI_DBG2_BCM2835 0x0010 <<
750 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 <<
751 #define ACPI_DBG2_16550_WITH_GAS 0x0012 <<
752 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 <<
753 #define ACPI_DBG2_INTEL_LPSS 0x0014 <<
754 <<
755 #define ACPI_DBG2_1394_STANDARD 0x0000 <<
756 <<
757 #define ACPI_DBG2_USB_XHCI 0x0000 <<
758 #define ACPI_DBG2_USB_EHCI 0x0001 <<
759 <<
760 /********************************************* <<
761 * <<
762 * DBGP - Debug Port table <<
763 * Version 1 <<
764 * <<
765 * Conforms to the "Debug Port Specification", <<
766 * <<
767 ********************************************* <<
768 <<
769 struct acpi_table_dbgp { <<
770 struct acpi_table_header header; <<
771 u8 type; /* 0=full 1655 <<
772 u8 reserved[3]; <<
773 struct acpi_generic_address debug_port <<
774 }; <<
775 <<
776 /********************************************* <<
777 * <<
778 * DMAR - DMA Remapping table <<
779 * Version 1 <<
780 * <<
781 * Conforms to "Intel Virtualization Technolog <<
782 * Version 2.3, October 2014 <<
783 * <<
784 ********************************************* <<
785 <<
786 struct acpi_table_dmar { <<
787 struct acpi_table_header header; <<
788 u8 width; /* Host Addres <<
789 u8 flags; <<
790 u8 reserved[10]; <<
791 }; <<
792 <<
793 /* Masks for Flags field above */ <<
794 <<
795 #define ACPI_DMAR_INTR_REMAP (1) <<
796 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) <<
797 #define ACPI_DMAR_X2APIC_MODE (1<<2) <<
798 <<
799 /* DMAR subtable header */ <<
800 <<
801 struct acpi_dmar_header { <<
802 u16 type; <<
803 u16 length; <<
804 }; <<
805 <<
806 /* Values for subtable type in struct acpi_dma <<
807 <<
808 enum acpi_dmar_type { <<
809 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, <<
810 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, <<
811 ACPI_DMAR_TYPE_ROOT_ATS = 2, <<
812 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, <<
813 ACPI_DMAR_TYPE_NAMESPACE = 4, <<
814 ACPI_DMAR_TYPE_SATC = 5, <<
815 ACPI_DMAR_TYPE_RESERVED = 6 /* 6 a <<
816 }; <<
817 <<
818 /* DMAR Device Scope structure */ <<
819 <<
820 struct acpi_dmar_device_scope { <<
821 u8 entry_type; <<
822 u8 length; <<
823 u16 reserved; <<
824 u8 enumeration_id; <<
825 u8 bus; <<
826 }; <<
827 <<
828 /* Values for entry_type in struct acpi_dmar_d <<
829 <<
830 enum acpi_dmar_scope_type { <<
831 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, <<
832 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, <<
833 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, <<
834 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, <<
835 ACPI_DMAR_SCOPE_TYPE_HPET = 4, <<
836 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, <<
837 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 <<
838 }; <<
839 <<
840 struct acpi_dmar_pci_path { <<
841 u8 device; <<
842 u8 function; <<
843 }; <<
844 <<
845 /* <<
846 * DMAR Subtables, correspond to Type in struc <<
847 */ <<
848 <<
849 /* 0: Hardware Unit Definition */ <<
850 <<
851 struct acpi_dmar_hardware_unit { <<
852 struct acpi_dmar_header header; <<
853 u8 flags; <<
854 u8 size; /* Size of the <<
855 u16 segment; <<
856 u64 address; /* Register Ba <<
857 }; <<
858 <<
859 /* Masks for Flags field above */ <<
860 <<
861 #define ACPI_DMAR_INCLUDE_ALL (1) <<
862 <<
863 /* 1: Reserved Memory Definition */ <<
864 <<
865 struct acpi_dmar_reserved_memory { <<
866 struct acpi_dmar_header header; <<
867 u16 reserved; <<
868 u16 segment; <<
869 u64 base_address; /* 4K aligned <<
870 u64 end_address; /* 4K aligned <<
871 }; <<
872 <<
873 /* Masks for Flags field above */ <<
874 <<
875 #define ACPI_DMAR_ALLOW_ALL (1) <<
876 <<
877 /* 2: Root Port ATS Capability Reporting Struc <<
878 <<
879 struct acpi_dmar_atsr { <<
880 struct acpi_dmar_header header; <<
881 u8 flags; <<
882 u8 reserved; <<
883 u16 segment; <<
884 }; <<
885 <<
886 /* Masks for Flags field above */ <<
887 <<
888 #define ACPI_DMAR_ALL_PORTS (1) <<
889 <<
890 /* 3: Remapping Hardware Static Affinity Struc <<
891 <<
892 struct acpi_dmar_rhsa { <<
893 struct acpi_dmar_header header; <<
894 u32 reserved; <<
895 u64 base_address; <<
896 u32 proximity_domain; <<
897 }; <<
898 <<
899 /* 4: ACPI Namespace Device Declaration Struct <<
900 <<
901 struct acpi_dmar_andd { <<
902 struct acpi_dmar_header header; <<
903 u8 reserved[3]; <<
904 u8 device_number; <<
905 union { <<
906 char __pad; <<
907 ACPI_FLEX_ARRAY(char, device_ <<
908 }; <<
909 }; <<
910 <<
911 /* 5: SOC Integrated Address Translation Cache <<
912 <<
913 struct acpi_dmar_satc { <<
914 struct acpi_dmar_header header; <<
915 u8 flags; <<
916 u8 reserved; <<
917 u16 segment; <<
918 }; <<
919 /********************************************* <<
920 * <<
921 * DRTM - Dynamic Root of Trust for Measuremen <<
922 * Conforms to "TCG D-RTM Architecture" June 1 <<
923 * Table version 1 <<
924 * <<
925 ********************************************* <<
926 <<
927 struct acpi_table_drtm { <<
928 struct acpi_table_header header; <<
929 u64 entry_base_address; <<
930 u64 entry_length; <<
931 u32 entry_address32; <<
932 u64 entry_address64; <<
933 u64 exit_address; <<
934 u64 log_area_address; <<
935 u32 log_area_length; <<
936 u64 arch_dependent_address; <<
937 u32 flags; <<
938 }; <<
939 <<
940 /* Flag Definitions for above */ <<
941 <<
942 #define ACPI_DRTM_ACCESS_ALLOWED (1 <<
943 #define ACPI_DRTM_ENABLE_GAP_CODE (1 <<
944 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1 <<
945 #define ACPI_DRTM_AUTHORITY_ORDER (1 <<
946 <<
947 /* 1) Validated Tables List (64-bit addresses) <<
948 <<
949 struct acpi_drtm_vtable_list { <<
950 u32 validated_table_count; <<
951 u64 validated_tables[]; <<
952 }; <<
953 <<
954 /* 2) Resources List (of Resource Descriptors) <<
955 <<
956 /* Resource Descriptor */ <<
957 <<
958 struct acpi_drtm_resource { <<
959 u8 size[7]; <<
960 u8 type; <<
961 u64 address; <<
962 }; <<
963 <<
964 struct acpi_drtm_resource_list { <<
965 u32 resource_count; <<
966 struct acpi_drtm_resource resources[]; <<
967 }; <<
968 <<
969 /* 3) Platform-specific Identifiers List */ <<
970 <<
971 struct acpi_drtm_dps_id { <<
972 u32 dps_id_length; <<
973 u8 dps_id[16]; <<
974 }; <<
975 <<
976 /********************************************* <<
977 * <<
978 * ECDT - Embedded Controller Boot Resources T <<
979 * Version 1 <<
980 * <<
981 ********************************************* <<
982 <<
983 struct acpi_table_ecdt { <<
984 struct acpi_table_header header; <<
985 struct acpi_generic_address control; <<
986 struct acpi_generic_address data; <<
987 u32 uid; /* Unique ID - <<
988 u8 gpe; /* The GPE for <<
989 u8 id[]; /* Full namepa <<
990 }; <<
991 <<
992 /********************************************* <<
993 * <<
994 * EINJ - Error Injection Table (ACPI 4.0) <<
995 * Version 1 <<
996 * <<
997 ********************************************* <<
998 <<
999 struct acpi_table_einj { <<
1000 struct acpi_table_header header; <<
1001 u32 header_length; <<
1002 u8 flags; <<
1003 u8 reserved[3]; <<
1004 u32 entries; <<
1005 }; <<
1006 <<
1007 /* EINJ Injection Instruction Entries (action <<
1008 <<
1009 struct acpi_einj_entry { <<
1010 struct acpi_whea_header whea_header; <<
1011 }; <<
1012 <<
1013 /* Masks for Flags field above */ <<
1014 <<
1015 #define ACPI_EINJ_PRESERVE (1) <<
1016 <<
1017 /* Values for Action field above */ <<
1018 <<
1019 enum acpi_einj_actions { <<
1020 ACPI_EINJ_BEGIN_OPERATION = 0, <<
1021 ACPI_EINJ_GET_TRIGGER_TABLE = 1, <<
1022 ACPI_EINJ_SET_ERROR_TYPE = 2, <<
1023 ACPI_EINJ_GET_ERROR_TYPE = 3, <<
1024 ACPI_EINJ_END_OPERATION = 4, <<
1025 ACPI_EINJ_EXECUTE_OPERATION = 5, <<
1026 ACPI_EINJ_CHECK_BUSY_STATUS = 6, <<
1027 ACPI_EINJ_GET_COMMAND_STATUS = 7, <<
1028 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS <<
1029 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, <<
1030 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 <<
1031 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Ex <<
1032 }; <<
1033 <<
1034 /* Values for Instruction field above */ <<
1035 <<
1036 enum acpi_einj_instructions { <<
1037 ACPI_EINJ_READ_REGISTER = 0, <<
1038 ACPI_EINJ_READ_REGISTER_VALUE = 1, <<
1039 ACPI_EINJ_WRITE_REGISTER = 2, <<
1040 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, <<
1041 ACPI_EINJ_NOOP = 4, <<
1042 ACPI_EINJ_FLUSH_CACHELINE = 5, <<
1043 ACPI_EINJ_INSTRUCTION_RESERVED = 6 <<
1044 }; <<
1045 <<
1046 struct acpi_einj_error_type_with_addr { <<
1047 u32 error_type; <<
1048 u32 vendor_struct_offset; <<
1049 u32 flags; <<
1050 u32 apic_id; <<
1051 u64 address; <<
1052 u64 range; <<
1053 u32 pcie_id; <<
1054 }; <<
1055 <<
1056 struct acpi_einj_vendor { <<
1057 u32 length; <<
1058 u32 pcie_id; <<
1059 u16 vendor_id; <<
1060 u16 device_id; <<
1061 u8 revision_id; <<
1062 u8 reserved[3]; <<
1063 }; <<
1064 <<
1065 /* EINJ Trigger Error Action Table */ <<
1066 <<
1067 struct acpi_einj_trigger { <<
1068 u32 header_size; <<
1069 u32 revision; <<
1070 u32 table_size; <<
1071 u32 entry_count; <<
1072 }; <<
1073 <<
1074 /* Command status return values */ <<
1075 <<
1076 enum acpi_einj_command_status { <<
1077 ACPI_EINJ_SUCCESS = 0, <<
1078 ACPI_EINJ_FAILURE = 1, <<
1079 ACPI_EINJ_INVALID_ACCESS = 2, <<
1080 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 <<
1081 }; <<
1082 <<
1083 /* Error types returned from ACPI_EINJ_GET_ER <<
1084 <<
1085 #define ACPI_EINJ_PROCESSOR_CORRECTABLE ( <<
1086 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE ( <<
1087 #define ACPI_EINJ_PROCESSOR_FATAL ( <<
1088 #define ACPI_EINJ_MEMORY_CORRECTABLE ( <<
1089 #define ACPI_EINJ_MEMORY_UNCORRECTABLE ( <<
1090 #define ACPI_EINJ_MEMORY_FATAL ( <<
1091 #define ACPI_EINJ_PCIX_CORRECTABLE ( <<
1092 #define ACPI_EINJ_PCIX_UNCORRECTABLE ( <<
1093 #define ACPI_EINJ_PCIX_FATAL ( <<
1094 #define ACPI_EINJ_PLATFORM_CORRECTABLE ( <<
1095 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE ( <<
1096 #define ACPI_EINJ_PLATFORM_FATAL ( <<
1097 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE ( <<
1098 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE ( <<
1099 #define ACPI_EINJ_CXL_CACHE_FATAL ( <<
1100 #define ACPI_EINJ_CXL_MEM_CORRECTABLE ( <<
1101 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE ( <<
1102 #define ACPI_EINJ_CXL_MEM_FATAL ( <<
1103 #define ACPI_EINJ_VENDOR_DEFINED ( <<
1104 <<
1105 /******************************************** <<
1106 * <<
1107 * ERST - Error Record Serialization Table (A <<
1108 * Version 1 <<
1109 * <<
1110 ******************************************** <<
1111 <<
1112 struct acpi_table_erst { <<
1113 struct acpi_table_header header; <<
1114 u32 header_length; <<
1115 u32 reserved; <<
1116 u32 entries; <<
1117 }; <<
1118 <<
1119 /* ERST Serialization Entries (actions) */ <<
1120 <<
1121 struct acpi_erst_entry { <<
1122 struct acpi_whea_header whea_header; <<
1123 }; <<
1124 <<
1125 /* Masks for Flags field above */ <<
1126 <<
1127 #define ACPI_ERST_PRESERVE (1) <<
1128 <<
1129 /* Values for Action field above */ <<
1130 <<
1131 enum acpi_erst_actions { <<
1132 ACPI_ERST_BEGIN_WRITE = 0, <<
1133 ACPI_ERST_BEGIN_READ = 1, <<
1134 ACPI_ERST_BEGIN_CLEAR = 2, <<
1135 ACPI_ERST_END = 3, <<
1136 ACPI_ERST_SET_RECORD_OFFSET = 4, <<
1137 ACPI_ERST_EXECUTE_OPERATION = 5, <<
1138 ACPI_ERST_CHECK_BUSY_STATUS = 6, <<
1139 ACPI_ERST_GET_COMMAND_STATUS = 7, <<
1140 ACPI_ERST_GET_RECORD_ID = 8, <<
1141 ACPI_ERST_SET_RECORD_ID = 9, <<
1142 ACPI_ERST_GET_RECORD_COUNT = 10, <<
1143 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, <<
1144 ACPI_ERST_NOT_USED = 12, <<
1145 ACPI_ERST_GET_ERROR_RANGE = 13, <<
1146 ACPI_ERST_GET_ERROR_LENGTH = 14, <<
1147 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, <<
1148 ACPI_ERST_EXECUTE_TIMINGS = 16, <<
1149 ACPI_ERST_ACTION_RESERVED = 17 /* 17 <<
1150 }; <<
1151 <<
1152 /* Values for Instruction field above */ <<
1153 <<
1154 enum acpi_erst_instructions { <<
1155 ACPI_ERST_READ_REGISTER = 0, <<
1156 ACPI_ERST_READ_REGISTER_VALUE = 1, <<
1157 ACPI_ERST_WRITE_REGISTER = 2, <<
1158 ACPI_ERST_WRITE_REGISTER_VALUE = 3, <<
1159 ACPI_ERST_NOOP = 4, <<
1160 ACPI_ERST_LOAD_VAR1 = 5, <<
1161 ACPI_ERST_LOAD_VAR2 = 6, <<
1162 ACPI_ERST_STORE_VAR1 = 7, <<
1163 ACPI_ERST_ADD = 8, <<
1164 ACPI_ERST_SUBTRACT = 9, <<
1165 ACPI_ERST_ADD_VALUE = 10, <<
1166 ACPI_ERST_SUBTRACT_VALUE = 11, <<
1167 ACPI_ERST_STALL = 12, <<
1168 ACPI_ERST_STALL_WHILE_TRUE = 13, <<
1169 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, <<
1170 ACPI_ERST_GOTO = 15, <<
1171 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, <<
1172 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, <<
1173 ACPI_ERST_MOVE_DATA = 18, <<
1174 ACPI_ERST_INSTRUCTION_RESERVED = 19 <<
1175 }; <<
1176 <<
1177 /* Command status return values */ <<
1178 <<
1179 enum acpi_erst_command_status { <<
1180 ACPI_ERST_SUCCESS = 0, <<
1181 ACPI_ERST_NO_SPACE = 1, <<
1182 ACPI_ERST_NOT_AVAILABLE = 2, <<
1183 ACPI_ERST_FAILURE = 3, <<
1184 ACPI_ERST_RECORD_EMPTY = 4, <<
1185 ACPI_ERST_NOT_FOUND = 5, <<
1186 ACPI_ERST_STATUS_RESERVED = 6 /* 6 <<
1187 }; <<
1188 <<
1189 /* Error Record Serialization Information */ <<
1190 <<
1191 struct acpi_erst_info { <<
1192 u16 signature; /* Should be <<
1193 u8 data[48]; <<
1194 }; <<
1195 <<
1196 /******************************************** <<
1197 * <<
1198 * FPDT - Firmware Performance Data Table (AC <<
1199 * Version 1 <<
1200 * <<
1201 ******************************************** <<
1202 <<
1203 struct acpi_table_fpdt { <<
1204 struct acpi_table_header header; <<
1205 }; <<
1206 <<
1207 /* FPDT subtable header (Performance Record S <<
1208 <<
1209 struct acpi_fpdt_header { <<
1210 u16 type; <<
1211 u8 length; <<
1212 u8 revision; <<
1213 }; <<
1214 <<
1215 /* Values for Type field above */ <<
1216 <<
1217 enum acpi_fpdt_type { <<
1218 ACPI_FPDT_TYPE_BOOT = 0, <<
1219 ACPI_FPDT_TYPE_S3PERF = 1 <<
1220 }; <<
1221 <<
1222 /* <<
1223 * FPDT subtables <<
1224 */ <<
1225 <<
1226 /* 0: Firmware Basic Boot Performance Record <<
1227 <<
1228 struct acpi_fpdt_boot_pointer { <<
1229 struct acpi_fpdt_header header; <<
1230 u8 reserved[4]; <<
1231 u64 address; <<
1232 }; <<
1233 <<
1234 /* 1: S3 Performance Table Pointer Record */ <<
1235 <<
1236 struct acpi_fpdt_s3pt_pointer { <<
1237 struct acpi_fpdt_header header; <<
1238 u8 reserved[4]; <<
1239 u64 address; <<
1240 }; <<
1241 <<
1242 /* <<
1243 * S3PT - S3 Performance Table. This table is <<
1244 * S3 Pointer Record above. <<
1245 */ <<
1246 struct acpi_table_s3pt { <<
1247 u8 signature[4]; /* "S3PT" */ <<
1248 u32 length; <<
1249 }; <<
1250 <<
1251 /* <<
1252 * S3PT Subtables (Not part of the actual FPD <<
1253 */ <<
1254 <<
1255 /* Values for Type field in S3PT header */ <<
1256 <<
1257 enum acpi_s3pt_type { <<
1258 ACPI_S3PT_TYPE_RESUME = 0, <<
1259 ACPI_S3PT_TYPE_SUSPEND = 1, <<
1260 ACPI_FPDT_BOOT_PERFORMANCE = 2 <<
1261 }; <<
1262 <<
1263 struct acpi_s3pt_resume { <<
1264 struct acpi_fpdt_header header; <<
1265 u32 resume_count; <<
1266 u64 full_resume; <<
1267 u64 average_resume; <<
1268 }; <<
1269 <<
1270 struct acpi_s3pt_suspend { <<
1271 struct acpi_fpdt_header header; <<
1272 u64 suspend_start; <<
1273 u64 suspend_end; <<
1274 }; <<
1275 <<
1276 /* <<
1277 * FPDT Boot Performance Record (Not part of <<
1278 */ <<
1279 struct acpi_fpdt_boot { <<
1280 struct acpi_fpdt_header header; <<
1281 u8 reserved[4]; <<
1282 u64 reset_end; <<
1283 u64 load_start; <<
1284 u64 startup_start; <<
1285 u64 exit_services_entry; <<
1286 u64 exit_services_exit; <<
1287 }; <<
1288 <<
1289 /******************************************** <<
1290 * <<
1291 * GTDT - Generic Timer Description Table (AC <<
1292 * Version 2 <<
1293 * <<
1294 ******************************************** <<
1295 <<
1296 struct acpi_table_gtdt { <<
1297 struct acpi_table_header header; <<
1298 u64 counter_block_addresss; <<
1299 u32 reserved; <<
1300 u32 secure_el1_interrupt; <<
1301 u32 secure_el1_flags; <<
1302 u32 non_secure_el1_interrupt; <<
1303 u32 non_secure_el1_flags; <<
1304 u32 virtual_timer_interrupt; <<
1305 u32 virtual_timer_flags; <<
1306 u32 non_secure_el2_interrupt; <<
1307 u32 non_secure_el2_flags; <<
1308 u64 counter_read_block_address; <<
1309 u32 platform_timer_count; <<
1310 u32 platform_timer_offset; <<
1311 }; <<
1312 <<
1313 /* Flag Definitions: Timer Block Physical Tim <<
1314 <<
1315 #define ACPI_GTDT_INTERRUPT_MODE (1) <<
1316 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1 <<
1317 #define ACPI_GTDT_ALWAYS_ON (1<<2 <<
1318 <<
1319 struct acpi_gtdt_el2 { <<
1320 u32 virtual_el2_timer_gsiv; <<
1321 u32 virtual_el2_timer_flags; <<
1322 }; <<
1323 <<
1324 /* Common GTDT subtable header */ <<
1325 <<
1326 struct acpi_gtdt_header { <<
1327 u8 type; <<
1328 u16 length; <<
1329 }; <<
1330 <<
1331 /* Values for GTDT subtable type above */ <<
1332 <<
1333 enum acpi_gtdt_type { <<
1334 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, <<
1335 ACPI_GTDT_TYPE_WATCHDOG = 1, <<
1336 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 <<
1337 }; <<
1338 <<
1339 /* GTDT Subtables, correspond to Type in stru <<
1340 <<
1341 /* 0: Generic Timer Block */ <<
1342 <<
1343 struct acpi_gtdt_timer_block { <<
1344 struct acpi_gtdt_header header; <<
1345 u8 reserved; <<
1346 u64 block_address; <<
1347 u32 timer_count; <<
1348 u32 timer_offset; <<
1349 }; <<
1350 <<
1351 /* Timer Sub-Structure, one per timer */ <<
1352 <<
1353 struct acpi_gtdt_timer_entry { <<
1354 u8 frame_number; <<
1355 u8 reserved[3]; <<
1356 u64 base_address; <<
1357 u64 el0_base_address; <<
1358 u32 timer_interrupt; <<
1359 u32 timer_flags; <<
1360 u32 virtual_timer_interrupt; <<
1361 u32 virtual_timer_flags; <<
1362 u32 common_flags; <<
1363 }; <<
1364 <<
1365 /* Flag Definitions: timer_flags and virtual_ <<
1366 <<
1367 #define ACPI_GTDT_GT_IRQ_MODE ( <<
1368 #define ACPI_GTDT_GT_IRQ_POLARITY ( <<
1369 <<
1370 /* Flag Definitions: common_flags above */ <<
1371 <<
1372 #define ACPI_GTDT_GT_IS_SECURE_TIMER ( <<
1373 #define ACPI_GTDT_GT_ALWAYS_ON ( <<
1374 <<
1375 /* 1: SBSA Generic Watchdog Structure */ <<
1376 <<
1377 struct acpi_gtdt_watchdog { <<
1378 struct acpi_gtdt_header header; <<
1379 u8 reserved; <<
1380 u64 refresh_frame_address; <<
1381 u64 control_frame_address; <<
1382 u32 timer_interrupt; <<
1383 u32 timer_flags; <<
1384 }; <<
1385 <<
1386 /* Flag Definitions: timer_flags above */ <<
1387 <<
1388 #define ACPI_GTDT_WATCHDOG_IRQ_MODE ( <<
1389 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY ( <<
1390 #define ACPI_GTDT_WATCHDOG_SECURE ( <<
1391 <<
1392 /******************************************** <<
1393 * <<
1394 * HEST - Hardware Error Source Table (ACPI 4 <<
1395 * Version 1 <<
1396 * <<
1397 ******************************************** <<
1398 <<
1399 struct acpi_table_hest { <<
1400 struct acpi_table_header header; <<
1401 u32 error_source_count; <<
1402 }; <<
1403 <<
1404 /* HEST subtable header */ <<
1405 <<
1406 struct acpi_hest_header { <<
1407 u16 type; <<
1408 u16 source_id; <<
1409 }; <<
1410 <<
1411 /* Values for Type field above for subtables <<
1412 <<
1413 enum acpi_hest_types { <<
1414 ACPI_HEST_TYPE_IA32_CHECK = 0, <<
1415 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = <<
1416 ACPI_HEST_TYPE_IA32_NMI = 2, <<
1417 ACPI_HEST_TYPE_NOT_USED3 = 3, <<
1418 ACPI_HEST_TYPE_NOT_USED4 = 4, <<
1419 ACPI_HEST_TYPE_NOT_USED5 = 5, <<
1420 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, <<
1421 ACPI_HEST_TYPE_AER_ENDPOINT = 7, <<
1422 ACPI_HEST_TYPE_AER_BRIDGE = 8, <<
1423 ACPI_HEST_TYPE_GENERIC_ERROR = 9, <<
1424 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, <<
1425 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = <<
1426 ACPI_HEST_TYPE_RESERVED = 12 /* 12 <<
1427 }; <<
1428 <<
1429 /* <<
1430 * HEST substructures contained in subtables <<
1431 */ <<
1432 <<
1433 /* <<
1434 * IA32 Error Bank(s) - Follows the struct ac <<
1435 * struct acpi_hest_ia_corrected structures. <<
1436 */ <<
1437 struct acpi_hest_ia_error_bank { <<
1438 u8 bank_number; <<
1439 u8 clear_status_on_init; <<
1440 u8 status_format; <<
1441 u8 reserved; <<
1442 u32 control_register; <<
1443 u64 control_data; <<
1444 u32 status_register; <<
1445 u32 address_register; <<
1446 u32 misc_register; <<
1447 }; <<
1448 <<
1449 /* Common HEST sub-structure for PCI/AER stru <<
1450 <<
1451 struct acpi_hest_aer_common { <<
1452 u16 reserved1; <<
1453 u8 flags; <<
1454 u8 enabled; <<
1455 u32 records_to_preallocate; <<
1456 u32 max_sections_per_record; <<
1457 u32 bus; /* Bus and Se <<
1458 u16 device; <<
1459 u16 function; <<
1460 u16 device_control; <<
1461 u16 reserved2; <<
1462 u32 uncorrectable_mask; <<
1463 u32 uncorrectable_severity; <<
1464 u32 correctable_mask; <<
1465 u32 advanced_capabilities; <<
1466 }; <<
1467 <<
1468 /* Masks for HEST Flags fields */ <<
1469 <<
1470 #define ACPI_HEST_FIRMWARE_FIRST (1) <<
1471 #define ACPI_HEST_GLOBAL (1<<1 <<
1472 #define ACPI_HEST_GHES_ASSIST (1<<2 <<
1473 <<
1474 /* <<
1475 * Macros to access the bus/segment numbers i <<
1476 * Bus number is encoded in bits 7:0 <<
1477 * Segment number is encoded in bits 23:8 <<
1478 */ <<
1479 #define ACPI_HEST_BUS(bus) ((bus <<
1480 #define ACPI_HEST_SEGMENT(bus) (((bu <<
1481 <<
1482 /* Hardware Error Notification */ <<
1483 <<
1484 struct acpi_hest_notify { <<
1485 u8 type; <<
1486 u8 length; <<
1487 u16 config_write_enable; <<
1488 u32 poll_interval; <<
1489 u32 vector; <<
1490 u32 polling_threshold_value; <<
1491 u32 polling_threshold_window; <<
1492 u32 error_threshold_value; <<
1493 u32 error_threshold_window; <<
1494 }; <<
1495 <<
1496 /* Values for Notify Type field above */ <<
1497 <<
1498 enum acpi_hest_notify_types { <<
1499 ACPI_HEST_NOTIFY_POLLED = 0, <<
1500 ACPI_HEST_NOTIFY_EXTERNAL = 1, <<
1501 ACPI_HEST_NOTIFY_LOCAL = 2, <<
1502 ACPI_HEST_NOTIFY_SCI = 3, <<
1503 ACPI_HEST_NOTIFY_NMI = 4, <<
1504 ACPI_HEST_NOTIFY_CMCI = 5, /* AC <<
1505 ACPI_HEST_NOTIFY_MCE = 6, /* AC <<
1506 ACPI_HEST_NOTIFY_GPIO = 7, /* AC <<
1507 ACPI_HEST_NOTIFY_SEA = 8, /* AC <<
1508 ACPI_HEST_NOTIFY_SEI = 9, /* AC <<
1509 ACPI_HEST_NOTIFY_GSIV = 10, /* AC <<
1510 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = <<
1511 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 <<
1512 }; <<
1513 <<
1514 /* Values for config_write_enable bitfield ab <<
1515 <<
1516 #define ACPI_HEST_TYPE (1) <<
1517 #define ACPI_HEST_POLL_INTERVAL (1<<1 <<
1518 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2 <<
1519 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3 <<
1520 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4 <<
1521 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5 <<
1522 <<
1523 /* <<
1524 * HEST subtables <<
1525 */ <<
1526 <<
1527 /* 0: IA32 Machine Check Exception */ <<
1528 <<
1529 struct acpi_hest_ia_machine_check { <<
1530 struct acpi_hest_header header; <<
1531 u16 reserved1; <<
1532 u8 flags; /* See flags <<
1533 u8 enabled; <<
1534 u32 records_to_preallocate; <<
1535 u32 max_sections_per_record; <<
1536 u64 global_capability_data; <<
1537 u64 global_control_data; <<
1538 u8 num_hardware_banks; <<
1539 u8 reserved3[7]; <<
1540 }; <<
1541 <<
1542 /* 1: IA32 Corrected Machine Check */ <<
1543 <<
1544 struct acpi_hest_ia_corrected { <<
1545 struct acpi_hest_header header; <<
1546 u16 reserved1; <<
1547 u8 flags; /* See flags <<
1548 u8 enabled; <<
1549 u32 records_to_preallocate; <<
1550 u32 max_sections_per_record; <<
1551 struct acpi_hest_notify notify; <<
1552 u8 num_hardware_banks; <<
1553 u8 reserved2[3]; <<
1554 }; <<
1555 <<
1556 /* 2: IA32 Non-Maskable Interrupt */ <<
1557 <<
1558 struct acpi_hest_ia_nmi { <<
1559 struct acpi_hest_header header; <<
1560 u32 reserved; <<
1561 u32 records_to_preallocate; <<
1562 u32 max_sections_per_record; <<
1563 u32 max_raw_data_length; <<
1564 }; <<
1565 <<
1566 /* 3,4,5: Not used */ <<
1567 <<
1568 /* 6: PCI Express Root Port AER */ <<
1569 <<
1570 struct acpi_hest_aer_root { <<
1571 struct acpi_hest_header header; <<
1572 struct acpi_hest_aer_common aer; <<
1573 u32 root_error_command; <<
1574 }; <<
1575 <<
1576 /* 7: PCI Express AER (AER Endpoint) */ <<
1577 <<
1578 struct acpi_hest_aer { <<
1579 struct acpi_hest_header header; <<
1580 struct acpi_hest_aer_common aer; <<
1581 }; <<
1582 <<
1583 /* 8: PCI Express/PCI-X Bridge AER */ <<
1584 <<
1585 struct acpi_hest_aer_bridge { <<
1586 struct acpi_hest_header header; <<
1587 struct acpi_hest_aer_common aer; <<
1588 u32 uncorrectable_mask2; <<
1589 u32 uncorrectable_severity2; <<
1590 u32 advanced_capabilities2; <<
1591 }; <<
1592 <<
1593 /* 9: Generic Hardware Error Source */ <<
1594 <<
1595 struct acpi_hest_generic { <<
1596 struct acpi_hest_header header; <<
1597 u16 related_source_id; <<
1598 u8 reserved; <<
1599 u8 enabled; <<
1600 u32 records_to_preallocate; <<
1601 u32 max_sections_per_record; <<
1602 u32 max_raw_data_length; <<
1603 struct acpi_generic_address error_sta <<
1604 struct acpi_hest_notify notify; <<
1605 u32 error_block_length; <<
1606 }; <<
1607 <<
1608 /* 10: Generic Hardware Error Source, version <<
1609 <<
1610 struct acpi_hest_generic_v2 { <<
1611 struct acpi_hest_header header; <<
1612 u16 related_source_id; <<
1613 u8 reserved; <<
1614 u8 enabled; <<
1615 u32 records_to_preallocate; <<
1616 u32 max_sections_per_record; <<
1617 u32 max_raw_data_length; <<
1618 struct acpi_generic_address error_sta <<
1619 struct acpi_hest_notify notify; <<
1620 u32 error_block_length; <<
1621 struct acpi_generic_address read_ack_ <<
1622 u64 read_ack_preserve; <<
1623 u64 read_ack_write; <<
1624 }; <<
1625 <<
1626 /* Generic Error Status block */ <<
1627 <<
1628 struct acpi_hest_generic_status { <<
1629 u32 block_status; <<
1630 u32 raw_data_offset; <<
1631 u32 raw_data_length; <<
1632 u32 data_length; <<
1633 u32 error_severity; <<
1634 }; <<
1635 <<
1636 /* Values for block_status flags above */ <<
1637 <<
1638 #define ACPI_HEST_UNCORRECTABLE ( <<
1639 #define ACPI_HEST_CORRECTABLE ( <<
1640 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE ( <<
1641 #define ACPI_HEST_MULTIPLE_CORRECTABLE ( <<
1642 #define ACPI_HEST_ERROR_ENTRY_COUNT ( <<
1643 <<
1644 /* Generic Error Data entry */ <<
1645 <<
1646 struct acpi_hest_generic_data { <<
1647 u8 section_type[16]; <<
1648 u32 error_severity; <<
1649 u16 revision; <<
1650 u8 validation_bits; <<
1651 u8 flags; <<
1652 u32 error_data_length; <<
1653 u8 fru_id[16]; <<
1654 u8 fru_text[20]; <<
1655 }; <<
1656 <<
1657 /* Extension for revision 0x0300 */ <<
1658 <<
1659 struct acpi_hest_generic_data_v300 { <<
1660 u8 section_type[16]; <<
1661 u32 error_severity; <<
1662 u16 revision; <<
1663 u8 validation_bits; <<
1664 u8 flags; <<
1665 u32 error_data_length; <<
1666 u8 fru_id[16]; <<
1667 u8 fru_text[20]; <<
1668 u64 time_stamp; <<
1669 }; <<
1670 <<
1671 /* Values for error_severity above */ <<
1672 <<
1673 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 <<
1674 #define ACPI_HEST_GEN_ERROR_FATAL 1 <<
1675 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 <<
1676 #define ACPI_HEST_GEN_ERROR_NONE 3 <<
1677 <<
1678 /* Flags for validation_bits above */ <<
1679 <<
1680 #define ACPI_HEST_GEN_VALID_FRU_ID ( <<
1681 #define ACPI_HEST_GEN_VALID_FRU_STRING ( <<
1682 #define ACPI_HEST_GEN_VALID_TIMESTAMP ( <<
1683 <<
1684 /* 11: IA32 Deferred Machine Check Exception <<
1685 <<
1686 struct acpi_hest_ia_deferred_check { <<
1687 struct acpi_hest_header header; <<
1688 u16 reserved1; <<
1689 u8 flags; /* See flags <<
1690 u8 enabled; <<
1691 u32 records_to_preallocate; <<
1692 u32 max_sections_per_record; <<
1693 struct acpi_hest_notify notify; <<
1694 u8 num_hardware_banks; <<
1695 u8 reserved2[3]; <<
1696 }; <<
1697 <<
1698 /******************************************** <<
1699 * <<
1700 * HMAT - Heterogeneous Memory Attributes Tab <<
1701 * Version 1 <<
1702 * <<
1703 ******************************************** <<
1704 <<
1705 struct acpi_table_hmat { <<
1706 struct acpi_table_header header; <<
1707 u32 reserved; <<
1708 }; <<
1709 <<
1710 /* Values for HMAT structure types */ <<
1711 <<
1712 enum acpi_hmat_type { <<
1713 ACPI_HMAT_TYPE_PROXIMITY = 0, /* Me <<
1714 ACPI_HMAT_TYPE_LOCALITY = 1, /* Sy <<
1715 ACPI_HMAT_TYPE_CACHE = 2, /* Me <<
1716 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 <<
1717 }; <<
1718 46
1719 struct acpi_hmat_structure { !! 47 #pragma pack(1)
1720 u16 type; <<
1721 u16 reserved; <<
1722 u32 length; <<
1723 }; <<
1724 48
1725 /* 49 /*
1726 * HMAT Structures, correspond to Type in str !! 50 * ACPI 1.0 Root System Description Table (RSDT)
1727 */ 51 */
1728 !! 52 struct rsdt_descriptor_rev1
1729 /* 0: Memory proximity domain attributes */ !! 53 {
1730 !! 54 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
1731 struct acpi_hmat_proximity_domain { !! 55 u32 table_offset_entry [1]; /* Array of pointers to other */
1732 struct acpi_hmat_structure header; !! 56 /* ACPI tables */
1733 u16 flags; !! 57 };
1734 u16 reserved1; !! 58
1735 u32 processor_PD; /* Processor !! 59
1736 u32 memory_PD; /* Memory pro !! 60 /*
1737 u32 reserved2; !! 61 * ACPI 1.0 Firmware ACPI Control Structure (FACS)
1738 u64 reserved3; !! 62 */
1739 u64 reserved4; !! 63 struct facs_descriptor_rev1
1740 }; !! 64 {
1741 !! 65 char signature[4]; /* ACPI Signature */
1742 /* Masks for Flags field above */ !! 66 u32 length; /* Length of structure, in bytes */
1743 !! 67 u32 hardware_signature; /* Hardware configuration signature */
1744 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) !! 68 u32 firmware_waking_vector; /* ACPI OS waking vector */
1745 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1 !! 69 u32 global_lock; /* Global Lock */
1746 #define ACPI_HMAT_RESERVATION_HINT (1<<2 !! 70 u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */
1747 !! 71 u32 reserved1 : 31; /* Must be 0 */
1748 /* 1: System locality latency and bandwidth i !! 72 u8 resverved3 [40]; /* Reserved - must be zero */
1749 !! 73 };
1750 struct acpi_hmat_locality { !! 74
1751 struct acpi_hmat_structure header; !! 75
1752 u8 flags; !! 76 /*
1753 u8 data_type; !! 77 * ACPI 1.0 Fixed ACPI Description Table (FADT)
1754 u8 min_transfer_size; !! 78 */
1755 u8 reserved1; !! 79 struct fadt_descriptor_rev1
1756 u32 number_of_initiator_Pds; !! 80 {
1757 u32 number_of_target_Pds; !! 81 ACPI_TABLE_HEADER_DEF /* ACPI common table header */
1758 u32 reserved2; !! 82 u32 firmware_ctrl; /* Physical address of FACS */
1759 u64 entry_base_unit; !! 83 u32 dsdt; /* Physical address of DSDT */
1760 }; !! 84 u8 model; /* System Interrupt Model */
1761 !! 85 u8 reserved1; /* Reserved */
1762 /* Masks for Flags field above */ !! 86 u16 sci_int; /* System vector of SCI interrupt */
1763 !! 87 u32 smi_cmd; /* Port address of SMI command port */
1764 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) !! 88 u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */
1765 !! 89 u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */
1766 /* Values for Memory Hierarchy flags */ !! 90 u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */
1767 !! 91 u8 reserved2; /* Reserved - must be zero */
1768 #define ACPI_HMAT_MEMORY 0 !! 92 u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */
1769 #define ACPI_HMAT_LAST_LEVEL_CACHE 1 !! 93 u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */
1770 #define ACPI_HMAT_1ST_LEVEL_CACHE 2 !! 94 u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */
1771 #define ACPI_HMAT_2ND_LEVEL_CACHE 3 !! 95 u32 pm1b_cnt_blk; /* Port address of Power Mgt 1b Control Reg Blk */
1772 #define ACPI_HMAT_3RD_LEVEL_CACHE 4 !! 96 u32 pm2_cnt_blk; /* Port address of Power Mgt 2 Control Reg Blk */
1773 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 !! 97 u32 pm_tmr_blk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
1774 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 !! 98 u32 gpe0_blk; /* Port addr of General Purpose acpi_event 0 Reg Blk */
1775 !! 99 u32 gpe1_blk; /* Port addr of General Purpose acpi_event 1 Reg Blk */
1776 !! 100 u8 pm1_evt_len; /* Byte length of ports at pm1_x_evt_blk */
1777 /* Values for data_type field above */ !! 101 u8 pm1_cnt_len; /* Byte length of ports at pm1_x_cnt_blk */
1778 !! 102 u8 pm2_cnt_len; /* Byte Length of ports at pm2_cnt_blk */
1779 #define ACPI_HMAT_ACCESS_LATENCY 0 !! 103 u8 pm_tm_len; /* Byte Length of ports at pm_tm_blk */
1780 #define ACPI_HMAT_READ_LATENCY 1 !! 104 u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */
1781 #define ACPI_HMAT_WRITE_LATENCY 2 !! 105 u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */
1782 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 !! 106 u8 gpe1_base; /* Offset in gpe model where gpe1 events start */
1783 #define ACPI_HMAT_READ_BANDWIDTH 4 !! 107 u8 reserved3; /* Reserved */
1784 #define ACPI_HMAT_WRITE_BANDWIDTH 5 !! 108 u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */
1785 !! 109 u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */
1786 /* 2: Memory side cache information */ !! 110 u16 flush_size; /* Size of area read to flush caches */
1787 !! 111 u16 flush_stride; /* Stride used in flushing caches */
1788 struct acpi_hmat_cache { !! 112 u8 duty_offset; /* Bit location of duty cycle field in p_cnt reg */
1789 struct acpi_hmat_structure header; !! 113 u8 duty_width; /* Bit width of duty cycle field in p_cnt reg */
1790 u32 memory_PD; !! 114 u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */
1791 u32 reserved1; !! 115 u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */
1792 u64 cache_size; !! 116 u8 century; /* Index to century in RTC CMOS RAM */
1793 u32 cache_attributes; !! 117 u8 reserved4; /* Reserved */
1794 u16 reserved2; !! 118 u8 reserved4a; /* Reserved */
1795 u16 number_of_SMBIOShandles; !! 119 u8 reserved4b; /* Reserved */
1796 }; !! 120 u32 wb_invd : 1; /* The wbinvd instruction works properly */
1797 !! 121 u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */
1798 /* Masks for cache_attributes field above */ !! 122 u32 proc_c1 : 1; /* All processors support C1 state */
1799 !! 123 u32 plvl2_up : 1; /* C2 state works on MP system */
1800 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x00 !! 124 u32 pwr_button : 1; /* Power button is handled as a generic feature */
1801 #define ACPI_HMAT_CACHE_LEVEL (0x00 !! 125 u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */
1802 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00 !! 126 u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */
1803 #define ACPI_HMAT_WRITE_POLICY (0x00 !! 127 u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
1804 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFF !! 128 u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */
1805 !! 129 u32 reserved5 : 23; /* Reserved - must be zero */
1806 /* Values for cache associativity flag */ <<
1807 <<
1808 #define ACPI_HMAT_CA_NONE <<
1809 #define ACPI_HMAT_CA_DIRECT_MAPPED <<
1810 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING <<
1811 <<
1812 /* Values for write policy flag */ <<
1813 <<
1814 #define ACPI_HMAT_CP_NONE (0) <<
1815 #define ACPI_HMAT_CP_WB (1) <<
1816 #define ACPI_HMAT_CP_WT (2) <<
1817 <<
1818 /******************************************** <<
1819 * <<
1820 * HPET - High Precision Event Timer table <<
1821 * Version 1 <<
1822 * <<
1823 * Conforms to "IA-PC HPET (High Precision Ev <<
1824 * Version 1.0a, October 2004 <<
1825 * <<
1826 ******************************************** <<
1827 <<
1828 struct acpi_table_hpet { <<
1829 struct acpi_table_header header; <<
1830 u32 id; /* Hardware I <<
1831 struct acpi_generic_address address; <<
1832 u8 sequence; /* HPET seque <<
1833 u16 minimum_tick; /* Main count <<
1834 u8 flags; <<
1835 }; <<
1836 <<
1837 /* Masks for Flags field above */ <<
1838 <<
1839 #define ACPI_HPET_PAGE_PROTECT_MASK (3) <<
1840 <<
1841 /* Values for Page Protect flags */ <<
1842 <<
1843 enum acpi_hpet_page_protect { <<
1844 ACPI_HPET_NO_PAGE_PROTECT = 0, <<
1845 ACPI_HPET_PAGE_PROTECT4 = 1, <<
1846 ACPI_HPET_PAGE_PROTECT64 = 2 <<
1847 }; <<
1848 <<
1849 /******************************************** <<
1850 * <<
1851 * IBFT - Boot Firmware Table <<
1852 * Version 1 <<
1853 * <<
1854 * Conforms to "iSCSI Boot Firmware Table (iB <<
1855 * Specification", Version 1.01, March 1, 200 <<
1856 * <<
1857 * Note: It appears that this table is not in <<
1858 * Therefore, it is not currently supported b <<
1859 * <<
1860 ******************************************** <<
1861 <<
1862 struct acpi_table_ibft { <<
1863 struct acpi_table_header header; <<
1864 u8 reserved[12]; <<
1865 }; <<
1866 <<
1867 /* IBFT common subtable header */ <<
1868 <<
1869 struct acpi_ibft_header { <<
1870 u8 type; <<
1871 u8 version; <<
1872 u16 length; <<
1873 u8 index; <<
1874 u8 flags; <<
1875 }; <<
1876 <<
1877 /* Values for Type field above */ <<
1878 <<
1879 enum acpi_ibft_type { <<
1880 ACPI_IBFT_TYPE_NOT_USED = 0, <<
1881 ACPI_IBFT_TYPE_CONTROL = 1, <<
1882 ACPI_IBFT_TYPE_INITIATOR = 2, <<
1883 ACPI_IBFT_TYPE_NIC = 3, <<
1884 ACPI_IBFT_TYPE_TARGET = 4, <<
1885 ACPI_IBFT_TYPE_EXTENSIONS = 5, <<
1886 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 <<
1887 }; <<
1888 <<
1889 /* IBFT subtables */ <<
1890 <<
1891 struct acpi_ibft_control { <<
1892 struct acpi_ibft_header header; <<
1893 u16 extensions; <<
1894 u16 initiator_offset; <<
1895 u16 nic0_offset; <<
1896 u16 target0_offset; <<
1897 u16 nic1_offset; <<
1898 u16 target1_offset; <<
1899 }; 130 };
1900 131
1901 struct acpi_ibft_initiator { !! 132 #pragma pack()
1902 struct acpi_ibft_header header; <<
1903 u8 sns_server[16]; <<
1904 u8 slp_server[16]; <<
1905 u8 primary_server[16]; <<
1906 u8 secondary_server[16]; <<
1907 u16 name_length; <<
1908 u16 name_offset; <<
1909 }; <<
1910 <<
1911 struct acpi_ibft_nic { <<
1912 struct acpi_ibft_header header; <<
1913 u8 ip_address[16]; <<
1914 u8 subnet_mask_prefix; <<
1915 u8 origin; <<
1916 u8 gateway[16]; <<
1917 u8 primary_dns[16]; <<
1918 u8 secondary_dns[16]; <<
1919 u8 dhcp[16]; <<
1920 u16 vlan; <<
1921 u8 mac_address[6]; <<
1922 u16 pci_address; <<
1923 u16 name_length; <<
1924 u16 name_offset; <<
1925 }; <<
1926 <<
1927 struct acpi_ibft_target { <<
1928 struct acpi_ibft_header header; <<
1929 u8 target_ip_address[16]; <<
1930 u16 target_ip_socket; <<
1931 u8 target_boot_lun[8]; <<
1932 u8 chap_type; <<
1933 u8 nic_association; <<
1934 u16 target_name_length; <<
1935 u16 target_name_offset; <<
1936 u16 chap_name_length; <<
1937 u16 chap_name_offset; <<
1938 u16 chap_secret_length; <<
1939 u16 chap_secret_offset; <<
1940 u16 reverse_chap_name_length; <<
1941 u16 reverse_chap_name_offset; <<
1942 u16 reverse_chap_secret_length; <<
1943 u16 reverse_chap_secret_offset; <<
1944 }; <<
1945 133
1946 /* Reset to default packing */ !! 134 #endif /* __ACTBL1_H__ */
1947 135
1948 #pragma pack() <<
1949 136
1950 #endif /* __ACTBL1_H <<
1951 137
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