1 /* SPDX-License-Identifier: GPL-2.0-only */ !! 1 #ifndef __SPARC64_PCI_H
>> 2 #define __SPARC64_PCI_H
2 3
3 #ifndef __ASM_GENERIC_PCI_H !! 4 #ifdef __KERNEL__
4 #define __ASM_GENERIC_PCI_H <<
5 5
6 #ifndef PCIBIOS_MIN_IO !! 6 #include <linux/fs.h>
7 #define PCIBIOS_MIN_IO 0 !! 7 #include <linux/mm.h>
8 #endif <<
9 8
10 #ifndef PCIBIOS_MIN_MEM !! 9 /* Can be used to override the logic in pci_scan_bus for skipping
11 #define PCIBIOS_MIN_MEM 0 !! 10 * already-configured bus numbers - to be used for buggy BIOSes
12 #endif !! 11 * or architectures with incomplete PCI setup by the loader.
>> 12 */
>> 13 #define pcibios_assign_all_busses() 0
13 14
14 #ifndef pcibios_assign_all_busses !! 15 #define PCIBIOS_MIN_IO 0UL
15 /* For bootloaders that do not initialize the !! 16 #define PCIBIOS_MIN_MEM 0UL
16 #define pcibios_assign_all_busses() 1 <<
17 #endif <<
18 17
19 /* Enable generic resource mapping code in dri !! 18 #define PCI_IRQ_NONE 0xffffffff
20 #define ARCH_GENERIC_PCI_MMAP_RESOURCE <<
21 19
22 #ifdef CONFIG_PCI_DOMAINS !! 20 static inline void pcibios_set_master(struct pci_dev *dev)
23 static inline int pci_proc_domain(struct pci_b <<
24 { 21 {
25 /* always show the domain in /proc */ !! 22 /* No special bus mastering setup handling */
26 return 1; <<
27 } 23 }
28 #endif /* CONFIG_PCI_DOMAINS */ <<
29 24
30 #endif /* __ASM_GENERIC_PCI_H */ !! 25 static inline void pcibios_penalize_isa_irq(int irq)
>> 26 {
>> 27 /* We don't do dynamic PCI IRQ allocation */
>> 28 }
>> 29
>> 30 /* Dynamic DMA mapping stuff.
>> 31 */
>> 32
>> 33 /* The PCI address space does not equal the physical memory
>> 34 * address space. The networking and block device layers use
>> 35 * this boolean for bounce buffer decisions.
>> 36 */
>> 37 #define PCI_DMA_BUS_IS_PHYS (0)
>> 38
>> 39 #include <asm/scatterlist.h>
>> 40
>> 41 struct pci_dev;
>> 42
>> 43 /* Allocate and map kernel buffer using consistent mode DMA for a device.
>> 44 * hwdev should be valid struct pci_dev pointer for PCI devices.
>> 45 */
>> 46 extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
>> 47
>> 48 /* Free and unmap a consistent DMA buffer.
>> 49 * cpu_addr is what was returned from pci_alloc_consistent,
>> 50 * size must be the same as what as passed into pci_alloc_consistent,
>> 51 * and likewise dma_addr must be the same as what *dma_addrp was set to.
>> 52 *
>> 53 * References to the memory and mappings associated with cpu_addr/dma_addr
>> 54 * past this call are illegal.
>> 55 */
>> 56 extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
>> 57
>> 58 /* Map a single buffer of the indicated size for DMA in streaming mode.
>> 59 * The 32-bit bus address to use is returned.
>> 60 *
>> 61 * Once the device is given the dma address, the device owns this memory
>> 62 * until either pci_unmap_single or pci_dma_sync_single is performed.
>> 63 */
>> 64 extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
>> 65
>> 66 /* Unmap a single streaming mode DMA translation. The dma_addr and size
>> 67 * must match what was provided for in a previous pci_map_single call. All
>> 68 * other usages are undefined.
>> 69 *
>> 70 * After this call, reads by the cpu to the buffer are guaranteed to see
>> 71 * whatever the device wrote there.
>> 72 */
>> 73 extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
>> 74
>> 75 /* No highmem on sparc64, plus we have an IOMMU, so mapping pages is easy. */
>> 76 #define pci_map_page(dev, page, off, size, dir) \
>> 77 pci_map_single(dev, (page_address(page) + (off)), size, dir)
>> 78 #define pci_unmap_page(dev,addr,sz,dir) pci_unmap_single(dev,addr,sz,dir)
>> 79
>> 80 /* pci_unmap_{single,page} is not a nop, thus... */
>> 81 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
>> 82 dma_addr_t ADDR_NAME;
>> 83 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
>> 84 __u32 LEN_NAME;
>> 85 #define pci_unmap_addr(PTR, ADDR_NAME) \
>> 86 ((PTR)->ADDR_NAME)
>> 87 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
>> 88 (((PTR)->ADDR_NAME) = (VAL))
>> 89 #define pci_unmap_len(PTR, LEN_NAME) \
>> 90 ((PTR)->LEN_NAME)
>> 91 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
>> 92 (((PTR)->LEN_NAME) = (VAL))
>> 93
>> 94 /* Map a set of buffers described by scatterlist in streaming
>> 95 * mode for DMA. This is the scatter-gather version of the
>> 96 * above pci_map_single interface. Here the scatter gather list
>> 97 * elements are each tagged with the appropriate dma address
>> 98 * and length. They are obtained via sg_dma_{address,length}(SG).
>> 99 *
>> 100 * NOTE: An implementation may be able to use a smaller number of
>> 101 * DMA address/length pairs than there are SG table elements.
>> 102 * (for example via virtual mapping capabilities)
>> 103 * The routine returns the number of addr/length pairs actually
>> 104 * used, at most nents.
>> 105 *
>> 106 * Device ownership issues as mentioned above for pci_map_single are
>> 107 * the same here.
>> 108 */
>> 109 extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
>> 110 int nents, int direction);
>> 111
>> 112 /* Unmap a set of streaming mode DMA translations.
>> 113 * Again, cpu read rules concerning calls here are the same as for
>> 114 * pci_unmap_single() above.
>> 115 */
>> 116 extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
>> 117 int nhwents, int direction);
>> 118
>> 119 /* Make physical memory consistent for a single
>> 120 * streaming mode DMA translation after a transfer.
>> 121 *
>> 122 * If you perform a pci_map_single() but wish to interrogate the
>> 123 * buffer using the cpu, yet do not wish to teardown the PCI dma
>> 124 * mapping, you must call this function before doing so. At the
>> 125 * next point you give the PCI dma address back to the card, the
>> 126 * device again owns the buffer.
>> 127 */
>> 128 extern void pci_dma_sync_single(struct pci_dev *hwdev, dma_addr_t dma_handle,
>> 129 size_t size, int direction);
>> 130
>> 131 /* Make physical memory consistent for a set of streaming
>> 132 * mode DMA translations after a transfer.
>> 133 *
>> 134 * The same as pci_dma_sync_single but for a scatter-gather list,
>> 135 * same rules and usage.
>> 136 */
>> 137 extern void pci_dma_sync_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
>> 138
>> 139 /* Return whether the given PCI device DMA address mask can
>> 140 * be supported properly. For example, if your device can
>> 141 * only drive the low 24-bits during PCI bus mastering, then
>> 142 * you would pass 0x00ffffff as the mask to this function.
>> 143 */
>> 144 extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask);
>> 145
>> 146 /* PCI IOMMU mapping bypass support. */
>> 147
>> 148 /* PCI 64-bit addressing works for all slots on all controller
>> 149 * types on sparc64. However, it requires that the device
>> 150 * can drive enough of the 64 bits.
>> 151 */
>> 152 #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0)
>> 153 #define PCI64_ADDR_BASE 0xfffc000000000000
>> 154
>> 155 /* Usage of the pci_dac_foo interfaces is only valid if this
>> 156 * test passes.
>> 157 */
>> 158 #define pci_dac_dma_supported(pci_dev, mask) \
>> 159 ((((mask) & PCI64_REQUIRED_MASK) == PCI64_REQUIRED_MASK) ? 1 : 0)
>> 160
>> 161 static __inline__ dma64_addr_t
>> 162 pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
>> 163 {
>> 164 return (PCI64_ADDR_BASE +
>> 165 __pa(page_address(page)) + offset);
>> 166 }
>> 167
>> 168 static __inline__ struct page *
>> 169 pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
>> 170 {
>> 171 unsigned long paddr = (dma_addr & PAGE_MASK) - PCI64_ADDR_BASE;
>> 172
>> 173 return virt_to_page(__va(paddr));
>> 174 }
>> 175
>> 176 static __inline__ unsigned long
>> 177 pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
>> 178 {
>> 179 return (dma_addr & ~PAGE_MASK);
>> 180 }
>> 181
>> 182 static __inline__ void
>> 183 pci_dac_dma_sync_single(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
>> 184 {
>> 185 /* DAC cycle addressing does not make use of the
>> 186 * PCI controller's streaming cache, so nothing to do.
>> 187 */
>> 188 }
>> 189
>> 190 /* Return the index of the PCI controller for device PDEV. */
>> 191
>> 192 extern int pci_domain_nr(struct pci_bus *bus);
>> 193 extern int pci_name_bus(char *name, struct pci_bus *bus);
>> 194
>> 195 /* Platform support for /proc/bus/pci/X/Y mmap()s. */
>> 196
>> 197 #define HAVE_PCI_MMAP
>> 198 #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
>> 199 #define get_pci_unmapped_area get_fb_unmapped_area
>> 200
>> 201 extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
>> 202 enum pci_mmap_state mmap_state,
>> 203 int write_combine);
>> 204
>> 205 /* Platform specific MWI support. */
>> 206 #define HAVE_ARCH_PCI_MWI
>> 207 extern int pcibios_prep_mwi(struct pci_dev *dev);
>> 208
>> 209 extern void
>> 210 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
>> 211 struct resource *res);
>> 212
>> 213 extern void
>> 214 pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
>> 215 struct pci_bus_region *region);
>> 216
>> 217 #endif /* __KERNEL__ */
>> 218
>> 219 #endif /* __SPARC64_PCI_H */
31 220
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