1 /* SPDX-License-Identifier: GPL-2.0-or-later * 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 2 /* 3 * This header provides constants for AT91 pmc 3 * This header provides constants for AT91 pmc status. 4 * 4 * 5 * The constants defined in this header are be 5 * The constants defined in this header are being used in dts. 6 */ 6 */ 7 7 8 #ifndef _DT_BINDINGS_CLK_AT91_H 8 #ifndef _DT_BINDINGS_CLK_AT91_H 9 #define _DT_BINDINGS_CLK_AT91_H 9 #define _DT_BINDINGS_CLK_AT91_H 10 10 11 #define PMC_TYPE_CORE 0 11 #define PMC_TYPE_CORE 0 12 #define PMC_TYPE_SYSTEM 1 12 #define PMC_TYPE_SYSTEM 1 13 #define PMC_TYPE_PERIPHERAL 2 13 #define PMC_TYPE_PERIPHERAL 2 14 #define PMC_TYPE_GCK 3 14 #define PMC_TYPE_GCK 3 15 #define PMC_TYPE_PROGRAMMABLE 4 15 #define PMC_TYPE_PROGRAMMABLE 4 16 16 17 #define PMC_SLOW 0 17 #define PMC_SLOW 0 18 #define PMC_MCK 1 18 #define PMC_MCK 1 19 #define PMC_UTMI 2 19 #define PMC_UTMI 2 20 #define PMC_MAIN 3 20 #define PMC_MAIN 3 21 #define PMC_MCK2 4 21 #define PMC_MCK2 4 22 #define PMC_I2S0_MUX 5 22 #define PMC_I2S0_MUX 5 23 #define PMC_I2S1_MUX 6 23 #define PMC_I2S1_MUX 6 24 #define PMC_PLLACK 7 24 #define PMC_PLLACK 7 25 #define PMC_PLLBCK 8 25 #define PMC_PLLBCK 8 26 #define PMC_AUDIOPLLCK 9 26 #define PMC_AUDIOPLLCK 9 27 #define PMC_AUDIOPINCK 10 << 28 27 29 /* SAMA7G5 */ 28 /* SAMA7G5 */ 30 #define PMC_CPUPLL (PMC_MAIN + 1) 29 #define PMC_CPUPLL (PMC_MAIN + 1) 31 #define PMC_SYSPLL (PMC_MAIN + 2) 30 #define PMC_SYSPLL (PMC_MAIN + 2) 32 #define PMC_DDRPLL (PMC_MAIN + 3) 31 #define PMC_DDRPLL (PMC_MAIN + 3) 33 #define PMC_IMGPLL (PMC_MAIN + 4) 32 #define PMC_IMGPLL (PMC_MAIN + 4) 34 #define PMC_BAUDPLL (PMC_MAIN + 5) 33 #define PMC_BAUDPLL (PMC_MAIN + 5) 35 #define PMC_AUDIOPMCPLL (PMC_MAIN + 6) 34 #define PMC_AUDIOPMCPLL (PMC_MAIN + 6) 36 #define PMC_AUDIOIOPLL (PMC_MAIN + 7) 35 #define PMC_AUDIOIOPLL (PMC_MAIN + 7) 37 #define PMC_ETHPLL (PMC_MAIN + 8) 36 #define PMC_ETHPLL (PMC_MAIN + 8) 38 #define PMC_CPU (PMC_MAIN + 9) 37 #define PMC_CPU (PMC_MAIN + 9) 39 #define PMC_MCK1 (PMC_MAIN + 10 << 40 << 41 /* SAM9X7 */ << 42 #define PMC_PLLADIV2 (PMC_MAIN + 11 << 43 #define PMC_LVDSPLL (PMC_MAIN + 12 << 44 38 45 #ifndef AT91_PMC_MOSCS 39 #ifndef AT91_PMC_MOSCS 46 #define AT91_PMC_MOSCS 0 40 #define AT91_PMC_MOSCS 0 /* MOSCS Flag */ 47 #define AT91_PMC_LOCKA 1 41 #define AT91_PMC_LOCKA 1 /* PLLA Lock */ 48 #define AT91_PMC_LOCKB 2 42 #define AT91_PMC_LOCKB 2 /* PLLB Lock */ 49 #define AT91_PMC_MCKRDY 3 43 #define AT91_PMC_MCKRDY 3 /* Master Clock */ 50 #define AT91_PMC_LOCKU 6 44 #define AT91_PMC_LOCKU 6 /* UPLL Lock */ 51 #define AT91_PMC_PCKRDY(id) (8 + (id)) 45 #define AT91_PMC_PCKRDY(id) (8 + (id)) /* Programmable Clock */ 52 #define AT91_PMC_MOSCSELS 16 46 #define AT91_PMC_MOSCSELS 16 /* Main Oscillator Selection */ 53 #define AT91_PMC_MOSCRCS 17 47 #define AT91_PMC_MOSCRCS 17 /* Main On-Chip RC */ 54 #define AT91_PMC_CFDEV 18 48 #define AT91_PMC_CFDEV 18 /* Clock Failure Detector Event */ 55 #define AT91_PMC_GCKRDY 24 49 #define AT91_PMC_GCKRDY 24 /* Generated Clocks */ 56 #endif 50 #endif 57 51 58 #endif 52 #endif 59 53
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