1 /* 1 2 * BSD LICENSE 3 * 4 * Copyright(c) 2015 Broadcom Corporation. A 5 * 6 * Redistribution and use in source and binar 7 * modification, are permitted provided that 8 * are met: 9 * 10 * * Redistributions of source code must 11 * notice, this list of conditions and 12 * * Redistributions in binary form must 13 * notice, this list of conditions and 14 * the documentation and/or other mater 15 * distribution. 16 * * Neither the name of Broadcom Corpora 17 * contributors may be used to endorse 18 * from this software without specific 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANT 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERC 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DI 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAG 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOOD 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISIN 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE PO 31 */ 32 33 #ifndef _CLOCK_BCM_NSP_H 34 #define _CLOCK_BCM_NSP_H 35 36 /* GENPLL clock channel ID */ 37 #define BCM_NSP_GENPLL 0 38 #define BCM_NSP_GENPLL_PHY_CLK 1 39 #define BCM_NSP_GENPLL_ENET_SW_CLK 2 40 #define BCM_NSP_GENPLL_USB_PHY_REF_CLK 3 41 #define BCM_NSP_GENPLL_IPROCFAST_CLK 4 42 #define BCM_NSP_GENPLL_SATA1_CLK 5 43 #define BCM_NSP_GENPLL_SATA2_CLK 6 44 45 /* LCPLL0 clock channel ID */ 46 #define BCM_NSP_LCPLL0 0 47 #define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK 1 48 #define BCM_NSP_LCPLL0_SDIO_CLK 2 49 #define BCM_NSP_LCPLL0_DDR_PHY_CLK 3 50 51 #endif /* _CLOCK_BCM_NSP_H */ 52
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