1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Copyright (C) 2013 Broadcom Corporation 2 * Copyright (C) 2013 Broadcom Corporation
4 * Copyright 2013 Linaro Limited 3 * Copyright 2013 Linaro Limited
>> 4 *
>> 5 * This program is free software; you can redistribute it and/or
>> 6 * modify it under the terms of the GNU General Public License as
>> 7 * published by the Free Software Foundation version 2.
>> 8 *
>> 9 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
>> 10 * kind, whether express or implied; without even the implied warranty
>> 11 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 12 * GNU General Public License for more details.
5 */ 13 */
6 14
7 #ifndef _CLOCK_BCM21664_H 15 #ifndef _CLOCK_BCM21664_H
8 #define _CLOCK_BCM21664_H 16 #define _CLOCK_BCM21664_H
9 17
10 /* 18 /*
11 * This file defines the values used to specif 19 * This file defines the values used to specify clocks provided by
12 * the clock control units (CCUs) on Broadcom 20 * the clock control units (CCUs) on Broadcom BCM21664 family SoCs.
13 */ 21 */
14 22
15 /* bcm21664 CCU device tree "compatible" strin 23 /* bcm21664 CCU device tree "compatible" strings */
16 #define BCM21664_DT_ROOT_CCU_COMPAT "brcm, 24 #define BCM21664_DT_ROOT_CCU_COMPAT "brcm,bcm21664-root-ccu"
17 #define BCM21664_DT_AON_CCU_COMPAT "brcm, 25 #define BCM21664_DT_AON_CCU_COMPAT "brcm,bcm21664-aon-ccu"
18 #define BCM21664_DT_MASTER_CCU_COMPAT "brcm, 26 #define BCM21664_DT_MASTER_CCU_COMPAT "brcm,bcm21664-master-ccu"
19 #define BCM21664_DT_SLAVE_CCU_COMPAT "brcm, 27 #define BCM21664_DT_SLAVE_CCU_COMPAT "brcm,bcm21664-slave-ccu"
20 28
21 /* root CCU clock ids */ 29 /* root CCU clock ids */
22 30
23 #define BCM21664_ROOT_CCU_FRAC_1M 31 #define BCM21664_ROOT_CCU_FRAC_1M 0
24 #define BCM21664_ROOT_CCU_CLOCK_COUNT 32 #define BCM21664_ROOT_CCU_CLOCK_COUNT 1
25 33
26 /* aon CCU clock ids */ 34 /* aon CCU clock ids */
27 35
28 #define BCM21664_AON_CCU_HUB_TIMER 36 #define BCM21664_AON_CCU_HUB_TIMER 0
29 #define BCM21664_AON_CCU_CLOCK_COUNT 37 #define BCM21664_AON_CCU_CLOCK_COUNT 1
30 38
31 /* master CCU clock ids */ 39 /* master CCU clock ids */
32 40
33 #define BCM21664_MASTER_CCU_SDIO1 41 #define BCM21664_MASTER_CCU_SDIO1 0
34 #define BCM21664_MASTER_CCU_SDIO2 42 #define BCM21664_MASTER_CCU_SDIO2 1
35 #define BCM21664_MASTER_CCU_SDIO3 43 #define BCM21664_MASTER_CCU_SDIO3 2
36 #define BCM21664_MASTER_CCU_SDIO4 44 #define BCM21664_MASTER_CCU_SDIO4 3
37 #define BCM21664_MASTER_CCU_SDIO1_SLEEP 45 #define BCM21664_MASTER_CCU_SDIO1_SLEEP 4
38 #define BCM21664_MASTER_CCU_SDIO2_SLEEP 46 #define BCM21664_MASTER_CCU_SDIO2_SLEEP 5
39 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 47 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 6
40 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 48 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 7
41 #define BCM21664_MASTER_CCU_CLOCK_COUNT 49 #define BCM21664_MASTER_CCU_CLOCK_COUNT 8
42 50
43 /* slave CCU clock ids */ 51 /* slave CCU clock ids */
44 52
45 #define BCM21664_SLAVE_CCU_UARTB 53 #define BCM21664_SLAVE_CCU_UARTB 0
46 #define BCM21664_SLAVE_CCU_UARTB2 54 #define BCM21664_SLAVE_CCU_UARTB2 1
47 #define BCM21664_SLAVE_CCU_UARTB3 55 #define BCM21664_SLAVE_CCU_UARTB3 2
48 #define BCM21664_SLAVE_CCU_BSC1 56 #define BCM21664_SLAVE_CCU_BSC1 3
49 #define BCM21664_SLAVE_CCU_BSC2 57 #define BCM21664_SLAVE_CCU_BSC2 4
50 #define BCM21664_SLAVE_CCU_BSC3 58 #define BCM21664_SLAVE_CCU_BSC3 5
51 #define BCM21664_SLAVE_CCU_BSC4 59 #define BCM21664_SLAVE_CCU_BSC4 6
52 #define BCM21664_SLAVE_CCU_CLOCK_COUNT 60 #define BCM21664_SLAVE_CCU_CLOCK_COUNT 7
53 61
54 #endif /* _CLOCK_BCM21664_H */ 62 #endif /* _CLOCK_BCM21664_H */
55 63
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