1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 2 /* 3 * Copyright (C) 2013 Broadcom Corporation 3 * Copyright (C) 2013 Broadcom Corporation 4 * Copyright 2013 Linaro Limited 4 * Copyright 2013 Linaro Limited 5 */ 5 */ 6 6 7 #ifndef _CLOCK_BCM21664_H 7 #ifndef _CLOCK_BCM21664_H 8 #define _CLOCK_BCM21664_H 8 #define _CLOCK_BCM21664_H 9 9 10 /* 10 /* 11 * This file defines the values used to specif 11 * This file defines the values used to specify clocks provided by 12 * the clock control units (CCUs) on Broadcom 12 * the clock control units (CCUs) on Broadcom BCM21664 family SoCs. 13 */ 13 */ 14 14 15 /* bcm21664 CCU device tree "compatible" strin 15 /* bcm21664 CCU device tree "compatible" strings */ 16 #define BCM21664_DT_ROOT_CCU_COMPAT "brcm, 16 #define BCM21664_DT_ROOT_CCU_COMPAT "brcm,bcm21664-root-ccu" 17 #define BCM21664_DT_AON_CCU_COMPAT "brcm, 17 #define BCM21664_DT_AON_CCU_COMPAT "brcm,bcm21664-aon-ccu" 18 #define BCM21664_DT_MASTER_CCU_COMPAT "brcm, 18 #define BCM21664_DT_MASTER_CCU_COMPAT "brcm,bcm21664-master-ccu" 19 #define BCM21664_DT_SLAVE_CCU_COMPAT "brcm, 19 #define BCM21664_DT_SLAVE_CCU_COMPAT "brcm,bcm21664-slave-ccu" 20 20 21 /* root CCU clock ids */ 21 /* root CCU clock ids */ 22 22 23 #define BCM21664_ROOT_CCU_FRAC_1M 23 #define BCM21664_ROOT_CCU_FRAC_1M 0 24 #define BCM21664_ROOT_CCU_CLOCK_COUNT 24 #define BCM21664_ROOT_CCU_CLOCK_COUNT 1 25 25 26 /* aon CCU clock ids */ 26 /* aon CCU clock ids */ 27 27 28 #define BCM21664_AON_CCU_HUB_TIMER 28 #define BCM21664_AON_CCU_HUB_TIMER 0 29 #define BCM21664_AON_CCU_CLOCK_COUNT 29 #define BCM21664_AON_CCU_CLOCK_COUNT 1 30 30 31 /* master CCU clock ids */ 31 /* master CCU clock ids */ 32 32 33 #define BCM21664_MASTER_CCU_SDIO1 33 #define BCM21664_MASTER_CCU_SDIO1 0 34 #define BCM21664_MASTER_CCU_SDIO2 34 #define BCM21664_MASTER_CCU_SDIO2 1 35 #define BCM21664_MASTER_CCU_SDIO3 35 #define BCM21664_MASTER_CCU_SDIO3 2 36 #define BCM21664_MASTER_CCU_SDIO4 36 #define BCM21664_MASTER_CCU_SDIO4 3 37 #define BCM21664_MASTER_CCU_SDIO1_SLEEP 37 #define BCM21664_MASTER_CCU_SDIO1_SLEEP 4 38 #define BCM21664_MASTER_CCU_SDIO2_SLEEP 38 #define BCM21664_MASTER_CCU_SDIO2_SLEEP 5 39 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 39 #define BCM21664_MASTER_CCU_SDIO3_SLEEP 6 40 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 40 #define BCM21664_MASTER_CCU_SDIO4_SLEEP 7 41 #define BCM21664_MASTER_CCU_CLOCK_COUNT 41 #define BCM21664_MASTER_CCU_CLOCK_COUNT 8 42 42 43 /* slave CCU clock ids */ 43 /* slave CCU clock ids */ 44 44 45 #define BCM21664_SLAVE_CCU_UARTB 45 #define BCM21664_SLAVE_CCU_UARTB 0 46 #define BCM21664_SLAVE_CCU_UARTB2 46 #define BCM21664_SLAVE_CCU_UARTB2 1 47 #define BCM21664_SLAVE_CCU_UARTB3 47 #define BCM21664_SLAVE_CCU_UARTB3 2 48 #define BCM21664_SLAVE_CCU_BSC1 48 #define BCM21664_SLAVE_CCU_BSC1 3 49 #define BCM21664_SLAVE_CCU_BSC2 49 #define BCM21664_SLAVE_CCU_BSC2 4 50 #define BCM21664_SLAVE_CCU_BSC3 50 #define BCM21664_SLAVE_CCU_BSC3 5 51 #define BCM21664_SLAVE_CCU_BSC4 51 #define BCM21664_SLAVE_CCU_BSC4 6 52 #define BCM21664_SLAVE_CCU_CLOCK_COUNT 52 #define BCM21664_SLAVE_CCU_CLOCK_COUNT 7 53 53 54 #endif /* _CLOCK_BCM21664_H */ 54 #endif /* _CLOCK_BCM21664_H */ 55 55
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