1 /* SPDX-License-Identifier: GPL-2.0+ */ 1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 2 3 #ifndef __DT_BINDINGS_CLOCK_BCM6328_H 3 #ifndef __DT_BINDINGS_CLOCK_BCM6328_H 4 #define __DT_BINDINGS_CLOCK_BCM6328_H 4 #define __DT_BINDINGS_CLOCK_BCM6328_H 5 5 6 #define BCM6328_CLK_PHYMIPS 0 6 #define BCM6328_CLK_PHYMIPS 0 7 #define BCM6328_CLK_ADSL_QPROC 1 7 #define BCM6328_CLK_ADSL_QPROC 1 8 #define BCM6328_CLK_ADSL_AFE 2 8 #define BCM6328_CLK_ADSL_AFE 2 9 #define BCM6328_CLK_ADSL 3 9 #define BCM6328_CLK_ADSL 3 10 #define BCM6328_CLK_MIPS 4 10 #define BCM6328_CLK_MIPS 4 11 #define BCM6328_CLK_SAR 5 11 #define BCM6328_CLK_SAR 5 12 #define BCM6328_CLK_PCM 6 12 #define BCM6328_CLK_PCM 6 13 #define BCM6328_CLK_USBD 7 13 #define BCM6328_CLK_USBD 7 14 #define BCM6328_CLK_USBH 8 14 #define BCM6328_CLK_USBH 8 15 #define BCM6328_CLK_HSSPI 9 15 #define BCM6328_CLK_HSSPI 9 16 #define BCM6328_CLK_PCIE 10 16 #define BCM6328_CLK_PCIE 10 17 #define BCM6328_CLK_ROBOSW 11 17 #define BCM6328_CLK_ROBOSW 11 18 18 19 #endif /* __DT_BINDINGS_CLOCK_BCM6328_H */ 19 #endif /* __DT_BINDINGS_CLOCK_BCM6328_H */ 20 20
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