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Linux/include/dt-bindings/clock/ingenic,jz4725b-cgu.h

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Diff markup

Differences between /include/dt-bindings/clock/ingenic,jz4725b-cgu.h (Architecture sparc64) and /include/dt-bindings/clock/ingenic,jz4725b-cgu.h (Architecture m68k)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 /* SPDX-License-Identifier: GPL-2.0 */
  2 /*                                                  2 /*
  3  * This header provides clock numbers for the       3  * This header provides clock numbers for the ingenic,jz4725b-cgu DT binding.
  4  */                                                 4  */
  5                                                     5 
  6 #ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__         6 #ifndef __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__
  7 #define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__         7 #define __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__
  8                                                     8 
  9 #define JZ4725B_CLK_EXT         0                   9 #define JZ4725B_CLK_EXT         0
 10 #define JZ4725B_CLK_OSC32K      1                  10 #define JZ4725B_CLK_OSC32K      1
 11 #define JZ4725B_CLK_PLL         2                  11 #define JZ4725B_CLK_PLL         2
 12 #define JZ4725B_CLK_PLL_HALF    3                  12 #define JZ4725B_CLK_PLL_HALF    3
 13 #define JZ4725B_CLK_CCLK        4                  13 #define JZ4725B_CLK_CCLK        4
 14 #define JZ4725B_CLK_HCLK        5                  14 #define JZ4725B_CLK_HCLK        5
 15 #define JZ4725B_CLK_PCLK        6                  15 #define JZ4725B_CLK_PCLK        6
 16 #define JZ4725B_CLK_MCLK        7                  16 #define JZ4725B_CLK_MCLK        7
 17 #define JZ4725B_CLK_IPU         8                  17 #define JZ4725B_CLK_IPU         8
 18 #define JZ4725B_CLK_LCD         9                  18 #define JZ4725B_CLK_LCD         9
 19 #define JZ4725B_CLK_I2S         10                 19 #define JZ4725B_CLK_I2S         10
 20 #define JZ4725B_CLK_SPI         11                 20 #define JZ4725B_CLK_SPI         11
 21 #define JZ4725B_CLK_MMC_MUX     12                 21 #define JZ4725B_CLK_MMC_MUX     12
 22 #define JZ4725B_CLK_UDC         13                 22 #define JZ4725B_CLK_UDC         13
 23 #define JZ4725B_CLK_UART        14                 23 #define JZ4725B_CLK_UART        14
 24 #define JZ4725B_CLK_DMA         15                 24 #define JZ4725B_CLK_DMA         15
 25 #define JZ4725B_CLK_ADC         16                 25 #define JZ4725B_CLK_ADC         16
 26 #define JZ4725B_CLK_I2C         17                 26 #define JZ4725B_CLK_I2C         17
 27 #define JZ4725B_CLK_AIC         18                 27 #define JZ4725B_CLK_AIC         18
 28 #define JZ4725B_CLK_MMC0        19                 28 #define JZ4725B_CLK_MMC0        19
 29 #define JZ4725B_CLK_MMC1        20                 29 #define JZ4725B_CLK_MMC1        20
 30 #define JZ4725B_CLK_BCH         21                 30 #define JZ4725B_CLK_BCH         21
 31 #define JZ4725B_CLK_TCU         22                 31 #define JZ4725B_CLK_TCU         22
 32 #define JZ4725B_CLK_EXT512      23                 32 #define JZ4725B_CLK_EXT512      23
 33 #define JZ4725B_CLK_RTC         24                 33 #define JZ4725B_CLK_RTC         24
 34 #define JZ4725B_CLK_UDC_PHY     25                 34 #define JZ4725B_CLK_UDC_PHY     25
 35                                                    35 
 36 #endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__      36 #endif /* __DT_BINDINGS_CLOCK_JZ4725B_CGU_H__ */
 37                                                    37 

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