1 /* 1 /* 2 * Copyright (c) 2015 Vladimir Zapolskiy <vz@m 2 * Copyright (c) 2015 Vladimir Zapolskiy <vz@mleia.com> 3 * 3 * 4 * This code is released using a dual license 4 * This code is released using a dual license strategy: BSD/GPL 5 * You can choose the licence that better fits 5 * You can choose the licence that better fits your requirements. 6 * 6 * 7 * Released under the terms of 3-clause BSD Li 7 * Released under the terms of 3-clause BSD License 8 * Released under the terms of GNU General Pub 8 * Released under the terms of GNU General Public License Version 2.0 9 * 9 * 10 */ 10 */ 11 11 12 #ifndef __DT_BINDINGS_LPC32XX_CLOCK_H 12 #ifndef __DT_BINDINGS_LPC32XX_CLOCK_H 13 #define __DT_BINDINGS_LPC32XX_CLOCK_H 13 #define __DT_BINDINGS_LPC32XX_CLOCK_H 14 14 15 /* LPC32XX System Control Block clocks */ 15 /* LPC32XX System Control Block clocks */ 16 #define LPC32XX_CLK_RTC 1 16 #define LPC32XX_CLK_RTC 1 17 #define LPC32XX_CLK_DMA 2 17 #define LPC32XX_CLK_DMA 2 18 #define LPC32XX_CLK_MLC 3 18 #define LPC32XX_CLK_MLC 3 19 #define LPC32XX_CLK_SLC 4 19 #define LPC32XX_CLK_SLC 4 20 #define LPC32XX_CLK_LCD 5 20 #define LPC32XX_CLK_LCD 5 21 #define LPC32XX_CLK_MAC 6 21 #define LPC32XX_CLK_MAC 6 22 #define LPC32XX_CLK_SD 7 22 #define LPC32XX_CLK_SD 7 23 #define LPC32XX_CLK_DDRAM 8 23 #define LPC32XX_CLK_DDRAM 8 24 #define LPC32XX_CLK_SSP0 9 24 #define LPC32XX_CLK_SSP0 9 25 #define LPC32XX_CLK_SSP1 10 25 #define LPC32XX_CLK_SSP1 10 26 #define LPC32XX_CLK_UART3 11 26 #define LPC32XX_CLK_UART3 11 27 #define LPC32XX_CLK_UART4 12 27 #define LPC32XX_CLK_UART4 12 28 #define LPC32XX_CLK_UART5 13 28 #define LPC32XX_CLK_UART5 13 29 #define LPC32XX_CLK_UART6 14 29 #define LPC32XX_CLK_UART6 14 30 #define LPC32XX_CLK_IRDA 15 30 #define LPC32XX_CLK_IRDA 15 31 #define LPC32XX_CLK_I2C1 16 31 #define LPC32XX_CLK_I2C1 16 32 #define LPC32XX_CLK_I2C2 17 32 #define LPC32XX_CLK_I2C2 17 33 #define LPC32XX_CLK_TIMER0 18 33 #define LPC32XX_CLK_TIMER0 18 34 #define LPC32XX_CLK_TIMER1 19 34 #define LPC32XX_CLK_TIMER1 19 35 #define LPC32XX_CLK_TIMER2 20 35 #define LPC32XX_CLK_TIMER2 20 36 #define LPC32XX_CLK_TIMER3 21 36 #define LPC32XX_CLK_TIMER3 21 37 #define LPC32XX_CLK_TIMER4 22 37 #define LPC32XX_CLK_TIMER4 22 38 #define LPC32XX_CLK_TIMER5 23 38 #define LPC32XX_CLK_TIMER5 23 39 #define LPC32XX_CLK_WDOG 24 39 #define LPC32XX_CLK_WDOG 24 40 #define LPC32XX_CLK_I2S0 25 40 #define LPC32XX_CLK_I2S0 25 41 #define LPC32XX_CLK_I2S1 26 41 #define LPC32XX_CLK_I2S1 26 42 #define LPC32XX_CLK_SPI1 27 42 #define LPC32XX_CLK_SPI1 27 43 #define LPC32XX_CLK_SPI2 28 43 #define LPC32XX_CLK_SPI2 28 44 #define LPC32XX_CLK_MCPWM 29 44 #define LPC32XX_CLK_MCPWM 29 45 #define LPC32XX_CLK_HSTIMER 30 45 #define LPC32XX_CLK_HSTIMER 30 46 #define LPC32XX_CLK_KEY 31 46 #define LPC32XX_CLK_KEY 31 47 #define LPC32XX_CLK_PWM1 32 47 #define LPC32XX_CLK_PWM1 32 48 #define LPC32XX_CLK_PWM2 33 48 #define LPC32XX_CLK_PWM2 33 49 #define LPC32XX_CLK_ADC 34 49 #define LPC32XX_CLK_ADC 34 50 #define LPC32XX_CLK_HCLK_PLL 35 50 #define LPC32XX_CLK_HCLK_PLL 35 51 #define LPC32XX_CLK_PERIPH 36 51 #define LPC32XX_CLK_PERIPH 36 52 52 53 /* LPC32XX USB clocks */ 53 /* LPC32XX USB clocks */ 54 #define LPC32XX_USB_CLK_I2C 1 54 #define LPC32XX_USB_CLK_I2C 1 55 #define LPC32XX_USB_CLK_DEVICE 2 55 #define LPC32XX_USB_CLK_DEVICE 2 56 #define LPC32XX_USB_CLK_HOST 3 56 #define LPC32XX_USB_CLK_HOST 3 57 57 58 #endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */ 58 #endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */ 59 59
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