1 /* SPDX-License-Identifier: (GPL-2.0-only OR B 1 2 /* 3 * Copyright (c) 2021, The Linux Foundation. A 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H 7 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SC7280_H 8 9 /* DISP_CC clocks */ 10 #define DISP_CC_PLL0 11 #define DISP_CC_MDSS_AHB_CLK 12 #define DISP_CC_MDSS_AHB_CLK_SRC 13 #define DISP_CC_MDSS_BYTE0_CLK 14 #define DISP_CC_MDSS_BYTE0_CLK_SRC 15 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 16 #define DISP_CC_MDSS_BYTE0_INTF_CLK 17 #define DISP_CC_MDSS_DP_AUX_CLK 18 #define DISP_CC_MDSS_DP_AUX_CLK_SRC 19 #define DISP_CC_MDSS_DP_CRYPTO_CLK 20 #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 21 #define DISP_CC_MDSS_DP_LINK_CLK 22 #define DISP_CC_MDSS_DP_LINK_CLK_SRC 23 #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC 24 #define DISP_CC_MDSS_DP_LINK_INTF_CLK 25 #define DISP_CC_MDSS_DP_PIXEL_CLK 26 #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 27 #define DISP_CC_MDSS_EDP_AUX_CLK 28 #define DISP_CC_MDSS_EDP_AUX_CLK_SRC 29 #define DISP_CC_MDSS_EDP_LINK_CLK 30 #define DISP_CC_MDSS_EDP_LINK_CLK_SRC 31 #define DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC 32 #define DISP_CC_MDSS_EDP_LINK_INTF_CLK 33 #define DISP_CC_MDSS_EDP_PIXEL_CLK 34 #define DISP_CC_MDSS_EDP_PIXEL_CLK_SRC 35 #define DISP_CC_MDSS_ESC0_CLK 36 #define DISP_CC_MDSS_ESC0_CLK_SRC 37 #define DISP_CC_MDSS_MDP_CLK 38 #define DISP_CC_MDSS_MDP_CLK_SRC 39 #define DISP_CC_MDSS_MDP_LUT_CLK 40 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 41 #define DISP_CC_MDSS_PCLK0_CLK 42 #define DISP_CC_MDSS_PCLK0_CLK_SRC 43 #define DISP_CC_MDSS_ROT_CLK 44 #define DISP_CC_MDSS_ROT_CLK_SRC 45 #define DISP_CC_MDSS_RSCC_AHB_CLK 46 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 47 #define DISP_CC_MDSS_VSYNC_CLK 48 #define DISP_CC_MDSS_VSYNC_CLK_SRC 49 #define DISP_CC_SLEEP_CLK 50 #define DISP_CC_XO_CLK 51 52 /* DISP_CC power domains */ 53 #define DISP_CC_MDSS_CORE_GDSC 54 55 #endif 56
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