1 /* SPDX-License-Identifier: (GPL-2.0-only OR B 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 2 /* 2 /* 3 * Copyright (c) 2021, The Linux Foundation. A 3 * Copyright (c) 2021, The Linux Foundation. All rights reserved. 4 */ 4 */ 5 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H 6 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H 7 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H 7 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6125_H 8 8 9 #define DISP_CC_PLL0 0 9 #define DISP_CC_PLL0 0 10 #define DISP_CC_MDSS_AHB_CLK 1 10 #define DISP_CC_MDSS_AHB_CLK 1 11 #define DISP_CC_MDSS_AHB_CLK_SRC 2 11 #define DISP_CC_MDSS_AHB_CLK_SRC 2 12 #define DISP_CC_MDSS_BYTE0_CLK 3 12 #define DISP_CC_MDSS_BYTE0_CLK 3 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 4 14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 14 #define DISP_CC_MDSS_BYTE0_INTF_CLK 5 15 #define DISP_CC_MDSS_DP_AUX_CLK 6 15 #define DISP_CC_MDSS_DP_AUX_CLK 6 16 #define DISP_CC_MDSS_DP_AUX_CLK_SRC 7 16 #define DISP_CC_MDSS_DP_AUX_CLK_SRC 7 17 #define DISP_CC_MDSS_DP_CRYPTO_CLK 8 17 #define DISP_CC_MDSS_DP_CRYPTO_CLK 8 18 #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 9 18 #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC 9 19 #define DISP_CC_MDSS_DP_LINK_CLK 10 19 #define DISP_CC_MDSS_DP_LINK_CLK 10 20 #define DISP_CC_MDSS_DP_LINK_CLK_SRC 11 20 #define DISP_CC_MDSS_DP_LINK_CLK_SRC 11 21 #define DISP_CC_MDSS_DP_LINK_INTF_CLK 12 21 #define DISP_CC_MDSS_DP_LINK_INTF_CLK 12 22 #define DISP_CC_MDSS_DP_PIXEL_CLK 13 22 #define DISP_CC_MDSS_DP_PIXEL_CLK 13 23 #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 14 23 #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 14 24 #define DISP_CC_MDSS_ESC0_CLK 15 24 #define DISP_CC_MDSS_ESC0_CLK 15 25 #define DISP_CC_MDSS_ESC0_CLK_SRC 16 25 #define DISP_CC_MDSS_ESC0_CLK_SRC 16 26 #define DISP_CC_MDSS_MDP_CLK 17 26 #define DISP_CC_MDSS_MDP_CLK 17 27 #define DISP_CC_MDSS_MDP_CLK_SRC 18 27 #define DISP_CC_MDSS_MDP_CLK_SRC 18 28 #define DISP_CC_MDSS_MDP_LUT_CLK 19 28 #define DISP_CC_MDSS_MDP_LUT_CLK 19 29 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 20 29 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 20 30 #define DISP_CC_MDSS_PCLK0_CLK 21 30 #define DISP_CC_MDSS_PCLK0_CLK 21 31 #define DISP_CC_MDSS_PCLK0_CLK_SRC 22 31 #define DISP_CC_MDSS_PCLK0_CLK_SRC 22 32 #define DISP_CC_MDSS_ROT_CLK 23 32 #define DISP_CC_MDSS_ROT_CLK 23 33 #define DISP_CC_MDSS_ROT_CLK_SRC 24 33 #define DISP_CC_MDSS_ROT_CLK_SRC 24 34 #define DISP_CC_MDSS_VSYNC_CLK 25 34 #define DISP_CC_MDSS_VSYNC_CLK 25 35 #define DISP_CC_MDSS_VSYNC_CLK_SRC 26 35 #define DISP_CC_MDSS_VSYNC_CLK_SRC 26 36 #define DISP_CC_XO_CLK 27 36 #define DISP_CC_XO_CLK 27 37 37 38 /* DISP_CC GDSCR */ 38 /* DISP_CC GDSCR */ 39 #define MDSS_GDSC 0 39 #define MDSS_GDSC 0 40 40 41 #endif 41 #endif 42 42
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