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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,dispcc-sm6350.h

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Diff markup

Differences between /include/dt-bindings/clock/qcom,dispcc-sm6350.h (Version linux-6.12-rc7) and /include/dt-bindings/clock/qcom,dispcc-sm6350.h (Version linux-4.20.17)


  1 /* SPDX-License-Identifier: (GPL-2.0-only OR B      1 
  2 /*                                                
  3  * Copyright (c) 2021, The Linux Foundation. A    
  4  * Copyright (c) 2021, Konrad Dybcio <konrad.d    
  5  */                                               
  6                                                   
  7 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6350_H    
  8 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6350_H    
  9                                                   
 10 /* DISP_CC clocks */                              
 11 #define DISP_CC_PLL0                              
 12 #define DISP_CC_MDSS_AHB_CLK                      
 13 #define DISP_CC_MDSS_AHB_CLK_SRC                  
 14 #define DISP_CC_MDSS_BYTE0_CLK                    
 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC                
 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC            
 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK               
 18 #define DISP_CC_MDSS_DP_AUX_CLK                   
 19 #define DISP_CC_MDSS_DP_AUX_CLK_SRC               
 20 #define DISP_CC_MDSS_DP_CRYPTO_CLK                
 21 #define DISP_CC_MDSS_DP_CRYPTO_CLK_SRC            
 22 #define DISP_CC_MDSS_DP_LINK_CLK                  
 23 #define DISP_CC_MDSS_DP_LINK_CLK_SRC              
 24 #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC          
 25 #define DISP_CC_MDSS_DP_LINK_INTF_CLK             
 26 #define DISP_CC_MDSS_DP_PIXEL_CLK                 
 27 #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC             
 28 #define DISP_CC_MDSS_ESC0_CLK                     
 29 #define DISP_CC_MDSS_ESC0_CLK_SRC                 
 30 #define DISP_CC_MDSS_MDP_CLK                      
 31 #define DISP_CC_MDSS_MDP_CLK_SRC                  
 32 #define DISP_CC_MDSS_MDP_LUT_CLK                  
 33 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK             
 34 #define DISP_CC_MDSS_PCLK0_CLK                    
 35 #define DISP_CC_MDSS_PCLK0_CLK_SRC                
 36 #define DISP_CC_MDSS_ROT_CLK                      
 37 #define DISP_CC_MDSS_ROT_CLK_SRC                  
 38 #define DISP_CC_MDSS_RSCC_AHB_CLK                 
 39 #define DISP_CC_MDSS_RSCC_VSYNC_CLK               
 40 #define DISP_CC_MDSS_VSYNC_CLK                    
 41 #define DISP_CC_MDSS_VSYNC_CLK_SRC                
 42 #define DISP_CC_SLEEP_CLK                         
 43 #define DISP_CC_XO_CLK                            
 44                                                   
 45 /* GDSCs */                                       
 46 #define MDSS_GDSC                                 
 47                                                   
 48 #endif                                            
 49                                                   

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