1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* 3 * Copyright (c) 2018-2020, The Linux Foundati 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM8250_H 7 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM8250_H 8 9 /* DISP_CC clock registers */ 10 #define DISP_CC_MDSS_AHB_CLK 11 #define DISP_CC_MDSS_AHB_CLK_SRC 12 #define DISP_CC_MDSS_BYTE0_CLK 13 #define DISP_CC_MDSS_BYTE0_CLK_SRC 14 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 15 #define DISP_CC_MDSS_BYTE0_INTF_CLK 16 #define DISP_CC_MDSS_BYTE1_CLK 17 #define DISP_CC_MDSS_BYTE1_CLK_SRC 18 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 19 #define DISP_CC_MDSS_BYTE1_INTF_CLK 20 #define DISP_CC_MDSS_DP_AUX1_CLK 21 #define DISP_CC_MDSS_DP_AUX1_CLK_SRC 22 #define DISP_CC_MDSS_DP_AUX_CLK 23 #define DISP_CC_MDSS_DP_AUX_CLK_SRC 24 #define DISP_CC_MDSS_DP_LINK1_CLK 25 #define DISP_CC_MDSS_DP_LINK1_CLK_SRC 26 #define DISP_CC_MDSS_DP_LINK1_DIV_CLK_SRC 27 #define DISP_CC_MDSS_DP_LINK1_INTF_CLK 28 #define DISP_CC_MDSS_DP_LINK_CLK 29 #define DISP_CC_MDSS_DP_LINK_CLK_SRC 30 #define DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC 31 #define DISP_CC_MDSS_DP_LINK_INTF_CLK 32 #define DISP_CC_MDSS_DP_PIXEL1_CLK 33 #define DISP_CC_MDSS_DP_PIXEL1_CLK_SRC 34 #define DISP_CC_MDSS_DP_PIXEL2_CLK 35 #define DISP_CC_MDSS_DP_PIXEL2_CLK_SRC 36 #define DISP_CC_MDSS_DP_PIXEL_CLK 37 #define DISP_CC_MDSS_DP_PIXEL_CLK_SRC 38 #define DISP_CC_MDSS_ESC0_CLK 39 #define DISP_CC_MDSS_ESC0_CLK_SRC 40 #define DISP_CC_MDSS_ESC1_CLK 41 #define DISP_CC_MDSS_ESC1_CLK_SRC 42 #define DISP_CC_MDSS_MDP_CLK 43 #define DISP_CC_MDSS_MDP_CLK_SRC 44 #define DISP_CC_MDSS_MDP_LUT_CLK 45 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 46 #define DISP_CC_MDSS_PCLK0_CLK 47 #define DISP_CC_MDSS_PCLK0_CLK_SRC 48 #define DISP_CC_MDSS_PCLK1_CLK 49 #define DISP_CC_MDSS_PCLK1_CLK_SRC 50 #define DISP_CC_MDSS_ROT_CLK 51 #define DISP_CC_MDSS_ROT_CLK_SRC 52 #define DISP_CC_MDSS_RSCC_AHB_CLK 53 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 54 #define DISP_CC_MDSS_VSYNC_CLK 55 #define DISP_CC_MDSS_VSYNC_CLK_SRC 56 #define DISP_CC_PLL0 57 #define DISP_CC_PLL1 58 #define DISP_CC_MDSS_EDP_AUX_CLK 59 #define DISP_CC_MDSS_EDP_AUX_CLK_SRC 60 #define DISP_CC_MDSS_EDP_GTC_CLK 61 #define DISP_CC_MDSS_EDP_GTC_CLK_SRC 62 #define DISP_CC_MDSS_EDP_LINK_CLK 63 #define DISP_CC_MDSS_EDP_LINK_CLK_SRC 64 #define DISP_CC_MDSS_EDP_LINK_INTF_CLK 65 #define DISP_CC_MDSS_EDP_PIXEL_CLK 66 #define DISP_CC_MDSS_EDP_PIXEL_CLK_SRC 67 #define DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC 68 69 /* DISP_CC Reset */ 70 #define DISP_CC_MDSS_CORE_BCR 71 #define DISP_CC_MDSS_RSCC_BCR 72 73 /* DISP_CC GDSCR */ 74 #define MDSS_GDSC 75 76 #endif 77
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