1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 2 /* 3 * Copyright (c) 2013, The Linux Foundation. A 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_MSM_GCC_8960_H 7 #define _DT_BINDINGS_CLK_MSM_GCC_8960_H 8 9 #define AFAB_CLK_SRC 10 #define AFAB_CORE_CLK 11 #define SFAB_MSS_Q6_SW_A_CLK 12 #define SFAB_MSS_Q6_FW_A_CLK 13 #define QDSS_STM_CLK 14 #define SCSS_A_CLK 15 #define SCSS_H_CLK 16 #define SCSS_XO_SRC_CLK 17 #define AFAB_EBI1_CH0_A_CLK 18 #define AFAB_EBI1_CH1_A_CLK 19 #define AFAB_AXI_S0_FCLK 20 #define AFAB_AXI_S1_FCLK 21 #define AFAB_AXI_S2_FCLK 22 #define AFAB_AXI_S3_FCLK 23 #define AFAB_AXI_S4_FCLK 24 #define SFAB_CORE_CLK 25 #define SFAB_AXI_S0_FCLK 26 #define SFAB_AXI_S1_FCLK 27 #define SFAB_AXI_S2_FCLK 28 #define SFAB_AXI_S3_FCLK 29 #define SFAB_AXI_S4_FCLK 30 #define SFAB_AHB_S0_FCLK 31 #define SFAB_AHB_S1_FCLK 32 #define SFAB_AHB_S2_FCLK 33 #define SFAB_AHB_S3_FCLK 34 #define SFAB_AHB_S4_FCLK 35 #define SFAB_AHB_S5_FCLK 36 #define SFAB_AHB_S6_FCLK 37 #define SFAB_AHB_S7_FCLK 38 #define QDSS_AT_CLK_SRC 39 #define QDSS_AT_CLK 40 #define QDSS_TRACECLKIN_CLK_SRC 41 #define QDSS_TRACECLKIN_CLK 42 #define QDSS_TSCTR_CLK_SRC 43 #define QDSS_TSCTR_CLK 44 #define SFAB_ADM0_M0_A_CLK 45 #define SFAB_ADM0_M1_A_CLK 46 #define SFAB_ADM0_M2_H_CLK 47 #define ADM0_CLK 48 #define ADM0_PBUS_CLK 49 #define MSS_XPU_CLK 50 #define IMEM0_A_CLK 51 #define QDSS_H_CLK 52 #define PCIE_A_CLK 53 #define PCIE_AUX_CLK 54 #define PCIE_PHY_REF_CLK 55 #define PCIE_H_CLK 56 #define SFAB_CLK_SRC 57 #define MAHB0_CLK 58 #define Q6SW_CLK_SRC 59 #define Q6SW_CLK 60 #define Q6FW_CLK_SRC 61 #define Q6FW_CLK 62 #define SFAB_MSS_M_A_CLK 63 #define SFAB_USB3_M_A_CLK 64 #define SFAB_LPASS_Q6_A_CLK 65 #define SFAB_AFAB_M_A_CLK 66 #define AFAB_SFAB_M0_A_CLK 67 #define AFAB_SFAB_M1_A_CLK 68 #define SFAB_SATA_S_H_CLK 69 #define DFAB_CLK_SRC 70 #define DFAB_CLK 71 #define SFAB_DFAB_M_A_CLK 72 #define DFAB_SFAB_M_A_CLK 73 #define DFAB_SWAY0_H_CLK 74 #define DFAB_SWAY1_H_CLK 75 #define DFAB_ARB0_H_CLK 76 #define DFAB_ARB1_H_CLK 77 #define PPSS_H_CLK 78 #define PPSS_PROC_CLK 79 #define PPSS_TIMER0_CLK 80 #define PPSS_TIMER1_CLK 81 #define PMEM_A_CLK 82 #define DMA_BAM_H_CLK 83 #define SIC_H_CLK 84 #define SPS_TIC_H_CLK 85 #define SLIMBUS_H_CLK 86 #define SLIMBUS_XO_SRC_CLK 87 #define CFPB_2X_CLK_SRC 88 #define CFPB_CLK 89 #define CFPB0_H_CLK 90 #define CFPB1_H_CLK 91 #define CFPB2_H_CLK 92 #define SFAB_CFPB_M_H_CLK 93 #define CFPB_MASTER_H_CLK 94 #define SFAB_CFPB_S_H_CLK 95 #define CFPB_SPLITTER_H_CLK 96 #define TSIF_H_CLK 97 #define TSIF_INACTIVITY_TIMERS_CLK 98 #define TSIF_REF_SRC 99 #define TSIF_REF_CLK 100 #define CE1_H_CLK 101 #define CE1_CORE_CLK 102 #define CE1_SLEEP_CLK 103 #define CE2_H_CLK 104 #define CE2_CORE_CLK 105 #define SFPB_H_CLK_SRC 106 #define SFPB_H_CLK 107 #define SFAB_SFPB_M_H_CLK 108 #define SFAB_SFPB_S_H_CLK 109 #define RPM_PROC_CLK 110 #define RPM_BUS_H_CLK 111 #define RPM_SLEEP_CLK 112 #define RPM_TIMER_CLK 113 #define RPM_MSG_RAM_H_CLK 114 #define PMIC_ARB0_H_CLK 115 #define PMIC_ARB1_H_CLK 116 #define PMIC_SSBI2_SRC 117 #define PMIC_SSBI2_CLK 118 #define SDC1_H_CLK 119 #define SDC2_H_CLK 120 #define SDC3_H_CLK 121 #define SDC4_H_CLK 122 #define SDC5_H_CLK 123 #define SDC1_SRC 124 #define SDC2_SRC 125 #define SDC3_SRC 126 #define SDC4_SRC 127 #define SDC5_SRC 128 #define SDC1_CLK 129 #define SDC2_CLK 130 #define SDC3_CLK 131 #define SDC4_CLK 132 #define SDC5_CLK 133 #define DFAB_A2_H_CLK 134 #define USB_HS1_H_CLK 135 #define USB_HS1_XCVR_SRC 136 #define USB_HS1_XCVR_CLK 137 #define USB_HSIC_H_CLK 138 #define USB_HSIC_XCVR_FS_SRC 139 #define USB_HSIC_XCVR_FS_CLK 140 #define USB_HSIC_SYSTEM_CLK_SRC 141 #define USB_HSIC_SYSTEM_CLK 142 #define CFPB0_C0_H_CLK 143 #define CFPB0_C1_H_CLK 144 #define CFPB0_D0_H_CLK 145 #define CFPB0_D1_H_CLK 146 #define USB_FS1_H_CLK 147 #define USB_FS1_XCVR_FS_SRC 148 #define USB_FS1_XCVR_FS_CLK 149 #define USB_FS1_SYSTEM_CLK 150 #define USB_FS2_H_CLK 151 #define USB_FS2_XCVR_FS_SRC 152 #define USB_FS2_XCVR_FS_CLK 153 #define USB_FS2_SYSTEM_CLK 154 #define GSBI_COMMON_SIM_SRC 155 #define GSBI1_H_CLK 156 #define GSBI2_H_CLK 157 #define GSBI3_H_CLK 158 #define GSBI4_H_CLK 159 #define GSBI5_H_CLK 160 #define GSBI6_H_CLK 161 #define GSBI7_H_CLK 162 #define GSBI8_H_CLK 163 #define GSBI9_H_CLK 164 #define GSBI10_H_CLK 165 #define GSBI11_H_CLK 166 #define GSBI12_H_CLK 167 #define GSBI1_UART_SRC 168 #define GSBI1_UART_CLK 169 #define GSBI2_UART_SRC 170 #define GSBI2_UART_CLK 171 #define GSBI3_UART_SRC 172 #define GSBI3_UART_CLK 173 #define GSBI4_UART_SRC 174 #define GSBI4_UART_CLK 175 #define GSBI5_UART_SRC 176 #define GSBI5_UART_CLK 177 #define GSBI6_UART_SRC 178 #define GSBI6_UART_CLK 179 #define GSBI7_UART_SRC 180 #define GSBI7_UART_CLK 181 #define GSBI8_UART_SRC 182 #define GSBI8_UART_CLK 183 #define GSBI9_UART_SRC 184 #define GSBI9_UART_CLK 185 #define GSBI10_UART_SRC 186 #define GSBI10_UART_CLK 187 #define GSBI11_UART_SRC 188 #define GSBI11_UART_CLK 189 #define GSBI12_UART_SRC 190 #define GSBI12_UART_CLK 191 #define GSBI1_QUP_SRC 192 #define GSBI1_QUP_CLK 193 #define GSBI2_QUP_SRC 194 #define GSBI2_QUP_CLK 195 #define GSBI3_QUP_SRC 196 #define GSBI3_QUP_CLK 197 #define GSBI4_QUP_SRC 198 #define GSBI4_QUP_CLK 199 #define GSBI5_QUP_SRC 200 #define GSBI5_QUP_CLK 201 #define GSBI6_QUP_SRC 202 #define GSBI6_QUP_CLK 203 #define GSBI7_QUP_SRC 204 #define GSBI7_QUP_CLK 205 #define GSBI8_QUP_SRC 206 #define GSBI8_QUP_CLK 207 #define GSBI9_QUP_SRC 208 #define GSBI9_QUP_CLK 209 #define GSBI10_QUP_SRC 210 #define GSBI10_QUP_CLK 211 #define GSBI11_QUP_SRC 212 #define GSBI11_QUP_CLK 213 #define GSBI12_QUP_SRC 214 #define GSBI12_QUP_CLK 215 #define GSBI1_SIM_CLK 216 #define GSBI2_SIM_CLK 217 #define GSBI3_SIM_CLK 218 #define GSBI4_SIM_CLK 219 #define GSBI5_SIM_CLK 220 #define GSBI6_SIM_CLK 221 #define GSBI7_SIM_CLK 222 #define GSBI8_SIM_CLK 223 #define GSBI9_SIM_CLK 224 #define GSBI10_SIM_CLK 225 #define GSBI11_SIM_CLK 226 #define GSBI12_SIM_CLK 227 #define USB_HSIC_HSIC_CLK_SRC 228 #define USB_HSIC_HSIC_CLK 229 #define USB_HSIC_HSIO_CAL_CLK 230 #define SPDM_CFG_H_CLK 231 #define SPDM_MSTR_H_CLK 232 #define SPDM_FF_CLK_SRC 233 #define SPDM_FF_CLK 234 #define SEC_CTRL_CLK 235 #define SEC_CTRL_ACC_CLK_SRC 236 #define SEC_CTRL_ACC_CLK 237 #define TLMM_H_CLK 238 #define TLMM_CLK 239 #define SFAB_MSS_S_H_CLK 240 #define MSS_SLP_CLK 241 #define MSS_Q6SW_JTAG_CLK 242 #define MSS_Q6FW_JTAG_CLK 243 #define MSS_S_H_CLK 244 #define MSS_CXO_SRC_CLK 245 #define SATA_H_CLK 246 #define SATA_CLK_SRC 247 #define SATA_RXOOB_CLK 248 #define SATA_PMALIVE_CLK 249 #define SATA_PHY_REF_CLK 250 #define TSSC_CLK_SRC 251 #define TSSC_CLK 252 #define PDM_SRC 253 #define PDM_CLK 254 #define GP0_SRC 255 #define GP0_CLK 256 #define GP1_SRC 257 #define GP1_CLK 258 #define GP2_SRC 259 #define GP2_CLK 260 #define MPM_CLK 261 #define EBI1_CLK_SRC 262 #define EBI1_CH0_CLK 263 #define EBI1_CH1_CLK 264 #define EBI1_2X_CLK 265 #define EBI1_CH0_DQ_CLK 266 #define EBI1_CH1_DQ_CLK 267 #define EBI1_CH0_CA_CLK 268 #define EBI1_CH1_CA_CLK 269 #define EBI1_XO_CLK 270 #define SFAB_SMPSS_S_H_CLK 271 #define PRNG_SRC 272 #define PRNG_CLK 273 #define PXO_SRC 274 #define LPASS_CXO_CLK 275 #define LPASS_PXO_CLK 276 #define SPDM_CY_PORT0_CLK 277 #define SPDM_CY_PORT1_CLK 278 #define SPDM_CY_PORT2_CLK 279 #define SPDM_CY_PORT3_CLK 280 #define SPDM_CY_PORT4_CLK 281 #define SPDM_CY_PORT5_CLK 282 #define SPDM_CY_PORT6_CLK 283 #define SPDM_CY_PORT7_CLK 284 #define PLL0 285 #define PLL0_VOTE 286 #define PLL3 287 #define PLL3_VOTE 288 #define PLL4_VOTE 289 #define PLL5 290 #define PLL5_VOTE 291 #define PLL6 292 #define PLL6_VOTE 293 #define PLL7_VOTE 294 #define PLL8 295 #define PLL8_VOTE 296 #define PLL9 297 #define PLL10 298 #define PLL11 299 #define PLL12 300 #define PLL13 301 #define PLL14 302 #define PLL14_VOTE 303 #define USB_HS3_H_CLK 304 #define USB_HS3_XCVR_SRC 305 #define USB_HS3_XCVR_CLK 306 #define USB_HS4_H_CLK 307 #define USB_HS4_XCVR_SRC 308 #define USB_HS4_XCVR_CLK 309 #define SATA_PHY_CFG_CLK 310 #define SATA_A_CLK 311 #define CE3_SRC 312 #define CE3_CORE_CLK 313 #define CE3_H_CLK 314 #define PLL16 315 #define PLL17 316 317 #endif 318
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