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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,gpucc-sdm660.h

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Diff markup

Differences between /include/dt-bindings/clock/qcom,gpucc-sdm660.h (Architecture i386) and /include/dt-bindings/clock/qcom,gpucc-sdm660.h (Architecture sparc)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 /* SPDX-License-Identifier: GPL-2.0 */
  2 /*                                                  2 /*
  3  * Copyright (c) 2020, The Linux Foundation. A      3  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4  * Copyright (c) 2020, AngeloGioacchino Del Re      4  * Copyright (c) 2020, AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
  5  */                                                 5  */
  6                                                     6 
  7 #ifndef _DT_BINDINGS_CLK_SDM_GPUCC_660_H            7 #ifndef _DT_BINDINGS_CLK_SDM_GPUCC_660_H
  8 #define _DT_BINDINGS_CLK_SDM_GPUCC_660_H            8 #define _DT_BINDINGS_CLK_SDM_GPUCC_660_H
  9                                                     9 
 10 #define GPUCC_CXO_CLK                   0          10 #define GPUCC_CXO_CLK                   0
 11 #define GPU_PLL0_PLL                    1          11 #define GPU_PLL0_PLL                    1
 12 #define GPU_PLL1_PLL                    2          12 #define GPU_PLL1_PLL                    2
 13 #define GFX3D_CLK_SRC                   3          13 #define GFX3D_CLK_SRC                   3
 14 #define RBCPR_CLK_SRC                   4          14 #define RBCPR_CLK_SRC                   4
 15 #define RBBMTIMER_CLK_SRC               5          15 #define RBBMTIMER_CLK_SRC               5
 16 #define GPUCC_RBCPR_CLK                 6          16 #define GPUCC_RBCPR_CLK                 6
 17 #define GPUCC_GFX3D_CLK                 7          17 #define GPUCC_GFX3D_CLK                 7
 18 #define GPUCC_RBBMTIMER_CLK             8          18 #define GPUCC_RBBMTIMER_CLK             8
 19                                                    19 
 20 #define GPU_CX_GDSC                     0          20 #define GPU_CX_GDSC                     0
 21 #define GPU_GX_GDSC                     1          21 #define GPU_GX_GDSC                     1
 22                                                    22 
 23 #define GPU_CX_BCR                      0          23 #define GPU_CX_BCR                      0
 24 #define GPU_GX_BCR                      1          24 #define GPU_GX_BCR                      1
 25 #define RBCPR_BCR                       2          25 #define RBCPR_BCR                       2
 26 #define SPDM_BCR                        3          26 #define SPDM_BCR                        3
 27                                                    27 
 28 #endif                                             28 #endif
 29                                                    29 

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