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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,gpucc-sm8150.h

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Diff markup

Differences between /include/dt-bindings/clock/qcom,gpucc-sm8150.h (Architecture ppc) and /include/dt-bindings/clock/qcom,gpucc-sm8150.h (Architecture i386)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 /* SPDX-License-Identifier: GPL-2.0 */
  2 /*                                                  2 /*
  3  * Copyright (c) 2017-2020, The Linux Foundati      3  * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4  */                                                 4  */
  5                                                     5 
  6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8150_H       6 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8150_H
  7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8150_H       7 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8150_H
  8                                                     8 
  9 /* GPU_CC clock registers */                        9 /* GPU_CC clock registers */
 10 #define GPU_CC_AHB_CLK                             10 #define GPU_CC_AHB_CLK                          0
 11 #define GPU_CC_CRC_AHB_CLK                         11 #define GPU_CC_CRC_AHB_CLK                      1
 12 #define GPU_CC_CX_APB_CLK                          12 #define GPU_CC_CX_APB_CLK                       2
 13 #define GPU_CC_CX_GMU_CLK                          13 #define GPU_CC_CX_GMU_CLK                       3
 14 #define GPU_CC_CX_SNOC_DVM_CLK                     14 #define GPU_CC_CX_SNOC_DVM_CLK                  4
 15 #define GPU_CC_CXO_AON_CLK                         15 #define GPU_CC_CXO_AON_CLK                      5
 16 #define GPU_CC_CXO_CLK                             16 #define GPU_CC_CXO_CLK                          6
 17 #define GPU_CC_GMU_CLK_SRC                         17 #define GPU_CC_GMU_CLK_SRC                      7
 18 #define GPU_CC_GX_GMU_CLK                          18 #define GPU_CC_GX_GMU_CLK                       8
 19 #define GPU_CC_PLL1                                19 #define GPU_CC_PLL1                             9
 20                                                    20 
 21 /* GPU_CC Resets */                                21 /* GPU_CC Resets */
 22 #define GPUCC_GPU_CC_CX_BCR                        22 #define GPUCC_GPU_CC_CX_BCR                     0
 23 #define GPUCC_GPU_CC_GFX3D_AON_BCR                 23 #define GPUCC_GPU_CC_GFX3D_AON_BCR              1
 24 #define GPUCC_GPU_CC_GMU_BCR                       24 #define GPUCC_GPU_CC_GMU_BCR                    2
 25 #define GPUCC_GPU_CC_GX_BCR                        25 #define GPUCC_GPU_CC_GX_BCR                     3
 26 #define GPUCC_GPU_CC_SPDM_BCR                      26 #define GPUCC_GPU_CC_SPDM_BCR                   4
 27 #define GPUCC_GPU_CC_XO_BCR                        27 #define GPUCC_GPU_CC_XO_BCR                     5
 28                                                    28 
 29 /* GPU_CC GDSCRs */                                29 /* GPU_CC GDSCRs */
 30 #define GPU_CX_GDSC                                30 #define GPU_CX_GDSC                             0
 31 #define GPU_GX_GDSC                                31 #define GPU_GX_GDSC                             1
 32                                                    32 
 33 #endif                                             33 #endif
 34                                                    34 

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