~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,mmcc-sdm660.h

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
Architecture: ~ [ i386 ] ~ [ alpha ] ~ [ m68k ] ~ [ mips ] ~ [ ppc ] ~ [ sparc ] ~ [ sparc64 ] ~

Diff markup

Differences between /include/dt-bindings/clock/qcom,mmcc-sdm660.h (Architecture ppc) and /include/dt-bindings/clock/qcom,mmcc-sdm660.h (Architecture i386)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 /* SPDX-License-Identifier: GPL-2.0 */
  2 /*                                                  2 /*
  3  * Copyright (c) 2020, The Linux Foundation. A      3  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4  */                                                 4  */
  5                                                     5 
  6 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_660_H             6 #ifndef _DT_BINDINGS_CLK_MSM_MMCC_660_H
  7 #define _DT_BINDINGS_CLK_MSM_MMCC_660_H             7 #define _DT_BINDINGS_CLK_MSM_MMCC_660_H
  8                                                     8 
  9 #define AHB_CLK_SRC                                 9 #define AHB_CLK_SRC                                                     0
 10 #define BYTE0_CLK_SRC                              10 #define BYTE0_CLK_SRC                                           1
 11 #define BYTE1_CLK_SRC                              11 #define BYTE1_CLK_SRC                                           2
 12 #define CAMSS_GP0_CLK_SRC                          12 #define CAMSS_GP0_CLK_SRC                                       3
 13 #define CAMSS_GP1_CLK_SRC                          13 #define CAMSS_GP1_CLK_SRC                                       4
 14 #define CCI_CLK_SRC                                14 #define CCI_CLK_SRC                                                     5
 15 #define CPP_CLK_SRC                                15 #define CPP_CLK_SRC                                                     6
 16 #define CSI0_CLK_SRC                               16 #define CSI0_CLK_SRC                                            7
 17 #define CSI0PHYTIMER_CLK_SRC                       17 #define CSI0PHYTIMER_CLK_SRC                            8
 18 #define CSI1_CLK_SRC                               18 #define CSI1_CLK_SRC                                            9
 19 #define CSI1PHYTIMER_CLK_SRC                       19 #define CSI1PHYTIMER_CLK_SRC                            10
 20 #define CSI2_CLK_SRC                               20 #define CSI2_CLK_SRC                                            11
 21 #define CSI2PHYTIMER_CLK_SRC                       21 #define CSI2PHYTIMER_CLK_SRC                            12
 22 #define CSI3_CLK_SRC                               22 #define CSI3_CLK_SRC                                            13
 23 #define CSIPHY_CLK_SRC                             23 #define CSIPHY_CLK_SRC                                          14
 24 #define DP_AUX_CLK_SRC                             24 #define DP_AUX_CLK_SRC                                          15
 25 #define DP_CRYPTO_CLK_SRC                          25 #define DP_CRYPTO_CLK_SRC                                       16
 26 #define DP_GTC_CLK_SRC                             26 #define DP_GTC_CLK_SRC                                          17
 27 #define DP_LINK_CLK_SRC                            27 #define DP_LINK_CLK_SRC                                         18
 28 #define DP_PIXEL_CLK_SRC                           28 #define DP_PIXEL_CLK_SRC                                        19
 29 #define ESC0_CLK_SRC                               29 #define ESC0_CLK_SRC                                            20
 30 #define ESC1_CLK_SRC                               30 #define ESC1_CLK_SRC                                            21
 31 #define JPEG0_CLK_SRC                              31 #define JPEG0_CLK_SRC                                           22
 32 #define MCLK0_CLK_SRC                              32 #define MCLK0_CLK_SRC                                           23
 33 #define MCLK1_CLK_SRC                              33 #define MCLK1_CLK_SRC                                           24
 34 #define MCLK2_CLK_SRC                              34 #define MCLK2_CLK_SRC                                           25
 35 #define MCLK3_CLK_SRC                              35 #define MCLK3_CLK_SRC                                           26
 36 #define MDP_CLK_SRC                                36 #define MDP_CLK_SRC                                                     27
 37 #define MMPLL0_PLL                                 37 #define MMPLL0_PLL                                                      28
 38 #define MMPLL10_PLL                                38 #define MMPLL10_PLL                                                     29
 39 #define MMPLL1_PLL                                 39 #define MMPLL1_PLL                                                      30
 40 #define MMPLL3_PLL                                 40 #define MMPLL3_PLL                                                      31
 41 #define MMPLL4_PLL                                 41 #define MMPLL4_PLL                                                      32
 42 #define MMPLL5_PLL                                 42 #define MMPLL5_PLL                                                      33
 43 #define MMPLL6_PLL                                 43 #define MMPLL6_PLL                                                      34
 44 #define MMPLL7_PLL                                 44 #define MMPLL7_PLL                                                      35
 45 #define MMPLL8_PLL                                 45 #define MMPLL8_PLL                                                      36
 46 #define BIMC_SMMU_AHB_CLK                          46 #define BIMC_SMMU_AHB_CLK                                       37
 47 #define BIMC_SMMU_AXI_CLK                          47 #define BIMC_SMMU_AXI_CLK                                       38
 48 #define CAMSS_AHB_CLK                              48 #define CAMSS_AHB_CLK                                           39
 49 #define CAMSS_CCI_AHB_CLK                          49 #define CAMSS_CCI_AHB_CLK                                       40
 50 #define CAMSS_CCI_CLK                              50 #define CAMSS_CCI_CLK                                           41
 51 #define CAMSS_CPHY_CSID0_CLK                       51 #define CAMSS_CPHY_CSID0_CLK                            42
 52 #define CAMSS_CPHY_CSID1_CLK                       52 #define CAMSS_CPHY_CSID1_CLK                            43
 53 #define CAMSS_CPHY_CSID2_CLK                       53 #define CAMSS_CPHY_CSID2_CLK                            44
 54 #define CAMSS_CPHY_CSID3_CLK                       54 #define CAMSS_CPHY_CSID3_CLK                            45
 55 #define CAMSS_CPP_AHB_CLK                          55 #define CAMSS_CPP_AHB_CLK                                       46
 56 #define CAMSS_CPP_AXI_CLK                          56 #define CAMSS_CPP_AXI_CLK                                       47
 57 #define CAMSS_CPP_CLK                              57 #define CAMSS_CPP_CLK                                           48
 58 #define CAMSS_CPP_VBIF_AHB_CLK                     58 #define CAMSS_CPP_VBIF_AHB_CLK                          49
 59 #define CAMSS_CSI0_AHB_CLK                         59 #define CAMSS_CSI0_AHB_CLK                                      50
 60 #define CAMSS_CSI0_CLK                             60 #define CAMSS_CSI0_CLK                                          51
 61 #define CAMSS_CSI0PHYTIMER_CLK                     61 #define CAMSS_CSI0PHYTIMER_CLK                          52
 62 #define CAMSS_CSI0PIX_CLK                          62 #define CAMSS_CSI0PIX_CLK                                       53
 63 #define CAMSS_CSI0RDI_CLK                          63 #define CAMSS_CSI0RDI_CLK                                       54
 64 #define CAMSS_CSI1_AHB_CLK                         64 #define CAMSS_CSI1_AHB_CLK                                      55
 65 #define CAMSS_CSI1_CLK                             65 #define CAMSS_CSI1_CLK                                          56
 66 #define CAMSS_CSI1PHYTIMER_CLK                     66 #define CAMSS_CSI1PHYTIMER_CLK                          57
 67 #define CAMSS_CSI1PIX_CLK                          67 #define CAMSS_CSI1PIX_CLK                                       58
 68 #define CAMSS_CSI1RDI_CLK                          68 #define CAMSS_CSI1RDI_CLK                                       59
 69 #define CAMSS_CSI2_AHB_CLK                         69 #define CAMSS_CSI2_AHB_CLK                                      60
 70 #define CAMSS_CSI2_CLK                             70 #define CAMSS_CSI2_CLK                                          61
 71 #define CAMSS_CSI2PHYTIMER_CLK                     71 #define CAMSS_CSI2PHYTIMER_CLK                          62
 72 #define CAMSS_CSI2PIX_CLK                          72 #define CAMSS_CSI2PIX_CLK                                       63
 73 #define CAMSS_CSI2RDI_CLK                          73 #define CAMSS_CSI2RDI_CLK                                       64
 74 #define CAMSS_CSI3_AHB_CLK                         74 #define CAMSS_CSI3_AHB_CLK                                      65
 75 #define CAMSS_CSI3_CLK                             75 #define CAMSS_CSI3_CLK                                          66
 76 #define CAMSS_CSI3PIX_CLK                          76 #define CAMSS_CSI3PIX_CLK                                       67
 77 #define CAMSS_CSI3RDI_CLK                          77 #define CAMSS_CSI3RDI_CLK                                       68
 78 #define CAMSS_CSI_VFE0_CLK                         78 #define CAMSS_CSI_VFE0_CLK                                      69
 79 #define CAMSS_CSI_VFE1_CLK                         79 #define CAMSS_CSI_VFE1_CLK                                      70
 80 #define CAMSS_CSIPHY0_CLK                          80 #define CAMSS_CSIPHY0_CLK                                       71
 81 #define CAMSS_CSIPHY1_CLK                          81 #define CAMSS_CSIPHY1_CLK                                       72
 82 #define CAMSS_CSIPHY2_CLK                          82 #define CAMSS_CSIPHY2_CLK                                       73
 83 #define CAMSS_GP0_CLK                              83 #define CAMSS_GP0_CLK                                           74
 84 #define CAMSS_GP1_CLK                              84 #define CAMSS_GP1_CLK                                           75
 85 #define CAMSS_ISPIF_AHB_CLK                        85 #define CAMSS_ISPIF_AHB_CLK                                     76
 86 #define CAMSS_JPEG0_CLK                            86 #define CAMSS_JPEG0_CLK                                         77
 87 #define CAMSS_JPEG_AHB_CLK                         87 #define CAMSS_JPEG_AHB_CLK                                      78
 88 #define CAMSS_JPEG_AXI_CLK                         88 #define CAMSS_JPEG_AXI_CLK                                      79
 89 #define CAMSS_MCLK0_CLK                            89 #define CAMSS_MCLK0_CLK                                         80
 90 #define CAMSS_MCLK1_CLK                            90 #define CAMSS_MCLK1_CLK                                         81
 91 #define CAMSS_MCLK2_CLK                            91 #define CAMSS_MCLK2_CLK                                         82
 92 #define CAMSS_MCLK3_CLK                            92 #define CAMSS_MCLK3_CLK                                         83
 93 #define CAMSS_MICRO_AHB_CLK                        93 #define CAMSS_MICRO_AHB_CLK                                     84
 94 #define CAMSS_TOP_AHB_CLK                          94 #define CAMSS_TOP_AHB_CLK                                       85
 95 #define CAMSS_VFE0_AHB_CLK                         95 #define CAMSS_VFE0_AHB_CLK                                      86
 96 #define CAMSS_VFE0_CLK                             96 #define CAMSS_VFE0_CLK                                          87
 97 #define CAMSS_VFE0_STREAM_CLK                      97 #define CAMSS_VFE0_STREAM_CLK                           88
 98 #define CAMSS_VFE1_AHB_CLK                         98 #define CAMSS_VFE1_AHB_CLK                                      89
 99 #define CAMSS_VFE1_CLK                             99 #define CAMSS_VFE1_CLK                                          90
100 #define CAMSS_VFE1_STREAM_CLK                     100 #define CAMSS_VFE1_STREAM_CLK                           91
101 #define CAMSS_VFE_VBIF_AHB_CLK                    101 #define CAMSS_VFE_VBIF_AHB_CLK                          92
102 #define CAMSS_VFE_VBIF_AXI_CLK                    102 #define CAMSS_VFE_VBIF_AXI_CLK                          93
103 #define CSIPHY_AHB2CRIF_CLK                       103 #define CSIPHY_AHB2CRIF_CLK                                     94
104 #define CXO_CLK                                   104 #define CXO_CLK                                                         95
105 #define MDSS_AHB_CLK                              105 #define MDSS_AHB_CLK                                            96
106 #define MDSS_AXI_CLK                              106 #define MDSS_AXI_CLK                                            97
107 #define MDSS_BYTE0_CLK                            107 #define MDSS_BYTE0_CLK                                          98
108 #define MDSS_BYTE0_INTF_CLK                       108 #define MDSS_BYTE0_INTF_CLK                                     99
109 #define MDSS_BYTE0_INTF_DIV_CLK                   109 #define MDSS_BYTE0_INTF_DIV_CLK                         100
110 #define MDSS_BYTE1_CLK                            110 #define MDSS_BYTE1_CLK                                          101
111 #define MDSS_BYTE1_INTF_CLK                       111 #define MDSS_BYTE1_INTF_CLK                                     102
112 #define MDSS_DP_AUX_CLK                           112 #define MDSS_DP_AUX_CLK                                         103
113 #define MDSS_DP_CRYPTO_CLK                        113 #define MDSS_DP_CRYPTO_CLK                                      104
114 #define MDSS_DP_GTC_CLK                           114 #define MDSS_DP_GTC_CLK                                         105
115 #define MDSS_DP_LINK_CLK                          115 #define MDSS_DP_LINK_CLK                                        106
116 #define MDSS_DP_LINK_INTF_CLK                     116 #define MDSS_DP_LINK_INTF_CLK                           107
117 #define MDSS_DP_PIXEL_CLK                         117 #define MDSS_DP_PIXEL_CLK                                       108
118 #define MDSS_ESC0_CLK                             118 #define MDSS_ESC0_CLK                                           109
119 #define MDSS_ESC1_CLK                             119 #define MDSS_ESC1_CLK                                           110
120 #define MDSS_HDMI_DP_AHB_CLK                      120 #define MDSS_HDMI_DP_AHB_CLK                            111
121 #define MDSS_MDP_CLK                              121 #define MDSS_MDP_CLK                                            112
122 #define MDSS_PCLK0_CLK                            122 #define MDSS_PCLK0_CLK                                          113
123 #define MDSS_PCLK1_CLK                            123 #define MDSS_PCLK1_CLK                                          114
124 #define MDSS_ROT_CLK                              124 #define MDSS_ROT_CLK                                            115
125 #define MDSS_VSYNC_CLK                            125 #define MDSS_VSYNC_CLK                                          116
126 #define MISC_AHB_CLK                              126 #define MISC_AHB_CLK                                            117
127 #define MISC_CXO_CLK                              127 #define MISC_CXO_CLK                                            118
128 #define MNOC_AHB_CLK                              128 #define MNOC_AHB_CLK                                            119
129 #define SNOC_DVM_AXI_CLK                          129 #define SNOC_DVM_AXI_CLK                                        120
130 #define THROTTLE_CAMSS_AHB_CLK                    130 #define THROTTLE_CAMSS_AHB_CLK                          121
131 #define THROTTLE_CAMSS_AXI_CLK                    131 #define THROTTLE_CAMSS_AXI_CLK                          122
132 #define THROTTLE_MDSS_AHB_CLK                     132 #define THROTTLE_MDSS_AHB_CLK                           123
133 #define THROTTLE_MDSS_AXI_CLK                     133 #define THROTTLE_MDSS_AXI_CLK                           124
134 #define THROTTLE_VIDEO_AHB_CLK                    134 #define THROTTLE_VIDEO_AHB_CLK                          125
135 #define THROTTLE_VIDEO_AXI_CLK                    135 #define THROTTLE_VIDEO_AXI_CLK                          126
136 #define VIDEO_AHB_CLK                             136 #define VIDEO_AHB_CLK                                           127
137 #define VIDEO_AXI_CLK                             137 #define VIDEO_AXI_CLK                                           128
138 #define VIDEO_CORE_CLK                            138 #define VIDEO_CORE_CLK                                          129
139 #define VIDEO_SUBCORE0_CLK                        139 #define VIDEO_SUBCORE0_CLK                                      130
140 #define PCLK0_CLK_SRC                             140 #define PCLK0_CLK_SRC                                           131
141 #define PCLK1_CLK_SRC                             141 #define PCLK1_CLK_SRC                                           132
142 #define ROT_CLK_SRC                               142 #define ROT_CLK_SRC                                                     133
143 #define VFE0_CLK_SRC                              143 #define VFE0_CLK_SRC                                            134
144 #define VFE1_CLK_SRC                              144 #define VFE1_CLK_SRC                                            135
145 #define VIDEO_CORE_CLK_SRC                        145 #define VIDEO_CORE_CLK_SRC                                      136
146 #define VSYNC_CLK_SRC                             146 #define VSYNC_CLK_SRC                                           137
147 #define MDSS_BYTE1_INTF_DIV_CLK                   147 #define MDSS_BYTE1_INTF_DIV_CLK                         138
148 #define AXI_CLK_SRC                               148 #define AXI_CLK_SRC                                                     139
149                                                   149 
150 #define VENUS_GDSC                                150 #define VENUS_GDSC                                                              0
151 #define VENUS_CORE0_GDSC                          151 #define VENUS_CORE0_GDSC                                                1
152 #define MDSS_GDSC                                 152 #define MDSS_GDSC                                                               2
153 #define CAMSS_TOP_GDSC                            153 #define CAMSS_TOP_GDSC                                                  3
154 #define CAMSS_VFE0_GDSC                           154 #define CAMSS_VFE0_GDSC                                                 4
155 #define CAMSS_VFE1_GDSC                           155 #define CAMSS_VFE1_GDSC                                                 5
156 #define CAMSS_CPP_GDSC                            156 #define CAMSS_CPP_GDSC                                                  6
157 #define BIMC_SMMU_GDSC                            157 #define BIMC_SMMU_GDSC                                                  7
158                                                   158 
159 #define CAMSS_MICRO_BCR                           159 #define CAMSS_MICRO_BCR                          0
160                                                   160 
161 #endif                                            161 #endif
162                                                   162 
163                                                   163 

~ [ source navigation ] ~ [ diff markup ] ~ [ identifier search ] ~

kernel.org | git.kernel.org | LWN.net | Project Home | SVN repository | Mail admin

Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.

sflogo.php