1 /* SPDX-License-Identifier: (GPL-2.0-only OR B 1 2 /* 3 * Copyright (c) 2021, The Linux Foundation. A 4 * Copyright (c) 2022, Linaro Limited 5 */ 6 7 #ifndef _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H 8 #define _DT_BINDINGS_CLK_QCOM_DISP_CC_SM6375_H 9 10 /* Clocks */ 11 #define DISP_CC_PLL0 12 #define DISP_CC_MDSS_AHB_CLK 13 #define DISP_CC_MDSS_AHB_CLK_SRC 14 #define DISP_CC_MDSS_BYTE0_CLK 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 18 #define DISP_CC_MDSS_ESC0_CLK 19 #define DISP_CC_MDSS_ESC0_CLK_SRC 20 #define DISP_CC_MDSS_MDP_CLK 21 #define DISP_CC_MDSS_MDP_CLK_SRC 22 #define DISP_CC_MDSS_MDP_LUT_CLK 23 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 24 #define DISP_CC_MDSS_PCLK0_CLK 25 #define DISP_CC_MDSS_PCLK0_CLK_SRC 26 #define DISP_CC_MDSS_ROT_CLK 27 #define DISP_CC_MDSS_ROT_CLK_SRC 28 #define DISP_CC_MDSS_RSCC_AHB_CLK 29 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 30 #define DISP_CC_MDSS_VSYNC_CLK 31 #define DISP_CC_MDSS_VSYNC_CLK_SRC 32 #define DISP_CC_SLEEP_CLK 33 #define DISP_CC_XO_CLK 34 35 /* Resets */ 36 #define DISP_CC_MDSS_CORE_BCR 37 #define DISP_CC_MDSS_RSCC_BCR 38 39 /* GDSCs */ 40 #define MDSS_GDSC 41 42 #endif 43
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