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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,sm6375-gpucc.h

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Diff markup

Differences between /include/dt-bindings/clock/qcom,sm6375-gpucc.h (Architecture sparc) and /include/dt-bindings/clock/qcom,sm6375-gpucc.h (Architecture mips)


  1 /* SPDX-License-Identifier: (GPL-2.0-only OR B      1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2 /*                                                  2 /*
  3  * Copyright (c) 2021, The Linux Foundation. A      3  * Copyright (c) 2021, The Linux Foundation. All rights reserved.
  4  * Copyright (c) 2023, Linaro Limited               4  * Copyright (c) 2023, Linaro Limited
  5  */                                                 5  */
  6                                                     6 
  7 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H        7 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H
  8 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H        8 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_BLAIR_H
  9                                                     9 
 10 /* GPU CC clocks */                                10 /* GPU CC clocks */
 11 #define GPU_CC_PLL0                                11 #define GPU_CC_PLL0                                     0
 12 #define GPU_CC_PLL1                                12 #define GPU_CC_PLL1                                     1
 13 #define GPU_CC_AHB_CLK                             13 #define GPU_CC_AHB_CLK                                  2
 14 #define GPU_CC_CX_GFX3D_CLK                        14 #define GPU_CC_CX_GFX3D_CLK                             3
 15 #define GPU_CC_CX_GFX3D_SLV_CLK                    15 #define GPU_CC_CX_GFX3D_SLV_CLK                         4
 16 #define GPU_CC_CX_GMU_CLK                          16 #define GPU_CC_CX_GMU_CLK                               5
 17 #define GPU_CC_CX_SNOC_DVM_CLK                     17 #define GPU_CC_CX_SNOC_DVM_CLK                          6
 18 #define GPU_CC_CXO_AON_CLK                         18 #define GPU_CC_CXO_AON_CLK                              7
 19 #define GPU_CC_CXO_CLK                             19 #define GPU_CC_CXO_CLK                                  8
 20 #define GPU_CC_GMU_CLK_SRC                         20 #define GPU_CC_GMU_CLK_SRC                              9
 21 #define GPU_CC_GX_CXO_CLK                          21 #define GPU_CC_GX_CXO_CLK                               10
 22 #define GPU_CC_GX_GFX3D_CLK                        22 #define GPU_CC_GX_GFX3D_CLK                             11
 23 #define GPU_CC_GX_GFX3D_CLK_SRC                    23 #define GPU_CC_GX_GFX3D_CLK_SRC                         12
 24 #define GPU_CC_GX_GMU_CLK                          24 #define GPU_CC_GX_GMU_CLK                               13
 25 #define GPU_CC_SLEEP_CLK                           25 #define GPU_CC_SLEEP_CLK                                14
 26                                                    26 
 27 /* GDSCs */                                        27 /* GDSCs */
 28 #define GPU_CX_GDSC                                28 #define GPU_CX_GDSC                                     0
 29 #define GPU_GX_GDSC                                29 #define GPU_GX_GDSC                                     1
 30                                                    30 
 31 /* Resets */                                       31 /* Resets */
 32 #define GPU_GX_BCR                                 32 #define GPU_GX_BCR                                      0
 33 #define GPU_ACD_BCR                                33 #define GPU_ACD_BCR                                     1
 34 #define GPU_GX_ACD_MISC_BCR                        34 #define GPU_GX_ACD_MISC_BCR                             2
 35                                                    35 
 36 #endif                                             36 #endif
 37                                                    37 

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