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TOMOYO Linux Cross Reference
Linux/include/dt-bindings/clock/qcom,sm8450-gpucc.h

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Diff markup

Differences between /include/dt-bindings/clock/qcom,sm8450-gpucc.h (Architecture ppc) and /include/dt-bindings/clock/qcom,sm8450-gpucc.h (Architecture mips)


  1 /* SPDX-License-Identifier: (GPL-2.0-only OR B      1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
  2 /*                                                  2 /*
  3  * Copyright (c) 2020, The Linux Foundation. A      3  * Copyright (c) 2020, The Linux Foundation. All rights reserved.
  4  * Copyright (c) 2023, Linaro Limited               4  * Copyright (c) 2023, Linaro Limited
  5  */                                                 5  */
  6                                                     6 
  7 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8450_H       7 #ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8450_H
  8 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8450_H       8 #define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8450_H
  9                                                     9 
 10 /* Clocks */                                       10 /* Clocks */
 11 #define GPU_CC_AHB_CLK                             11 #define GPU_CC_AHB_CLK                          0
 12 #define GPU_CC_CRC_AHB_CLK                         12 #define GPU_CC_CRC_AHB_CLK                      1
 13 #define GPU_CC_CX_APB_CLK                          13 #define GPU_CC_CX_APB_CLK                       2
 14 #define GPU_CC_CX_FF_CLK                           14 #define GPU_CC_CX_FF_CLK                        3
 15 #define GPU_CC_CX_GMU_CLK                          15 #define GPU_CC_CX_GMU_CLK                       4
 16 #define GPU_CC_CX_SNOC_DVM_CLK                     16 #define GPU_CC_CX_SNOC_DVM_CLK                  5
 17 #define GPU_CC_CXO_AON_CLK                         17 #define GPU_CC_CXO_AON_CLK                      6
 18 #define GPU_CC_CXO_CLK                             18 #define GPU_CC_CXO_CLK                          7
 19 #define GPU_CC_DEMET_CLK                           19 #define GPU_CC_DEMET_CLK                        8
 20 #define GPU_CC_DEMET_DIV_CLK_SRC                   20 #define GPU_CC_DEMET_DIV_CLK_SRC                9
 21 #define GPU_CC_FF_CLK_SRC                          21 #define GPU_CC_FF_CLK_SRC                       10
 22 #define GPU_CC_FREQ_MEASURE_CLK                    22 #define GPU_CC_FREQ_MEASURE_CLK                 11
 23 #define GPU_CC_GMU_CLK_SRC                         23 #define GPU_CC_GMU_CLK_SRC                      12
 24 #define GPU_CC_GX_FF_CLK                           24 #define GPU_CC_GX_FF_CLK                        13
 25 #define GPU_CC_GX_GFX3D_CLK                        25 #define GPU_CC_GX_GFX3D_CLK                     14
 26 #define GPU_CC_GX_GFX3D_RDVM_CLK                   26 #define GPU_CC_GX_GFX3D_RDVM_CLK                15
 27 #define GPU_CC_GX_GMU_CLK                          27 #define GPU_CC_GX_GMU_CLK                       16
 28 #define GPU_CC_GX_VSENSE_CLK                       28 #define GPU_CC_GX_VSENSE_CLK                    17
 29 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK             29 #define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK          18
 30 #define GPU_CC_HUB_AHB_DIV_CLK_SRC                 30 #define GPU_CC_HUB_AHB_DIV_CLK_SRC              19
 31 #define GPU_CC_HUB_AON_CLK                         31 #define GPU_CC_HUB_AON_CLK                      20
 32 #define GPU_CC_HUB_CLK_SRC                         32 #define GPU_CC_HUB_CLK_SRC                      21
 33 #define GPU_CC_HUB_CX_INT_CLK                      33 #define GPU_CC_HUB_CX_INT_CLK                   22
 34 #define GPU_CC_HUB_CX_INT_DIV_CLK_SRC              34 #define GPU_CC_HUB_CX_INT_DIV_CLK_SRC           23
 35 #define GPU_CC_MEMNOC_GFX_CLK                      35 #define GPU_CC_MEMNOC_GFX_CLK                   24
 36 #define GPU_CC_MND1X_0_GFX3D_CLK                   36 #define GPU_CC_MND1X_0_GFX3D_CLK                25
 37 #define GPU_CC_MND1X_1_GFX3D_CLK                   37 #define GPU_CC_MND1X_1_GFX3D_CLK                26
 38 #define GPU_CC_PLL0                                38 #define GPU_CC_PLL0                             27
 39 #define GPU_CC_PLL1                                39 #define GPU_CC_PLL1                             28
 40 #define GPU_CC_SLEEP_CLK                           40 #define GPU_CC_SLEEP_CLK                        29
 41 #define GPU_CC_XO_CLK_SRC                          41 #define GPU_CC_XO_CLK_SRC                       30
 42 #define GPU_CC_XO_DIV_CLK_SRC                      42 #define GPU_CC_XO_DIV_CLK_SRC                   31
 43                                                    43 
 44 /* GDSCs */                                        44 /* GDSCs */
 45 #define GPU_GX_GDSC                                45 #define GPU_GX_GDSC                             0
 46 #define GPU_CX_GDSC                                46 #define GPU_CX_GDSC                             1
 47                                                    47 
 48 #endif                                             48 #endif
 49                                                    49 

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