1 /* SPDX-License-Identifier: (GPL-2.0-only OR B 1 2 /* 3 * Copyright (c) 2022, The Linux Foundation. A 4 */ 5 6 #ifndef _DT_BINDINGS_CLK_QCOM_SM8550_DISP_CC_H 7 #define _DT_BINDINGS_CLK_QCOM_SM8550_DISP_CC_H 8 9 /* DISP_CC clocks */ 10 #define DISP_CC_MDSS_ACCU_CLK 11 #define DISP_CC_MDSS_AHB1_CLK 12 #define DISP_CC_MDSS_AHB_CLK 13 #define DISP_CC_MDSS_AHB_CLK_SRC 14 #define DISP_CC_MDSS_BYTE0_CLK 15 #define DISP_CC_MDSS_BYTE0_CLK_SRC 16 #define DISP_CC_MDSS_BYTE0_DIV_CLK_SRC 17 #define DISP_CC_MDSS_BYTE0_INTF_CLK 18 #define DISP_CC_MDSS_BYTE1_CLK 19 #define DISP_CC_MDSS_BYTE1_CLK_SRC 20 #define DISP_CC_MDSS_BYTE1_DIV_CLK_SRC 21 #define DISP_CC_MDSS_BYTE1_INTF_CLK 22 #define DISP_CC_MDSS_DPTX0_AUX_CLK 23 #define DISP_CC_MDSS_DPTX0_AUX_CLK_SRC 24 #define DISP_CC_MDSS_DPTX0_CRYPTO_CLK 25 #define DISP_CC_MDSS_DPTX0_LINK_CLK 26 #define DISP_CC_MDSS_DPTX0_LINK_CLK_SRC 27 #define DISP_CC_MDSS_DPTX0_LINK_DIV_CLK_SRC 28 #define DISP_CC_MDSS_DPTX0_LINK_INTF_CLK 29 #define DISP_CC_MDSS_DPTX0_PIXEL0_CLK 30 #define DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC 31 #define DISP_CC_MDSS_DPTX0_PIXEL1_CLK 32 #define DISP_CC_MDSS_DPTX0_PIXEL1_CLK_SRC 33 #define DISP_CC_MDSS_DPTX0_USB_ROUTER_LINK_INT 34 #define DISP_CC_MDSS_DPTX1_AUX_CLK 35 #define DISP_CC_MDSS_DPTX1_AUX_CLK_SRC 36 #define DISP_CC_MDSS_DPTX1_CRYPTO_CLK 37 #define DISP_CC_MDSS_DPTX1_LINK_CLK 38 #define DISP_CC_MDSS_DPTX1_LINK_CLK_SRC 39 #define DISP_CC_MDSS_DPTX1_LINK_DIV_CLK_SRC 40 #define DISP_CC_MDSS_DPTX1_LINK_INTF_CLK 41 #define DISP_CC_MDSS_DPTX1_PIXEL0_CLK 42 #define DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC 43 #define DISP_CC_MDSS_DPTX1_PIXEL1_CLK 44 #define DISP_CC_MDSS_DPTX1_PIXEL1_CLK_SRC 45 #define DISP_CC_MDSS_DPTX1_USB_ROUTER_LINK_INT 46 #define DISP_CC_MDSS_DPTX2_AUX_CLK 47 #define DISP_CC_MDSS_DPTX2_AUX_CLK_SRC 48 #define DISP_CC_MDSS_DPTX2_CRYPTO_CLK 49 #define DISP_CC_MDSS_DPTX2_LINK_CLK 50 #define DISP_CC_MDSS_DPTX2_LINK_CLK_SRC 51 #define DISP_CC_MDSS_DPTX2_LINK_DIV_CLK_SRC 52 #define DISP_CC_MDSS_DPTX2_LINK_INTF_CLK 53 #define DISP_CC_MDSS_DPTX2_PIXEL0_CLK 54 #define DISP_CC_MDSS_DPTX2_PIXEL0_CLK_SRC 55 #define DISP_CC_MDSS_DPTX2_PIXEL1_CLK 56 #define DISP_CC_MDSS_DPTX2_PIXEL1_CLK_SRC 57 #define DISP_CC_MDSS_DPTX3_AUX_CLK 58 #define DISP_CC_MDSS_DPTX3_AUX_CLK_SRC 59 #define DISP_CC_MDSS_DPTX3_CRYPTO_CLK 60 #define DISP_CC_MDSS_DPTX3_LINK_CLK 61 #define DISP_CC_MDSS_DPTX3_LINK_CLK_SRC 62 #define DISP_CC_MDSS_DPTX3_LINK_DIV_CLK_SRC 63 #define DISP_CC_MDSS_DPTX3_LINK_INTF_CLK 64 #define DISP_CC_MDSS_DPTX3_PIXEL0_CLK 65 #define DISP_CC_MDSS_DPTX3_PIXEL0_CLK_SRC 66 #define DISP_CC_MDSS_ESC0_CLK 67 #define DISP_CC_MDSS_ESC0_CLK_SRC 68 #define DISP_CC_MDSS_ESC1_CLK 69 #define DISP_CC_MDSS_ESC1_CLK_SRC 70 #define DISP_CC_MDSS_MDP1_CLK 71 #define DISP_CC_MDSS_MDP_CLK 72 #define DISP_CC_MDSS_MDP_CLK_SRC 73 #define DISP_CC_MDSS_MDP_LUT1_CLK 74 #define DISP_CC_MDSS_MDP_LUT_CLK 75 #define DISP_CC_MDSS_NON_GDSC_AHB_CLK 76 #define DISP_CC_MDSS_PCLK0_CLK 77 #define DISP_CC_MDSS_PCLK0_CLK_SRC 78 #define DISP_CC_MDSS_PCLK1_CLK 79 #define DISP_CC_MDSS_PCLK1_CLK_SRC 80 #define DISP_CC_MDSS_RSCC_AHB_CLK 81 #define DISP_CC_MDSS_RSCC_VSYNC_CLK 82 #define DISP_CC_MDSS_VSYNC1_CLK 83 #define DISP_CC_MDSS_VSYNC_CLK 84 #define DISP_CC_MDSS_VSYNC_CLK_SRC 85 #define DISP_CC_PLL0 86 #define DISP_CC_PLL1 87 #define DISP_CC_SLEEP_CLK 88 #define DISP_CC_SLEEP_CLK_SRC 89 #define DISP_CC_XO_CLK 90 #define DISP_CC_XO_CLK_SRC 91 92 /* DISP_CC resets */ 93 #define DISP_CC_MDSS_CORE_BCR 94 #define DISP_CC_MDSS_CORE_INT2_BCR 95 #define DISP_CC_MDSS_RSCC_BCR 96 97 /* DISP_CC GDSCR */ 98 #define MDSS_GDSC 99 #define MDSS_INT2_GDSC 100 101 #endif 102
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.