1 /* SPDX-License-Identifier: GPL-2.0+ !! 1 /*
2 * <<
3 * Copyright (C) 2017 Glider bvba 2 * Copyright (C) 2017 Glider bvba
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify
>> 5 * it under the terms of the GNU General Public License as published by
>> 6 * the Free Software Foundation; either version 2 of the License, or
>> 7 * (at your option) any later version.
4 */ 8 */
5 #ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_ 9 #ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
6 #define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_ 10 #define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__
7 11
8 #include <dt-bindings/clock/renesas-cpg-mssr.h 12 #include <dt-bindings/clock/renesas-cpg-mssr.h>
9 13
10 /* r8a77995 CPG Core Clocks */ 14 /* r8a77995 CPG Core Clocks */
11 #define R8A77995_CLK_Z2 0 15 #define R8A77995_CLK_Z2 0
12 #define R8A77995_CLK_ZG 1 16 #define R8A77995_CLK_ZG 1
13 #define R8A77995_CLK_ZTR 2 17 #define R8A77995_CLK_ZTR 2
14 #define R8A77995_CLK_ZT 3 18 #define R8A77995_CLK_ZT 3
15 #define R8A77995_CLK_ZX 4 19 #define R8A77995_CLK_ZX 4
16 #define R8A77995_CLK_S0D1 5 20 #define R8A77995_CLK_S0D1 5
17 #define R8A77995_CLK_S1D1 6 21 #define R8A77995_CLK_S1D1 6
18 #define R8A77995_CLK_S1D2 7 22 #define R8A77995_CLK_S1D2 7
19 #define R8A77995_CLK_S1D4 8 23 #define R8A77995_CLK_S1D4 8
20 #define R8A77995_CLK_S2D1 9 24 #define R8A77995_CLK_S2D1 9
21 #define R8A77995_CLK_S2D2 10 25 #define R8A77995_CLK_S2D2 10
22 #define R8A77995_CLK_S2D4 11 26 #define R8A77995_CLK_S2D4 11
23 #define R8A77995_CLK_S3D1 12 27 #define R8A77995_CLK_S3D1 12
24 #define R8A77995_CLK_S3D2 13 28 #define R8A77995_CLK_S3D2 13
25 #define R8A77995_CLK_S3D4 14 29 #define R8A77995_CLK_S3D4 14
26 #define R8A77995_CLK_S1D4C 15 30 #define R8A77995_CLK_S1D4C 15
27 #define R8A77995_CLK_S3D1C 16 31 #define R8A77995_CLK_S3D1C 16
28 #define R8A77995_CLK_S3D2C 17 32 #define R8A77995_CLK_S3D2C 17
29 #define R8A77995_CLK_S3D4C 18 33 #define R8A77995_CLK_S3D4C 18
30 #define R8A77995_CLK_LB 19 34 #define R8A77995_CLK_LB 19
31 #define R8A77995_CLK_CL 20 35 #define R8A77995_CLK_CL 20
32 #define R8A77995_CLK_ZB3 21 36 #define R8A77995_CLK_ZB3 21
33 #define R8A77995_CLK_ZB3D2 22 37 #define R8A77995_CLK_ZB3D2 22
34 #define R8A77995_CLK_CR 23 38 #define R8A77995_CLK_CR 23
35 #define R8A77995_CLK_CRD2 24 39 #define R8A77995_CLK_CRD2 24
36 #define R8A77995_CLK_SD0H 25 40 #define R8A77995_CLK_SD0H 25
37 #define R8A77995_CLK_SD0 26 41 #define R8A77995_CLK_SD0 26
38 /* CLK_SSP2 was removed */ !! 42 #define R8A77995_CLK_SSP2 27
39 /* CLK_SSP1 was removed */ !! 43 #define R8A77995_CLK_SSP1 28
40 #define R8A77995_CLK_RPC 29 44 #define R8A77995_CLK_RPC 29
41 #define R8A77995_CLK_RPCD2 30 45 #define R8A77995_CLK_RPCD2 30
42 #define R8A77995_CLK_ZA2 31 46 #define R8A77995_CLK_ZA2 31
43 #define R8A77995_CLK_ZA8 32 47 #define R8A77995_CLK_ZA8 32
44 #define R8A77995_CLK_Z2D 33 48 #define R8A77995_CLK_Z2D 33
45 #define R8A77995_CLK_CANFD 34 49 #define R8A77995_CLK_CANFD 34
46 #define R8A77995_CLK_MSO 35 50 #define R8A77995_CLK_MSO 35
47 #define R8A77995_CLK_R 36 51 #define R8A77995_CLK_R 36
48 #define R8A77995_CLK_OSC 37 52 #define R8A77995_CLK_OSC 37
49 #define R8A77995_CLK_LV0 38 53 #define R8A77995_CLK_LV0 38
50 #define R8A77995_CLK_LV1 39 54 #define R8A77995_CLK_LV1 39
51 #define R8A77995_CLK_CP 40 55 #define R8A77995_CLK_CP 40
52 #define R8A77995_CLK_CPEX 41 <<
53 56
54 #endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSS 57 #endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */
55 58
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