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Linux/include/dt-bindings/clock/s5pv210-audss.h

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Diff markup

Differences between /include/dt-bindings/clock/s5pv210-audss.h (Version linux-6.11.5) and /include/dt-bindings/clock/s5pv210-audss.h (Version linux-5.2.21)


  1 /* SPDX-License-Identifier: GPL-2.0-only */         1 /* SPDX-License-Identifier: GPL-2.0-only */
  2 /*                                                  2 /*
  3  * Copyright (c) 2014 Tomasz Figa <tomasz.figa      3  * Copyright (c) 2014 Tomasz Figa <tomasz.figa@gmail.com>
  4  *                                                  4  *
  5  * This header provides constants for Samsung       5  * This header provides constants for Samsung audio subsystem
  6  * clock controller.                                6  * clock controller.
  7  *                                                  7  *
  8  * The constants defined in this header are be      8  * The constants defined in this header are being used in dts
  9  * and s5pv210 audss driver.                        9  * and s5pv210 audss driver.
 10  */                                                10  */
 11                                                    11 
 12 #ifndef _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H         12 #ifndef _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H
 13 #define _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H         13 #define _DT_BINDINGS_CLOCK_S5PV210_AUDSS_H
 14                                                    14 
 15 #define CLK_MOUT_AUDSS          0                  15 #define CLK_MOUT_AUDSS          0
 16 #define CLK_MOUT_I2S_A          1                  16 #define CLK_MOUT_I2S_A          1
 17                                                    17 
 18 #define CLK_DOUT_AUD_BUS        2                  18 #define CLK_DOUT_AUD_BUS        2
 19 #define CLK_DOUT_I2S_A          3                  19 #define CLK_DOUT_I2S_A          3
 20                                                    20 
 21 #define CLK_I2S                 4                  21 #define CLK_I2S                 4
 22 #define CLK_HCLK_I2S            5                  22 #define CLK_HCLK_I2S            5
 23 #define CLK_HCLK_UART           6                  23 #define CLK_HCLK_UART           6
 24 #define CLK_HCLK_HWA            7                  24 #define CLK_HCLK_HWA            7
 25 #define CLK_HCLK_DMA            8                  25 #define CLK_HCLK_DMA            8
 26 #define CLK_HCLK_BUF            9                  26 #define CLK_HCLK_BUF            9
 27 #define CLK_HCLK_RP             10                 27 #define CLK_HCLK_RP             10
 28                                                    28 
 29 #define AUDSS_MAX_CLKS          11                 29 #define AUDSS_MAX_CLKS          11
 30                                                    30 
 31 #endif                                             31 #endif
 32                                                    32 

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