1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 2 /* 3 * This header provides constants clk index ST 3 * This header provides constants clk index STMicroelectronics 4 * STiH410 SoC. 4 * STiH410 SoC. 5 */ 5 */ 6 #ifndef _DT_BINDINGS_CLK_STIH410 6 #ifndef _DT_BINDINGS_CLK_STIH410 7 #define _DT_BINDINGS_CLK_STIH410 7 #define _DT_BINDINGS_CLK_STIH410 8 8 9 #include "stih407-clks.h" 9 #include "stih407-clks.h" 10 10 11 /* STiH410 introduces new clock outputs compar 11 /* STiH410 introduces new clock outputs compared to STiH407 */ 12 12 13 /* CLOCKGEN C0 */ 13 /* CLOCKGEN C0 */ 14 #define CLK_TX_ICN_HADES 32 14 #define CLK_TX_ICN_HADES 32 15 #define CLK_RX_ICN_HADES 33 15 #define CLK_RX_ICN_HADES 33 16 #define CLK_ICN_REG_16 34 16 #define CLK_ICN_REG_16 34 17 #define CLK_PP_HADES 35 17 #define CLK_PP_HADES 35 18 #define CLK_CLUST_HADES 36 18 #define CLK_CLUST_HADES 36 19 #define CLK_HWPE_HADES 37 19 #define CLK_HWPE_HADES 37 20 #define CLK_FC_HADES 38 20 #define CLK_FC_HADES 38 21 21 22 /* CLOCKGEN D0 */ 22 /* CLOCKGEN D0 */ 23 #define CLK_PCMR10_MASTER 4 23 #define CLK_PCMR10_MASTER 4 24 #define CLK_USB2_PHY 5 24 #define CLK_USB2_PHY 5 25 25 26 #endif 26 #endif 27 27
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