1 /* 1 2 * Copyright (C) 2017 Icenowy Zheng <icenowy@a 3 * 4 * This file is dual-licensed: you can use it 5 * of the GPL or the X11 license, at your opti 6 * licensing only applies to this file, and no 7 * whole. 8 * 9 * a) This file is free software; you can red 10 * modify it under the terms of the GNU Ge 11 * published by the Free Software Foundati 12 * License, or (at your option) any later 13 * 14 * This file is distributed in the hope th 15 * but WITHOUT ANY WARRANTY; without even 16 * MERCHANTABILITY or FITNESS FOR A PARTIC 17 * GNU General Public License for more det 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of c 22 * obtaining a copy of this software and a 23 * files (the "Software"), to deal in the 24 * restriction, including without limitati 25 * copy, modify, merge, publish, distribut 26 * sell copies of the Software, and to per 27 * Software is furnished to do so, subject 28 * conditions: 29 * 30 * The above copyright notice and this per 31 * included in all copies or substantial p 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHO 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT L 35 * OF MERCHANTABILITY, FITNESS FOR A PARTI 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGE 38 * WHETHER IN AN ACTION OF CONTRACT, TORT 39 * FROM, OUT OF OR IN CONNECTION WITH THE 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43 #ifndef _DT_BINDINGS_CLK_SUN8I_R40_H_ 44 #define _DT_BINDINGS_CLK_SUN8I_R40_H_ 45 46 #define CLK_PLL_VIDEO0 7 47 48 #define CLK_PLL_VIDEO1 16 49 50 #define CLK_CPU 24 51 52 #define CLK_BUS_MIPI_DSI 29 53 #define CLK_BUS_CE 30 54 #define CLK_BUS_DMA 31 55 #define CLK_BUS_MMC0 32 56 #define CLK_BUS_MMC1 33 57 #define CLK_BUS_MMC2 34 58 #define CLK_BUS_MMC3 35 59 #define CLK_BUS_NAND 36 60 #define CLK_BUS_DRAM 37 61 #define CLK_BUS_EMAC 38 62 #define CLK_BUS_TS 39 63 #define CLK_BUS_HSTIMER 40 64 #define CLK_BUS_SPI0 41 65 #define CLK_BUS_SPI1 42 66 #define CLK_BUS_SPI2 43 67 #define CLK_BUS_SPI3 44 68 #define CLK_BUS_SATA 45 69 #define CLK_BUS_OTG 46 70 #define CLK_BUS_EHCI0 47 71 #define CLK_BUS_EHCI1 48 72 #define CLK_BUS_EHCI2 49 73 #define CLK_BUS_OHCI0 50 74 #define CLK_BUS_OHCI1 51 75 #define CLK_BUS_OHCI2 52 76 #define CLK_BUS_VE 53 77 #define CLK_BUS_MP 54 78 #define CLK_BUS_DEINTERLACE 55 79 #define CLK_BUS_CSI0 56 80 #define CLK_BUS_CSI1 57 81 #define CLK_BUS_HDMI1 58 82 #define CLK_BUS_HDMI0 59 83 #define CLK_BUS_DE 60 84 #define CLK_BUS_TVE0 61 85 #define CLK_BUS_TVE1 62 86 #define CLK_BUS_TVE_TOP 63 87 #define CLK_BUS_GMAC 64 88 #define CLK_BUS_GPU 65 89 #define CLK_BUS_TVD0 66 90 #define CLK_BUS_TVD1 67 91 #define CLK_BUS_TVD2 68 92 #define CLK_BUS_TVD3 69 93 #define CLK_BUS_TVD_TOP 70 94 #define CLK_BUS_TCON_LCD0 71 95 #define CLK_BUS_TCON_LCD1 72 96 #define CLK_BUS_TCON_TV0 73 97 #define CLK_BUS_TCON_TV1 74 98 #define CLK_BUS_TCON_TOP 75 99 #define CLK_BUS_CODEC 76 100 #define CLK_BUS_SPDIF 77 101 #define CLK_BUS_AC97 78 102 #define CLK_BUS_PIO 79 103 #define CLK_BUS_IR0 80 104 #define CLK_BUS_IR1 81 105 #define CLK_BUS_THS 82 106 #define CLK_BUS_KEYPAD 83 107 #define CLK_BUS_I2S0 84 108 #define CLK_BUS_I2S1 85 109 #define CLK_BUS_I2S2 86 110 #define CLK_BUS_I2C0 87 111 #define CLK_BUS_I2C1 88 112 #define CLK_BUS_I2C2 89 113 #define CLK_BUS_I2C3 90 114 #define CLK_BUS_CAN 91 115 #define CLK_BUS_SCR 92 116 #define CLK_BUS_PS20 93 117 #define CLK_BUS_PS21 94 118 #define CLK_BUS_I2C4 95 119 #define CLK_BUS_UART0 96 120 #define CLK_BUS_UART1 97 121 #define CLK_BUS_UART2 98 122 #define CLK_BUS_UART3 99 123 #define CLK_BUS_UART4 100 124 #define CLK_BUS_UART5 101 125 #define CLK_BUS_UART6 102 126 #define CLK_BUS_UART7 103 127 #define CLK_BUS_DBG 104 128 129 #define CLK_THS 105 130 #define CLK_NAND 106 131 #define CLK_MMC0 107 132 #define CLK_MMC1 108 133 #define CLK_MMC2 109 134 #define CLK_MMC3 110 135 #define CLK_TS 111 136 #define CLK_CE 112 137 #define CLK_SPI0 113 138 #define CLK_SPI1 114 139 #define CLK_SPI2 115 140 #define CLK_SPI3 116 141 #define CLK_I2S0 117 142 #define CLK_I2S1 118 143 #define CLK_I2S2 119 144 #define CLK_AC97 120 145 #define CLK_SPDIF 121 146 #define CLK_KEYPAD 122 147 #define CLK_SATA 123 148 #define CLK_USB_PHY0 124 149 #define CLK_USB_PHY1 125 150 #define CLK_USB_PHY2 126 151 #define CLK_USB_OHCI0 127 152 #define CLK_USB_OHCI1 128 153 #define CLK_USB_OHCI2 129 154 #define CLK_IR0 130 155 #define CLK_IR1 131 156 157 #define CLK_DRAM_VE 133 158 #define CLK_DRAM_CSI0 134 159 #define CLK_DRAM_CSI1 135 160 #define CLK_DRAM_TS 136 161 #define CLK_DRAM_TVD 137 162 #define CLK_DRAM_MP 138 163 #define CLK_DRAM_DEINTERLACE 139 164 #define CLK_DE 140 165 #define CLK_MP 141 166 #define CLK_TCON_LCD0 142 167 #define CLK_TCON_LCD1 143 168 #define CLK_TCON_TV0 144 169 #define CLK_TCON_TV1 145 170 #define CLK_DEINTERLACE 146 171 #define CLK_CSI1_MCLK 147 172 #define CLK_CSI_SCLK 148 173 #define CLK_CSI0_MCLK 149 174 #define CLK_VE 150 175 #define CLK_CODEC 151 176 #define CLK_AVS 152 177 #define CLK_HDMI 153 178 #define CLK_HDMI_SLOW 154 179 #define CLK_MBUS 155 180 #define CLK_DSI_DPHY 156 181 #define CLK_TVE0 157 182 #define CLK_TVE1 158 183 #define CLK_TVD0 159 184 #define CLK_TVD1 160 185 #define CLK_TVD2 161 186 #define CLK_TVD3 162 187 #define CLK_GPU 163 188 #define CLK_OUTA 164 189 #define CLK_OUTB 165 190 191 #endif /* _DT_BINDINGS_CLK_SUN8I_R40_H_ */ 192
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