1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2- 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ 2 /* 2 /* 3 * Copyright (c) 2022, Qualcomm Innovation Cen 3 * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 4 */ 5 5 6 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_ 6 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H 7 #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_ 7 #define __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H 8 8 9 #define MASTER_LLCC 0 9 #define MASTER_LLCC 0 10 #define SLAVE_EBI1 1 10 #define SLAVE_EBI1 1 11 11 12 #define MASTER_TCU_0 0 12 #define MASTER_TCU_0 0 13 #define MASTER_SNOC_GC_MEM_NOC 1 13 #define MASTER_SNOC_GC_MEM_NOC 1 14 #define MASTER_APPSS_PROC 2 14 #define MASTER_APPSS_PROC 2 15 #define SLAVE_LLCC 3 15 #define SLAVE_LLCC 3 16 #define SLAVE_MEM_NOC_SNOC 4 16 #define SLAVE_MEM_NOC_SNOC 4 17 #define SLAVE_MEM_NOC_PCIE_SNOC 5 17 #define SLAVE_MEM_NOC_PCIE_SNOC 5 18 18 19 #define MASTER_AUDIO 0 19 #define MASTER_AUDIO 0 20 #define MASTER_BLSP_1 1 20 #define MASTER_BLSP_1 1 21 #define MASTER_QDSS_BAM 2 21 #define MASTER_QDSS_BAM 2 22 #define MASTER_QPIC 3 22 #define MASTER_QPIC 3 23 #define MASTER_SNOC_CFG 4 23 #define MASTER_SNOC_CFG 4 24 #define MASTER_SPMI_FETCHER 5 24 #define MASTER_SPMI_FETCHER 5 25 #define MASTER_ANOC_SNOC 6 25 #define MASTER_ANOC_SNOC 6 26 #define MASTER_IPA 7 26 #define MASTER_IPA 7 27 #define MASTER_MEM_NOC_SNOC 8 27 #define MASTER_MEM_NOC_SNOC 8 28 #define MASTER_MEM_NOC_PCIE_SNOC 9 28 #define MASTER_MEM_NOC_PCIE_SNOC 9 29 #define MASTER_CRYPTO 10 29 #define MASTER_CRYPTO 10 30 #define MASTER_IPA_PCIE 11 30 #define MASTER_IPA_PCIE 11 31 #define MASTER_PCIE_0 12 31 #define MASTER_PCIE_0 12 32 #define MASTER_QDSS_ETR 13 32 #define MASTER_QDSS_ETR 13 33 #define MASTER_SDCC_1 14 33 #define MASTER_SDCC_1 14 34 #define MASTER_USB3 15 34 #define MASTER_USB3 15 35 #define SLAVE_AOSS 16 35 #define SLAVE_AOSS 16 36 #define SLAVE_APPSS 17 36 #define SLAVE_APPSS 17 37 #define SLAVE_AUDIO 18 37 #define SLAVE_AUDIO 18 38 #define SLAVE_BLSP_1 19 38 #define SLAVE_BLSP_1 19 39 #define SLAVE_CLK_CTL 20 39 #define SLAVE_CLK_CTL 20 40 #define SLAVE_CRYPTO_0_CFG 21 40 #define SLAVE_CRYPTO_0_CFG 21 41 #define SLAVE_CNOC_DDRSS 22 41 #define SLAVE_CNOC_DDRSS 22 42 #define SLAVE_ECC_CFG 23 42 #define SLAVE_ECC_CFG 23 43 #define SLAVE_IMEM_CFG 24 43 #define SLAVE_IMEM_CFG 24 44 #define SLAVE_IPA_CFG 25 44 #define SLAVE_IPA_CFG 25 45 #define SLAVE_CNOC_MSS 26 45 #define SLAVE_CNOC_MSS 26 46 #define SLAVE_PCIE_PARF 27 46 #define SLAVE_PCIE_PARF 27 47 #define SLAVE_PDM 28 47 #define SLAVE_PDM 28 48 #define SLAVE_PRNG 29 48 #define SLAVE_PRNG 29 49 #define SLAVE_QDSS_CFG 30 49 #define SLAVE_QDSS_CFG 30 50 #define SLAVE_QPIC 31 50 #define SLAVE_QPIC 31 51 #define SLAVE_SDCC_1 32 51 #define SLAVE_SDCC_1 32 52 #define SLAVE_SNOC_CFG 33 52 #define SLAVE_SNOC_CFG 33 53 #define SLAVE_SPMI_FETCHER 34 53 #define SLAVE_SPMI_FETCHER 34 54 #define SLAVE_SPMI_VGI_COEX 35 54 #define SLAVE_SPMI_VGI_COEX 35 55 #define SLAVE_TCSR 36 55 #define SLAVE_TCSR 36 56 #define SLAVE_TLMM 37 56 #define SLAVE_TLMM 37 57 #define SLAVE_USB3 38 57 #define SLAVE_USB3 38 58 #define SLAVE_USB3_PHY_CFG 39 58 #define SLAVE_USB3_PHY_CFG 39 59 #define SLAVE_ANOC_SNOC 40 59 #define SLAVE_ANOC_SNOC 40 60 #define SLAVE_SNOC_MEM_NOC_GC 41 60 #define SLAVE_SNOC_MEM_NOC_GC 41 61 #define SLAVE_IMEM 42 61 #define SLAVE_IMEM 42 62 #define SLAVE_SERVICE_SNOC 43 62 #define SLAVE_SERVICE_SNOC 43 63 #define SLAVE_PCIE_0 44 63 #define SLAVE_PCIE_0 44 64 #define SLAVE_QDSS_STM 45 64 #define SLAVE_QDSS_STM 45 65 #define SLAVE_TCU 46 65 #define SLAVE_TCU 46 66 66 67 #endif 67 #endif 68 68
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