1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 2 /* 3 * Qualcomm SM8150 interconnect IDs 3 * Qualcomm SM8150 interconnect IDs 4 * 4 * 5 * Copyright (c) 2020, The Linux Foundation. A 5 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 6 */ 6 */ 7 7 8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8150 8 #ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM8150_H 9 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8150 9 #define __DT_BINDINGS_INTERCONNECT_QCOM_SM8150_H 10 10 11 #define MASTER_A1NOC_CFG 0 11 #define MASTER_A1NOC_CFG 0 12 #define MASTER_QUP_0 1 12 #define MASTER_QUP_0 1 13 #define MASTER_EMAC 2 13 #define MASTER_EMAC 2 14 #define MASTER_UFS_MEM 3 14 #define MASTER_UFS_MEM 3 15 #define MASTER_USB3 4 15 #define MASTER_USB3 4 16 #define MASTER_USB3_1 5 16 #define MASTER_USB3_1 5 17 #define A1NOC_SNOC_SLV 6 17 #define A1NOC_SNOC_SLV 6 18 #define SLAVE_SERVICE_A1NOC 7 18 #define SLAVE_SERVICE_A1NOC 7 19 19 20 #define MASTER_A2NOC_CFG 0 20 #define MASTER_A2NOC_CFG 0 21 #define MASTER_QDSS_BAM 1 21 #define MASTER_QDSS_BAM 1 22 #define MASTER_QSPI 2 22 #define MASTER_QSPI 2 23 #define MASTER_QUP_1 3 23 #define MASTER_QUP_1 3 24 #define MASTER_QUP_2 4 24 #define MASTER_QUP_2 4 25 #define MASTER_SENSORS_AHB 5 25 #define MASTER_SENSORS_AHB 5 26 #define MASTER_TSIF 6 26 #define MASTER_TSIF 6 27 #define MASTER_CNOC_A2NOC 7 27 #define MASTER_CNOC_A2NOC 7 28 #define MASTER_CRYPTO_CORE_0 8 28 #define MASTER_CRYPTO_CORE_0 8 29 #define MASTER_IPA 9 29 #define MASTER_IPA 9 30 #define MASTER_PCIE 10 30 #define MASTER_PCIE 10 31 #define MASTER_PCIE_1 11 31 #define MASTER_PCIE_1 11 32 #define MASTER_QDSS_ETR 12 32 #define MASTER_QDSS_ETR 12 33 #define MASTER_SDCC_2 13 33 #define MASTER_SDCC_2 13 34 #define MASTER_SDCC_4 14 34 #define MASTER_SDCC_4 14 35 #define A2NOC_SNOC_SLV 15 35 #define A2NOC_SNOC_SLV 15 36 #define SLAVE_ANOC_PCIE_GEM_NOC 16 36 #define SLAVE_ANOC_PCIE_GEM_NOC 16 37 #define SLAVE_SERVICE_A2NOC 17 37 #define SLAVE_SERVICE_A2NOC 17 38 38 39 #define MASTER_CAMNOC_HF0_UNCOMP 0 39 #define MASTER_CAMNOC_HF0_UNCOMP 0 40 #define MASTER_CAMNOC_HF1_UNCOMP 1 40 #define MASTER_CAMNOC_HF1_UNCOMP 1 41 #define MASTER_CAMNOC_SF_UNCOMP 2 41 #define MASTER_CAMNOC_SF_UNCOMP 2 42 #define SLAVE_CAMNOC_UNCOMP 3 42 #define SLAVE_CAMNOC_UNCOMP 3 43 43 44 #define MASTER_NPU 0 44 #define MASTER_NPU 0 45 #define SLAVE_CDSP_MEM_NOC 1 45 #define SLAVE_CDSP_MEM_NOC 1 46 46 47 #define MASTER_SPDM 0 47 #define MASTER_SPDM 0 48 #define SNOC_CNOC_MAS 1 48 #define SNOC_CNOC_MAS 1 49 #define MASTER_QDSS_DAP 2 49 #define MASTER_QDSS_DAP 2 50 #define SLAVE_A1NOC_CFG 3 50 #define SLAVE_A1NOC_CFG 3 51 #define SLAVE_A2NOC_CFG 4 51 #define SLAVE_A2NOC_CFG 4 52 #define SLAVE_AHB2PHY_SOUTH 5 52 #define SLAVE_AHB2PHY_SOUTH 5 53 #define SLAVE_AOP 6 53 #define SLAVE_AOP 6 54 #define SLAVE_AOSS 7 54 #define SLAVE_AOSS 7 55 #define SLAVE_CAMERA_CFG 8 55 #define SLAVE_CAMERA_CFG 8 56 #define SLAVE_CLK_CTL 9 56 #define SLAVE_CLK_CTL 9 57 #define SLAVE_CDSP_CFG 10 57 #define SLAVE_CDSP_CFG 10 58 #define SLAVE_RBCPR_CX_CFG 11 58 #define SLAVE_RBCPR_CX_CFG 11 59 #define SLAVE_RBCPR_MMCX_CFG 12 59 #define SLAVE_RBCPR_MMCX_CFG 12 60 #define SLAVE_RBCPR_MX_CFG 13 60 #define SLAVE_RBCPR_MX_CFG 13 61 #define SLAVE_CRYPTO_0_CFG 14 61 #define SLAVE_CRYPTO_0_CFG 14 62 #define SLAVE_CNOC_DDRSS 15 62 #define SLAVE_CNOC_DDRSS 15 63 #define SLAVE_DISPLAY_CFG 16 63 #define SLAVE_DISPLAY_CFG 16 64 #define SLAVE_EMAC_CFG 17 64 #define SLAVE_EMAC_CFG 17 65 #define SLAVE_GLM 18 65 #define SLAVE_GLM 18 66 #define SLAVE_GRAPHICS_3D_CFG 19 66 #define SLAVE_GRAPHICS_3D_CFG 19 67 #define SLAVE_IMEM_CFG 20 67 #define SLAVE_IMEM_CFG 20 68 #define SLAVE_IPA_CFG 21 68 #define SLAVE_IPA_CFG 21 69 #define SLAVE_CNOC_MNOC_CFG 22 69 #define SLAVE_CNOC_MNOC_CFG 22 70 #define SLAVE_NPU_CFG 23 70 #define SLAVE_NPU_CFG 23 71 #define SLAVE_PCIE_0_CFG 24 71 #define SLAVE_PCIE_0_CFG 24 72 #define SLAVE_PCIE_1_CFG 25 72 #define SLAVE_PCIE_1_CFG 25 73 #define SLAVE_NORTH_PHY_CFG 26 73 #define SLAVE_NORTH_PHY_CFG 26 74 #define SLAVE_PIMEM_CFG 27 74 #define SLAVE_PIMEM_CFG 27 75 #define SLAVE_PRNG 28 75 #define SLAVE_PRNG 28 76 #define SLAVE_QDSS_CFG 29 76 #define SLAVE_QDSS_CFG 29 77 #define SLAVE_QSPI 30 77 #define SLAVE_QSPI 30 78 #define SLAVE_QUP_2 31 78 #define SLAVE_QUP_2 31 79 #define SLAVE_QUP_1 32 79 #define SLAVE_QUP_1 32 80 #define SLAVE_QUP_0 33 80 #define SLAVE_QUP_0 33 81 #define SLAVE_SDCC_2 34 81 #define SLAVE_SDCC_2 34 82 #define SLAVE_SDCC_4 35 82 #define SLAVE_SDCC_4 35 83 #define SLAVE_SNOC_CFG 36 83 #define SLAVE_SNOC_CFG 36 84 #define SLAVE_SPDM_WRAPPER 37 84 #define SLAVE_SPDM_WRAPPER 37 85 #define SLAVE_SPSS_CFG 38 85 #define SLAVE_SPSS_CFG 38 86 #define SLAVE_SSC_CFG 39 86 #define SLAVE_SSC_CFG 39 87 #define SLAVE_TCSR 40 87 #define SLAVE_TCSR 40 88 #define SLAVE_TLMM_EAST 41 88 #define SLAVE_TLMM_EAST 41 89 #define SLAVE_TLMM_NORTH 42 89 #define SLAVE_TLMM_NORTH 42 90 #define SLAVE_TLMM_SOUTH 43 90 #define SLAVE_TLMM_SOUTH 43 91 #define SLAVE_TLMM_WEST 44 91 #define SLAVE_TLMM_WEST 44 92 #define SLAVE_TSIF 45 92 #define SLAVE_TSIF 45 93 #define SLAVE_UFS_CARD_CFG 46 93 #define SLAVE_UFS_CARD_CFG 46 94 #define SLAVE_UFS_MEM_CFG 47 94 #define SLAVE_UFS_MEM_CFG 47 95 #define SLAVE_USB3 48 95 #define SLAVE_USB3 48 96 #define SLAVE_USB3_1 49 96 #define SLAVE_USB3_1 49 97 #define SLAVE_VENUS_CFG 50 97 #define SLAVE_VENUS_CFG 50 98 #define SLAVE_VSENSE_CTRL_CFG 51 98 #define SLAVE_VSENSE_CTRL_CFG 51 99 #define SLAVE_CNOC_A2NOC 52 99 #define SLAVE_CNOC_A2NOC 52 100 #define SLAVE_SERVICE_CNOC 53 100 #define SLAVE_SERVICE_CNOC 53 101 101 102 #define MASTER_CNOC_DC_NOC 0 102 #define MASTER_CNOC_DC_NOC 0 103 #define SLAVE_LLCC_CFG 1 103 #define SLAVE_LLCC_CFG 1 104 #define SLAVE_GEM_NOC_CFG 2 104 #define SLAVE_GEM_NOC_CFG 2 105 105 106 #define MASTER_AMPSS_M0 0 106 #define MASTER_AMPSS_M0 0 107 #define MASTER_GPU_TCU 1 107 #define MASTER_GPU_TCU 1 108 #define MASTER_SYS_TCU 2 108 #define MASTER_SYS_TCU 2 109 #define MASTER_GEM_NOC_CFG 3 109 #define MASTER_GEM_NOC_CFG 3 110 #define MASTER_COMPUTE_NOC 4 110 #define MASTER_COMPUTE_NOC 4 111 #define MASTER_GRAPHICS_3D 5 111 #define MASTER_GRAPHICS_3D 5 112 #define MASTER_MNOC_HF_MEM_NOC 6 112 #define MASTER_MNOC_HF_MEM_NOC 6 113 #define MASTER_MNOC_SF_MEM_NOC 7 113 #define MASTER_MNOC_SF_MEM_NOC 7 114 #define MASTER_GEM_NOC_PCIE_SNOC 8 114 #define MASTER_GEM_NOC_PCIE_SNOC 8 115 #define MASTER_SNOC_GC_MEM_NOC 9 115 #define MASTER_SNOC_GC_MEM_NOC 9 116 #define MASTER_SNOC_SF_MEM_NOC 10 116 #define MASTER_SNOC_SF_MEM_NOC 10 117 #define MASTER_ECC 11 117 #define MASTER_ECC 11 118 #define SLAVE_MSS_PROC_MS_MPU_CFG 12 118 #define SLAVE_MSS_PROC_MS_MPU_CFG 12 119 #define SLAVE_ECC 13 119 #define SLAVE_ECC 13 120 #define SLAVE_GEM_NOC_SNOC 14 120 #define SLAVE_GEM_NOC_SNOC 14 121 #define SLAVE_LLCC 15 121 #define SLAVE_LLCC 15 122 #define SLAVE_SERVICE_GEM_NOC 16 122 #define SLAVE_SERVICE_GEM_NOC 16 123 123 124 #define MASTER_LLCC 0 124 #define MASTER_LLCC 0 125 #define SLAVE_EBI_CH0 1 125 #define SLAVE_EBI_CH0 1 126 126 127 #define MASTER_CNOC_MNOC_CFG 0 127 #define MASTER_CNOC_MNOC_CFG 0 128 #define MASTER_CAMNOC_HF0 1 128 #define MASTER_CAMNOC_HF0 1 129 #define MASTER_CAMNOC_HF1 2 129 #define MASTER_CAMNOC_HF1 2 130 #define MASTER_CAMNOC_SF 3 130 #define MASTER_CAMNOC_SF 3 131 #define MASTER_MDP_PORT0 4 131 #define MASTER_MDP_PORT0 4 132 #define MASTER_MDP_PORT1 5 132 #define MASTER_MDP_PORT1 5 133 #define MASTER_ROTATOR 6 133 #define MASTER_ROTATOR 6 134 #define MASTER_VIDEO_P0 7 134 #define MASTER_VIDEO_P0 7 135 #define MASTER_VIDEO_P1 8 135 #define MASTER_VIDEO_P1 8 136 #define MASTER_VIDEO_PROC 9 136 #define MASTER_VIDEO_PROC 9 137 #define SLAVE_MNOC_SF_MEM_NOC 10 137 #define SLAVE_MNOC_SF_MEM_NOC 10 138 #define SLAVE_MNOC_HF_MEM_NOC 11 138 #define SLAVE_MNOC_HF_MEM_NOC 11 139 #define SLAVE_SERVICE_MNOC 12 139 #define SLAVE_SERVICE_MNOC 12 140 140 141 #define MASTER_SNOC_CFG 0 141 #define MASTER_SNOC_CFG 0 142 #define A1NOC_SNOC_MAS 1 142 #define A1NOC_SNOC_MAS 1 143 #define A2NOC_SNOC_MAS 2 143 #define A2NOC_SNOC_MAS 2 144 #define MASTER_GEM_NOC_SNOC 3 144 #define MASTER_GEM_NOC_SNOC 3 145 #define MASTER_PIMEM 4 145 #define MASTER_PIMEM 4 146 #define MASTER_GIC 5 146 #define MASTER_GIC 5 147 #define SLAVE_APPSS 6 147 #define SLAVE_APPSS 6 148 #define SNOC_CNOC_SLV 7 148 #define SNOC_CNOC_SLV 7 149 #define SLAVE_SNOC_GEM_NOC_GC 8 149 #define SLAVE_SNOC_GEM_NOC_GC 8 150 #define SLAVE_SNOC_GEM_NOC_SF 9 150 #define SLAVE_SNOC_GEM_NOC_SF 9 151 #define SLAVE_OCIMEM 10 151 #define SLAVE_OCIMEM 10 152 #define SLAVE_PIMEM 11 152 #define SLAVE_PIMEM 11 153 #define SLAVE_SERVICE_SNOC 12 153 #define SLAVE_SERVICE_SNOC 12 154 #define SLAVE_PCIE_0 13 154 #define SLAVE_PCIE_0 13 155 #define SLAVE_PCIE_1 14 155 #define SLAVE_PCIE_1 14 156 #define SLAVE_QDSS_STM 15 156 #define SLAVE_QDSS_STM 15 157 #define SLAVE_TCU 16 157 #define SLAVE_TCU 16 158 158 159 #endif 159 #endif 160 160
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