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Linux/include/dt-bindings/mux/ti-serdes.h

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Diff markup

Differences between /include/dt-bindings/mux/ti-serdes.h (Version linux-6.12-rc7) and /include/dt-bindings/mux/ti-serdes.h (Version linux-2.6.0)


  1 /* SPDX-License-Identifier: GPL-2.0 */              1 
  2 /*                                                
  3  * This header provides constants for SERDES M    
  4  */                                               
  5                                                   
  6 #ifndef _DT_BINDINGS_MUX_TI_SERDES                
  7 #define _DT_BINDINGS_MUX_TI_SERDES                
  8                                                   
  9 /*                                                
 10  * These bindings are deprecated, because they    
 11  * concept of bindings but rather contain pure    
 12  * in DTS board files.                            
 13  * Instead include the header in the DTS sourc    
 14  */                                               
 15 #warning "These bindings are deprecated. Inste    
 16                                                   
 17 /* J721E */                                       
 18                                                   
 19 #define J721E_SERDES0_LANE0_QSGMII_LANE1          
 20 #define J721E_SERDES0_LANE0_PCIE0_LANE0           
 21 #define J721E_SERDES0_LANE0_USB3_0_SWAP           
 22 #define J721E_SERDES0_LANE0_IP4_UNUSED            
 23                                                   
 24 #define J721E_SERDES0_LANE1_QSGMII_LANE2          
 25 #define J721E_SERDES0_LANE1_PCIE0_LANE1           
 26 #define J721E_SERDES0_LANE1_USB3_0                
 27 #define J721E_SERDES0_LANE1_IP4_UNUSED            
 28                                                   
 29 #define J721E_SERDES1_LANE0_QSGMII_LANE3          
 30 #define J721E_SERDES1_LANE0_PCIE1_LANE0           
 31 #define J721E_SERDES1_LANE0_USB3_1_SWAP           
 32 #define J721E_SERDES1_LANE0_SGMII_LANE0           
 33                                                   
 34 #define J721E_SERDES1_LANE1_QSGMII_LANE4          
 35 #define J721E_SERDES1_LANE1_PCIE1_LANE1           
 36 #define J721E_SERDES1_LANE1_USB3_1                
 37 #define J721E_SERDES1_LANE1_SGMII_LANE1           
 38                                                   
 39 #define J721E_SERDES2_LANE0_IP1_UNUSED            
 40 #define J721E_SERDES2_LANE0_PCIE2_LANE0           
 41 #define J721E_SERDES2_LANE0_USB3_1_SWAP           
 42 #define J721E_SERDES2_LANE0_SGMII_LANE0           
 43                                                   
 44 #define J721E_SERDES2_LANE1_IP1_UNUSED            
 45 #define J721E_SERDES2_LANE1_PCIE2_LANE1           
 46 #define J721E_SERDES2_LANE1_USB3_1                
 47 #define J721E_SERDES2_LANE1_SGMII_LANE1           
 48                                                   
 49 #define J721E_SERDES3_LANE0_IP1_UNUSED            
 50 #define J721E_SERDES3_LANE0_PCIE3_LANE0           
 51 #define J721E_SERDES3_LANE0_USB3_0_SWAP           
 52 #define J721E_SERDES3_LANE0_IP4_UNUSED            
 53                                                   
 54 #define J721E_SERDES3_LANE1_IP1_UNUSED            
 55 #define J721E_SERDES3_LANE1_PCIE3_LANE1           
 56 #define J721E_SERDES3_LANE1_USB3_0                
 57 #define J721E_SERDES3_LANE1_IP4_UNUSED            
 58                                                   
 59 #define J721E_SERDES4_LANE0_EDP_LANE0             
 60 #define J721E_SERDES4_LANE0_IP2_UNUSED            
 61 #define J721E_SERDES4_LANE0_QSGMII_LANE5          
 62 #define J721E_SERDES4_LANE0_IP4_UNUSED            
 63                                                   
 64 #define J721E_SERDES4_LANE1_EDP_LANE1             
 65 #define J721E_SERDES4_LANE1_IP2_UNUSED            
 66 #define J721E_SERDES4_LANE1_QSGMII_LANE6          
 67 #define J721E_SERDES4_LANE1_IP4_UNUSED            
 68                                                   
 69 #define J721E_SERDES4_LANE2_EDP_LANE2             
 70 #define J721E_SERDES4_LANE2_IP2_UNUSED            
 71 #define J721E_SERDES4_LANE2_QSGMII_LANE7          
 72 #define J721E_SERDES4_LANE2_IP4_UNUSED            
 73                                                   
 74 #define J721E_SERDES4_LANE3_EDP_LANE3             
 75 #define J721E_SERDES4_LANE3_IP2_UNUSED            
 76 #define J721E_SERDES4_LANE3_QSGMII_LANE8          
 77 #define J721E_SERDES4_LANE3_IP4_UNUSED            
 78                                                   
 79 /* J7200 */                                       
 80                                                   
 81 #define J7200_SERDES0_LANE0_QSGMII_LANE3          
 82 #define J7200_SERDES0_LANE0_PCIE1_LANE0           
 83 #define J7200_SERDES0_LANE0_IP3_UNUSED            
 84 #define J7200_SERDES0_LANE0_IP4_UNUSED            
 85                                                   
 86 #define J7200_SERDES0_LANE1_QSGMII_LANE4          
 87 #define J7200_SERDES0_LANE1_PCIE1_LANE1           
 88 #define J7200_SERDES0_LANE1_IP3_UNUSED            
 89 #define J7200_SERDES0_LANE1_IP4_UNUSED            
 90                                                   
 91 #define J7200_SERDES0_LANE2_QSGMII_LANE1          
 92 #define J7200_SERDES0_LANE2_PCIE1_LANE2           
 93 #define J7200_SERDES0_LANE2_IP3_UNUSED            
 94 #define J7200_SERDES0_LANE2_IP4_UNUSED            
 95                                                   
 96 #define J7200_SERDES0_LANE3_QSGMII_LANE2          
 97 #define J7200_SERDES0_LANE3_PCIE1_LANE3           
 98 #define J7200_SERDES0_LANE3_USB                   
 99 #define J7200_SERDES0_LANE3_IP4_UNUSED            
100                                                   
101 /* AM64 */                                        
102                                                   
103 #define AM64_SERDES0_LANE0_PCIE0                  
104 #define AM64_SERDES0_LANE0_USB                    
105                                                   
106 /* J721S2 */                                      
107                                                   
108 #define J721S2_SERDES0_LANE0_EDP_LANE0            
109 #define J721S2_SERDES0_LANE0_PCIE1_LANE0          
110 #define J721S2_SERDES0_LANE0_IP3_UNUSED           
111 #define J721S2_SERDES0_LANE0_IP4_UNUSED           
112                                                   
113 #define J721S2_SERDES0_LANE1_EDP_LANE1            
114 #define J721S2_SERDES0_LANE1_PCIE1_LANE1          
115 #define J721S2_SERDES0_LANE1_USB                  
116 #define J721S2_SERDES0_LANE1_IP4_UNUSED           
117                                                   
118 #define J721S2_SERDES0_LANE2_EDP_LANE2            
119 #define J721S2_SERDES0_LANE2_PCIE1_LANE2          
120 #define J721S2_SERDES0_LANE2_IP3_UNUSED           
121 #define J721S2_SERDES0_LANE2_IP4_UNUSED           
122                                                   
123 #define J721S2_SERDES0_LANE3_EDP_LANE3            
124 #define J721S2_SERDES0_LANE3_PCIE1_LANE3          
125 #define J721S2_SERDES0_LANE3_USB                  
126 #define J721S2_SERDES0_LANE3_IP4_UNUSED           
127                                                   
128 /* J784S4 */                                      
129                                                   
130 #define J784S4_SERDES0_LANE0_IP1_UNUSED           
131 #define J784S4_SERDES0_LANE0_PCIE1_LANE0          
132 #define J784S4_SERDES0_LANE0_IP3_UNUSED           
133 #define J784S4_SERDES0_LANE0_IP4_UNUSED           
134                                                   
135 #define J784S4_SERDES0_LANE1_IP1_UNUSED           
136 #define J784S4_SERDES0_LANE1_PCIE1_LANE1          
137 #define J784S4_SERDES0_LANE1_IP3_UNUSED           
138 #define J784S4_SERDES0_LANE1_IP4_UNUSED           
139                                                   
140 #define J784S4_SERDES0_LANE2_PCIE3_LANE0          
141 #define J784S4_SERDES0_LANE2_PCIE1_LANE2          
142 #define J784S4_SERDES0_LANE2_IP3_UNUSED           
143 #define J784S4_SERDES0_LANE2_IP4_UNUSED           
144                                                   
145 #define J784S4_SERDES0_LANE3_PCIE3_LANE1          
146 #define J784S4_SERDES0_LANE3_PCIE1_LANE3          
147 #define J784S4_SERDES0_LANE3_USB                  
148 #define J784S4_SERDES0_LANE3_IP4_UNUSED           
149                                                   
150 #define J784S4_SERDES1_LANE0_QSGMII_LANE3         
151 #define J784S4_SERDES1_LANE0_PCIE0_LANE0          
152 #define J784S4_SERDES1_LANE0_IP3_UNUSED           
153 #define J784S4_SERDES1_LANE0_IP4_UNUSED           
154                                                   
155 #define J784S4_SERDES1_LANE1_QSGMII_LANE4         
156 #define J784S4_SERDES1_LANE1_PCIE0_LANE1          
157 #define J784S4_SERDES1_LANE1_IP3_UNUSED           
158 #define J784S4_SERDES1_LANE1_IP4_UNUSED           
159                                                   
160 #define J784S4_SERDES1_LANE2_QSGMII_LANE1         
161 #define J784S4_SERDES1_LANE2_PCIE0_LANE2          
162 #define J784S4_SERDES1_LANE2_PCIE2_LANE0          
163 #define J784S4_SERDES1_LANE2_IP4_UNUSED           
164                                                   
165 #define J784S4_SERDES1_LANE3_QSGMII_LANE2         
166 #define J784S4_SERDES1_LANE3_PCIE0_LANE3          
167 #define J784S4_SERDES1_LANE3_PCIE2_LANE1          
168 #define J784S4_SERDES1_LANE3_IP4_UNUSED           
169                                                   
170 #define J784S4_SERDES2_LANE0_QSGMII_LANE5         
171 #define J784S4_SERDES2_LANE0_IP2_UNUSED           
172 #define J784S4_SERDES2_LANE0_IP3_UNUSED           
173 #define J784S4_SERDES2_LANE0_IP4_UNUSED           
174                                                   
175 #define J784S4_SERDES2_LANE1_QSGMII_LANE6         
176 #define J784S4_SERDES2_LANE1_IP2_UNUSED           
177 #define J784S4_SERDES2_LANE1_IP3_UNUSED           
178 #define J784S4_SERDES2_LANE1_IP4_UNUSED           
179                                                   
180 #define J784S4_SERDES2_LANE2_QSGMII_LANE7         
181 #define J784S4_SERDES2_LANE2_QSGMII_LANE1         
182 #define J784S4_SERDES2_LANE2_IP3_UNUSED           
183 #define J784S4_SERDES2_LANE2_IP4_UNUSED           
184                                                   
185 #define J784S4_SERDES2_LANE3_QSGMII_LANE8         
186 #define J784S4_SERDES2_LANE3_QSGMII_LANE2         
187 #define J784S4_SERDES2_LANE3_IP3_UNUSED           
188 #define J784S4_SERDES2_LANE3_IP4_UNUSED           
189                                                   
190 #endif /* _DT_BINDINGS_MUX_TI_SERDES */           
191                                                   

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