1 /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* 3 * Device Tree defines for Lochnagar pinctrl 4 * 5 * Copyright (c) 2018 Cirrus Logic, Inc. and 6 * Cirrus Logic Internation 7 * 8 * Author: Charles Keepax <ckeepax@opensource. 9 */ 10 11 #ifndef DT_BINDINGS_PINCTRL_LOCHNAGAR_H 12 #define DT_BINDINGS_PINCTRL_LOCHNAGAR_H 13 14 #define LOCHNAGAR1_PIN_CDC_RESET 15 #define LOCHNAGAR1_PIN_DSP_RESET 16 #define LOCHNAGAR1_PIN_CDC_CIF1MODE 17 #define LOCHNAGAR1_PIN_NUM_GPIOS 18 19 #define LOCHNAGAR2_PIN_CDC_RESET 20 #define LOCHNAGAR2_PIN_DSP_RESET 21 #define LOCHNAGAR2_PIN_CDC_CIF1MODE 22 #define LOCHNAGAR2_PIN_CDC_LDOENA 23 #define LOCHNAGAR2_PIN_SPDIF_HWMODE 24 #define LOCHNAGAR2_PIN_SPDIF_RESET 25 #define LOCHNAGAR2_PIN_FPGA_GPIO1 26 #define LOCHNAGAR2_PIN_FPGA_GPIO2 27 #define LOCHNAGAR2_PIN_FPGA_GPIO3 28 #define LOCHNAGAR2_PIN_FPGA_GPIO4 29 #define LOCHNAGAR2_PIN_FPGA_GPIO5 30 #define LOCHNAGAR2_PIN_FPGA_GPIO6 31 #define LOCHNAGAR2_PIN_CDC_GPIO1 32 #define LOCHNAGAR2_PIN_CDC_GPIO2 33 #define LOCHNAGAR2_PIN_CDC_GPIO3 34 #define LOCHNAGAR2_PIN_CDC_GPIO4 35 #define LOCHNAGAR2_PIN_CDC_GPIO5 36 #define LOCHNAGAR2_PIN_CDC_GPIO6 37 #define LOCHNAGAR2_PIN_CDC_GPIO7 38 #define LOCHNAGAR2_PIN_CDC_GPIO8 39 #define LOCHNAGAR2_PIN_DSP_GPIO1 40 #define LOCHNAGAR2_PIN_DSP_GPIO2 41 #define LOCHNAGAR2_PIN_DSP_GPIO3 42 #define LOCHNAGAR2_PIN_DSP_GPIO4 43 #define LOCHNAGAR2_PIN_DSP_GPIO5 44 #define LOCHNAGAR2_PIN_DSP_GPIO6 45 #define LOCHNAGAR2_PIN_GF_GPIO2 46 #define LOCHNAGAR2_PIN_GF_GPIO3 47 #define LOCHNAGAR2_PIN_GF_GPIO7 48 #define LOCHNAGAR2_PIN_CDC_AIF1_BCLK 49 #define LOCHNAGAR2_PIN_CDC_AIF1_RXDAT 50 #define LOCHNAGAR2_PIN_CDC_AIF1_LRCLK 51 #define LOCHNAGAR2_PIN_CDC_AIF1_TXDAT 52 #define LOCHNAGAR2_PIN_CDC_AIF2_BCLK 53 #define LOCHNAGAR2_PIN_CDC_AIF2_RXDAT 54 #define LOCHNAGAR2_PIN_CDC_AIF2_LRCLK 55 #define LOCHNAGAR2_PIN_CDC_AIF2_TXDAT 56 #define LOCHNAGAR2_PIN_CDC_AIF3_BCLK 57 #define LOCHNAGAR2_PIN_CDC_AIF3_RXDAT 58 #define LOCHNAGAR2_PIN_CDC_AIF3_LRCLK 59 #define LOCHNAGAR2_PIN_CDC_AIF3_TXDAT 60 #define LOCHNAGAR2_PIN_DSP_AIF1_BCLK 61 #define LOCHNAGAR2_PIN_DSP_AIF1_RXDAT 62 #define LOCHNAGAR2_PIN_DSP_AIF1_LRCLK 63 #define LOCHNAGAR2_PIN_DSP_AIF1_TXDAT 64 #define LOCHNAGAR2_PIN_DSP_AIF2_BCLK 65 #define LOCHNAGAR2_PIN_DSP_AIF2_RXDAT 66 #define LOCHNAGAR2_PIN_DSP_AIF2_LRCLK 67 #define LOCHNAGAR2_PIN_DSP_AIF2_TXDAT 68 #define LOCHNAGAR2_PIN_PSIA1_BCLK 69 #define LOCHNAGAR2_PIN_PSIA1_RXDAT 70 #define LOCHNAGAR2_PIN_PSIA1_LRCLK 71 #define LOCHNAGAR2_PIN_PSIA1_TXDAT 72 #define LOCHNAGAR2_PIN_PSIA2_BCLK 73 #define LOCHNAGAR2_PIN_PSIA2_RXDAT 74 #define LOCHNAGAR2_PIN_PSIA2_LRCLK 75 #define LOCHNAGAR2_PIN_PSIA2_TXDAT 76 #define LOCHNAGAR2_PIN_GF_AIF3_BCLK 77 #define LOCHNAGAR2_PIN_GF_AIF3_RXDAT 78 #define LOCHNAGAR2_PIN_GF_AIF3_LRCLK 79 #define LOCHNAGAR2_PIN_GF_AIF3_TXDAT 80 #define LOCHNAGAR2_PIN_GF_AIF4_BCLK 81 #define LOCHNAGAR2_PIN_GF_AIF4_RXDAT 82 #define LOCHNAGAR2_PIN_GF_AIF4_LRCLK 83 #define LOCHNAGAR2_PIN_GF_AIF4_TXDAT 84 #define LOCHNAGAR2_PIN_GF_AIF1_BCLK 85 #define LOCHNAGAR2_PIN_GF_AIF1_RXDAT 86 #define LOCHNAGAR2_PIN_GF_AIF1_LRCLK 87 #define LOCHNAGAR2_PIN_GF_AIF1_TXDAT 88 #define LOCHNAGAR2_PIN_GF_AIF2_BCLK 89 #define LOCHNAGAR2_PIN_GF_AIF2_RXDAT 90 #define LOCHNAGAR2_PIN_GF_AIF2_LRCLK 91 #define LOCHNAGAR2_PIN_GF_AIF2_TXDAT 92 #define LOCHNAGAR2_PIN_DSP_UART1_RX 93 #define LOCHNAGAR2_PIN_DSP_UART1_TX 94 #define LOCHNAGAR2_PIN_DSP_UART2_RX 95 #define LOCHNAGAR2_PIN_DSP_UART2_TX 96 #define LOCHNAGAR2_PIN_GF_UART2_RX 97 #define LOCHNAGAR2_PIN_GF_UART2_TX 98 #define LOCHNAGAR2_PIN_USB_UART_RX 99 #define LOCHNAGAR2_PIN_CDC_PDMCLK1 100 #define LOCHNAGAR2_PIN_CDC_PDMDAT1 101 #define LOCHNAGAR2_PIN_CDC_PDMCLK2 102 #define LOCHNAGAR2_PIN_CDC_PDMDAT2 103 #define LOCHNAGAR2_PIN_CDC_DMICCLK1 104 #define LOCHNAGAR2_PIN_CDC_DMICDAT1 105 #define LOCHNAGAR2_PIN_CDC_DMICCLK2 106 #define LOCHNAGAR2_PIN_CDC_DMICDAT2 107 #define LOCHNAGAR2_PIN_CDC_DMICCLK3 108 #define LOCHNAGAR2_PIN_CDC_DMICDAT3 109 #define LOCHNAGAR2_PIN_CDC_DMICCLK4 110 #define LOCHNAGAR2_PIN_CDC_DMICDAT4 111 #define LOCHNAGAR2_PIN_DSP_DMICCLK1 112 #define LOCHNAGAR2_PIN_DSP_DMICDAT1 113 #define LOCHNAGAR2_PIN_DSP_DMICCLK2 114 #define LOCHNAGAR2_PIN_DSP_DMICDAT2 115 #define LOCHNAGAR2_PIN_I2C2_SCL 116 #define LOCHNAGAR2_PIN_I2C2_SDA 117 #define LOCHNAGAR2_PIN_I2C3_SCL 118 #define LOCHNAGAR2_PIN_I2C3_SDA 119 #define LOCHNAGAR2_PIN_I2C4_SCL 120 #define LOCHNAGAR2_PIN_I2C4_SDA 121 #define LOCHNAGAR2_PIN_DSP_STANDBY 122 #define LOCHNAGAR2_PIN_CDC_MCLK1 123 #define LOCHNAGAR2_PIN_CDC_MCLK2 124 #define LOCHNAGAR2_PIN_DSP_CLKIN 125 #define LOCHNAGAR2_PIN_PSIA1_MCLK 126 #define LOCHNAGAR2_PIN_PSIA2_MCLK 127 #define LOCHNAGAR2_PIN_GF_GPIO1 128 #define LOCHNAGAR2_PIN_GF_GPIO5 129 #define LOCHNAGAR2_PIN_DSP_GPIO20 130 #define LOCHNAGAR2_PIN_NUM_GPIOS 131 132 #endif 133
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